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authorFabio Estevam <fabio.estevam@freescale.com>2012-11-21 10:43:05 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2012-11-22 03:15:26 -0500
commitf40f38d1dc8dee0c19b2102ea549b696116f61da (patch)
tree1e64da0e8c16188cc4fc6e43df1869b4a9cc875d /arch/arm
parentd6aef84a48fa54ac606ae719fcd125199939f43d (diff)
ARM: mx5: Replace clk_register_clkdev with clock DT lookup
Similarly as it was done for mx6q, use a DT lookup in order to make maintainance task for the clock devices easier. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/imx51.dtsi39
-rw-r--r--arch/arm/boot/dts/imx53.dtsi48
-rw-r--r--arch/arm/mach-imx/clk-imx51-imx53.c26
-rw-r--r--arch/arm/mach-imx/imx51-dt.c28
-rw-r--r--arch/arm/mach-imx/mach-imx53.c31
5 files changed, 102 insertions, 70 deletions
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 44c7af791fa5..8cf69c702553 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -87,6 +87,8 @@
87 compatible = "fsl,imx51-esdhc"; 87 compatible = "fsl,imx51-esdhc";
88 reg = <0x70004000 0x4000>; 88 reg = <0x70004000 0x4000>;
89 interrupts = <1>; 89 interrupts = <1>;
90 clocks = <&clks 44>, <&clks 0>, <&clks 71>;
91 clock-names = "ipg", "ahb", "per";
90 status = "disabled"; 92 status = "disabled";
91 }; 93 };
92 94
@@ -94,6 +96,8 @@
94 compatible = "fsl,imx51-esdhc"; 96 compatible = "fsl,imx51-esdhc";
95 reg = <0x70008000 0x4000>; 97 reg = <0x70008000 0x4000>;
96 interrupts = <2>; 98 interrupts = <2>;
99 clocks = <&clks 45>, <&clks 0>, <&clks 72>;
100 clock-names = "ipg", "ahb", "per";
97 status = "disabled"; 101 status = "disabled";
98 }; 102 };
99 103
@@ -101,6 +105,8 @@
101 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 105 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
102 reg = <0x7000c000 0x4000>; 106 reg = <0x7000c000 0x4000>;
103 interrupts = <33>; 107 interrupts = <33>;
108 clocks = <&clks 32>, <&clks 33>;
109 clock-names = "ipg", "per";
104 status = "disabled"; 110 status = "disabled";
105 }; 111 };
106 112
@@ -110,6 +116,8 @@
110 compatible = "fsl,imx51-ecspi"; 116 compatible = "fsl,imx51-ecspi";
111 reg = <0x70010000 0x4000>; 117 reg = <0x70010000 0x4000>;
112 interrupts = <36>; 118 interrupts = <36>;
119 clocks = <&clks 51>, <&clks 52>;
120 clock-names = "ipg", "per";
113 status = "disabled"; 121 status = "disabled";
114 }; 122 };
115 123
@@ -117,6 +125,7 @@
117 compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; 125 compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
118 reg = <0x70014000 0x4000>; 126 reg = <0x70014000 0x4000>;
119 interrupts = <30>; 127 interrupts = <30>;
128 clocks = <&clks 49>;
120 fsl,fifo-depth = <15>; 129 fsl,fifo-depth = <15>;
121 fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */ 130 fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */
122 status = "disabled"; 131 status = "disabled";
@@ -126,6 +135,8 @@
126 compatible = "fsl,imx51-esdhc"; 135 compatible = "fsl,imx51-esdhc";
127 reg = <0x70020000 0x4000>; 136 reg = <0x70020000 0x4000>;
128 interrupts = <3>; 137 interrupts = <3>;
138 clocks = <&clks 46>, <&clks 0>, <&clks 73>;
139 clock-names = "ipg", "ahb", "per";
129 status = "disabled"; 140 status = "disabled";
130 }; 141 };
131 142
@@ -133,6 +144,8 @@
133 compatible = "fsl,imx51-esdhc"; 144 compatible = "fsl,imx51-esdhc";
134 reg = <0x70024000 0x4000>; 145 reg = <0x70024000 0x4000>;
135 interrupts = <4>; 146 interrupts = <4>;
147 clocks = <&clks 47>, <&clks 0>, <&clks 74>;
148 clock-names = "ipg", "ahb", "per";
136 status = "disabled"; 149 status = "disabled";
137 }; 150 };
138 }; 151 };
@@ -209,12 +222,14 @@
209 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; 222 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
210 reg = <0x73f98000 0x4000>; 223 reg = <0x73f98000 0x4000>;
211 interrupts = <58>; 224 interrupts = <58>;
225 clocks = <&clks 0>;
212 }; 226 };
213 227
214 wdog@73f9c000 { /* WDOG2 */ 228 wdog@73f9c000 { /* WDOG2 */
215 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; 229 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
216 reg = <0x73f9c000 0x4000>; 230 reg = <0x73f9c000 0x4000>;
217 interrupts = <59>; 231 interrupts = <59>;
232 clocks = <&clks 0>;
218 status = "disabled"; 233 status = "disabled";
219 }; 234 };
220 235
@@ -398,6 +413,8 @@
398 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 413 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
399 reg = <0x73fbc000 0x4000>; 414 reg = <0x73fbc000 0x4000>;
400 interrupts = <31>; 415 interrupts = <31>;
416 clocks = <&clks 28>, <&clks 29>;
417 clock-names = "ipg", "per";
401 status = "disabled"; 418 status = "disabled";
402 }; 419 };
403 420
@@ -405,8 +422,17 @@
405 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 422 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
406 reg = <0x73fc0000 0x4000>; 423 reg = <0x73fc0000 0x4000>;
407 interrupts = <32>; 424 interrupts = <32>;
425 clocks = <&clks 30>, <&clks 31>;
426 clock-names = "ipg", "per";
408 status = "disabled"; 427 status = "disabled";
409 }; 428 };
429
430 clks: ccm@73fd4000{
431 compatible = "fsl,imx51-ccm";
432 reg = <0x73fd4000 0x4000>;
433 interrupts = <0 71 0x04 0 72 0x04>;
434 #clock-cells = <1>;
435 };
410 }; 436 };
411 437
412 aips@80000000 { /* AIPS2 */ 438 aips@80000000 { /* AIPS2 */
@@ -422,6 +448,8 @@
422 compatible = "fsl,imx51-ecspi"; 448 compatible = "fsl,imx51-ecspi";
423 reg = <0x83fac000 0x4000>; 449 reg = <0x83fac000 0x4000>;
424 interrupts = <37>; 450 interrupts = <37>;
451 clocks = <&clks 53>, <&clks 54>;
452 clock-names = "ipg", "per";
425 status = "disabled"; 453 status = "disabled";
426 }; 454 };
427 455
@@ -429,6 +457,8 @@
429 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; 457 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
430 reg = <0x83fb0000 0x4000>; 458 reg = <0x83fb0000 0x4000>;
431 interrupts = <6>; 459 interrupts = <6>;
460 clocks = <&clks 56>, <&clks 56>;
461 clock-names = "ipg", "ahb";
432 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin"; 462 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
433 }; 463 };
434 464
@@ -438,6 +468,8 @@
438 compatible = "fsl,imx51-cspi", "fsl,imx35-cspi"; 468 compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
439 reg = <0x83fc0000 0x4000>; 469 reg = <0x83fc0000 0x4000>;
440 interrupts = <38>; 470 interrupts = <38>;
471 clocks = <&clks 55>, <&clks 0>;
472 clock-names = "ipg", "per";
441 status = "disabled"; 473 status = "disabled";
442 }; 474 };
443 475
@@ -447,6 +479,7 @@
447 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; 479 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
448 reg = <0x83fc4000 0x4000>; 480 reg = <0x83fc4000 0x4000>;
449 interrupts = <63>; 481 interrupts = <63>;
482 clocks = <&clks 35>;
450 status = "disabled"; 483 status = "disabled";
451 }; 484 };
452 485
@@ -456,6 +489,7 @@
456 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; 489 compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
457 reg = <0x83fc8000 0x4000>; 490 reg = <0x83fc8000 0x4000>;
458 interrupts = <62>; 491 interrupts = <62>;
492 clocks = <&clks 34>;
459 status = "disabled"; 493 status = "disabled";
460 }; 494 };
461 495
@@ -463,6 +497,7 @@
463 compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; 497 compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
464 reg = <0x83fcc000 0x4000>; 498 reg = <0x83fcc000 0x4000>;
465 interrupts = <29>; 499 interrupts = <29>;
500 clocks = <&clks 48>;
466 fsl,fifo-depth = <15>; 501 fsl,fifo-depth = <15>;
467 fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */ 502 fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */
468 status = "disabled"; 503 status = "disabled";
@@ -478,6 +513,7 @@
478 compatible = "fsl,imx51-nand"; 513 compatible = "fsl,imx51-nand";
479 reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>; 514 reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>;
480 interrupts = <8>; 515 interrupts = <8>;
516 clocks = <&clks 60>;
481 status = "disabled"; 517 status = "disabled";
482 }; 518 };
483 519
@@ -485,6 +521,7 @@
485 compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; 521 compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
486 reg = <0x83fe8000 0x4000>; 522 reg = <0x83fe8000 0x4000>;
487 interrupts = <96>; 523 interrupts = <96>;
524 clocks = <&clks 50>;
488 fsl,fifo-depth = <15>; 525 fsl,fifo-depth = <15>;
489 fsl,ssi-dma-events = <47 46 37 35>; /* TX0 RX0 TX1 RX1 */ 526 fsl,ssi-dma-events = <47 46 37 35>; /* TX0 RX0 TX1 RX1 */
490 status = "disabled"; 527 status = "disabled";
@@ -494,6 +531,8 @@
494 compatible = "fsl,imx51-fec", "fsl,imx27-fec"; 531 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
495 reg = <0x83fec000 0x4000>; 532 reg = <0x83fec000 0x4000>;
496 interrupts = <87>; 533 interrupts = <87>;
534 clocks = <&clks 42>, <&clks 42>, <&clks 42>;
535 clock-names = "ipg", "ahb", "ptp";
497 status = "disabled"; 536 status = "disabled";
498 }; 537 };
499 }; 538 };
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 8317a1727118..3be27723e8ab 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -92,6 +92,8 @@
92 compatible = "fsl,imx53-esdhc"; 92 compatible = "fsl,imx53-esdhc";
93 reg = <0x50004000 0x4000>; 93 reg = <0x50004000 0x4000>;
94 interrupts = <1>; 94 interrupts = <1>;
95 clocks = <&clks 44>, <&clks 0>, <&clks 71>;
96 clock-names = "ipg", "ahb", "per";
95 status = "disabled"; 97 status = "disabled";
96 }; 98 };
97 99
@@ -99,6 +101,8 @@
99 compatible = "fsl,imx53-esdhc"; 101 compatible = "fsl,imx53-esdhc";
100 reg = <0x50008000 0x4000>; 102 reg = <0x50008000 0x4000>;
101 interrupts = <2>; 103 interrupts = <2>;
104 clocks = <&clks 45>, <&clks 0>, <&clks 72>;
105 clock-names = "ipg", "ahb", "per";
102 status = "disabled"; 106 status = "disabled";
103 }; 107 };
104 108
@@ -106,6 +110,8 @@
106 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 110 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
107 reg = <0x5000c000 0x4000>; 111 reg = <0x5000c000 0x4000>;
108 interrupts = <33>; 112 interrupts = <33>;
113 clocks = <&clks 32>, <&clks 33>;
114 clock-names = "ipg", "per";
109 status = "disabled"; 115 status = "disabled";
110 }; 116 };
111 117
@@ -115,6 +121,8 @@
115 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; 121 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
116 reg = <0x50010000 0x4000>; 122 reg = <0x50010000 0x4000>;
117 interrupts = <36>; 123 interrupts = <36>;
124 clocks = <&clks 51>, <&clks 52>;
125 clock-names = "ipg", "per";
118 status = "disabled"; 126 status = "disabled";
119 }; 127 };
120 128
@@ -122,6 +130,7 @@
122 compatible = "fsl,imx53-ssi", "fsl,imx21-ssi"; 130 compatible = "fsl,imx53-ssi", "fsl,imx21-ssi";
123 reg = <0x50014000 0x4000>; 131 reg = <0x50014000 0x4000>;
124 interrupts = <30>; 132 interrupts = <30>;
133 clocks = <&clks 49>;
125 fsl,fifo-depth = <15>; 134 fsl,fifo-depth = <15>;
126 fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */ 135 fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */
127 status = "disabled"; 136 status = "disabled";
@@ -131,6 +140,8 @@
131 compatible = "fsl,imx53-esdhc"; 140 compatible = "fsl,imx53-esdhc";
132 reg = <0x50020000 0x4000>; 141 reg = <0x50020000 0x4000>;
133 interrupts = <3>; 142 interrupts = <3>;
143 clocks = <&clks 46>, <&clks 0>, <&clks 73>;
144 clock-names = "ipg", "ahb", "per";
134 status = "disabled"; 145 status = "disabled";
135 }; 146 };
136 147
@@ -138,6 +149,8 @@
138 compatible = "fsl,imx53-esdhc"; 149 compatible = "fsl,imx53-esdhc";
139 reg = <0x50024000 0x4000>; 150 reg = <0x50024000 0x4000>;
140 interrupts = <4>; 151 interrupts = <4>;
152 clocks = <&clks 47>, <&clks 0>, <&clks 74>;
153 clock-names = "ipg", "ahb", "per";
141 status = "disabled"; 154 status = "disabled";
142 }; 155 };
143 }; 156 };
@@ -214,12 +227,14 @@
214 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; 227 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
215 reg = <0x53f98000 0x4000>; 228 reg = <0x53f98000 0x4000>;
216 interrupts = <58>; 229 interrupts = <58>;
230 clocks = <&clks 0>;
217 }; 231 };
218 232
219 wdog@53f9c000 { /* WDOG2 */ 233 wdog@53f9c000 { /* WDOG2 */
220 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; 234 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
221 reg = <0x53f9c000 0x4000>; 235 reg = <0x53f9c000 0x4000>;
222 interrupts = <59>; 236 interrupts = <59>;
237 clocks = <&clks 0>;
223 status = "disabled"; 238 status = "disabled";
224 }; 239 };
225 240
@@ -382,6 +397,8 @@
382 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 397 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
383 reg = <0x53fbc000 0x4000>; 398 reg = <0x53fbc000 0x4000>;
384 interrupts = <31>; 399 interrupts = <31>;
400 clocks = <&clks 28>, <&clks 29>;
401 clock-names = "ipg", "per";
385 status = "disabled"; 402 status = "disabled";
386 }; 403 };
387 404
@@ -389,6 +406,8 @@
389 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 406 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
390 reg = <0x53fc0000 0x4000>; 407 reg = <0x53fc0000 0x4000>;
391 interrupts = <32>; 408 interrupts = <32>;
409 clocks = <&clks 30>, <&clks 31>;
410 clock-names = "ipg", "per";
392 status = "disabled"; 411 status = "disabled";
393 }; 412 };
394 413
@@ -396,6 +415,8 @@
396 compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; 415 compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";
397 reg = <0x53fc8000 0x4000>; 416 reg = <0x53fc8000 0x4000>;
398 interrupts = <82>; 417 interrupts = <82>;
418 clocks = <&clks 158>, <&clks 157>;
419 clock-names = "ipg", "per";
399 status = "disabled"; 420 status = "disabled";
400 }; 421 };
401 422
@@ -403,9 +424,18 @@
403 compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; 424 compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";
404 reg = <0x53fcc000 0x4000>; 425 reg = <0x53fcc000 0x4000>;
405 interrupts = <83>; 426 interrupts = <83>;
427 clocks = <&clks 158>, <&clks 157>;
428 clock-names = "ipg", "per";
406 status = "disabled"; 429 status = "disabled";
407 }; 430 };
408 431
432 clks: ccm@53fd4000{
433 compatible = "fsl,imx53-ccm";
434 reg = <0x53fd4000 0x4000>;
435 interrupts = <0 71 0x04 0 72 0x04>;
436 #clock-cells = <1>;
437 };
438
409 gpio5: gpio@53fdc000 { 439 gpio5: gpio@53fdc000 {
410 compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; 440 compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
411 reg = <0x53fdc000 0x4000>; 441 reg = <0x53fdc000 0x4000>;
@@ -442,6 +472,7 @@
442 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; 472 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
443 reg = <0x53fec000 0x4000>; 473 reg = <0x53fec000 0x4000>;
444 interrupts = <64>; 474 interrupts = <64>;
475 clocks = <&clks 88>;
445 status = "disabled"; 476 status = "disabled";
446 }; 477 };
447 478
@@ -449,6 +480,8 @@
449 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 480 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
450 reg = <0x53ff0000 0x4000>; 481 reg = <0x53ff0000 0x4000>;
451 interrupts = <13>; 482 interrupts = <13>;
483 clocks = <&clks 65>, <&clks 66>;
484 clock-names = "ipg", "per";
452 status = "disabled"; 485 status = "disabled";
453 }; 486 };
454 }; 487 };
@@ -464,6 +497,8 @@
464 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 497 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
465 reg = <0x63f90000 0x4000>; 498 reg = <0x63f90000 0x4000>;
466 interrupts = <86>; 499 interrupts = <86>;
500 clocks = <&clks 67>, <&clks 68>;
501 clock-names = "ipg", "per";
467 status = "disabled"; 502 status = "disabled";
468 }; 503 };
469 504
@@ -473,6 +508,8 @@
473 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; 508 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
474 reg = <0x63fac000 0x4000>; 509 reg = <0x63fac000 0x4000>;
475 interrupts = <37>; 510 interrupts = <37>;
511 clocks = <&clks 53>, <&clks 54>;
512 clock-names = "ipg", "per";
476 status = "disabled"; 513 status = "disabled";
477 }; 514 };
478 515
@@ -480,6 +517,8 @@
480 compatible = "fsl,imx53-sdma", "fsl,imx35-sdma"; 517 compatible = "fsl,imx53-sdma", "fsl,imx35-sdma";
481 reg = <0x63fb0000 0x4000>; 518 reg = <0x63fb0000 0x4000>;
482 interrupts = <6>; 519 interrupts = <6>;
520 clocks = <&clks 56>, <&clks 56>;
521 clock-names = "ipg", "ahb";
483 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; 522 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
484 }; 523 };
485 524
@@ -489,6 +528,8 @@
489 compatible = "fsl,imx53-cspi", "fsl,imx35-cspi"; 528 compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";
490 reg = <0x63fc0000 0x4000>; 529 reg = <0x63fc0000 0x4000>;
491 interrupts = <38>; 530 interrupts = <38>;
531 clocks = <&clks 55>, <&clks 0>;
532 clock-names = "ipg", "per";
492 status = "disabled"; 533 status = "disabled";
493 }; 534 };
494 535
@@ -498,6 +539,7 @@
498 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; 539 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
499 reg = <0x63fc4000 0x4000>; 540 reg = <0x63fc4000 0x4000>;
500 interrupts = <63>; 541 interrupts = <63>;
542 clocks = <&clks 35>;
501 status = "disabled"; 543 status = "disabled";
502 }; 544 };
503 545
@@ -507,6 +549,7 @@
507 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; 549 compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
508 reg = <0x63fc8000 0x4000>; 550 reg = <0x63fc8000 0x4000>;
509 interrupts = <62>; 551 interrupts = <62>;
552 clocks = <&clks 34>;
510 status = "disabled"; 553 status = "disabled";
511 }; 554 };
512 555
@@ -514,6 +557,7 @@
514 compatible = "fsl,imx53-ssi", "fsl,imx21-ssi"; 557 compatible = "fsl,imx53-ssi", "fsl,imx21-ssi";
515 reg = <0x63fcc000 0x4000>; 558 reg = <0x63fcc000 0x4000>;
516 interrupts = <29>; 559 interrupts = <29>;
560 clocks = <&clks 48>;
517 fsl,fifo-depth = <15>; 561 fsl,fifo-depth = <15>;
518 fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */ 562 fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */
519 status = "disabled"; 563 status = "disabled";
@@ -529,6 +573,7 @@
529 compatible = "fsl,imx53-nand"; 573 compatible = "fsl,imx53-nand";
530 reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>; 574 reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>;
531 interrupts = <8>; 575 interrupts = <8>;
576 clocks = <&clks 60>;
532 status = "disabled"; 577 status = "disabled";
533 }; 578 };
534 579
@@ -536,6 +581,7 @@
536 compatible = "fsl,imx53-ssi", "fsl,imx21-ssi"; 581 compatible = "fsl,imx53-ssi", "fsl,imx21-ssi";
537 reg = <0x63fe8000 0x4000>; 582 reg = <0x63fe8000 0x4000>;
538 interrupts = <96>; 583 interrupts = <96>;
584 clocks = <&clks 50>;
539 fsl,fifo-depth = <15>; 585 fsl,fifo-depth = <15>;
540 fsl,ssi-dma-events = <47 46 45 44>; /* TX0 RX0 TX1 RX1 */ 586 fsl,ssi-dma-events = <47 46 45 44>; /* TX0 RX0 TX1 RX1 */
541 status = "disabled"; 587 status = "disabled";
@@ -545,6 +591,8 @@
545 compatible = "fsl,imx53-fec", "fsl,imx25-fec"; 591 compatible = "fsl,imx53-fec", "fsl,imx25-fec";
546 reg = <0x63fec000 0x4000>; 592 reg = <0x63fec000 0x4000>;
547 interrupts = <87>; 593 interrupts = <87>;
594 clocks = <&clks 42>, <&clks 42>, <&clks 42>;
595 clock-names = "ipg", "ahb", "ptp";
548 status = "disabled"; 596 status = "disabled";
549 }; 597 };
550 }; 598 };
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index 73b241db63c8..e8c0473c7568 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -87,6 +87,7 @@ enum imx5_clks {
87}; 87};
88 88
89static struct clk *clk[clk_max]; 89static struct clk *clk[clk_max];
90static struct clk_onecell_data clk_data;
90 91
91static void __init mx5_clocks_common_init(unsigned long rate_ckil, 92static void __init mx5_clocks_common_init(unsigned long rate_ckil,
92 unsigned long rate_osc, unsigned long rate_ckih1, 93 unsigned long rate_osc, unsigned long rate_ckih1,
@@ -318,6 +319,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
318 unsigned long rate_ckih1, unsigned long rate_ckih2) 319 unsigned long rate_ckih1, unsigned long rate_ckih2)
319{ 320{
320 int i; 321 int i;
322 struct device_node *np;
321 323
322 clk[pll1_sw] = imx_clk_pllv2("pll1_sw", "osc", MX51_DPLL1_BASE); 324 clk[pll1_sw] = imx_clk_pllv2("pll1_sw", "osc", MX51_DPLL1_BASE);
323 clk[pll2_sw] = imx_clk_pllv2("pll2_sw", "osc", MX51_DPLL2_BASE); 325 clk[pll2_sw] = imx_clk_pllv2("pll2_sw", "osc", MX51_DPLL2_BASE);
@@ -346,6 +348,11 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
346 pr_err("i.MX51 clk %d: register failed with %ld\n", 348 pr_err("i.MX51 clk %d: register failed with %ld\n",
347 i, PTR_ERR(clk[i])); 349 i, PTR_ERR(clk[i]));
348 350
351 np = of_find_compatible_node(NULL, NULL, "fsl,imx51-ccm");
352 clk_data.clks = clk;
353 clk_data.clk_num = ARRAY_SIZE(clk);
354 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
355
349 mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2); 356 mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2);
350 357
351 clk_register_clkdev(clk[hsi2c_gate], NULL, "imx21-i2c.2"); 358 clk_register_clkdev(clk[hsi2c_gate], NULL, "imx21-i2c.2");
@@ -368,10 +375,6 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
368 clk_register_clkdev(clk[esdhc4_ipg_gate], "ipg", "sdhci-esdhc-imx51.3"); 375 clk_register_clkdev(clk[esdhc4_ipg_gate], "ipg", "sdhci-esdhc-imx51.3");
369 clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx51.3"); 376 clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx51.3");
370 clk_register_clkdev(clk[esdhc4_per_gate], "per", "sdhci-esdhc-imx51.3"); 377 clk_register_clkdev(clk[esdhc4_per_gate], "per", "sdhci-esdhc-imx51.3");
371 clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "83fcc000.ssi");
372 clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "70014000.ssi");
373 clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "83fe8000.ssi");
374 clk_register_clkdev(clk[nfc_gate], NULL, "83fdb000.nand");
375 378
376 /* set the usboh3 parent to pll2_sw */ 379 /* set the usboh3 parent to pll2_sw */
377 clk_set_parent(clk[usboh3_sel], clk[pll2_sw]); 380 clk_set_parent(clk[usboh3_sel], clk[pll2_sw]);
@@ -395,6 +398,7 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
395{ 398{
396 int i; 399 int i;
397 unsigned long r; 400 unsigned long r;
401 struct device_node *np;
398 402
399 clk[pll1_sw] = imx_clk_pllv2("pll1_sw", "osc", MX53_DPLL1_BASE); 403 clk[pll1_sw] = imx_clk_pllv2("pll1_sw", "osc", MX53_DPLL1_BASE);
400 clk[pll2_sw] = imx_clk_pllv2("pll2_sw", "osc", MX53_DPLL2_BASE); 404 clk[pll2_sw] = imx_clk_pllv2("pll2_sw", "osc", MX53_DPLL2_BASE);
@@ -439,6 +443,11 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
439 pr_err("i.MX53 clk %d: register failed with %ld\n", 443 pr_err("i.MX53 clk %d: register failed with %ld\n",
440 i, PTR_ERR(clk[i])); 444 i, PTR_ERR(clk[i]));
441 445
446 np = of_find_compatible_node(NULL, NULL, "fsl,imx53-ccm");
447 clk_data.clks = clk;
448 clk_data.clk_num = ARRAY_SIZE(clk);
449 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
450
442 mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2); 451 mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2);
443 452
444 clk_register_clkdev(clk[vpu_gate], NULL, "imx53-vpu.0"); 453 clk_register_clkdev(clk[vpu_gate], NULL, "imx53-vpu.0");
@@ -461,15 +470,6 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
461 clk_register_clkdev(clk[esdhc4_ipg_gate], "ipg", "sdhci-esdhc-imx53.3"); 470 clk_register_clkdev(clk[esdhc4_ipg_gate], "ipg", "sdhci-esdhc-imx53.3");
462 clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx53.3"); 471 clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx53.3");
463 clk_register_clkdev(clk[esdhc4_per_gate], "per", "sdhci-esdhc-imx53.3"); 472 clk_register_clkdev(clk[esdhc4_per_gate], "per", "sdhci-esdhc-imx53.3");
464 clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "63fcc000.ssi");
465 clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "50014000.ssi");
466 clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "63fd0000.ssi");
467 clk_register_clkdev(clk[nfc_gate], NULL, "63fdb000.nand");
468 clk_register_clkdev(clk[can1_ipg_gate], "ipg", "53fc8000.can");
469 clk_register_clkdev(clk[can1_serial_gate], "per", "53fc8000.can");
470 clk_register_clkdev(clk[can2_ipg_gate], "ipg", "53fcc000.can");
471 clk_register_clkdev(clk[can2_serial_gate], "per", "53fcc000.can");
472 clk_register_clkdev(clk[dummy], NULL, "53fa4000.rtc");
473 473
474 /* set SDHC root clock to 200MHZ*/ 474 /* set SDHC root clock to 200MHZ*/
475 clk_set_rate(clk[esdhc_a_podf], 200000000); 475 clk_set_rate(clk[esdhc_a_podf], 200000000);
diff --git a/arch/arm/mach-imx/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c
index 50742990a136..5ffa40c673f8 100644
--- a/arch/arm/mach-imx/imx51-dt.c
+++ b/arch/arm/mach-imx/imx51-dt.c
@@ -19,35 +19,9 @@
19#include "common.h" 19#include "common.h"
20#include "mx51.h" 20#include "mx51.h"
21 21
22/*
23 * Lookup table for attaching a specific name and platform_data pointer to
24 * devices as they get created by of_platform_populate(). Ideally this table
25 * would not exist, but the current clock implementation depends on some devices
26 * having a specific name.
27 */
28static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
29 OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART1_BASE_ADDR, "imx21-uart.0", NULL),
30 OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART2_BASE_ADDR, "imx21-uart.1", NULL),
31 OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART3_BASE_ADDR, "imx21-uart.2", NULL),
32 OF_DEV_AUXDATA("fsl,imx51-fec", MX51_FEC_BASE_ADDR, "imx27-fec.0", NULL),
33 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC1_BASE_ADDR, "sdhci-esdhc-imx51.0", NULL),
34 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC2_BASE_ADDR, "sdhci-esdhc-imx51.1", NULL),
35 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC3_BASE_ADDR, "sdhci-esdhc-imx51.2", NULL),
36 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC4_BASE_ADDR, "sdhci-esdhc-imx51.3", NULL),
37 OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
38 OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
39 OF_DEV_AUXDATA("fsl,imx51-cspi", MX51_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
40 OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C1_BASE_ADDR, "imx21-i2c.0", NULL),
41 OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C2_BASE_ADDR, "imx21-i2c.1", NULL),
42 OF_DEV_AUXDATA("fsl,imx51-sdma", MX51_SDMA_BASE_ADDR, "imx35-sdma", NULL),
43 OF_DEV_AUXDATA("fsl,imx51-wdt", MX51_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
44 { /* sentinel */ }
45};
46
47static void __init imx51_dt_init(void) 22static void __init imx51_dt_init(void)
48{ 23{
49 of_platform_populate(NULL, of_default_bus_match_table, 24 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
50 imx51_auxdata_lookup, NULL);
51} 25}
52 26
53static void __init imx51_timer_init(void) 27static void __init imx51_timer_init(void)
diff --git a/arch/arm/mach-imx/mach-imx53.c b/arch/arm/mach-imx/mach-imx53.c
index e71e62610eba..860284dea0e7 100644
--- a/arch/arm/mach-imx/mach-imx53.c
+++ b/arch/arm/mach-imx/mach-imx53.c
@@ -23,34 +23,6 @@
23#include "common.h" 23#include "common.h"
24#include "mx53.h" 24#include "mx53.h"
25 25
26/*
27 * Lookup table for attaching a specific name and platform_data pointer to
28 * devices as they get created by of_platform_populate(). Ideally this table
29 * would not exist, but the current clock implementation depends on some devices
30 * having a specific name.
31 */
32static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
33 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART1_BASE_ADDR, "imx21-uart.0", NULL),
34 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART2_BASE_ADDR, "imx21-uart.1", NULL),
35 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART3_BASE_ADDR, "imx21-uart.2", NULL),
36 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART4_BASE_ADDR, "imx21-uart.3", NULL),
37 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART5_BASE_ADDR, "imx21-uart.4", NULL),
38 OF_DEV_AUXDATA("fsl,imx53-fec", MX53_FEC_BASE_ADDR, "imx25-fec.0", NULL),
39 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC1_BASE_ADDR, "sdhci-esdhc-imx53.0", NULL),
40 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC2_BASE_ADDR, "sdhci-esdhc-imx53.1", NULL),
41 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC3_BASE_ADDR, "sdhci-esdhc-imx53.2", NULL),
42 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC4_BASE_ADDR, "sdhci-esdhc-imx53.3", NULL),
43 OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
44 OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
45 OF_DEV_AUXDATA("fsl,imx53-cspi", MX53_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
46 OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx21-i2c.0", NULL),
47 OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx21-i2c.1", NULL),
48 OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx21-i2c.2", NULL),
49 OF_DEV_AUXDATA("fsl,imx53-sdma", MX53_SDMA_BASE_ADDR, "imx35-sdma", NULL),
50 OF_DEV_AUXDATA("fsl,imx53-wdt", MX53_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
51 { /* sentinel */ }
52};
53
54static void __init imx53_qsb_init(void) 26static void __init imx53_qsb_init(void)
55{ 27{
56 struct clk *clk; 28 struct clk *clk;
@@ -69,8 +41,7 @@ static void __init imx53_dt_init(void)
69 if (of_machine_is_compatible("fsl,imx53-qsb")) 41 if (of_machine_is_compatible("fsl,imx53-qsb"))
70 imx53_qsb_init(); 42 imx53_qsb_init();
71 43
72 of_platform_populate(NULL, of_default_bus_match_table, 44 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
73 imx53_auxdata_lookup, NULL);
74} 45}
75 46
76static void __init imx53_timer_init(void) 47static void __init imx53_timer_init(void)
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-11 19:19:13 -0500