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authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-06 19:58:33 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-06 19:58:33 -0500
commitec773e99ab4abce07b1ae23117179c2861831964 (patch)
tree630de8df04406f7de326349169d9a61e51864c99 /arch/arm
parent534baf55dd16d5de9c8d045190469eef9d31ffff (diff)
parent7a3f8de5a3c36e5fde130cae74a06663b59837ae (diff)
Merge branch 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
* 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: ARM: PXA: fix includes in pxa2xx_cm_x2xx PCMCIA driver ARM: PXA: fix gpio-pxa.h build errors ARM: 7142/1: davinci: mark GPIO implementation complex ARM: 7134/1: Revert "EXYNOS4: Fix routing timer interrupt to offline CPU" ARM: PXA: eseries: fix eseries_register_clks section mismatch warning ARM: PXA: fix lubbock PCMCIA driver build error
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-davinci/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-exynos/platsmp.c2
-rw-r--r--arch/arm/mach-pxa/eseries.c2
-rw-r--r--arch/arm/mach-pxa/eseries.h1
-rw-r--r--arch/arm/mach-pxa/include/mach/gpio-pxa.h2
5 files changed, 4 insertions, 5 deletions
diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h
index fbaae4772b91..960e9de47e1e 100644
--- a/arch/arm/mach-davinci/include/mach/gpio.h
+++ b/arch/arm/mach-davinci/include/mach/gpio.h
@@ -15,6 +15,8 @@
15 15
16#include <asm-generic/gpio.h> 16#include <asm-generic/gpio.h>
17 17
18#define __ARM_GPIOLIB_COMPLEX
19
18/* The inline versions use the static inlines in the driver header */ 20/* The inline versions use the static inlines in the driver header */
19#include "gpio-davinci.h" 21#include "gpio-davinci.h"
20 22
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 05595407e9ff..69ffb2fb3875 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -110,8 +110,6 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
110 */ 110 */
111 spin_lock(&boot_lock); 111 spin_lock(&boot_lock);
112 spin_unlock(&boot_lock); 112 spin_unlock(&boot_lock);
113
114 set_cpu_online(cpu, true);
115} 113}
116 114
117int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) 115int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index 8e697dd8accd..d82b7aa3c096 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -144,7 +144,7 @@ static struct clk_lookup eseries_clkregs[] = {
144 INIT_CLKREG(&tmio_dummy_clk, NULL, "CLK_CK32K"), 144 INIT_CLKREG(&tmio_dummy_clk, NULL, "CLK_CK32K"),
145}; 145};
146 146
147void eseries_register_clks(void) 147static void __init eseries_register_clks(void)
148{ 148{
149 clkdev_add_table(eseries_clkregs, ARRAY_SIZE(eseries_clkregs)); 149 clkdev_add_table(eseries_clkregs, ARRAY_SIZE(eseries_clkregs));
150} 150}
diff --git a/arch/arm/mach-pxa/eseries.h b/arch/arm/mach-pxa/eseries.h
index be921965e91a..b96949dd5adb 100644
--- a/arch/arm/mach-pxa/eseries.h
+++ b/arch/arm/mach-pxa/eseries.h
@@ -11,5 +11,4 @@ extern int eseries_tmio_resume(struct platform_device *dev);
11extern void eseries_get_tmio_gpios(void); 11extern void eseries_get_tmio_gpios(void);
12extern struct resource eseries_tmio_resources[]; 12extern struct resource eseries_tmio_resources[];
13extern struct platform_device e300_tc6387xb_device; 13extern struct platform_device e300_tc6387xb_device;
14extern void eseries_register_clks(void);
15 14
diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
index 576868f8b8c5..41b4c93a96c2 100644
--- a/arch/arm/mach-pxa/include/mach/gpio-pxa.h
+++ b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
@@ -25,7 +25,7 @@
25#define GPIO_REGS_VIRT io_p2v(0x40E00000) 25#define GPIO_REGS_VIRT io_p2v(0x40E00000)
26 26
27#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) 27#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
28#define GPIO_REG(x) (GPIO_REGS_VIRT + (x)) 28#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
29 29
30/* GPIO Pin Level Registers */ 30/* GPIO Pin Level Registers */
31#define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00) 31#define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00)