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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-12-06 04:59:38 -0500
committerSimon Horman <horms+renesas@verge.net.au>2013-12-24 07:09:14 -0500
commitd95a95a85bb2ebb628f2d1667e7e45ad8fdf0297 (patch)
tree42c7079d3bd76372af71dba00b4327fcd5a9c107 /arch/arm
parent23399a6ff8e2070e7695fa6c1283212d1d69b372 (diff)
ARM: shmobile: r8a7791: Declare SCIF register base and IRQ as resources
Passing the register base address and IRQ through platform data is deprecated. Use resources instead. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7791.c15
1 files changed, 10 insertions, 5 deletions
diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
index 3fe0d7de08fc..f15b53786713 100644
--- a/arch/arm/mach-shmobile/setup-r8a7791.c
+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
@@ -87,11 +87,14 @@ void __init r8a7791_pinmux_init(void)
87#define __R8A7791_SCIF(scif_type, algo, index, baseaddr, irq) \ 87#define __R8A7791_SCIF(scif_type, algo, index, baseaddr, irq) \
88static struct plat_sci_port scif##index##_platform_data = { \ 88static struct plat_sci_port scif##index##_platform_data = { \
89 .type = scif_type, \ 89 .type = scif_type, \
90 .mapbase = baseaddr, \
91 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \ 90 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
92 .scbrr_algo_id = algo, \ 91 .scbrr_algo_id = algo, \
93 .scscr = SCSCR_RE | SCSCR_TE, \ 92 .scscr = SCSCR_RE | SCSCR_TE, \
94 .irqs = SCIx_IRQ_MUXED(irq), \ 93}; \
94 \
95static struct resource scif##index##_resources[] = { \
96 DEFINE_RES_MEM(baseaddr, 0x100), \
97 DEFINE_RES_IRQ(irq), \
95} 98}
96 99
97#define R8A7791_SCIF(index, baseaddr, irq) \ 100#define R8A7791_SCIF(index, baseaddr, irq) \
@@ -120,9 +123,11 @@ R8A7791_SCIFA(13, 0xe6c78000, gic_spi(30)); /* SCIFA4 */
120R8A7791_SCIFA(14, 0xe6c80000, gic_spi(31)); /* SCIFA5 */ 123R8A7791_SCIFA(14, 0xe6c80000, gic_spi(31)); /* SCIFA5 */
121 124
122#define r8a7791_register_scif(index) \ 125#define r8a7791_register_scif(index) \
123 platform_device_register_data(&platform_bus, "sh-sci", index, \ 126 platform_device_register_resndata(&platform_bus, "sh-sci", index, \
124 &scif##index##_platform_data, \ 127 scif##index##_resources, \
125 sizeof(scif##index##_platform_data)) 128 ARRAY_SIZE(scif##index##_resources), \
129 &scif##index##_platform_data, \
130 sizeof(scif##index##_platform_data))
126 131
127static const struct sh_timer_config cmt00_platform_data __initconst = { 132static const struct sh_timer_config cmt00_platform_data __initconst = {
128 .name = "CMT00", 133 .name = "CMT00",