diff options
author | Florian Tobias Schandinat <FlorianSchandinat@gmx.de> | 2012-07-25 04:55:46 -0400 |
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committer | Florian Tobias Schandinat <FlorianSchandinat@gmx.de> | 2012-07-25 04:55:46 -0400 |
commit | d9053b487965042b9c849ce40c7f1fb7a0b84b39 (patch) | |
tree | 1fbb2559dd8fd400cf1dff5711cc5e408ea79ef6 /arch/arm | |
parent | 4c5b1fb8a1348542afb153aef72f6067989f578e (diff) | |
parent | 974a65825e0b5fbda49605f0416a2c975d66e9e6 (diff) |
Merge branch 'for-florian' of git://gitorious.org/linux-omap-dss2/linux into fbdev-next
Conflicts:
drivers/video/omap2/dss/core.c
drivers/video/omap2/dss/dispc.c
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-omap2/display.c | 25 |
1 files changed, 21 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index 5fb47a14f4ba..af1ed7d24a1f 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c | |||
@@ -37,6 +37,7 @@ | |||
37 | 37 | ||
38 | #define DISPC_CONTROL 0x0040 | 38 | #define DISPC_CONTROL 0x0040 |
39 | #define DISPC_CONTROL2 0x0238 | 39 | #define DISPC_CONTROL2 0x0238 |
40 | #define DISPC_CONTROL3 0x0848 | ||
40 | #define DISPC_IRQSTATUS 0x0018 | 41 | #define DISPC_IRQSTATUS 0x0018 |
41 | 42 | ||
42 | #define DSS_SYSCONFIG 0x10 | 43 | #define DSS_SYSCONFIG 0x10 |
@@ -52,6 +53,7 @@ | |||
52 | #define EVSYNC_EVEN_IRQ_SHIFT 2 | 53 | #define EVSYNC_EVEN_IRQ_SHIFT 2 |
53 | #define EVSYNC_ODD_IRQ_SHIFT 3 | 54 | #define EVSYNC_ODD_IRQ_SHIFT 3 |
54 | #define FRAMEDONE2_IRQ_SHIFT 22 | 55 | #define FRAMEDONE2_IRQ_SHIFT 22 |
56 | #define FRAMEDONE3_IRQ_SHIFT 30 | ||
55 | #define FRAMEDONETV_IRQ_SHIFT 24 | 57 | #define FRAMEDONETV_IRQ_SHIFT 24 |
56 | 58 | ||
57 | /* | 59 | /* |
@@ -376,7 +378,7 @@ int __init omap_display_init(struct omap_dss_board_info *board_data) | |||
376 | static void dispc_disable_outputs(void) | 378 | static void dispc_disable_outputs(void) |
377 | { | 379 | { |
378 | u32 v, irq_mask = 0; | 380 | u32 v, irq_mask = 0; |
379 | bool lcd_en, digit_en, lcd2_en = false; | 381 | bool lcd_en, digit_en, lcd2_en = false, lcd3_en = false; |
380 | int i; | 382 | int i; |
381 | struct omap_dss_dispc_dev_attr *da; | 383 | struct omap_dss_dispc_dev_attr *da; |
382 | struct omap_hwmod *oh; | 384 | struct omap_hwmod *oh; |
@@ -405,7 +407,13 @@ static void dispc_disable_outputs(void) | |||
405 | lcd2_en = v & LCD_EN_MASK; | 407 | lcd2_en = v & LCD_EN_MASK; |
406 | } | 408 | } |
407 | 409 | ||
408 | if (!(lcd_en | digit_en | lcd2_en)) | 410 | /* store value of LCDENABLE for LCD3 */ |
411 | if (da->manager_count > 3) { | ||
412 | v = omap_hwmod_read(oh, DISPC_CONTROL3); | ||
413 | lcd3_en = v & LCD_EN_MASK; | ||
414 | } | ||
415 | |||
416 | if (!(lcd_en | digit_en | lcd2_en | lcd3_en)) | ||
409 | return; /* no managers currently enabled */ | 417 | return; /* no managers currently enabled */ |
410 | 418 | ||
411 | /* | 419 | /* |
@@ -426,10 +434,12 @@ static void dispc_disable_outputs(void) | |||
426 | 434 | ||
427 | if (lcd2_en) | 435 | if (lcd2_en) |
428 | irq_mask |= 1 << FRAMEDONE2_IRQ_SHIFT; | 436 | irq_mask |= 1 << FRAMEDONE2_IRQ_SHIFT; |
437 | if (lcd3_en) | ||
438 | irq_mask |= 1 << FRAMEDONE3_IRQ_SHIFT; | ||
429 | 439 | ||
430 | /* | 440 | /* |
431 | * clear any previous FRAMEDONE, FRAMEDONETV, | 441 | * clear any previous FRAMEDONE, FRAMEDONETV, |
432 | * EVSYNC_EVEN/ODD or FRAMEDONE2 interrupts | 442 | * EVSYNC_EVEN/ODD, FRAMEDONE2 or FRAMEDONE3 interrupts |
433 | */ | 443 | */ |
434 | omap_hwmod_write(irq_mask, oh, DISPC_IRQSTATUS); | 444 | omap_hwmod_write(irq_mask, oh, DISPC_IRQSTATUS); |
435 | 445 | ||
@@ -445,12 +455,19 @@ static void dispc_disable_outputs(void) | |||
445 | omap_hwmod_write(v, oh, DISPC_CONTROL2); | 455 | omap_hwmod_write(v, oh, DISPC_CONTROL2); |
446 | } | 456 | } |
447 | 457 | ||
458 | /* disable LCD3 manager */ | ||
459 | if (da->manager_count > 3) { | ||
460 | v = omap_hwmod_read(oh, DISPC_CONTROL3); | ||
461 | v &= ~LCD_EN_MASK; | ||
462 | omap_hwmod_write(v, oh, DISPC_CONTROL3); | ||
463 | } | ||
464 | |||
448 | i = 0; | 465 | i = 0; |
449 | while ((omap_hwmod_read(oh, DISPC_IRQSTATUS) & irq_mask) != | 466 | while ((omap_hwmod_read(oh, DISPC_IRQSTATUS) & irq_mask) != |
450 | irq_mask) { | 467 | irq_mask) { |
451 | i++; | 468 | i++; |
452 | if (i > FRAMEDONE_IRQ_TIMEOUT) { | 469 | if (i > FRAMEDONE_IRQ_TIMEOUT) { |
453 | pr_err("didn't get FRAMEDONE1/2 or TV interrupt\n"); | 470 | pr_err("didn't get FRAMEDONE1/2/3 or TV interrupt\n"); |
454 | break; | 471 | break; |
455 | } | 472 | } |
456 | mdelay(1); | 473 | mdelay(1); |