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authorDinh Nguyen <Dinh.Nguyen@freescale.com>2010-05-17 11:46:01 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2010-05-18 04:46:31 -0400
commitd6b273bfdfd3667387f2516c4a3602b691535ee3 (patch)
tree135f0dc9b1ecd25f9beb65e14b4bc0b3629b148b /arch/arm
parent4a870fc898db90033585cef35d89cf931e189fa4 (diff)
mx5: bring usb phy out of reset on freescale mx51 babbage hw
This patch de-asserts the reset line that is connected to the USB ULPI PHY on USB Host1. This patch should be included with the original USB host enablement set of patches of mx51 babbage hw, but was accidentily left out. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-mx5/board-mx51_babbage.c12
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx51.h1
2 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index dacf506f18ba..ed885f9d7b73 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -33,6 +33,7 @@
33 33
34#define BABBAGE_USB_HUB_RESET (0*32 + 7) /* GPIO_1_7 */ 34#define BABBAGE_USB_HUB_RESET (0*32 + 7) /* GPIO_1_7 */
35#define BABBAGE_USBH1_STP (0*32 + 27) /* GPIO_1_27 */ 35#define BABBAGE_USBH1_STP (0*32 + 27) /* GPIO_1_27 */
36#define BABBAGE_PHY_RESET (1*32 +5) /* GPIO_2_5 */
36 37
37/* USB_CTRL_1 */ 38/* USB_CTRL_1 */
38#define MX51_USB_CTRL_1_OFFSET 0x10 39#define MX51_USB_CTRL_1_OFFSET 0x10
@@ -101,6 +102,7 @@ static inline void mxc_init_imx_uart(void)
101static int gpio_usbh1_active(void) 102static int gpio_usbh1_active(void)
102{ 103{
103 struct pad_desc usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO_1_27; 104 struct pad_desc usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO_1_27;
105 struct pad_desc phyreset_gpio = MX51_PAD_EIM_D21__GPIO_2_5;
104 int ret; 106 int ret;
105 107
106 /* Set USBH1_STP to GPIO and toggle it */ 108 /* Set USBH1_STP to GPIO and toggle it */
@@ -115,6 +117,16 @@ static int gpio_usbh1_active(void)
115 gpio_set_value(BABBAGE_USBH1_STP, 1); 117 gpio_set_value(BABBAGE_USBH1_STP, 1);
116 msleep(100); 118 msleep(100);
117 gpio_free(BABBAGE_USBH1_STP); 119 gpio_free(BABBAGE_USBH1_STP);
120
121 /* De-assert USB PHY RESETB */
122 mxc_iomux_v3_setup_pad(&phyreset_gpio);
123 ret = gpio_request(BABBAGE_PHY_RESET, "phy_reset");
124
125 if (ret) {
126 pr_debug("failed to get MX51_PAD_EIM_D21__GPIO_2_5: %d\n", ret);
127 return ret;
128 }
129 gpio_direction_output(BABBAGE_PHY_RESET, 1);
118 return 0; 130 return 0;
119} 131}
120 132
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/plat-mxc/include/mach/iomux-mx51.h
index 80528cc3b557..ab0f95d953d0 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx51.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx51.h
@@ -63,6 +63,7 @@ typedef enum iomux_config {
63#define MX51_PAD_GPIO_2_3__EIM_D19 IOMUX_PAD(0x3fc, 0x068, 1, 0x0, 0, NO_PAD_CTRL) 63#define MX51_PAD_GPIO_2_3__EIM_D19 IOMUX_PAD(0x3fc, 0x068, 1, 0x0, 0, NO_PAD_CTRL)
64#define MX51_PAD_GPIO_2_4__EIM_D20 IOMUX_PAD(0x400, 0x06c, 1, 0x0, 0, NO_PAD_CTRL) 64#define MX51_PAD_GPIO_2_4__EIM_D20 IOMUX_PAD(0x400, 0x06c, 1, 0x0, 0, NO_PAD_CTRL)
65#define MX51_PAD_GPIO_2_5__EIM_D21 IOMUX_PAD(0x404, 0x070, 1, 0x0, 0, NO_PAD_CTRL) 65#define MX51_PAD_GPIO_2_5__EIM_D21 IOMUX_PAD(0x404, 0x070, 1, 0x0, 0, NO_PAD_CTRL)
66#define MX51_PAD_EIM_D21__GPIO_2_5 IOMUX_PAD(0x404, 0x070, IOMUX_CONFIG_ALT1, 0x0, 0, MX51_GPIO_PAD_CTRL)
66#define MX51_PAD_GPIO_2_6__EIM_D22 IOMUX_PAD(0x408, 0x074, 1, 0x0, 0, NO_PAD_CTRL) 67#define MX51_PAD_GPIO_2_6__EIM_D22 IOMUX_PAD(0x408, 0x074, 1, 0x0, 0, NO_PAD_CTRL)
67#define MX51_PAD_GPIO_2_7__EIM_D23 IOMUX_PAD(0x40c, 0x078, 1, 0x0, 0, NO_PAD_CTRL) 68#define MX51_PAD_GPIO_2_7__EIM_D23 IOMUX_PAD(0x40c, 0x078, 1, 0x0, 0, NO_PAD_CTRL)
68 69