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authorWill Deacon <will.deacon@arm.com>2013-02-28 11:46:16 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2013-03-03 17:54:13 -0500
commitd61947a164760ac520cb416768afdf38c33d60e7 (patch)
treecc0fcb95a82816639184dc0c26fe0d1293679307 /arch/arm
parent904464b91eca8c665acea033489225af02eeb75a (diff)
ARM: 7657/1: head: fix swapper and idmap population with LPAE and big-endian
The LPAE page table format uses 64-bit descriptors, so we need to take endianness into account when populating the swapper and idmap tables during early initialisation. This patch ensures that we store the two words making up each page table entry in the correct order when running big-endian. Cc: <stable@vger.kernel.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/kernel/head.S26
1 files changed, 22 insertions, 4 deletions
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 486a15ae9011..e0eb9a1cae77 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -184,13 +184,22 @@ __create_page_tables:
184 orr r3, r3, #3 @ PGD block type 184 orr r3, r3, #3 @ PGD block type
185 mov r6, #4 @ PTRS_PER_PGD 185 mov r6, #4 @ PTRS_PER_PGD
186 mov r7, #1 << (55 - 32) @ L_PGD_SWAPPER 186 mov r7, #1 << (55 - 32) @ L_PGD_SWAPPER
1871: str r3, [r0], #4 @ set bottom PGD entry bits 1871:
188#ifdef CONFIG_CPU_ENDIAN_BE8
188 str r7, [r0], #4 @ set top PGD entry bits 189 str r7, [r0], #4 @ set top PGD entry bits
190 str r3, [r0], #4 @ set bottom PGD entry bits
191#else
192 str r3, [r0], #4 @ set bottom PGD entry bits
193 str r7, [r0], #4 @ set top PGD entry bits
194#endif
189 add r3, r3, #0x1000 @ next PMD table 195 add r3, r3, #0x1000 @ next PMD table
190 subs r6, r6, #1 196 subs r6, r6, #1
191 bne 1b 197 bne 1b
192 198
193 add r4, r4, #0x1000 @ point to the PMD tables 199 add r4, r4, #0x1000 @ point to the PMD tables
200#ifdef CONFIG_CPU_ENDIAN_BE8
201 add r4, r4, #4 @ we only write the bottom word
202#endif
194#endif 203#endif
195 204
196 ldr r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags 205 ldr r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags
@@ -258,6 +267,11 @@ __create_page_tables:
258 addne r6, r6, #1 << SECTION_SHIFT 267 addne r6, r6, #1 << SECTION_SHIFT
259 strne r6, [r3] 268 strne r6, [r3]
260 269
270#if defined(CONFIG_LPAE) && defined(CONFIG_CPU_ENDIAN_BE8)
271 sub r4, r4, #4 @ Fixup page table pointer
272 @ for 64-bit descriptors
273#endif
274
261#ifdef CONFIG_DEBUG_LL 275#ifdef CONFIG_DEBUG_LL
262#if !defined(CONFIG_DEBUG_ICEDCC) && !defined(CONFIG_DEBUG_SEMIHOSTING) 276#if !defined(CONFIG_DEBUG_ICEDCC) && !defined(CONFIG_DEBUG_SEMIHOSTING)
263 /* 277 /*
@@ -276,13 +290,17 @@ __create_page_tables:
276 orr r3, r7, r3, lsl #SECTION_SHIFT 290 orr r3, r7, r3, lsl #SECTION_SHIFT
277#ifdef CONFIG_ARM_LPAE 291#ifdef CONFIG_ARM_LPAE
278 mov r7, #1 << (54 - 32) @ XN 292 mov r7, #1 << (54 - 32) @ XN
293#ifdef CONFIG_CPU_ENDIAN_BE8
294 str r7, [r0], #4
295 str r3, [r0], #4
279#else 296#else
280 orr r3, r3, #PMD_SECT_XN
281#endif
282 str r3, [r0], #4 297 str r3, [r0], #4
283#ifdef CONFIG_ARM_LPAE
284 str r7, [r0], #4 298 str r7, [r0], #4
285#endif 299#endif
300#else
301 orr r3, r3, #PMD_SECT_XN
302 str r3, [r0], #4
303#endif
286 304
287#else /* CONFIG_DEBUG_ICEDCC || CONFIG_DEBUG_SEMIHOSTING */ 305#else /* CONFIG_DEBUG_ICEDCC || CONFIG_DEBUG_SEMIHOSTING */
288 /* we don't need any serial debugging mappings */ 306 /* we don't need any serial debugging mappings */