aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2013-11-11 02:57:16 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-11-11 02:57:16 -0500
commitd5aabbcaee6bb5fb57ea8c67714516af4d8238ce (patch)
treee95119c7c2bd1249503e065f0b7751289c696fb9 /arch/arm
parentaac59e3efce3dca787b11e34726001603ce3d161 (diff)
parent60cd8b09f1e26dec0e866085f110d1d665d53cec (diff)
Merge tag 'boards-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC board updates from Olof Johansson: "Board-related updates. This branch is getting smaller and smaller, which is the whole idea so that's reassuring. Right now by far most of the code is related to shmobile updates, and they are now switching over to removal of board code and migration to multiplatform, so we'll see their board code base shrink in the near future too, I hope. In addition to that is some defconfig updates, some display updates for OMAP and a bit of new board support for Rockchip boards" * tag 'boards-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (56 commits) ARM: rockchip: add support for rk3188 and Radxa Rock board ARM: rockchip: add dts for bqcurie2 tablet ARM: rockchip: enable arm-global-timer ARM: rockchip: move shared dt properties to common source file ARM: OMAP2+: display: Create omap_vout device inside omap_display_init ARM: OMAP2+: display: Create omapvrfb and omapfb devices inside omap_display_init ARM: OMAP2+: display: Create omapdrm device inside omap_display_init ARM: OMAP2+: drm: Don't build device for DMM ARM: tegra: defconfig updates RX-51: Add support for OMAP3 ROM Random Number Generator ARM: OMAP3: RX-51: ARM errata 430973 workaround ARM: OMAP3: Add secure function omap_smc3() which calling instruction smc #1 ARM: shmobile: marzen: enable INTC IRQ ARM: shmobile: bockw: add SMSC support on reference ARM: shmobile: Use SMP on Koelsch ARM: shmobile: Remove KZM9D reference DTS ARM: shmobile: Let KZM9D multiplatform boot with KZM9D DTB ARM: shmobile: Remove non-multiplatform KZM9D reference support ARM: shmobile: Use KZM9D without reference for multiplatform ARM: shmobile: Sync KZM9D DTS with KZM9D reference DTS ...
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/Makefile5
-rw-r--r--arch/arm/boot/dts/emev2-kzm9d-reference.dts57
-rw-r--r--arch/arm/boot/dts/emev2-kzm9d.dts33
-rw-r--r--arch/arm/boot/dts/r7s72100-genmai.dts31
-rw-r--r--arch/arm/boot/dts/r8a7791-koelsch.dts32
-rw-r--r--arch/arm/boot/dts/rk3066a-bqcurie2.dts109
-rw-r--r--arch/arm/boot/dts/rk3066a.dtsi98
-rw-r--r--arch/arm/boot/dts/rk3188-clocks.dtsi289
-rw-r--r--arch/arm/boot/dts/rk3188-radxarock.dts80
-rw-r--r--arch/arm/boot/dts/rk3188.dtsi253
-rw-r--r--arch/arm/boot/dts/rk3xxx.dtsi124
-rw-r--r--arch/arm/configs/bockw_defconfig4
-rw-r--r--arch/arm/configs/koelsch_defconfig54
-rw-r--r--arch/arm/configs/lager_defconfig2
-rw-r--r--arch/arm/configs/marzen_defconfig2
-rw-r--r--arch/arm/configs/tegra_defconfig5
-rw-r--r--arch/arm/mach-omap2/Makefile6
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c19
-rw-r--r--arch/arm/mach-omap2/board-rx51.c12
-rw-r--r--arch/arm/mach-omap2/cclock3xxx_data.c1
-rw-r--r--arch/arm/mach-omap2/devices.c10
-rw-r--r--arch/arm/mach-omap2/display.c28
-rw-r--r--arch/arm/mach-omap2/display.h4
-rw-r--r--arch/arm/mach-omap2/drm.c24
-rw-r--r--arch/arm/mach-omap2/fb.c14
-rw-r--r--arch/arm/mach-omap2/omap-secure.c76
-rw-r--r--arch/arm/mach-omap2/omap-secure.h13
-rw-r--r--arch/arm/mach-omap2/omap-smc.S21
-rw-r--r--arch/arm/mach-rockchip/Kconfig2
-rw-r--r--arch/arm/mach-shmobile/Kconfig34
-rw-r--r--arch/arm/mach-shmobile/Makefile7
-rw-r--r--arch/arm/mach-shmobile/Makefile.boot3
-rw-r--r--arch/arm/mach-shmobile/board-ape6evm.c57
-rw-r--r--arch/arm/mach-shmobile/board-armadillo800eva.c1
-rw-r--r--arch/arm/mach-shmobile/board-bockw-reference.c20
-rw-r--r--arch/arm/mach-shmobile/board-bockw.c372
-rw-r--r--arch/arm/mach-shmobile/board-genmai.c43
-rw-r--r--arch/arm/mach-shmobile/board-koelsch.c47
-rw-r--r--arch/arm/mach-shmobile/board-kzm9d-reference.c1
-rw-r--r--arch/arm/mach-shmobile/board-kzm9g.c1
-rw-r--r--arch/arm/mach-shmobile/board-lager.c68
-rw-r--r--arch/arm/mach-shmobile/board-marzen-reference.c1
-rw-r--r--arch/arm/mach-shmobile/board-marzen.c74
43 files changed, 1902 insertions, 235 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index c485157b0b5b..7662b71628cd 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -198,13 +198,14 @@ dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
198 ste-ccu9540.dtb 198 ste-ccu9540.dtb
199dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb 199dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
200dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \ 200dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
201 emev2-kzm9d-reference.dtb \ 201 r7s72100-genmai.dtb \
202 r8a7740-armadillo800eva.dtb \ 202 r8a7740-armadillo800eva.dtb \
203 r8a7778-bockw.dtb \ 203 r8a7778-bockw.dtb \
204 r8a7778-bockw-reference.dtb \ 204 r8a7778-bockw-reference.dtb \
205 r8a7740-armadillo800eva-reference.dtb \ 205 r8a7740-armadillo800eva-reference.dtb \
206 r8a7779-marzen.dtb \ 206 r8a7779-marzen.dtb \
207 r8a7779-marzen-reference.dtb \ 207 r8a7779-marzen-reference.dtb \
208 r8a7791-koelsch.dtb \
208 r8a7790-lager.dtb \ 209 r8a7790-lager.dtb \
209 r8a7790-lager-reference.dtb \ 210 r8a7790-lager-reference.dtb \
210 sh73a0-kzm9g.dtb \ 211 sh73a0-kzm9g.dtb \
@@ -212,7 +213,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
212 r8a73a4-ape6evm.dtb \ 213 r8a73a4-ape6evm.dtb \
213 r8a73a4-ape6evm-reference.dtb \ 214 r8a73a4-ape6evm-reference.dtb \
214 sh7372-mackerel.dtb 215 sh7372-mackerel.dtb
215dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d-reference.dtb 216dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb
216dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \ 217dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
217 socfpga_vt.dtb 218 socfpga_vt.dtb
218dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \ 219dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \
diff --git a/arch/arm/boot/dts/emev2-kzm9d-reference.dts b/arch/arm/boot/dts/emev2-kzm9d-reference.dts
deleted file mode 100644
index cceefda268b6..000000000000
--- a/arch/arm/boot/dts/emev2-kzm9d-reference.dts
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * Device Tree Source for the KZM9D board
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10/dts-v1/;
11
12/include/ "emev2.dtsi"
13
14/ {
15 model = "EMEV2 KZM9D Board";
16 compatible = "renesas,kzm9d-reference", "renesas,emev2";
17
18 memory {
19 device_type = "memory";
20 reg = <0x40000000 0x8000000>;
21 };
22
23 chosen {
24 bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp";
25 };
26
27 reg_1p8v: regulator@0 {
28 compatible = "regulator-fixed";
29 regulator-name = "fixed-1.8V";
30 regulator-min-microvolt = <1800000>;
31 regulator-max-microvolt = <1800000>;
32 regulator-always-on;
33 regulator-boot-on;
34 };
35
36 reg_3p3v: regulator@1 {
37 compatible = "regulator-fixed";
38 regulator-name = "fixed-3.3V";
39 regulator-min-microvolt = <3300000>;
40 regulator-max-microvolt = <3300000>;
41 regulator-always-on;
42 regulator-boot-on;
43 };
44
45 lan9220@20000000 {
46 compatible = "smsc,lan9220", "smsc,lan9115";
47 reg = <0x20000000 0x10000>;
48 phy-mode = "mii";
49 interrupt-parent = <&gpio0>;
50 interrupts = <1 1>; /* active high */
51 reg-io-width = <4>;
52 smsc,irq-active-high;
53 smsc,irq-push-pull;
54 vddvario-supply = <&reg_1p8v>;
55 vdd33a-supply = <&reg_3p3v>;
56 };
57};
diff --git a/arch/arm/boot/dts/emev2-kzm9d.dts b/arch/arm/boot/dts/emev2-kzm9d.dts
index f92e812fdd9f..861aa7d6fc7d 100644
--- a/arch/arm/boot/dts/emev2-kzm9d.dts
+++ b/arch/arm/boot/dts/emev2-kzm9d.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * Device Tree Source for the KZM9D board 2 * Device Tree Source for the KZM9D board
3 * 3 *
4 * Copyright (C) 2012 Renesas Solutions Corp. 4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * 5 *
6 * This file is licensed under the terms of the GNU General Public License 6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any 7 * version 2. This program is licensed "as is" without any warranty of any
@@ -23,4 +23,35 @@
23 chosen { 23 chosen {
24 bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp"; 24 bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp";
25 }; 25 };
26
27 reg_1p8v: regulator@0 {
28 compatible = "regulator-fixed";
29 regulator-name = "fixed-1.8V";
30 regulator-min-microvolt = <1800000>;
31 regulator-max-microvolt = <1800000>;
32 regulator-always-on;
33 regulator-boot-on;
34 };
35
36 reg_3p3v: regulator@1 {
37 compatible = "regulator-fixed";
38 regulator-name = "fixed-3.3V";
39 regulator-min-microvolt = <3300000>;
40 regulator-max-microvolt = <3300000>;
41 regulator-always-on;
42 regulator-boot-on;
43 };
44
45 lan9220@20000000 {
46 compatible = "smsc,lan9220", "smsc,lan9115";
47 reg = <0x20000000 0x10000>;
48 phy-mode = "mii";
49 interrupt-parent = <&gpio0>;
50 interrupts = <1 1>; /* active high */
51 reg-io-width = <4>;
52 smsc,irq-active-high;
53 smsc,irq-push-pull;
54 vddvario-supply = <&reg_1p8v>;
55 vdd33a-supply = <&reg_3p3v>;
56 };
26}; 57};
diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts b/arch/arm/boot/dts/r7s72100-genmai.dts
new file mode 100644
index 000000000000..1fb20f2333cc
--- /dev/null
+++ b/arch/arm/boot/dts/r7s72100-genmai.dts
@@ -0,0 +1,31 @@
1/*
2 * Device Tree Source for the Genmai board
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/dts-v1/;
12/include/ "r7s72100.dtsi"
13
14/ {
15 model = "Genmai";
16 compatible = "renesas,genmai", "renesas,r7s72100";
17
18 chosen {
19 bootargs = "console=ttySC2,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
20 };
21
22 memory {
23 device_type = "memory";
24 reg = <0x08000000 0x08000000>;
25 };
26
27 lbsc {
28 #address-cells = <1>;
29 #size-cells = <1>;
30 };
31};
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
new file mode 100644
index 000000000000..1ce5250ec278
--- /dev/null
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -0,0 +1,32 @@
1/*
2 * Device Tree Source for the Koelsch board
3 *
4 * Copyright (C) 2013 Renesas Electronics Corporation
5 * Copyright (C) 2013 Renesas Solutions Corp.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12/dts-v1/;
13/include/ "r8a7791.dtsi"
14
15/ {
16 model = "Koelsch";
17 compatible = "renesas,koelsch", "renesas,r8a7791";
18
19 chosen {
20 bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
21 };
22
23 memory@40000000 {
24 device_type = "memory";
25 reg = <0 0x40000000 0 0x80000000>;
26 };
27
28 lbsc {
29 #address-cells = <1>;
30 #size-cells = <1>;
31 };
32};
diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
new file mode 100644
index 000000000000..035df4053c21
--- /dev/null
+++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
@@ -0,0 +1,109 @@
1/*
2 * Copyright (c) 2013 MundoReader S.L.
3 * Author: Heiko Stuebner <heiko@sntech.de>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16/dts-v1/;
17#include "rk3066a.dtsi"
18
19/ {
20 model = "bq Curie 2";
21
22 memory {
23 reg = <0x60000000 0x40000000>;
24 };
25
26 soc {
27 uart0: serial@10124000 {
28 status = "okay";
29 };
30
31 uart1: serial@10126000 {
32 status = "okay";
33 };
34
35 uart2: serial@20064000 {
36 pinctrl-names = "default";
37 pinctrl-0 = <&uart2_xfer>;
38 status = "okay";
39 };
40
41 uart3: serial@20068000 {
42 status = "okay";
43 };
44
45 vcc_sd0: fixed-regulator {
46 compatible = "regulator-fixed";
47 regulator-name = "sdmmc-supply";
48 regulator-min-microvolt = <3000000>;
49 regulator-max-microvolt = <3000000>;
50 gpio = <&gpio3 7 GPIO_ACTIVE_LOW>;
51 startup-delay-us = <100000>;
52 };
53
54 dwmmc@10214000 { /* sdmmc */
55 num-slots = <1>;
56 status = "okay";
57
58 pinctrl-names = "default";
59 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4>;
60 vmmc-supply = <&vcc_sd0>;
61
62 slot@0 {
63 reg = <0>;
64 bus-width = <4>;
65 disable-wp;
66 };
67 };
68
69 dwmmc@10218000 { /* wifi */
70 num-slots = <1>;
71 status = "okay";
72 non-removable;
73
74 pinctrl-names = "default";
75 pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus4>;
76
77 slot@0 {
78 reg = <0>;
79 bus-width = <4>;
80 disable-wp;
81 };
82 };
83
84 gpio-keys {
85 compatible = "gpio-keys";
86 #address-cells = <1>;
87 #size-cells = <0>;
88 autorepeat;
89
90 button@0 {
91 gpios = <&gpio6 2 GPIO_ACTIVE_LOW>; /* GPIO6_A2 */
92 linux,code = <116>;
93 label = "GPIO Key Power";
94 linux,input-type = <1>;
95 gpio-key,wakeup = <1>;
96 debounce-interval = <100>;
97 };
98 button@1 {
99 gpios = <&gpio4 21 GPIO_ACTIVE_LOW>; /* GPIO4_C5 */
100 linux,code = <104>;
101 label = "GPIO Key Vol-";
102 linux,input-type = <1>;
103 gpio-key,wakeup = <0>;
104 debounce-interval = <100>;
105 };
106 /* VOL+ comes somehow thru the ADC */
107 };
108 };
109};
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 98f3597a6a35..be5d2b09a363 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -14,15 +14,12 @@
14 */ 14 */
15 15
16#include <dt-bindings/gpio/gpio.h> 16#include <dt-bindings/gpio/gpio.h>
17#include <dt-bindings/interrupt-controller/irq.h>
18#include <dt-bindings/interrupt-controller/arm-gic.h>
19#include <dt-bindings/pinctrl/rockchip.h> 17#include <dt-bindings/pinctrl/rockchip.h>
20#include "skeleton.dtsi" 18#include "rk3xxx.dtsi"
21#include "rk3066a-clocks.dtsi" 19#include "rk3066a-clocks.dtsi"
22 20
23/ { 21/ {
24 compatible = "rockchip,rk3066a"; 22 compatible = "rockchip,rk3066a";
25 interrupt-parent = <&gic>;
26 23
27 cpus { 24 cpus {
28 #address-cells = <1>; 25 #address-cells = <1>;
@@ -43,33 +40,6 @@
43 }; 40 };
44 41
45 soc { 42 soc {
46 #address-cells = <1>;
47 #size-cells = <1>;
48 compatible = "simple-bus";
49 ranges;
50
51 gic: interrupt-controller@1013d000 {
52 compatible = "arm,cortex-a9-gic";
53 interrupt-controller;
54 #interrupt-cells = <3>;
55 reg = <0x1013d000 0x1000>,
56 <0x1013c100 0x0100>;
57 };
58
59 L2: l2-cache-controller@10138000 {
60 compatible = "arm,pl310-cache";
61 reg = <0x10138000 0x1000>;
62 cache-unified;
63 cache-level = <2>;
64 };
65
66 local-timer@1013c600 {
67 compatible = "arm,cortex-a9-twd-timer";
68 reg = <0x1013c600 0x20>;
69 interrupts = <GIC_PPI 13 0x304>;
70 clocks = <&dummy150m>;
71 };
72
73 timer@20038000 { 43 timer@20038000 {
74 compatible = "snps,dw-apb-timer-osc"; 44 compatible = "snps,dw-apb-timer-osc";
75 reg = <0x20038000 0x100>; 45 reg = <0x20038000 0x100>;
@@ -298,71 +268,5 @@
298 }; 268 };
299 }; 269 };
300 }; 270 };
301
302 uart0: serial@10124000 {
303 compatible = "snps,dw-apb-uart";
304 reg = <0x10124000 0x400>;
305 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
306 reg-shift = <2>;
307 reg-io-width = <1>;
308 clocks = <&clk_gates1 8>;
309 status = "disabled";
310 };
311
312 uart1: serial@10126000 {
313 compatible = "snps,dw-apb-uart";
314 reg = <0x10126000 0x400>;
315 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
316 reg-shift = <2>;
317 reg-io-width = <1>;
318 clocks = <&clk_gates1 10>;
319 status = "disabled";
320 };
321
322 uart2: serial@20064000 {
323 compatible = "snps,dw-apb-uart";
324 reg = <0x20064000 0x400>;
325 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
326 reg-shift = <2>;
327 reg-io-width = <1>;
328 clocks = <&clk_gates1 12>;
329 status = "disabled";
330 };
331
332 uart3: serial@20068000 {
333 compatible = "snps,dw-apb-uart";
334 reg = <0x20068000 0x400>;
335 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
336 reg-shift = <2>;
337 reg-io-width = <1>;
338 clocks = <&clk_gates1 14>;
339 status = "disabled";
340 };
341
342 dwmmc@10214000 {
343 compatible = "rockchip,rk2928-dw-mshc";
344 reg = <0x10214000 0x1000>;
345 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
346 #address-cells = <1>;
347 #size-cells = <0>;
348
349 clocks = <&clk_gates5 10>, <&clk_gates2 11>;
350 clock-names = "biu", "ciu";
351
352 status = "disabled";
353 };
354
355 dwmmc@10218000 {
356 compatible = "rockchip,rk2928-dw-mshc";
357 reg = <0x10218000 0x1000>;
358 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
359 #address-cells = <1>;
360 #size-cells = <0>;
361
362 clocks = <&clk_gates5 11>, <&clk_gates2 13>;
363 clock-names = "biu", "ciu";
364
365 status = "disabled";
366 };
367 }; 271 };
368}; 272};
diff --git a/arch/arm/boot/dts/rk3188-clocks.dtsi b/arch/arm/boot/dts/rk3188-clocks.dtsi
new file mode 100644
index 000000000000..b1b92dc245ce
--- /dev/null
+++ b/arch/arm/boot/dts/rk3188-clocks.dtsi
@@ -0,0 +1,289 @@
1/*
2 * Copyright (c) 2013 MundoReader S.L.
3 * Author: Heiko Stuebner <heiko@sntech.de>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16/ {
17 clocks {
18 #address-cells = <1>;
19 #size-cells = <1>;
20 ranges;
21
22 /*
23 * This is a dummy clock, to be used as placeholder on
24 * other mux clocks when a specific parent clock is not
25 * yet implemented. It should be dropped when the driver
26 * is complete.
27 */
28 dummy: dummy {
29 compatible = "fixed-clock";
30 clock-frequency = <0>;
31 #clock-cells = <0>;
32 };
33
34 xin24m: xin24m {
35 compatible = "fixed-clock";
36 clock-frequency = <24000000>;
37 #clock-cells = <0>;
38 };
39
40 dummy48m: dummy48m {
41 compatible = "fixed-clock";
42 clock-frequency = <48000000>;
43 #clock-cells = <0>;
44 };
45
46 dummy150m: dummy150m {
47 compatible = "fixed-clock";
48 clock-frequency = <150000000>;
49 #clock-cells = <0>;
50 };
51
52 clk_gates0: gate-clk@200000d0 {
53 compatible = "rockchip,rk2928-gate-clk";
54 reg = <0x200000d0 0x4>;
55 clocks = <&dummy150m>, <&dummy>,
56 <&dummy>, <&dummy>,
57 <&dummy>, <&dummy>,
58 <&dummy>, <&dummy>,
59 <&dummy>, <&dummy>,
60 <&dummy>, <&dummy>,
61 <&dummy>, <&dummy>,
62 <&dummy>, <&dummy>;
63
64 clock-output-names =
65 "gate_core_periph", "gate_cpu_gpll",
66 "gate_ddrphy", "gate_aclk_cpu",
67 "gate_hclk_cpu", "gate_pclk_cpu",
68 "gate_atclk_cpu", "gate_aclk_core",
69 "reserved", "gate_i2s0",
70 "gate_i2s0_frac", "reserved",
71 "reserved", "gate_spdif",
72 "gate_spdif_frac", "gate_testclk";
73
74 #clock-cells = <1>;
75 };
76
77 clk_gates1: gate-clk@200000d4 {
78 compatible = "rockchip,rk2928-gate-clk";
79 reg = <0x200000d4 0x4>;
80 clocks = <&xin24m>, <&xin24m>,
81 <&xin24m>, <&dummy>,
82 <&dummy>, <&xin24m>,
83 <&xin24m>, <&dummy>,
84 <&xin24m>, <&dummy>,
85 <&xin24m>, <&dummy>,
86 <&xin24m>, <&dummy>,
87 <&xin24m>, <&dummy>;
88
89 clock-output-names =
90 "gate_timer0", "gate_timer1",
91 "gate_timer3", "gate_jtag",
92 "gate_aclk_lcdc1_src", "gate_otgphy0",
93 "gate_otgphy1", "gate_ddr_gpll",
94 "gate_uart0", "gate_frac_uart0",
95 "gate_uart1", "gate_frac_uart1",
96 "gate_uart2", "gate_frac_uart2",
97 "gate_uart3", "gate_frac_uart3";
98
99 #clock-cells = <1>;
100 };
101
102 clk_gates2: gate-clk@200000d8 {
103 compatible = "rockchip,rk2928-gate-clk";
104 reg = <0x200000d8 0x4>;
105 clocks = <&clk_gates2 1>, <&dummy>,
106 <&dummy>, <&dummy>,
107 <&dummy>, <&dummy>,
108 <&clk_gates2 3>, <&dummy>,
109 <&dummy>, <&dummy>,
110 <&dummy>, <&dummy48m>,
111 <&dummy>, <&dummy48m>,
112 <&dummy>, <&dummy>;
113
114 clock-output-names =
115 "gate_periph_src", "gate_aclk_periph",
116 "gate_hclk_periph", "gate_pclk_periph",
117 "gate_smc", "gate_mac",
118 "gate_hsadc", "gate_hsadc_frac",
119 "gate_saradc", "gate_spi0",
120 "gate_spi1", "gate_mmc0",
121 "gate_mac_lbtest", "gate_mmc1",
122 "gate_emmc", "reserved";
123
124 #clock-cells = <1>;
125 };
126
127 clk_gates3: gate-clk@200000dc {
128 compatible = "rockchip,rk2928-gate-clk";
129 reg = <0x200000dc 0x4>;
130 clocks = <&dummy>, <&dummy>,
131 <&dummy>, <&dummy>,
132 <&xin24m>, <&xin24m>,
133 <&dummy>, <&dummy>,
134 <&xin24m>, <&dummy>,
135 <&dummy>, <&dummy>,
136 <&dummy>, <&dummy>,
137 <&xin24m>, <&dummy>;
138
139 clock-output-names =
140 "gate_aclk_lcdc0_src", "gate_dclk_lcdc0",
141 "gate_dclk_lcdc1", "gate_pclkin_cif0",
142 "gate_timer2", "gate_timer4",
143 "gate_hsicphy", "gate_cif0_out",
144 "gate_timer5", "gate_aclk_vepu",
145 "gate_hclk_vepu", "gate_aclk_vdpu",
146 "gate_hclk_vdpu", "reserved",
147 "gate_timer6", "gate_aclk_gpu_src";
148
149 #clock-cells = <1>;
150 };
151
152 clk_gates4: gate-clk@200000e0 {
153 compatible = "rockchip,rk2928-gate-clk";
154 reg = <0x200000e0 0x4>;
155 clocks = <&clk_gates2 2>, <&clk_gates2 3>,
156 <&clk_gates2 1>, <&clk_gates2 1>,
157 <&clk_gates2 1>, <&clk_gates2 2>,
158 <&clk_gates2 2>, <&clk_gates2 2>,
159 <&clk_gates0 4>, <&clk_gates0 4>,
160 <&clk_gates0 3>, <&dummy>,
161 <&clk_gates0 3>, <&dummy>,
162 <&dummy>, <&dummy>;
163
164 clock-output-names =
165 "gate_hclk_peri_axi_matrix", "gate_pclk_peri_axi_matrix",
166 "gate_aclk_cpu_peri", "gate_aclk_peri_axi_matrix",
167 "gate_aclk_pei_niu", "gate_hclk_usb_peri",
168 "gate_hclk_peri_ahb_arbi", "gate_hclk_emem_peri",
169 "gate_hclk_cpubus", "gate_hclk_ahb2apb",
170 "gate_aclk_strc_sys", "reserved",
171 "gate_aclk_intmem", "reserved",
172 "gate_hclk_imem1", "gate_hclk_imem0";
173
174 #clock-cells = <1>;
175 };
176
177 clk_gates5: gate-clk@200000e4 {
178 compatible = "rockchip,rk2928-gate-clk";
179 reg = <0x200000e4 0x4>;
180 clocks = <&clk_gates0 3>, <&clk_gates2 1>,
181 <&clk_gates0 5>, <&clk_gates0 5>,
182 <&clk_gates0 5>, <&clk_gates0 5>,
183 <&clk_gates0 4>, <&clk_gates0 5>,
184 <&clk_gates2 1>, <&clk_gates2 2>,
185 <&clk_gates2 2>, <&clk_gates2 2>,
186 <&clk_gates2 2>, <&clk_gates4 5>;
187
188 clock-output-names =
189 "gate_aclk_dmac1", "gate_aclk_dmac2",
190 "gate_pclk_efuse", "gate_pclk_tzpc",
191 "gate_pclk_grf", "gate_pclk_pmu",
192 "gate_hclk_rom", "gate_pclk_ddrupctl",
193 "gate_aclk_smc", "gate_hclk_nandc",
194 "gate_hclk_mmc0", "gate_hclk_mmc1",
195 "gate_hclk_emmc", "gate_hclk_otg0";
196
197 #clock-cells = <1>;
198 };
199
200 clk_gates6: gate-clk@200000e8 {
201 compatible = "rockchip,rk2928-gate-clk";
202 reg = <0x200000e8 0x4>;
203 clocks = <&clk_gates3 0>, <&clk_gates0 4>,
204 <&clk_gates0 4>, <&clk_gates1 4>,
205 <&clk_gates0 4>, <&clk_gates3 0>,
206 <&dummy>, <&dummy>,
207 <&clk_gates3 0>, <&clk_gates0 4>,
208 <&clk_gates0 4>, <&clk_gates1 4>,
209 <&clk_gates0 4>, <&clk_gates3 0>;
210
211 clock-output-names =
212 "gate_aclk_lcdc0", "gate_hclk_lcdc0",
213 "gate_hclk_lcdc1", "gate_aclk_lcdc1",
214 "gate_hclk_cif0", "gate_aclk_cif0",
215 "reserved", "reserved",
216 "gate_aclk_ipp", "gate_hclk_ipp",
217 "gate_hclk_rga", "gate_aclk_rga",
218 "gate_hclk_vio_bus", "gate_aclk_vio0";
219
220 #clock-cells = <1>;
221 };
222
223 clk_gates7: gate-clk@200000ec {
224 compatible = "rockchip,rk2928-gate-clk";
225 reg = <0x200000ec 0x4>;
226 clocks = <&clk_gates2 2>, <&clk_gates0 4>,
227 <&clk_gates0 4>, <&dummy>,
228 <&dummy>, <&clk_gates2 2>,
229 <&clk_gates2 2>, <&clk_gates0 5>,
230 <&dummy>, <&clk_gates0 5>,
231 <&clk_gates0 5>, <&clk_gates2 3>,
232 <&clk_gates2 3>, <&clk_gates2 3>,
233 <&clk_gates2 3>, <&clk_gates2 3>;
234
235 clock-output-names =
236 "gate_hclk_emac", "gate_hclk_spdif",
237 "gate_hclk_i2s0_2ch", "gate_hclk_otg1",
238 "gate_hclk_hsic", "gate_hclk_hsadc",
239 "gate_hclk_pidf", "gate_pclk_timer0",
240 "reserved", "gate_pclk_timer2",
241 "gate_pclk_pwm01", "gate_pclk_pwm23",
242 "gate_pclk_spi0", "gate_pclk_spi1",
243 "gate_pclk_saradc", "gate_pclk_wdt";
244
245 #clock-cells = <1>;
246 };
247
248 clk_gates8: gate-clk@200000f0 {
249 compatible = "rockchip,rk2928-gate-clk";
250 reg = <0x200000f0 0x4>;
251 clocks = <&clk_gates0 5>, <&clk_gates0 5>,
252 <&clk_gates2 3>, <&clk_gates2 3>,
253 <&clk_gates0 5>, <&clk_gates0 5>,
254 <&clk_gates2 3>, <&clk_gates2 3>,
255 <&clk_gates2 3>, <&clk_gates0 5>,
256 <&clk_gates0 5>, <&clk_gates0 5>,
257 <&clk_gates2 3>, <&dummy>;
258
259 clock-output-names =
260 "gate_pclk_uart0", "gate_pclk_uart1",
261 "gate_pclk_uart2", "gate_pclk_uart3",
262 "gate_pclk_i2c0", "gate_pclk_i2c1",
263 "gate_pclk_i2c2", "gate_pclk_i2c3",
264 "gate_pclk_i2c4", "gate_pclk_gpio0",
265 "gate_pclk_gpio1", "gate_pclk_gpio2",
266 "gate_pclk_gpio3", "gate_aclk_gps";
267
268 #clock-cells = <1>;
269 };
270
271 clk_gates9: gate-clk@200000f4 {
272 compatible = "rockchip,rk2928-gate-clk";
273 reg = <0x200000f4 0x4>;
274 clocks = <&dummy>, <&dummy>,
275 <&dummy>, <&dummy>,
276 <&dummy>, <&dummy>,
277 <&dummy>, <&dummy>;
278
279 clock-output-names =
280 "gate_clk_core_dbg", "gate_pclk_dbg",
281 "gate_clk_trace", "gate_atclk",
282 "gate_clk_l2c", "gate_aclk_vio1",
283 "gate_pclk_publ", "gate_aclk_gpu";
284
285 #clock-cells = <1>;
286 };
287 };
288
289};
diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts
new file mode 100644
index 000000000000..3ba1968a70ab
--- /dev/null
+++ b/arch/arm/boot/dts/rk3188-radxarock.dts
@@ -0,0 +1,80 @@
1/*
2 * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15/dts-v1/;
16#include "rk3188.dtsi"
17
18/ {
19 model = "Radxa Rock";
20
21 memory {
22 reg = <0x60000000 0x80000000>;
23 };
24
25 soc {
26 uart0: serial@10124000 {
27 status = "okay";
28 };
29
30 uart1: serial@10126000 {
31 status = "okay";
32 };
33
34 uart2: serial@20064000 {
35 pinctrl-names = "default";
36 pinctrl-0 = <&uart2_xfer>;
37 status = "okay";
38 };
39
40 uart3: serial@20068000 {
41 status = "okay";
42 };
43
44 gpio-keys {
45 compatible = "gpio-keys";
46 #address-cells = <1>;
47 #size-cells = <0>;
48 autorepeat;
49
50 button@0 {
51 gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
52 linux,code = <116>;
53 label = "GPIO Key Power";
54 linux,input-type = <1>;
55 gpio-key,wakeup = <1>;
56 debounce-interval = <100>;
57 };
58 };
59
60 gpio-leds {
61 compatible = "gpio-leds";
62
63 green {
64 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
65 default-state = "off";
66 };
67
68 yellow {
69 gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
70 default-state = "off";
71 };
72
73 sleep {
74 gpios = <&gpio0 15 0>;
75 default-state = "off";
76 };
77 };
78
79 };
80};
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
new file mode 100644
index 000000000000..1a26b03b3649
--- /dev/null
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -0,0 +1,253 @@
1/*
2 * Copyright (c) 2013 MundoReader S.L.
3 * Author: Heiko Stuebner <heiko@sntech.de>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <dt-bindings/gpio/gpio.h>
17#include <dt-bindings/pinctrl/rockchip.h>
18#include "rk3xxx.dtsi"
19#include "rk3188-clocks.dtsi"
20
21/ {
22 compatible = "rockchip,rk3188";
23
24 cpus {
25 #address-cells = <1>;
26 #size-cells = <0>;
27
28 cpu@0 {
29 device_type = "cpu";
30 compatible = "arm,cortex-a9";
31 next-level-cache = <&L2>;
32 reg = <0x0>;
33 };
34 cpu@1 {
35 device_type = "cpu";
36 compatible = "arm,cortex-a9";
37 next-level-cache = <&L2>;
38 reg = <0x1>;
39 };
40 cpu@2 {
41 device_type = "cpu";
42 compatible = "arm,cortex-a9";
43 next-level-cache = <&L2>;
44 reg = <0x2>;
45 };
46 cpu@3 {
47 device_type = "cpu";
48 compatible = "arm,cortex-a9";
49 next-level-cache = <&L2>;
50 reg = <0x3>;
51 };
52 };
53
54 soc {
55 global-timer@1013c200 {
56 interrupts = <GIC_PPI 11 0xf04>;
57 };
58
59 local-timer@1013c600 {
60 interrupts = <GIC_PPI 13 0xf04>;
61 };
62
63 pinctrl@20008000 {
64 compatible = "rockchip,rk3188-pinctrl";
65 reg = <0x20008000 0xa0>,
66 <0x20008164 0x1a0>;
67 reg-names = "base", "pull";
68 #address-cells = <1>;
69 #size-cells = <1>;
70 ranges;
71
72 gpio0: gpio0@0x2000a000 {
73 compatible = "rockchip,rk3188-gpio-bank0";
74 reg = <0x2000a000 0x100>,
75 <0x20004064 0x8>;
76 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
77 clocks = <&clk_gates8 9>;
78
79 gpio-controller;
80 #gpio-cells = <2>;
81
82 interrupt-controller;
83 #interrupt-cells = <2>;
84 };
85
86 gpio1: gpio1@0x2003c000 {
87 compatible = "rockchip,gpio-bank";
88 reg = <0x2003c000 0x100>;
89 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
90 clocks = <&clk_gates8 10>;
91
92 gpio-controller;
93 #gpio-cells = <2>;
94
95 interrupt-controller;
96 #interrupt-cells = <2>;
97 };
98
99 gpio2: gpio2@2003e000 {
100 compatible = "rockchip,gpio-bank";
101 reg = <0x2003e000 0x100>;
102 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
103 clocks = <&clk_gates8 11>;
104
105 gpio-controller;
106 #gpio-cells = <2>;
107
108 interrupt-controller;
109 #interrupt-cells = <2>;
110 };
111
112 gpio3: gpio3@20080000 {
113 compatible = "rockchip,gpio-bank";
114 reg = <0x20080000 0x100>;
115 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
116 clocks = <&clk_gates8 12>;
117
118 gpio-controller;
119 #gpio-cells = <2>;
120
121 interrupt-controller;
122 #interrupt-cells = <2>;
123 };
124
125 pcfg_pull_up: pcfg_pull_up {
126 bias-pull-up;
127 };
128
129 pcfg_pull_down: pcfg_pull_down {
130 bias-pull-down;
131 };
132
133 pcfg_pull_none: pcfg_pull_none {
134 bias-disable;
135 };
136
137 uart0 {
138 uart0_xfer: uart0-xfer {
139 rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_none>,
140 <RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_none>;
141 };
142
143 uart0_cts: uart0-cts {
144 rockchip,pins = <RK_GPIO1 2 RK_FUNC_1 &pcfg_pull_none>;
145 };
146
147 uart0_rts: uart0-rts {
148 rockchip,pins = <RK_GPIO1 3 RK_FUNC_1 &pcfg_pull_none>;
149 };
150 };
151
152 uart1 {
153 uart1_xfer: uart1-xfer {
154 rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_none>,
155 <RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_none>;
156 };
157
158 uart1_cts: uart1-cts {
159 rockchip,pins = <RK_GPIO1 6 RK_FUNC_1 &pcfg_pull_none>;
160 };
161
162 uart1_rts: uart1-rts {
163 rockchip,pins = <RK_GPIO1 7 RK_FUNC_1 &pcfg_pull_none>;
164 };
165 };
166
167 uart2 {
168 uart2_xfer: uart2-xfer {
169 rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_none>,
170 <RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_none>;
171 };
172 /* no rts / cts for uart2 */
173 };
174
175 uart3 {
176 uart3_xfer: uart3-xfer {
177 rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_none>,
178 <RK_GPIO1 11 RK_FUNC_1 &pcfg_pull_none>;
179 };
180
181 uart3_cts: uart3-cts {
182 rockchip,pins = <RK_GPIO1 12 RK_FUNC_1 &pcfg_pull_none>;
183 };
184
185 uart3_rts: uart3-rts {
186 rockchip,pins = <RK_GPIO1 13 RK_FUNC_1 &pcfg_pull_none>;
187 };
188 };
189
190 sd0 {
191 sd0_clk: sd0-clk {
192 rockchip,pins = <RK_GPIO3 2 RK_FUNC_1 &pcfg_pull_none>;
193 };
194
195 sd0_cmd: sd0-cmd {
196 rockchip,pins = <RK_GPIO3 3 RK_FUNC_1 &pcfg_pull_none>;
197 };
198
199 sd0_cd: sd0-cd {
200 rockchip,pins = <RK_GPIO3 8 RK_FUNC_1 &pcfg_pull_none>;
201 };
202
203 sd0_wp: sd0-wp {
204 rockchip,pins = <RK_GPIO3 9 RK_FUNC_1 &pcfg_pull_none>;
205 };
206
207 sd0_pwr: sd0-pwr {
208 rockchip,pins = <RK_GPIO3 1 RK_FUNC_1 &pcfg_pull_none>;
209 };
210
211 sd0_bus1: sd0-bus-width1 {
212 rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>;
213 };
214
215 sd0_bus4: sd0-bus-width4 {
216 rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>,
217 <RK_GPIO3 5 RK_FUNC_1 &pcfg_pull_none>,
218 <RK_GPIO3 6 RK_FUNC_1 &pcfg_pull_none>,
219 <RK_GPIO3 7 RK_FUNC_1 &pcfg_pull_none>;
220 };
221 };
222
223 sd1 {
224 sd1_clk: sd1-clk {
225 rockchip,pins = <RK_GPIO3 21 RK_FUNC_1 &pcfg_pull_none>;
226 };
227
228 sd1_cmd: sd1-cmd {
229 rockchip,pins = <RK_GPIO3 16 RK_FUNC_1 &pcfg_pull_none>;
230 };
231
232 sd1_cd: sd1-cd {
233 rockchip,pins = <RK_GPIO3 22 RK_FUNC_1 &pcfg_pull_none>;
234 };
235
236 sd1_wp: sd1-wp {
237 rockchip,pins = <RK_GPIO3 23 RK_FUNC_1 &pcfg_pull_none>;
238 };
239
240 sd1_bus1: sd1-bus-width1 {
241 rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_none>;
242 };
243
244 sd1_bus4: sd1-bus-width4 {
245 rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_none>,
246 <RK_GPIO3 18 RK_FUNC_1 &pcfg_pull_none>,
247 <RK_GPIO3 19 RK_FUNC_1 &pcfg_pull_none>,
248 <RK_GPIO3 20 RK_FUNC_1 &pcfg_pull_none>;
249 };
250 };
251 };
252 };
253};
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi
new file mode 100644
index 000000000000..0fcbcfd67de2
--- /dev/null
+++ b/arch/arm/boot/dts/rk3xxx.dtsi
@@ -0,0 +1,124 @@
1/*
2 * Copyright (c) 2013 MundoReader S.L.
3 * Author: Heiko Stuebner <heiko@sntech.de>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <dt-bindings/interrupt-controller/irq.h>
17#include <dt-bindings/interrupt-controller/arm-gic.h>
18#include "skeleton.dtsi"
19
20/ {
21 interrupt-parent = <&gic>;
22
23 soc {
24 #address-cells = <1>;
25 #size-cells = <1>;
26 compatible = "simple-bus";
27 ranges;
28
29 gic: interrupt-controller@1013d000 {
30 compatible = "arm,cortex-a9-gic";
31 interrupt-controller;
32 #interrupt-cells = <3>;
33 reg = <0x1013d000 0x1000>,
34 <0x1013c100 0x0100>;
35 };
36
37 L2: l2-cache-controller@10138000 {
38 compatible = "arm,pl310-cache";
39 reg = <0x10138000 0x1000>;
40 cache-unified;
41 cache-level = <2>;
42 };
43
44 global-timer@1013c200 {
45 compatible = "arm,cortex-a9-global-timer";
46 reg = <0x1013c200 0x20>;
47 interrupts = <GIC_PPI 11 0x304>;
48 clocks = <&dummy150m>;
49 };
50
51 local-timer@1013c600 {
52 compatible = "arm,cortex-a9-twd-timer";
53 reg = <0x1013c600 0x20>;
54 interrupts = <GIC_PPI 13 0x304>;
55 clocks = <&dummy150m>;
56 };
57
58 uart0: serial@10124000 {
59 compatible = "snps,dw-apb-uart";
60 reg = <0x10124000 0x400>;
61 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
62 reg-shift = <2>;
63 reg-io-width = <1>;
64 clocks = <&clk_gates1 8>;
65 status = "disabled";
66 };
67
68 uart1: serial@10126000 {
69 compatible = "snps,dw-apb-uart";
70 reg = <0x10126000 0x400>;
71 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
72 reg-shift = <2>;
73 reg-io-width = <1>;
74 clocks = <&clk_gates1 10>;
75 status = "disabled";
76 };
77
78 uart2: serial@20064000 {
79 compatible = "snps,dw-apb-uart";
80 reg = <0x20064000 0x400>;
81 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
82 reg-shift = <2>;
83 reg-io-width = <1>;
84 clocks = <&clk_gates1 12>;
85 status = "disabled";
86 };
87
88 uart3: serial@20068000 {
89 compatible = "snps,dw-apb-uart";
90 reg = <0x20068000 0x400>;
91 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
92 reg-shift = <2>;
93 reg-io-width = <1>;
94 clocks = <&clk_gates1 14>;
95 status = "disabled";
96 };
97
98 dwmmc@10214000 {
99 compatible = "rockchip,rk2928-dw-mshc";
100 reg = <0x10214000 0x1000>;
101 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
102 #address-cells = <1>;
103 #size-cells = <0>;
104
105 clocks = <&clk_gates5 10>, <&clk_gates2 11>;
106 clock-names = "biu", "ciu";
107
108 status = "disabled";
109 };
110
111 dwmmc@10218000 {
112 compatible = "rockchip,rk2928-dw-mshc";
113 reg = <0x10218000 0x1000>;
114 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
115 #address-cells = <1>;
116 #size-cells = <0>;
117
118 clocks = <&clk_gates5 11>, <&clk_gates2 13>;
119 clock-names = "biu", "ciu";
120
121 status = "disabled";
122 };
123 };
124};
diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
index e7e94948d194..b38cd107f82d 100644
--- a/arch/arm/configs/bockw_defconfig
+++ b/arch/arm/configs/bockw_defconfig
@@ -91,6 +91,10 @@ CONFIG_VIDEO_RCAR_VIN=y
91CONFIG_VIDEO_ML86V7667=y 91CONFIG_VIDEO_ML86V7667=y
92CONFIG_SPI=y 92CONFIG_SPI=y
93CONFIG_SPI_SH_HSPI=y 93CONFIG_SPI_SH_HSPI=y
94CONFIG_SOUND=y
95CONFIG_SND=y
96CONFIG_SND_SOC=y
97CONFIG_SND_SOC_RCAR=y
94CONFIG_USB=y 98CONFIG_USB=y
95CONFIG_USB_ANNOUNCE_NEW_DEVICES=y 99CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
96CONFIG_USB_EHCI_HCD=y 100CONFIG_USB_EHCI_HCD=y
diff --git a/arch/arm/configs/koelsch_defconfig b/arch/arm/configs/koelsch_defconfig
new file mode 100644
index 000000000000..825c16dee8a0
--- /dev/null
+++ b/arch/arm/configs/koelsch_defconfig
@@ -0,0 +1,54 @@
1CONFIG_SYSVIPC=y
2CONFIG_NO_HZ=y
3CONFIG_IKCONFIG=y
4CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=16
6CONFIG_CC_OPTIMIZE_FOR_SIZE=y
7CONFIG_SYSCTL_SYSCALL=y
8CONFIG_EMBEDDED=y
9CONFIG_PERF_EVENTS=y
10CONFIG_SLAB=y
11# CONFIG_BLOCK is not set
12CONFIG_ARCH_SHMOBILE=y
13CONFIG_ARCH_R8A7791=y
14CONFIG_MACH_KOELSCH=y
15# CONFIG_SWP_EMULATE is not set
16CONFIG_CPU_BPREDICT_DISABLE=y
17CONFIG_PL310_ERRATA_588369=y
18CONFIG_ARM_ERRATA_754322=y
19CONFIG_SMP=y
20CONFIG_SCHED_MC=y
21CONFIG_NR_CPUS=8
22CONFIG_AEABI=y
23CONFIG_ZBOOT_ROM_TEXT=0x0
24CONFIG_ZBOOT_ROM_BSS=0x0
25CONFIG_ARM_APPENDED_DTB=y
26CONFIG_KEXEC=y
27CONFIG_AUTO_ZRELADDR=y
28CONFIG_VFP=y
29CONFIG_NEON=y
30# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
31CONFIG_PM_RUNTIME=y
32CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
33# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
34# CONFIG_INPUT_MOUSE is not set
35# CONFIG_LEGACY_PTYS is not set
36CONFIG_SERIAL_SH_SCI=y
37CONFIG_SERIAL_SH_SCI_NR_UARTS=20
38CONFIG_SERIAL_SH_SCI_CONSOLE=y
39# CONFIG_HWMON is not set
40CONFIG_THERMAL=y
41CONFIG_RCAR_THERMAL=y
42# CONFIG_HID is not set
43# CONFIG_USB_SUPPORT is not set
44CONFIG_NEW_LEDS=y
45CONFIG_LEDS_CLASS=y
46# CONFIG_IOMMU_SUPPORT is not set
47# CONFIG_DNOTIFY is not set
48# CONFIG_INOTIFY_USER is not set
49CONFIG_TMPFS=y
50CONFIG_CONFIGFS_FS=y
51# CONFIG_MISC_FILESYSTEMS is not set
52# CONFIG_ENABLE_WARN_DEPRECATED is not set
53# CONFIG_ENABLE_MUST_CHECK is not set
54# CONFIG_ARM_UNWIND is not set
diff --git a/arch/arm/configs/lager_defconfig b/arch/arm/configs/lager_defconfig
index e777ef22b801..35bff5e0d57a 100644
--- a/arch/arm/configs/lager_defconfig
+++ b/arch/arm/configs/lager_defconfig
@@ -89,6 +89,8 @@ CONFIG_THERMAL=y
89CONFIG_RCAR_THERMAL=y 89CONFIG_RCAR_THERMAL=y
90CONFIG_REGULATOR=y 90CONFIG_REGULATOR=y
91CONFIG_REGULATOR_FIXED_VOLTAGE=y 91CONFIG_REGULATOR_FIXED_VOLTAGE=y
92CONFIG_DRM=y
93CONFIG_DRM_RCAR_DU=y
92# CONFIG_USB_SUPPORT is not set 94# CONFIG_USB_SUPPORT is not set
93CONFIG_MMC=y 95CONFIG_MMC=y
94CONFIG_MMC_SDHI=y 96CONFIG_MMC_SDHI=y
diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
index 000e9205b2b9..5cc6360340b1 100644
--- a/arch/arm/configs/marzen_defconfig
+++ b/arch/arm/configs/marzen_defconfig
@@ -92,6 +92,8 @@ CONFIG_SOC_CAMERA=y
92CONFIG_VIDEO_RCAR_VIN=y 92CONFIG_VIDEO_RCAR_VIN=y
93# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set 93# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
94CONFIG_VIDEO_ADV7180=y 94CONFIG_VIDEO_ADV7180=y
95CONFIG_DRM=y
96CONFIG_DRM_RCAR_DU=y
95CONFIG_USB=y 97CONFIG_USB=y
96CONFIG_USB_RCAR_PHY=y 98CONFIG_USB_RCAR_PHY=y
97CONFIG_MMC=y 99CONFIG_MMC=y
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig
index ea042e80e54d..4934295bb4f0 100644
--- a/arch/arm/configs/tegra_defconfig
+++ b/arch/arm/configs/tegra_defconfig
@@ -27,6 +27,7 @@ CONFIG_ARCH_TEGRA=y
27CONFIG_ARCH_TEGRA_2x_SOC=y 27CONFIG_ARCH_TEGRA_2x_SOC=y
28CONFIG_ARCH_TEGRA_3x_SOC=y 28CONFIG_ARCH_TEGRA_3x_SOC=y
29CONFIG_ARCH_TEGRA_114_SOC=y 29CONFIG_ARCH_TEGRA_114_SOC=y
30CONFIG_ARCH_TEGRA_124_SOC=y
30CONFIG_TEGRA_EMC_SCALING_ENABLE=y 31CONFIG_TEGRA_EMC_SCALING_ENABLE=y
31CONFIG_PCI=y 32CONFIG_PCI=y
32CONFIG_PCI_MSI=y 33CONFIG_PCI_MSI=y
@@ -41,9 +42,11 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
41CONFIG_ZBOOT_ROM_BSS=0x0 42CONFIG_ZBOOT_ROM_BSS=0x0
42CONFIG_KEXEC=y 43CONFIG_KEXEC=y
43CONFIG_CPU_FREQ=y 44CONFIG_CPU_FREQ=y
45CONFIG_CPU_FREQ_STAT_DETAILS=y
44CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y 46CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
45CONFIG_CPU_IDLE=y 47CONFIG_CPU_IDLE=y
46CONFIG_VFP=y 48CONFIG_VFP=y
49CONFIG_NEON=y
47CONFIG_PM_RUNTIME=y 50CONFIG_PM_RUNTIME=y
48CONFIG_NET=y 51CONFIG_NET=y
49CONFIG_PACKET=y 52CONFIG_PACKET=y
@@ -129,6 +132,7 @@ CONFIG_SPI=y
129CONFIG_SPI_TEGRA114=y 132CONFIG_SPI_TEGRA114=y
130CONFIG_SPI_TEGRA20_SFLASH=y 133CONFIG_SPI_TEGRA20_SFLASH=y
131CONFIG_SPI_TEGRA20_SLINK=y 134CONFIG_SPI_TEGRA20_SLINK=y
135CONFIG_PINCTRL_PALMAS=y
132CONFIG_GPIO_PCA953X_IRQ=y 136CONFIG_GPIO_PCA953X_IRQ=y
133CONFIG_GPIO_PALMAS=y 137CONFIG_GPIO_PALMAS=y
134CONFIG_GPIO_TPS6586X=y 138CONFIG_GPIO_TPS6586X=y
@@ -223,6 +227,7 @@ CONFIG_KEYBOARD_NVEC=y
223CONFIG_SERIO_NVEC_PS2=y 227CONFIG_SERIO_NVEC_PS2=y
224CONFIG_NVEC_POWER=y 228CONFIG_NVEC_POWER=y
225CONFIG_NVEC_PAZ00=y 229CONFIG_NVEC_PAZ00=y
230CONFIG_COMMON_CLK_DEBUG=y
226CONFIG_TEGRA_IOMMU_GART=y 231CONFIG_TEGRA_IOMMU_GART=y
227CONFIG_TEGRA_IOMMU_SMMU=y 232CONFIG_TEGRA_IOMMU_SMMU=y
228CONFIG_MEMORY=y 233CONFIG_MEMORY=y
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index cb7b527d61bd..9b7619f2c1ac 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -8,7 +8,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \
8# Common support 8# Common support
9obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o gpmc.o timer.o pm.o \ 9obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o gpmc.o timer.o pm.o \
10 common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \ 10 common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
11 omap_device.o sram.o 11 omap_device.o sram.o drm.o
12 12
13omap-2-3-common = irq.o 13omap-2-3-common = irq.o
14hwmod-common = omap_hwmod.o omap_hwmod_reset.o \ 14hwmod-common = omap_hwmod.o omap_hwmod_reset.o \
@@ -235,10 +235,6 @@ endif
235# OMAP2420 MSDI controller integration support ("MMC") 235# OMAP2420 MSDI controller integration support ("MMC")
236obj-$(CONFIG_SOC_OMAP2420) += msdi.o 236obj-$(CONFIG_SOC_OMAP2420) += msdi.o
237 237
238ifneq ($(CONFIG_DRM_OMAP),)
239obj-y += drm.o
240endif
241
242# Specific board support 238# Specific board support
243obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o 239obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o
244obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o 240obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index f6fe388af989..5c0d0e120420 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -57,6 +57,8 @@
57#include "common-board-devices.h" 57#include "common-board-devices.h"
58#include "gpmc.h" 58#include "gpmc.h"
59#include "gpmc-onenand.h" 59#include "gpmc-onenand.h"
60#include "soc.h"
61#include "omap-secure.h"
60 62
61#define SYSTEM_REV_B_USES_VAUX3 0x1699 63#define SYSTEM_REV_B_USES_VAUX3 0x1699
62#define SYSTEM_REV_S_USES_VAUX3 0x8 64#define SYSTEM_REV_S_USES_VAUX3 0x8
@@ -1298,6 +1300,22 @@ static void __init rx51_init_twl4030_hwmon(void)
1298 platform_device_register(&madc_hwmon); 1300 platform_device_register(&madc_hwmon);
1299} 1301}
1300 1302
1303static struct platform_device omap3_rom_rng_device = {
1304 .name = "omap3-rom-rng",
1305 .id = -1,
1306 .dev = {
1307 .platform_data = rx51_secure_rng_call,
1308 },
1309};
1310
1311static void __init rx51_init_omap3_rom_rng(void)
1312{
1313 if (omap_type() == OMAP2_DEVICE_TYPE_SEC) {
1314 pr_info("RX-51: Registring OMAP3 HWRNG device\n");
1315 platform_device_register(&omap3_rom_rng_device);
1316 }
1317}
1318
1301void __init rx51_peripherals_init(void) 1319void __init rx51_peripherals_init(void)
1302{ 1320{
1303 rx51_i2c_init(); 1321 rx51_i2c_init();
@@ -1318,5 +1336,6 @@ void __init rx51_peripherals_init(void)
1318 1336
1319 rx51_charger_init(); 1337 rx51_charger_init();
1320 rx51_init_twl4030_hwmon(); 1338 rx51_init_twl4030_hwmon();
1339 rx51_init_omap3_rom_rng();
1321} 1340}
1322 1341
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 7735105561d8..db168c9627a1 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -2,6 +2,8 @@
2 * Board support file for Nokia N900 (aka RX-51). 2 * Board support file for Nokia N900 (aka RX-51).
3 * 3 *
4 * Copyright (C) 2007, 2008 Nokia 4 * Copyright (C) 2007, 2008 Nokia
5 * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
6 * Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com>
5 * 7 *
6 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
@@ -31,7 +33,9 @@
31#include "mux.h" 33#include "mux.h"
32#include "gpmc.h" 34#include "gpmc.h"
33#include "pm.h" 35#include "pm.h"
36#include "soc.h"
34#include "sdram-nokia.h" 37#include "sdram-nokia.h"
38#include "omap-secure.h"
35 39
36#define RX51_GPIO_SLEEP_IND 162 40#define RX51_GPIO_SLEEP_IND 162
37 41
@@ -103,6 +107,14 @@ static void __init rx51_init(void)
103 usb_musb_init(&musb_board_data); 107 usb_musb_init(&musb_board_data);
104 rx51_peripherals_init(); 108 rx51_peripherals_init();
105 109
110 if (omap_type() == OMAP2_DEVICE_TYPE_SEC) {
111#ifdef CONFIG_ARM_ERRATA_430973
112 pr_info("RX-51: Enabling ARM errata 430973 workaround\n");
113 /* set IBE to 1 */
114 rx51_secure_update_aux_cr(BIT(6), 0);
115#endif
116 }
117
106 /* Ensure SDRC pins are mux'd for self-refresh */ 118 /* Ensure SDRC pins are mux'd for self-refresh */
107 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); 119 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
108 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); 120 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
index 334b76745900..03a2829beb8e 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -3275,6 +3275,7 @@ static struct omap_clk omap36xx_clks[] = {
3275static struct omap_clk omap34xx_omap36xx_clks[] = { 3275static struct omap_clk omap34xx_omap36xx_clks[] = {
3276 CLK(NULL, "aes1_ick", &aes1_ick), 3276 CLK(NULL, "aes1_ick", &aes1_ick),
3277 CLK("omap_rng", "ick", &rng_ick), 3277 CLK("omap_rng", "ick", &rng_ick),
3278 CLK("omap3-rom-rng", "ick", &rng_ick),
3278 CLK(NULL, "sha11_ick", &sha11_ick), 3279 CLK(NULL, "sha11_ick", &sha11_ick),
3279 CLK(NULL, "des1_ick", &des1_ick), 3280 CLK(NULL, "des1_ick", &des1_ick),
3280 CLK(NULL, "cam_mclk", &cam_mclk), 3281 CLK(NULL, "cam_mclk", &cam_mclk),
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 5c5315ba129b..89a8698cd6ed 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -37,6 +37,7 @@
37#include "mux.h" 37#include "mux.h"
38#include "control.h" 38#include "control.h"
39#include "devices.h" 39#include "devices.h"
40#include "display.h"
40 41
41#define L3_MODULES_MAX_LEN 12 42#define L3_MODULES_MAX_LEN 12
42#define L3_MODULES 3 43#define L3_MODULES 3
@@ -466,13 +467,13 @@ static struct platform_device omap_vout_device = {
466 .resource = &omap_vout_resource[0], 467 .resource = &omap_vout_resource[0],
467 .id = -1, 468 .id = -1,
468}; 469};
469static void omap_init_vout(void) 470
471int __init omap_init_vout(void)
470{ 472{
471 if (platform_device_register(&omap_vout_device) < 0) 473 return platform_device_register(&omap_vout_device);
472 printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
473} 474}
474#else 475#else
475static inline void omap_init_vout(void) {} 476int __init omap_init_vout(void) { return 0; }
476#endif 477#endif
477 478
478#if IS_ENABLED(CONFIG_WL12XX) 479#if IS_ENABLED(CONFIG_WL12XX)
@@ -536,7 +537,6 @@ static int __init omap2_init_devices(void)
536 omap_init_wl12xx_of(); 537 omap_init_wl12xx_of();
537 } 538 }
538 omap_init_sti(); 539 omap_init_sti();
539 omap_init_vout();
540 540
541 return 0; 541 return 0;
542} 542}
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 03a0516c7f67..a4e536b11ec9 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -416,6 +416,34 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
416 } 416 }
417 } 417 }
418 418
419 /* create DRM device */
420 r = omap_init_drm();
421 if (r < 0) {
422 pr_err("Unable to register omapdrm device\n");
423 return r;
424 }
425
426 /* create vrfb device */
427 r = omap_init_vrfb();
428 if (r < 0) {
429 pr_err("Unable to register omapvrfb device\n");
430 return r;
431 }
432
433 /* create FB device */
434 r = omap_init_fb();
435 if (r < 0) {
436 pr_err("Unable to register omapfb device\n");
437 return r;
438 }
439
440 /* create V4L2 display device */
441 r = omap_init_vout();
442 if (r < 0) {
443 pr_err("Unable to register omap_vout device\n");
444 return r;
445 }
446
419 return 0; 447 return 0;
420} 448}
421 449
diff --git a/arch/arm/mach-omap2/display.h b/arch/arm/mach-omap2/display.h
index b871b017b352..f3d2ce4bc262 100644
--- a/arch/arm/mach-omap2/display.h
+++ b/arch/arm/mach-omap2/display.h
@@ -26,4 +26,8 @@ struct omap_dss_dispc_dev_attr {
26 bool has_framedonetv_irq; 26 bool has_framedonetv_irq;
27}; 27};
28 28
29int omap_init_drm(void);
30int omap_init_vrfb(void);
31int omap_init_fb(void);
32int omap_init_vout(void);
29#endif 33#endif
diff --git a/arch/arm/mach-omap2/drm.c b/arch/arm/mach-omap2/drm.c
index 59a4af779f42..facd7406a03d 100644
--- a/arch/arm/mach-omap2/drm.c
+++ b/arch/arm/mach-omap2/drm.c
@@ -26,10 +26,9 @@
26#include <linux/platform_data/omap_drm.h> 26#include <linux/platform_data/omap_drm.h>
27 27
28#include "soc.h" 28#include "soc.h"
29#include "omap_device.h" 29#include "display.h"
30#include "omap_hwmod.h"
31 30
32#if defined(CONFIG_DRM_OMAP) || (CONFIG_DRM_OMAP_MODULE) 31#if defined(CONFIG_DRM_OMAP) || defined(CONFIG_DRM_OMAP_MODULE)
33 32
34static struct omap_drm_platform_data platform_data; 33static struct omap_drm_platform_data platform_data;
35 34
@@ -42,26 +41,13 @@ static struct platform_device omap_drm_device = {
42 .id = 0, 41 .id = 0,
43}; 42};
44 43
45static int __init omap_init_drm(void) 44int __init omap_init_drm(void)
46{ 45{
47 struct omap_hwmod *oh = NULL;
48 struct platform_device *pdev;
49
50 /* lookup and populate the DMM information, if present - OMAP4+ */
51 oh = omap_hwmod_lookup("dmm");
52
53 if (oh) {
54 pdev = omap_device_build(oh->name, -1, oh, NULL, 0);
55 WARN(IS_ERR(pdev), "Could not build omap_device for %s\n",
56 oh->name);
57 }
58
59 platform_data.omaprev = GET_OMAP_TYPE; 46 platform_data.omaprev = GET_OMAP_TYPE;
60 47
61 return platform_device_register(&omap_drm_device); 48 return platform_device_register(&omap_drm_device);
62 49
63} 50}
64 51#else
65omap_arch_initcall(omap_init_drm); 52int __init omap_init_drm(void) { return 0; }
66
67#endif 53#endif
diff --git a/arch/arm/mach-omap2/fb.c b/arch/arm/mach-omap2/fb.c
index 2ca33cc0c484..26e28e94f625 100644
--- a/arch/arm/mach-omap2/fb.c
+++ b/arch/arm/mach-omap2/fb.c
@@ -32,6 +32,7 @@
32#include <asm/mach/map.h> 32#include <asm/mach/map.h>
33 33
34#include "soc.h" 34#include "soc.h"
35#include "display.h"
35 36
36#ifdef CONFIG_OMAP2_VRFB 37#ifdef CONFIG_OMAP2_VRFB
37 38
@@ -64,7 +65,7 @@ static const struct resource omap3_vrfb_resources[] = {
64 DEFINE_RES_MEM_NAMED(0xfc000000u, 0x4000000, "vrfb-area-11"), 65 DEFINE_RES_MEM_NAMED(0xfc000000u, 0x4000000, "vrfb-area-11"),
65}; 66};
66 67
67static int __init omap_init_vrfb(void) 68int __init omap_init_vrfb(void)
68{ 69{
69 struct platform_device *pdev; 70 struct platform_device *pdev;
70 const struct resource *res; 71 const struct resource *res;
@@ -85,8 +86,8 @@ static int __init omap_init_vrfb(void)
85 86
86 return PTR_RET(pdev); 87 return PTR_RET(pdev);
87} 88}
88 89#else
89omap_arch_initcall(omap_init_vrfb); 90int __init omap_init_vrfb(void) { return 0; }
90#endif 91#endif
91 92
92#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) 93#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
@@ -105,11 +106,10 @@ static struct platform_device omap_fb_device = {
105 .num_resources = 0, 106 .num_resources = 0,
106}; 107};
107 108
108static int __init omap_init_fb(void) 109int __init omap_init_fb(void)
109{ 110{
110 return platform_device_register(&omap_fb_device); 111 return platform_device_register(&omap_fb_device);
111} 112}
112 113#else
113omap_arch_initcall(omap_init_fb); 114int __init omap_init_fb(void) { return 0; }
114
115#endif 115#endif
diff --git a/arch/arm/mach-omap2/omap-secure.c b/arch/arm/mach-omap2/omap-secure.c
index b970440cffca..5ac122e88f67 100644
--- a/arch/arm/mach-omap2/omap-secure.c
+++ b/arch/arm/mach-omap2/omap-secure.c
@@ -3,6 +3,8 @@
3 * 3 *
4 * Copyright (C) 2011 Texas Instruments, Inc. 4 * Copyright (C) 2011 Texas Instruments, Inc.
5 * Santosh Shilimkar <santosh.shilimkar@ti.com> 5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
7 * Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com>
6 * 8 *
7 * 9 *
8 * This program is free software,you can redistribute it and/or modify 10 * This program is free software,you can redistribute it and/or modify
@@ -70,3 +72,77 @@ phys_addr_t omap_secure_ram_mempool_base(void)
70{ 72{
71 return omap_secure_memblock_base; 73 return omap_secure_memblock_base;
72} 74}
75
76/**
77 * rx51_secure_dispatcher: Routine to dispatch secure PPA API calls
78 * @idx: The PPA API index
79 * @process: Process ID
80 * @flag: The flag indicating criticality of operation
81 * @nargs: Number of valid arguments out of four.
82 * @arg1, arg2, arg3 args4: Parameters passed to secure API
83 *
84 * Return the non-zero error value on failure.
85 *
86 * NOTE: rx51_secure_dispatcher differs from omap_secure_dispatcher because
87 * it calling omap_smc3() instead omap_smc2() and param[0] is nargs+1
88 */
89u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs,
90 u32 arg1, u32 arg2, u32 arg3, u32 arg4)
91{
92 u32 ret;
93 u32 param[5];
94
95 param[0] = nargs+1; /* RX-51 needs number of arguments + 1 */
96 param[1] = arg1;
97 param[2] = arg2;
98 param[3] = arg3;
99 param[4] = arg4;
100
101 /*
102 * Secure API needs physical address
103 * pointer for the parameters
104 */
105 local_irq_disable();
106 local_fiq_disable();
107 flush_cache_all();
108 outer_clean_range(__pa(param), __pa(param + 5));
109 ret = omap_smc3(idx, process, flag, __pa(param));
110 flush_cache_all();
111 local_fiq_enable();
112 local_irq_enable();
113
114 return ret;
115}
116
117/**
118 * rx51_secure_update_aux_cr: Routine to modify the contents of Auxiliary Control Register
119 * @set_bits: bits to set in ACR
120 * @clr_bits: bits to clear in ACR
121 *
122 * Return the non-zero error value on failure.
123*/
124u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits)
125{
126 u32 acr;
127
128 /* Read ACR */
129 asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
130 acr &= ~clear_bits;
131 acr |= set_bits;
132
133 return rx51_secure_dispatcher(RX51_PPA_WRITE_ACR,
134 0,
135 FLAG_START_CRITICAL,
136 1, acr, 0, 0, 0);
137}
138
139/**
140 * rx51_secure_rng_call: Routine for HW random generator
141 */
142u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag)
143{
144 return rx51_secure_dispatcher(RX51_PPA_HWRNG,
145 0,
146 NO_FLAG,
147 3, ptr, count, flag, 0);
148}
diff --git a/arch/arm/mach-omap2/omap-secure.h b/arch/arm/mach-omap2/omap-secure.h
index a5ee09d20ac9..8cc7d331437d 100644
--- a/arch/arm/mach-omap2/omap-secure.h
+++ b/arch/arm/mach-omap2/omap-secure.h
@@ -3,6 +3,8 @@
3 * 3 *
4 * Copyright (C) 2011 Texas Instruments, Inc. 4 * Copyright (C) 2011 Texas Instruments, Inc.
5 * Santosh Shilimkar <santosh.shilimkar@ti.com> 5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
7 * Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com>
6 * 8 *
7 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as 10 * it under the terms of the GNU General Public License version 2 as
@@ -48,14 +50,25 @@
48#define OMAP4_PPA_L2_POR_INDEX 0x23 50#define OMAP4_PPA_L2_POR_INDEX 0x23
49#define OMAP4_PPA_CPU_ACTRL_SMP_INDEX 0x25 51#define OMAP4_PPA_CPU_ACTRL_SMP_INDEX 0x25
50 52
53/* Secure RX-51 PPA (Primary Protected Application) APIs */
54#define RX51_PPA_HWRNG 29
55#define RX51_PPA_L2_INVAL 40
56#define RX51_PPA_WRITE_ACR 42
57
51#ifndef __ASSEMBLER__ 58#ifndef __ASSEMBLER__
52 59
53extern u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs, 60extern u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs,
54 u32 arg1, u32 arg2, u32 arg3, u32 arg4); 61 u32 arg1, u32 arg2, u32 arg3, u32 arg4);
55extern u32 omap_smc2(u32 id, u32 falg, u32 pargs); 62extern u32 omap_smc2(u32 id, u32 falg, u32 pargs);
63extern u32 omap_smc3(u32 id, u32 process, u32 flag, u32 pargs);
56extern phys_addr_t omap_secure_ram_mempool_base(void); 64extern phys_addr_t omap_secure_ram_mempool_base(void);
57extern int omap_secure_ram_reserve_memblock(void); 65extern int omap_secure_ram_reserve_memblock(void);
58 66
67extern u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs,
68 u32 arg1, u32 arg2, u32 arg3, u32 arg4);
69extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits);
70extern u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag);
71
59#ifdef CONFIG_OMAP4_ERRATA_I688 72#ifdef CONFIG_OMAP4_ERRATA_I688
60extern int omap_barrier_reserve_memblock(void); 73extern int omap_barrier_reserve_memblock(void);
61#else 74#else
diff --git a/arch/arm/mach-omap2/omap-smc.S b/arch/arm/mach-omap2/omap-smc.S
index f6441c13cd8c..fd90125bffc7 100644
--- a/arch/arm/mach-omap2/omap-smc.S
+++ b/arch/arm/mach-omap2/omap-smc.S
@@ -1,9 +1,11 @@
1/* 1/*
2 * OMAP44xx secure APIs file. 2 * OMAP34xx and OMAP44xx secure APIs file.
3 * 3 *
4 * Copyright (C) 2010 Texas Instruments, Inc. 4 * Copyright (C) 2010 Texas Instruments, Inc.
5 * Written by Santosh Shilimkar <santosh.shilimkar@ti.com> 5 * Written by Santosh Shilimkar <santosh.shilimkar@ti.com>
6 * 6 *
7 * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
8 * Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com>
7 * 9 *
8 * This program is free software,you can redistribute it and/or modify 10 * This program is free software,you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
@@ -54,6 +56,23 @@ ENTRY(omap_smc2)
54 ldmfd sp!, {r4-r12, pc} 56 ldmfd sp!, {r4-r12, pc}
55ENDPROC(omap_smc2) 57ENDPROC(omap_smc2)
56 58
59/**
60 * u32 omap_smc3(u32 service_id, u32 process_id, u32 flag, u32 pargs)
61 * Low level common routine for secure HAL and PPA APIs via smc #1
62 * r0 - @service_id: Secure Service ID
63 * r1 - @process_id: Process ID
64 * r2 - @flag: Flag to indicate the criticality of operation
65 * r3 - @pargs: Physical address of parameter list
66 */
67ENTRY(omap_smc3)
68 stmfd sp!, {r4-r11, lr}
69 mov r12, r0 @ Copy the secure service ID
70 mov r6, #0xff @ Indicate new Task call
71 dsb @ Memory Barrier (not sure if needed, copied from omap_smc2)
72 smc #1 @ Call PPA service
73 ldmfd sp!, {r4-r11, pc}
74ENDPROC(omap_smc3)
75
57ENTRY(omap_modify_auxcoreboot0) 76ENTRY(omap_modify_auxcoreboot0)
58 stmfd sp!, {r1-r12, lr} 77 stmfd sp!, {r1-r12, lr}
59 ldr r12, =0x104 78 ldr r12, =0x104
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index a8487337344a..cf073dea5784 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -10,6 +10,8 @@ config ARCH_ROCKCHIP
10 select COMMON_CLK 10 select COMMON_CLK
11 select GENERIC_CLOCKEVENTS 11 select GENERIC_CLOCKEVENTS
12 select DW_APB_TIMER_OF 12 select DW_APB_TIMER_OF
13 select ARM_GLOBAL_TIMER
14 select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
13 help 15 help
14 Support for Rockchip's Cortex-A9 Single-to-Quad-Core-SoCs 16 Support for Rockchip's Cortex-A9 Single-to-Quad-Core-SoCs
15 containing the RK2928, RK30xx and RK31xx series. 17 containing the RK2928, RK30xx and RK31xx series.
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 5dd5f9f7897a..a4a4b75109b2 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -22,16 +22,10 @@ config ARCH_EMEV2
22 22
23comment "SH-Mobile Board Type" 23comment "SH-Mobile Board Type"
24 24
25config MACH_KZM9D_REFERENCE 25config MACH_KZM9D
26 bool "KZM9D board - Reference Device Tree Implementation" 26 bool "KZM9D board"
27 depends on ARCH_EMEV2 27 depends on ARCH_EMEV2
28 select REGULATOR_FIXED_VOLTAGE if REGULATOR 28 select REGULATOR_FIXED_VOLTAGE if REGULATOR
29 ---help---
30 Use reference implementation of KZM9D board support
31 which makes a greater use of device tree at the expense
32 of not supporting a number of devices.
33
34 This is intended to aid developers
35 29
36comment "SH-Mobile System Configuration" 30comment "SH-Mobile System Configuration"
37endif 31endif
@@ -174,6 +168,8 @@ config MACH_BOCKW
174 select RENESAS_INTC_IRQPIN 168 select RENESAS_INTC_IRQPIN
175 select REGULATOR_FIXED_VOLTAGE if REGULATOR 169 select REGULATOR_FIXED_VOLTAGE if REGULATOR
176 select USE_OF 170 select USE_OF
171 select SND_SOC_AK4554 if SND_SIMPLE_CARD
172 select SND_SOC_AK4642 if SND_SIMPLE_CARD
177 173
178config MACH_BOCKW_REFERENCE 174config MACH_BOCKW_REFERENCE
179 bool "BOCK-W - Reference Device Tree Implementation" 175 bool "BOCK-W - Reference Device Tree Implementation"
@@ -189,6 +185,11 @@ config MACH_BOCKW_REFERENCE
189 185
190 This is intended to aid developers 186 This is intended to aid developers
191 187
188config MACH_GENMAI
189 bool "Genmai board"
190 depends on ARCH_R7S72100
191 select USE_OF
192
192config MACH_MARZEN 193config MACH_MARZEN
193 bool "MARZEN board" 194 bool "MARZEN board"
194 depends on ARCH_R8A7779 195 depends on ARCH_R8A7779
@@ -225,23 +226,16 @@ config MACH_LAGER_REFERENCE
225 226
226 This is intended to aid developers 227 This is intended to aid developers
227 228
228config MACH_KZM9D 229config MACH_KOELSCH
229 bool "KZM9D board" 230 bool "Koelsch board"
230 depends on ARCH_EMEV2 231 depends on ARCH_R8A7791
231 select REGULATOR_FIXED_VOLTAGE if REGULATOR
232 select USE_OF 232 select USE_OF
233 233
234config MACH_KZM9D_REFERENCE 234config MACH_KZM9D
235 bool "KZM9D board - Reference Device Tree Implementation" 235 bool "KZM9D board"
236 depends on ARCH_EMEV2 236 depends on ARCH_EMEV2
237 select REGULATOR_FIXED_VOLTAGE if REGULATOR 237 select REGULATOR_FIXED_VOLTAGE if REGULATOR
238 select USE_OF 238 select USE_OF
239 ---help---
240 Use reference implementation of KZM9D board support
241 which makes a greater use of device tree at the expense
242 of not supporting a number of devices.
243
244 This is intended to aid developers
245 239
246config MACH_KZM9G 240config MACH_KZM9G
247 bool "KZM-A9-GT board" 241 bool "KZM-A9-GT board"
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index f2d40edadcc9..51db2bcafabf 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -55,21 +55,26 @@ obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o pm-rmobile.o
55obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o 55obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o
56 56
57# Board objects 57# Board objects
58ifdef CONFIG_ARCH_SHMOBILE_MULTI
59obj-$(CONFIG_MACH_KZM9D) += board-kzm9d-reference.o
60else
58obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o 61obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o
59obj-$(CONFIG_MACH_APE6EVM_REFERENCE) += board-ape6evm-reference.o 62obj-$(CONFIG_MACH_APE6EVM_REFERENCE) += board-ape6evm-reference.o
60obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o 63obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o
61obj-$(CONFIG_MACH_BOCKW) += board-bockw.o 64obj-$(CONFIG_MACH_BOCKW) += board-bockw.o
62obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o 65obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o
66obj-$(CONFIG_MACH_GENMAI) += board-genmai.o
63obj-$(CONFIG_MACH_MARZEN) += board-marzen.o 67obj-$(CONFIG_MACH_MARZEN) += board-marzen.o
64obj-$(CONFIG_MACH_MARZEN_REFERENCE) += board-marzen-reference.o 68obj-$(CONFIG_MACH_MARZEN_REFERENCE) += board-marzen-reference.o
65obj-$(CONFIG_MACH_LAGER) += board-lager.o 69obj-$(CONFIG_MACH_LAGER) += board-lager.o
66obj-$(CONFIG_MACH_LAGER_REFERENCE) += board-lager-reference.o 70obj-$(CONFIG_MACH_LAGER_REFERENCE) += board-lager-reference.o
67obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o 71obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o
68obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o 72obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o
73obj-$(CONFIG_MACH_KOELSCH) += board-koelsch.o
69obj-$(CONFIG_MACH_KZM9D) += board-kzm9d.o 74obj-$(CONFIG_MACH_KZM9D) += board-kzm9d.o
70obj-$(CONFIG_MACH_KZM9D_REFERENCE) += board-kzm9d-reference.o
71obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o 75obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o
72obj-$(CONFIG_MACH_KZM9G_REFERENCE) += board-kzm9g-reference.o 76obj-$(CONFIG_MACH_KZM9G_REFERENCE) += board-kzm9g-reference.o
77endif
73 78
74# Framework support 79# Framework support
75obj-$(CONFIG_SMP) += $(smp-y) 80obj-$(CONFIG_SMP) += $(smp-y)
diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
index 6a504fe7d86c..391d72a5536c 100644
--- a/arch/arm/mach-shmobile/Makefile.boot
+++ b/arch/arm/mach-shmobile/Makefile.boot
@@ -6,8 +6,9 @@ loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
6loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000 6loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
7loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000 7loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
8loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000 8loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
9loadaddr-$(CONFIG_MACH_GENMAI) += 0x8008000
10loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
9loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000 11loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
10loadaddr-$(CONFIG_MACH_KZM9D_REFERENCE) += 0x40008000
11loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000 12loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
12loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000 13loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
13loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000 14loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
index 1e9313a419ef..0fa068e30a30 100644
--- a/arch/arm/mach-shmobile/board-ape6evm.c
+++ b/arch/arm/mach-shmobile/board-ape6evm.c
@@ -113,22 +113,58 @@ static const struct smsc911x_platform_config lan9220_data __initconst = {
113}; 113};
114 114
115/* 115/*
116 * On APE6EVM power is supplied to MMCIF by a tps80032 regulator. For now we 116 * MMC0 power supplies:
117 * model a VDD supply to MMCIF, using a fixed 3.3V regulator. Also use the 117 * Both Vcc and VccQ to eMMC on APE6EVM are supplied by a tps80032 voltage
118 * static power supply for SDHI0 and SDHI1, whereas SDHI0's VccQ is also 118 * regulator. Until support for it is added to this file we simulate the
119 * supplied by the same tps80032 regulator and thus can also be adjusted 119 * Vcc supply by a fixed always-on regulator
120 * dynamically.
121 */ 120 */
122static struct regulator_consumer_supply fixed3v3_power_consumers[] = 121static struct regulator_consumer_supply vcc_mmc0_consumers[] =
123{ 122{
124 REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"), 123 REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
124};
125
126/*
127 * SDHI0 power supplies:
128 * Vcc to SDHI0 on APE6EVM is supplied by a GPIO-switchable regulator. VccQ is
129 * provided by the same tps80032 regulator as both MMC0 voltages - see comment
130 * above
131 */
132static struct regulator_consumer_supply vcc_sdhi0_consumers[] =
133{
125 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), 134 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
135};
136
137static struct regulator_init_data vcc_sdhi0_init_data = {
138 .constraints = {
139 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
140 },
141 .num_consumer_supplies = ARRAY_SIZE(vcc_sdhi0_consumers),
142 .consumer_supplies = vcc_sdhi0_consumers,
143};
144
145static const struct fixed_voltage_config vcc_sdhi0_info __initconst = {
146 .supply_name = "SDHI0 Vcc",
147 .microvolts = 3300000,
148 .gpio = 76,
149 .enable_high = 1,
150 .init_data = &vcc_sdhi0_init_data,
151};
152
153/*
154 * SDHI1 power supplies:
155 * Vcc and VccQ to SDHI1 on APE6EVM are both fixed at 3.3V
156 */
157static struct regulator_consumer_supply vcc_sdhi1_consumers[] =
158{
126 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"), 159 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
127}; 160};
128 161
129/* MMCIF */ 162/* MMCIF */
130static const struct sh_mmcif_plat_data mmcif0_pdata __initconst = { 163static const struct sh_mmcif_plat_data mmcif0_pdata __initconst = {
131 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, 164 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
165 .slave_id_tx = SHDMA_SLAVE_MMCIF0_TX,
166 .slave_id_rx = SHDMA_SLAVE_MMCIF0_RX,
167 .ccs_unsupported = true,
132}; 168};
133 169
134static const struct resource mmcif0_resources[] __initconst = { 170static const struct resource mmcif0_resources[] __initconst = {
@@ -215,14 +251,19 @@ static void __init ape6evm_add_standard_devices(void)
215 platform_device_register_resndata(&platform_bus, "smsc911x", -1, 251 platform_device_register_resndata(&platform_bus, "smsc911x", -1,
216 lan9220_res, ARRAY_SIZE(lan9220_res), 252 lan9220_res, ARRAY_SIZE(lan9220_res),
217 &lan9220_data, sizeof(lan9220_data)); 253 &lan9220_data, sizeof(lan9220_data));
218 regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers, 254
219 ARRAY_SIZE(fixed3v3_power_consumers), 3300000); 255 regulator_register_always_on(1, "MMC0 Vcc", vcc_mmc0_consumers,
256 ARRAY_SIZE(vcc_mmc0_consumers), 2800000);
220 platform_device_register_resndata(&platform_bus, "sh_mmcif", 0, 257 platform_device_register_resndata(&platform_bus, "sh_mmcif", 0,
221 mmcif0_resources, ARRAY_SIZE(mmcif0_resources), 258 mmcif0_resources, ARRAY_SIZE(mmcif0_resources),
222 &mmcif0_pdata, sizeof(mmcif0_pdata)); 259 &mmcif0_pdata, sizeof(mmcif0_pdata));
260 platform_device_register_data(&platform_bus, "reg-fixed-voltage", 2,
261 &vcc_sdhi0_info, sizeof(vcc_sdhi0_info));
223 platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 0, 262 platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 0,
224 sdhi0_resources, ARRAY_SIZE(sdhi0_resources), 263 sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
225 &sdhi0_pdata, sizeof(sdhi0_pdata)); 264 &sdhi0_pdata, sizeof(sdhi0_pdata));
265 regulator_register_always_on(3, "SDHI1 Vcc", vcc_sdhi1_consumers,
266 ARRAY_SIZE(vcc_sdhi1_consumers), 3300000);
226 platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 1, 267 platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 1,
227 sdhi1_resources, ARRAY_SIZE(sdhi1_resources), 268 sdhi1_resources, ARRAY_SIZE(sdhi1_resources),
228 &sdhi1_pdata, sizeof(sdhi1_pdata)); 269 &sdhi1_pdata, sizeof(sdhi1_pdata));
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index 7f8f6076d360..8bc8e4c58847 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -823,6 +823,7 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = {
823 .caps = MMC_CAP_4_BIT_DATA | 823 .caps = MMC_CAP_4_BIT_DATA |
824 MMC_CAP_8_BIT_DATA | 824 MMC_CAP_8_BIT_DATA |
825 MMC_CAP_NONREMOVABLE, 825 MMC_CAP_NONREMOVABLE,
826 .ccs_unsupported = true,
826 .slave_id_tx = SHDMA_SLAVE_MMCIF_TX, 827 .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
827 .slave_id_rx = SHDMA_SLAVE_MMCIF_RX, 828 .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
828}; 829};
diff --git a/arch/arm/mach-shmobile/board-bockw-reference.c b/arch/arm/mach-shmobile/board-bockw-reference.c
index 1a7c893e1a52..ae88fdad4b3a 100644
--- a/arch/arm/mach-shmobile/board-bockw-reference.c
+++ b/arch/arm/mach-shmobile/board-bockw-reference.c
@@ -36,15 +36,35 @@ static const struct pinctrl_map bockw_pinctrl_map[] = {
36 "scif0_ctrl", "scif0"), 36 "scif0_ctrl", "scif0"),
37}; 37};
38 38
39#define FPGA 0x18200000
40#define IRQ0MR 0x30
41#define COMCTLR 0x101c
39static void __init bockw_init(void) 42static void __init bockw_init(void)
40{ 43{
44 static void __iomem *fpga;
45
41 r8a7778_clock_init(); 46 r8a7778_clock_init();
47 r8a7778_init_irq_extpin_dt(1);
42 48
43 pinctrl_register_mappings(bockw_pinctrl_map, 49 pinctrl_register_mappings(bockw_pinctrl_map,
44 ARRAY_SIZE(bockw_pinctrl_map)); 50 ARRAY_SIZE(bockw_pinctrl_map));
45 r8a7778_pinmux_init(); 51 r8a7778_pinmux_init();
46 r8a7778_add_dt_devices(); 52 r8a7778_add_dt_devices();
47 53
54 fpga = ioremap_nocache(FPGA, SZ_1M);
55 if (fpga) {
56 /*
57 * CAUTION
58 *
59 * IRQ0/1 is cascaded interrupt from FPGA.
60 * it should be cared in the future
61 * Now, it is assuming IRQ0 was used only from SMSC.
62 */
63 u16 val = ioread16(fpga + IRQ0MR);
64 val &= ~(1 << 4); /* enable SMSC911x */
65 iowrite16(val, fpga + IRQ0MR);
66 }
67
48 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 68 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
49} 69}
50 70
diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
index f2bf61bf2521..38611526fe9a 100644
--- a/arch/arm/mach-shmobile/board-bockw.c
+++ b/arch/arm/mach-shmobile/board-bockw.c
@@ -32,11 +32,19 @@
32#include <linux/smsc911x.h> 32#include <linux/smsc911x.h>
33#include <linux/spi/spi.h> 33#include <linux/spi/spi.h>
34#include <linux/spi/flash.h> 34#include <linux/spi/flash.h>
35#include <linux/usb/renesas_usbhs.h>
35#include <media/soc_camera.h> 36#include <media/soc_camera.h>
36#include <mach/common.h> 37#include <mach/common.h>
37#include <mach/irqs.h> 38#include <mach/irqs.h>
38#include <mach/r8a7778.h> 39#include <mach/r8a7778.h>
39#include <asm/mach/arch.h> 40#include <asm/mach/arch.h>
41#include <sound/rcar_snd.h>
42#include <sound/simple_card.h>
43
44#define FPGA 0x18200000
45#define IRQ0MR 0x30
46#define COMCTLR 0x101c
47static void __iomem *fpga;
40 48
41/* 49/*
42 * CN9(Upper side) SCIF/RCAN selection 50 * CN9(Upper side) SCIF/RCAN selection
@@ -63,6 +71,45 @@
63 * SW19 (MMC) 1 pin 71 * SW19 (MMC) 1 pin
64 */ 72 */
65 73
74/*
75 * SSI settings
76 *
77 * SW45: 1-4 side (SSI5 out, ROUT/LOUT CN19 Mid)
78 * SW46: 1101 (SSI6 Recorde)
79 * SW47: 1110 (SSI5 Playback)
80 * SW48: 11 (Recorde power)
81 * SW49: 1 (SSI slave mode)
82 * SW50: 1111 (SSI7, SSI8)
83 * SW51: 1111 (SSI3, SSI4)
84 * SW54: 1pin (ak4554 FPGA control)
85 * SW55: 1 (CLKB is 24.5760MHz)
86 * SW60: 1pin (ak4554 FPGA control)
87 * SW61: 3pin (use X11 clock)
88 * SW78: 3-6 (ak4642 connects I2C0)
89 *
90 * You can use sound as
91 *
92 * hw0: CN19: SSI56-AK4643
93 * hw1: CN21: SSI3-AK4554(playback)
94 * hw2: CN21: SSI4-AK4554(capture)
95 * hw3: CN20: SSI7-AK4554(playback)
96 * hw4: CN20: SSI8-AK4554(capture)
97 *
98 * this command is required when playback on hw0.
99 *
100 * # amixer set "LINEOUT Mixer DACL" on
101 */
102
103/*
104 * USB
105 *
106 * USB1 (CN29) can be Host/Function
107 *
108 * Host Func
109 * SW98 1 2
110 * SW99 1 3
111 */
112
66/* Dummy supplies, where voltage doesn't matter */ 113/* Dummy supplies, where voltage doesn't matter */
67static struct regulator_consumer_supply dummy_supplies[] = { 114static struct regulator_consumer_supply dummy_supplies[] = {
68 REGULATOR_SUPPLY("vddvario", "smsc911x"), 115 REGULATOR_SUPPLY("vddvario", "smsc911x"),
@@ -81,16 +128,76 @@ static struct resource smsc911x_resources[] __initdata = {
81 DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */ 128 DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
82}; 129};
83 130
131#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
132/*
133 * When USB1 is Func
134 */
135static int usbhsf_get_id(struct platform_device *pdev)
136{
137 return USBHS_GADGET;
138}
139
140#define SUSPMODE 0x102
141static int usbhsf_power_ctrl(struct platform_device *pdev,
142 void __iomem *base, int enable)
143{
144 enable = !!enable;
145
146 r8a7778_usb_phy_power(enable);
147
148 iowrite16(enable << 14, base + SUSPMODE);
149
150 return 0;
151}
152
153static struct resource usbhsf_resources[] __initdata = {
154 DEFINE_RES_MEM(0xffe60000, 0x110),
155 DEFINE_RES_IRQ(gic_iid(0x4f)),
156};
157
158static struct renesas_usbhs_platform_info usbhs_info __initdata = {
159 .platform_callback = {
160 .get_id = usbhsf_get_id,
161 .power_ctrl = usbhsf_power_ctrl,
162 },
163 .driver_param = {
164 .buswait_bwait = 4,
165 },
166};
167
168#define USB_PHY_SETTING {.port1_func = 1, .ovc_pin[1].active_high = 1,}
169#define USB1_DEVICE "renesas_usbhs"
170#define ADD_USB_FUNC_DEVICE_IF_POSSIBLE() \
171 platform_device_register_resndata( \
172 &platform_bus, "renesas_usbhs", -1, \
173 usbhsf_resources, \
174 ARRAY_SIZE(usbhsf_resources), \
175 &usbhs_info, sizeof(struct renesas_usbhs_platform_info))
176
177#else
178/*
179 * When USB1 is Host
180 */
181#define USB_PHY_SETTING { }
182#define USB1_DEVICE "ehci-platform"
183#define ADD_USB_FUNC_DEVICE_IF_POSSIBLE()
184
185#endif
186
84/* USB */ 187/* USB */
85static struct resource usb_phy_resources[] __initdata = { 188static struct resource usb_phy_resources[] __initdata = {
86 DEFINE_RES_MEM(0xffe70800, 0x100), 189 DEFINE_RES_MEM(0xffe70800, 0x100),
87 DEFINE_RES_MEM(0xffe76000, 0x100), 190 DEFINE_RES_MEM(0xffe76000, 0x100),
88}; 191};
89 192
90static struct rcar_phy_platform_data usb_phy_platform_data __initdata; 193static struct rcar_phy_platform_data usb_phy_platform_data __initdata =
194 USB_PHY_SETTING;
195
91 196
92/* SDHI */ 197/* SDHI */
93static struct sh_mobile_sdhi_info sdhi0_info __initdata = { 198static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
199 .dma_slave_tx = HPBDMA_SLAVE_SDHI0_TX,
200 .dma_slave_rx = HPBDMA_SLAVE_SDHI0_RX,
94 .tmio_caps = MMC_CAP_SD_HIGHSPEED, 201 .tmio_caps = MMC_CAP_SD_HIGHSPEED,
95 .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, 202 .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
96 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, 203 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
@@ -124,7 +231,9 @@ static struct sh_eth_plat_data ether_platform_data __initdata = {
124static struct i2c_board_info i2c0_devices[] = { 231static struct i2c_board_info i2c0_devices[] = {
125 { 232 {
126 I2C_BOARD_INFO("rx8581", 0x51), 233 I2C_BOARD_INFO("rx8581", 0x51),
127 }, 234 }, {
235 I2C_BOARD_INFO("ak4643", 0x12),
236 }
128}; 237};
129 238
130/* HSPI*/ 239/* HSPI*/
@@ -207,7 +316,213 @@ static struct platform_device_info vin##idx##_info __initdata = { \
207R8A7778_VIN(0); 316R8A7778_VIN(0);
208R8A7778_VIN(1); 317R8A7778_VIN(1);
209 318
319/* Sound */
320static struct resource rsnd_resources[] __initdata = {
321 [RSND_GEN1_SRU] = DEFINE_RES_MEM(0xffd90000, 0x1000),
322 [RSND_GEN1_SSI] = DEFINE_RES_MEM(0xffd91000, 0x1240),
323 [RSND_GEN1_ADG] = DEFINE_RES_MEM(0xfffe0000, 0x24),
324};
325
326static struct rsnd_ssi_platform_info rsnd_ssi[] = {
327 RSND_SSI_UNUSED, /* SSI 0 */
328 RSND_SSI_UNUSED, /* SSI 1 */
329 RSND_SSI_UNUSED, /* SSI 2 */
330 RSND_SSI_SET(1, 0, gic_iid(0x85), RSND_SSI_PLAY),
331 RSND_SSI_SET(2, 0, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE | RSND_SSI_CLK_FROM_ADG),
332 RSND_SSI_SET(0, 0, gic_iid(0x86), RSND_SSI_PLAY),
333 RSND_SSI_SET(0, 0, gic_iid(0x86), 0),
334 RSND_SSI_SET(3, 0, gic_iid(0x86), RSND_SSI_PLAY),
335 RSND_SSI_SET(4, 0, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE | RSND_SSI_CLK_FROM_ADG),
336};
337
338static struct rsnd_scu_platform_info rsnd_scu[9] = {
339 /* no member at this point */
340};
341
342enum {
343 AK4554_34 = 0,
344 AK4643_56,
345 AK4554_78,
346 SOUND_MAX,
347};
348
349static int rsnd_codec_power(int id, int enable)
350{
351 static int sound_user[SOUND_MAX] = {0, 0, 0};
352 int *usr = NULL;
353 u32 bit;
354
355 switch (id) {
356 case 3:
357 case 4:
358 usr = sound_user + AK4554_34;
359 bit = (1 << 10);
360 break;
361 case 5:
362 case 6:
363 usr = sound_user + AK4643_56;
364 bit = (1 << 6);
365 break;
366 case 7:
367 case 8:
368 usr = sound_user + AK4554_78;
369 bit = (1 << 7);
370 break;
371 }
372
373 if (!usr)
374 return -EIO;
375
376 if (enable) {
377 if (*usr == 0) {
378 u32 val = ioread16(fpga + COMCTLR);
379 val &= ~bit;
380 iowrite16(val, fpga + COMCTLR);
381 }
382
383 (*usr)++;
384 } else {
385 if (*usr == 0)
386 return 0;
387
388 (*usr)--;
389
390 if (*usr == 0) {
391 u32 val = ioread16(fpga + COMCTLR);
392 val |= bit;
393 iowrite16(val, fpga + COMCTLR);
394 }
395 }
396
397 return 0;
398}
399
400static int rsnd_start(int id)
401{
402 return rsnd_codec_power(id, 1);
403}
404
405static int rsnd_stop(int id)
406{
407 return rsnd_codec_power(id, 0);
408}
409
410static struct rcar_snd_info rsnd_info = {
411 .flags = RSND_GEN1,
412 .ssi_info = rsnd_ssi,
413 .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
414 .scu_info = rsnd_scu,
415 .scu_info_nr = ARRAY_SIZE(rsnd_scu),
416 .start = rsnd_start,
417 .stop = rsnd_stop,
418};
419
420static struct asoc_simple_card_info rsnd_card_info[] = {
421 /* SSI5, SSI6 */
422 {
423 .name = "AK4643",
424 .card = "SSI56-AK4643",
425 .codec = "ak4642-codec.0-0012",
426 .platform = "rcar_sound",
427 .daifmt = SND_SOC_DAIFMT_LEFT_J,
428 .cpu_dai = {
429 .name = "rsnd-dai.0",
430 .fmt = SND_SOC_DAIFMT_CBS_CFS,
431 },
432 .codec_dai = {
433 .name = "ak4642-hifi",
434 .fmt = SND_SOC_DAIFMT_CBM_CFM,
435 .sysclk = 11289600,
436 },
437 },
438 /* SSI3 */
439 {
440 .name = "AK4554",
441 .card = "SSI3-AK4554(playback)",
442 .codec = "ak4554-adc-dac.0",
443 .platform = "rcar_sound",
444 .cpu_dai = {
445 .name = "rsnd-dai.1",
446 .fmt = SND_SOC_DAIFMT_CBM_CFM |
447 SND_SOC_DAIFMT_RIGHT_J,
448 },
449 .codec_dai = {
450 .name = "ak4554-hifi",
451 },
452 },
453 /* SSI4 */
454 {
455 .name = "AK4554",
456 .card = "SSI4-AK4554(capture)",
457 .codec = "ak4554-adc-dac.0",
458 .platform = "rcar_sound",
459 .cpu_dai = {
460 .name = "rsnd-dai.2",
461 .fmt = SND_SOC_DAIFMT_CBM_CFM |
462 SND_SOC_DAIFMT_LEFT_J,
463 },
464 .codec_dai = {
465 .name = "ak4554-hifi",
466 },
467 },
468 /* SSI7 */
469 {
470 .name = "AK4554",
471 .card = "SSI7-AK4554(playback)",
472 .codec = "ak4554-adc-dac.1",
473 .platform = "rcar_sound",
474 .cpu_dai = {
475 .name = "rsnd-dai.3",
476 .fmt = SND_SOC_DAIFMT_CBM_CFM |
477 SND_SOC_DAIFMT_RIGHT_J,
478 },
479 .codec_dai = {
480 .name = "ak4554-hifi",
481 },
482 },
483 /* SSI8 */
484 {
485 .name = "AK4554",
486 .card = "SSI8-AK4554(capture)",
487 .codec = "ak4554-adc-dac.1",
488 .platform = "rcar_sound",
489 .cpu_dai = {
490 .name = "rsnd-dai.4",
491 .fmt = SND_SOC_DAIFMT_CBM_CFM |
492 SND_SOC_DAIFMT_LEFT_J,
493 },
494 .codec_dai = {
495 .name = "ak4554-hifi",
496 },
497 }
498};
499
210static const struct pinctrl_map bockw_pinctrl_map[] = { 500static const struct pinctrl_map bockw_pinctrl_map[] = {
501 /* AUDIO */
502 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
503 "audio_clk_a", "audio_clk"),
504 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
505 "audio_clk_b", "audio_clk"),
506 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
507 "ssi34_ctrl", "ssi"),
508 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
509 "ssi3_data", "ssi"),
510 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
511 "ssi4_data", "ssi"),
512 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
513 "ssi5_ctrl", "ssi"),
514 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
515 "ssi5_data", "ssi"),
516 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
517 "ssi6_ctrl", "ssi"),
518 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
519 "ssi6_data", "ssi"),
520 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
521 "ssi78_ctrl", "ssi"),
522 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
523 "ssi7_data", "ssi"),
524 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
525 "ssi8_data", "ssi"),
211 /* Ether */ 526 /* Ether */
212 PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778", 527 PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
213 "ether_rmii", "ether"), 528 "ether_rmii", "ether"),
@@ -227,7 +542,7 @@ static const struct pinctrl_map bockw_pinctrl_map[] = {
227 /* USB */ 542 /* USB */
228 PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778", 543 PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
229 "usb0", "usb0"), 544 "usb0", "usb0"),
230 PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778", 545 PIN_MAP_MUX_GROUP_DEFAULT(USB1_DEVICE, "pfc-r8a7778",
231 "usb1", "usb1"), 546 "usb1", "usb1"),
232 /* SDHI0 */ 547 /* SDHI0 */
233 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778", 548 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
@@ -250,13 +565,13 @@ static const struct pinctrl_map bockw_pinctrl_map[] = {
250 "vin1_data8", "vin1"), 565 "vin1_data8", "vin1"),
251}; 566};
252 567
253#define FPGA 0x18200000
254#define IRQ0MR 0x30
255#define PFC 0xfffc0000 568#define PFC 0xfffc0000
256#define PUPR4 0x110 569#define PUPR4 0x110
257static void __init bockw_init(void) 570static void __init bockw_init(void)
258{ 571{
259 void __iomem *base; 572 void __iomem *base;
573 struct clk *clk;
574 int i;
260 575
261 r8a7778_clock_init(); 576 r8a7778_clock_init();
262 r8a7778_init_irq_extpin(1); 577 r8a7778_init_irq_extpin(1);
@@ -301,8 +616,8 @@ static void __init bockw_init(void)
301 616
302 617
303 /* for SMSC */ 618 /* for SMSC */
304 base = ioremap_nocache(FPGA, SZ_1M); 619 fpga = ioremap_nocache(FPGA, SZ_1M);
305 if (base) { 620 if (fpga) {
306 /* 621 /*
307 * CAUTION 622 * CAUTION
308 * 623 *
@@ -310,10 +625,9 @@ static void __init bockw_init(void)
310 * it should be cared in the future 625 * it should be cared in the future
311 * Now, it is assuming IRQ0 was used only from SMSC. 626 * Now, it is assuming IRQ0 was used only from SMSC.
312 */ 627 */
313 u16 val = ioread16(base + IRQ0MR); 628 u16 val = ioread16(fpga + IRQ0MR);
314 val &= ~(1 << 4); /* enable SMSC911x */ 629 val &= ~(1 << 4); /* enable SMSC911x */
315 iowrite16(val, base + IRQ0MR); 630 iowrite16(val, fpga + IRQ0MR);
316 iounmap(base);
317 631
318 regulator_register_fixed(0, dummy_supplies, 632 regulator_register_fixed(0, dummy_supplies,
319 ARRAY_SIZE(dummy_supplies)); 633 ARRAY_SIZE(dummy_supplies));
@@ -340,6 +654,42 @@ static void __init bockw_init(void)
340 sdhi0_resources, ARRAY_SIZE(sdhi0_resources), 654 sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
341 &sdhi0_info, sizeof(struct sh_mobile_sdhi_info)); 655 &sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
342 } 656 }
657
658 /* for Audio */
659 clk = clk_get(NULL, "audio_clk_b");
660 clk_set_rate(clk, 24576000);
661 clk_put(clk);
662 rsnd_codec_power(5, 1); /* enable ak4642 */
663
664 platform_device_register_simple(
665 "ak4554-adc-dac", 0, NULL, 0);
666
667 platform_device_register_simple(
668 "ak4554-adc-dac", 1, NULL, 0);
669
670 platform_device_register_resndata(
671 &platform_bus, "rcar_sound", -1,
672 rsnd_resources, ARRAY_SIZE(rsnd_resources),
673 &rsnd_info, sizeof(rsnd_info));
674
675 for (i = 0; i < ARRAY_SIZE(rsnd_card_info); i++) {
676 struct platform_device_info cardinfo = {
677 .parent = &platform_bus,
678 .name = "asoc-simple-card",
679 .id = i,
680 .data = &rsnd_card_info[i],
681 .size_data = sizeof(struct asoc_simple_card_info),
682 .dma_mask = ~0,
683 };
684
685 platform_device_register_full(&cardinfo);
686 }
687}
688
689static void __init bockw_init_late(void)
690{
691 r8a7778_init_late();
692 ADD_USB_FUNC_DEVICE_IF_POSSIBLE();
343} 693}
344 694
345static const char *bockw_boards_compat_dt[] __initdata = { 695static const char *bockw_boards_compat_dt[] __initdata = {
@@ -352,5 +702,5 @@ DT_MACHINE_START(BOCKW_DT, "bockw")
352 .init_irq = r8a7778_init_irq_dt, 702 .init_irq = r8a7778_init_irq_dt,
353 .init_machine = bockw_init, 703 .init_machine = bockw_init,
354 .dt_compat = bockw_boards_compat_dt, 704 .dt_compat = bockw_boards_compat_dt,
355 .init_late = r8a7778_init_late, 705 .init_late = bockw_init_late,
356MACHINE_END 706MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-genmai.c b/arch/arm/mach-shmobile/board-genmai.c
new file mode 100644
index 000000000000..3e92e3c62d4c
--- /dev/null
+++ b/arch/arm/mach-shmobile/board-genmai.c
@@ -0,0 +1,43 @@
1/*
2 * Genmai board support
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <linux/kernel.h>
22#include <linux/platform_device.h>
23#include <mach/common.h>
24#include <mach/r7s72100.h>
25#include <asm/mach-types.h>
26#include <asm/mach/arch.h>
27
28static void __init genmai_add_standard_devices(void)
29{
30 r7s72100_clock_init();
31 r7s72100_add_dt_devices();
32}
33
34static const char * const genmai_boards_compat_dt[] __initconst = {
35 "renesas,genmai",
36 NULL,
37};
38
39DT_MACHINE_START(GENMAI_DT, "genmai")
40 .init_early = r7s72100_init_early,
41 .init_machine = genmai_add_standard_devices,
42 .dt_compat = genmai_boards_compat_dt,
43MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
new file mode 100644
index 000000000000..ace1711a6cd8
--- /dev/null
+++ b/arch/arm/mach-shmobile/board-koelsch.c
@@ -0,0 +1,47 @@
1/*
2 * Koelsch board support
3 *
4 * Copyright (C) 2013 Renesas Electronics Corporation
5 * Copyright (C) 2013 Renesas Solutions Corp.
6 * Copyright (C) 2013 Magnus Damm
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22#include <linux/kernel.h>
23#include <linux/platform_device.h>
24#include <mach/common.h>
25#include <mach/r8a7791.h>
26#include <mach/rcar-gen2.h>
27#include <asm/mach-types.h>
28#include <asm/mach/arch.h>
29
30static void __init koelsch_add_standard_devices(void)
31{
32 r8a7791_clock_init();
33 r8a7791_add_standard_devices();
34}
35
36static const char * const koelsch_boards_compat_dt[] __initconst = {
37 "renesas,koelsch",
38 NULL,
39};
40
41DT_MACHINE_START(KOELSCH_DT, "koelsch")
42 .smp = smp_ops(r8a7791_smp_ops),
43 .init_early = r8a7791_init_early,
44 .init_machine = koelsch_add_standard_devices,
45 .init_time = rcar_gen2_timer_init,
46 .dt_compat = koelsch_boards_compat_dt,
47MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-kzm9d-reference.c b/arch/arm/mach-shmobile/board-kzm9d-reference.c
index 8f8bb2fab076..054d8d5c8fc1 100644
--- a/arch/arm/mach-shmobile/board-kzm9d-reference.c
+++ b/arch/arm/mach-shmobile/board-kzm9d-reference.c
@@ -33,6 +33,7 @@ static void __init kzm9d_add_standard_devices(void)
33} 33}
34 34
35static const char *kzm9d_boards_compat_dt[] __initdata = { 35static const char *kzm9d_boards_compat_dt[] __initdata = {
36 "renesas,kzm9d",
36 "renesas,kzm9d-reference", 37 "renesas,kzm9d-reference",
37 NULL, 38 NULL,
38}; 39};
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index f1994968d303..fe689b7fdc9e 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -366,6 +366,7 @@ static struct resource sh_mmcif_resources[] = {
366static struct sh_mmcif_plat_data sh_mmcif_platdata = { 366static struct sh_mmcif_plat_data sh_mmcif_platdata = {
367 .ocr = MMC_VDD_165_195, 367 .ocr = MMC_VDD_165_195,
368 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, 368 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
369 .ccs_unsupported = true,
369 .slave_id_tx = SHDMA_SLAVE_MMCIF_TX, 370 .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
370 .slave_id_rx = SHDMA_SLAVE_MMCIF_RX, 371 .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
371}; 372};
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index fd6146ca7a5a..a8d3ce646fb9 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -28,6 +28,7 @@
28#include <linux/mmc/sh_mmcif.h> 28#include <linux/mmc/sh_mmcif.h>
29#include <linux/pinctrl/machine.h> 29#include <linux/pinctrl/machine.h>
30#include <linux/platform_data/gpio-rcar.h> 30#include <linux/platform_data/gpio-rcar.h>
31#include <linux/platform_data/rcar-du.h>
31#include <linux/platform_device.h> 32#include <linux/platform_device.h>
32#include <linux/phy.h> 33#include <linux/phy.h>
33#include <linux/regulator/fixed.h> 34#include <linux/regulator/fixed.h>
@@ -39,6 +40,62 @@
39#include <asm/mach-types.h> 40#include <asm/mach-types.h>
40#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
41 42
43/* DU */
44static struct rcar_du_encoder_data lager_du_encoders[] = {
45 {
46 .type = RCAR_DU_ENCODER_VGA,
47 .output = RCAR_DU_OUTPUT_DPAD0,
48 }, {
49 .type = RCAR_DU_ENCODER_NONE,
50 .output = RCAR_DU_OUTPUT_LVDS1,
51 .connector.lvds.panel = {
52 .width_mm = 210,
53 .height_mm = 158,
54 .mode = {
55 .clock = 65000,
56 .hdisplay = 1024,
57 .hsync_start = 1048,
58 .hsync_end = 1184,
59 .htotal = 1344,
60 .vdisplay = 768,
61 .vsync_start = 771,
62 .vsync_end = 777,
63 .vtotal = 806,
64 .flags = 0,
65 },
66 },
67 },
68};
69
70static const struct rcar_du_platform_data lager_du_pdata __initconst = {
71 .encoders = lager_du_encoders,
72 .num_encoders = ARRAY_SIZE(lager_du_encoders),
73};
74
75static const struct resource du_resources[] __initconst = {
76 DEFINE_RES_MEM(0xfeb00000, 0x70000),
77 DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
78 DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
79 DEFINE_RES_IRQ(gic_spi(256)),
80 DEFINE_RES_IRQ(gic_spi(268)),
81 DEFINE_RES_IRQ(gic_spi(269)),
82};
83
84static void __init lager_add_du_device(void)
85{
86 struct platform_device_info info = {
87 .name = "rcar-du-r8a7790",
88 .id = -1,
89 .res = du_resources,
90 .num_res = ARRAY_SIZE(du_resources),
91 .data = &lager_du_pdata,
92 .size_data = sizeof(lager_du_pdata),
93 .dma_mask = DMA_BIT_MASK(32),
94 };
95
96 platform_device_register_full(&info);
97}
98
42/* LEDS */ 99/* LEDS */
43static struct gpio_led lager_leds[] = { 100static struct gpio_led lager_leds[] = {
44 { 101 {
@@ -86,6 +143,8 @@ static struct regulator_consumer_supply fixed3v3_power_consumers[] =
86/* MMCIF */ 143/* MMCIF */
87static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = { 144static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
88 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, 145 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
146 .clk_ctrl2_present = true,
147 .ccs_unsupported = true,
89}; 148};
90 149
91static const struct resource mmcif1_resources[] __initconst = { 150static const struct resource mmcif1_resources[] __initconst = {
@@ -107,6 +166,13 @@ static const struct resource ether_resources[] __initconst = {
107}; 166};
108 167
109static const struct pinctrl_map lager_pinctrl_map[] = { 168static const struct pinctrl_map lager_pinctrl_map[] = {
169 /* DU (CN10: ARGB0, CN13: LVDS) */
170 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
171 "du_rgb666", "du"),
172 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
173 "du_sync_1", "du"),
174 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
175 "du_clk_out_0", "du"),
110 /* SCIF0 (CN19: DEBUG SERIAL0) */ 176 /* SCIF0 (CN19: DEBUG SERIAL0) */
111 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790", 177 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
112 "scif0_data", "scif0"), 178 "scif0_data", "scif0"),
@@ -154,6 +220,8 @@ static void __init lager_add_standard_devices(void)
154 ether_resources, 220 ether_resources,
155 ARRAY_SIZE(ether_resources), 221 ARRAY_SIZE(ether_resources),
156 &ether_pdata, sizeof(ether_pdata)); 222 &ether_pdata, sizeof(ether_pdata));
223
224 lager_add_du_device();
157} 225}
158 226
159/* 227/*
diff --git a/arch/arm/mach-shmobile/board-marzen-reference.c b/arch/arm/mach-shmobile/board-marzen-reference.c
index 3f4250a2d4eb..2773936bf7dc 100644
--- a/arch/arm/mach-shmobile/board-marzen-reference.c
+++ b/arch/arm/mach-shmobile/board-marzen-reference.c
@@ -28,6 +28,7 @@
28static void __init marzen_init(void) 28static void __init marzen_init(void)
29{ 29{
30 r8a7779_add_standard_devices_dt(); 30 r8a7779_add_standard_devices_dt();
31 r8a7779_init_irq_extpin_dt(1); /* IRQ1 as individual interrupt */
31} 32}
32 33
33static const char *marzen_boards_compat_dt[] __initdata = { 34static const char *marzen_boards_compat_dt[] __initdata = {
diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
index 3f5044fda4e3..da1352f5f71b 100644
--- a/arch/arm/mach-shmobile/board-marzen.c
+++ b/arch/arm/mach-shmobile/board-marzen.c
@@ -30,6 +30,7 @@
30#include <linux/dma-mapping.h> 30#include <linux/dma-mapping.h>
31#include <linux/pinctrl/machine.h> 31#include <linux/pinctrl/machine.h>
32#include <linux/platform_data/gpio-rcar.h> 32#include <linux/platform_data/gpio-rcar.h>
33#include <linux/platform_data/rcar-du.h>
33#include <linux/platform_data/usb-rcar-phy.h> 34#include <linux/platform_data/usb-rcar-phy.h>
34#include <linux/regulator/fixed.h> 35#include <linux/regulator/fixed.h>
35#include <linux/regulator/machine.h> 36#include <linux/regulator/machine.h>
@@ -124,6 +125,8 @@ static struct resource sdhi0_resources[] = {
124}; 125};
125 126
126static struct sh_mobile_sdhi_info sdhi0_platform_data = { 127static struct sh_mobile_sdhi_info sdhi0_platform_data = {
128 .dma_slave_tx = HPBDMA_SLAVE_SDHI0_TX,
129 .dma_slave_rx = HPBDMA_SLAVE_SDHI0_RX,
127 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT, 130 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
128 .tmio_caps = MMC_CAP_SD_HIGHSPEED, 131 .tmio_caps = MMC_CAP_SD_HIGHSPEED,
129}; 132};
@@ -169,6 +172,63 @@ static struct platform_device hspi_device = {
169 .num_resources = ARRAY_SIZE(hspi_resources), 172 .num_resources = ARRAY_SIZE(hspi_resources),
170}; 173};
171 174
175/*
176 * DU
177 *
178 * The panel only specifies the [hv]display and [hv]total values. The position
179 * and width of the sync pulses don't matter, they're copied from VESA timings.
180 */
181static struct rcar_du_encoder_data du_encoders[] = {
182 {
183 .type = RCAR_DU_ENCODER_VGA,
184 .output = RCAR_DU_OUTPUT_DPAD0,
185 }, {
186 .type = RCAR_DU_ENCODER_LVDS,
187 .output = RCAR_DU_OUTPUT_DPAD1,
188 .connector.lvds.panel = {
189 .width_mm = 210,
190 .height_mm = 158,
191 .mode = {
192 .clock = 65000,
193 .hdisplay = 1024,
194 .hsync_start = 1048,
195 .hsync_end = 1184,
196 .htotal = 1344,
197 .vdisplay = 768,
198 .vsync_start = 771,
199 .vsync_end = 777,
200 .vtotal = 806,
201 .flags = 0,
202 },
203 },
204 },
205};
206
207static const struct rcar_du_platform_data du_pdata __initconst = {
208 .encoders = du_encoders,
209 .num_encoders = ARRAY_SIZE(du_encoders),
210};
211
212static const struct resource du_resources[] __initconst = {
213 DEFINE_RES_MEM(0xfff80000, 0x40000),
214 DEFINE_RES_IRQ(gic_iid(0x3f)),
215};
216
217static void __init marzen_add_du_device(void)
218{
219 struct platform_device_info info = {
220 .name = "rcar-du-r8a7779",
221 .id = -1,
222 .res = du_resources,
223 .num_res = ARRAY_SIZE(du_resources),
224 .data = &du_pdata,
225 .size_data = sizeof(du_pdata),
226 .dma_mask = DMA_BIT_MASK(32),
227 };
228
229 platform_device_register_full(&info);
230}
231
172/* LEDS */ 232/* LEDS */
173static struct gpio_led marzen_leds[] = { 233static struct gpio_led marzen_leds[] = {
174 { 234 {
@@ -237,6 +297,19 @@ static struct platform_device *marzen_devices[] __initdata = {
237}; 297};
238 298
239static const struct pinctrl_map marzen_pinctrl_map[] = { 299static const struct pinctrl_map marzen_pinctrl_map[] = {
300 /* DU (CN10: ARGB0, CN13: LVDS) */
301 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
302 "du0_rgb888", "du0"),
303 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
304 "du0_sync_1", "du0"),
305 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
306 "du0_clk_out_0", "du0"),
307 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
308 "du1_rgb666", "du1"),
309 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
310 "du1_sync_1", "du1"),
311 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
312 "du1_clk_out", "du1"),
240 /* HSPI0 */ 313 /* HSPI0 */
241 PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7779", 314 PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7779",
242 "hspi0", "hspi0"), 315 "hspi0", "hspi0"),
@@ -297,6 +370,7 @@ static void __init marzen_init(void)
297 r8a7779_add_vin_device(1, &vin_platform_data); 370 r8a7779_add_vin_device(1, &vin_platform_data);
298 r8a7779_add_vin_device(3, &vin_platform_data); 371 r8a7779_add_vin_device(3, &vin_platform_data);
299 platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices)); 372 platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
373 marzen_add_du_device();
300} 374}
301 375
302static const char *marzen_boards_compat_dt[] __initdata = { 376static const char *marzen_boards_compat_dt[] __initdata = {
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-14 08:29:21 -0400