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authorChao Xie <chao.xie@marvell.com>2014-10-30 22:13:53 -0400
committerMichael Turquette <mturquette@linaro.org>2014-11-12 19:34:30 -0500
commitd41ef54027cc6e0697e5b77d7da393998bed7ee4 (patch)
treed28672ff212f09803a8e3171058c8df36e897457 /arch/arm
parent51454eb46c02eb087b9beb1b895b765394f6e374 (diff)
arm: mmp: Make use of the DT supported clock
Change the dtsi and dts file, soc initialization code to make use of DT support clock. So now in the code we do only need call of_clk_init to initialize the clocks. Signed-off-by: Chao Xie <chao.xie@marvell.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/mmp2.dtsi27
-rw-r--r--arch/arm/boot/dts/pxa168.dtsi25
-rw-r--r--arch/arm/boot/dts/pxa910.dtsi26
-rw-r--r--arch/arm/mach-mmp/Kconfig12
-rw-r--r--arch/arm/mach-mmp/mmp-dt.c57
-rw-r--r--arch/arm/mach-mmp/mmp2-dt.c26
6 files changed, 111 insertions, 62 deletions
diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi
index e44f99639cde..766bbb8495b6 100644
--- a/arch/arm/boot/dts/mmp2.dtsi
+++ b/arch/arm/boot/dts/mmp2.dtsi
@@ -8,6 +8,7 @@
8 */ 8 */
9 9
10#include "skeleton.dtsi" 10#include "skeleton.dtsi"
11#include <dt-bindings/clock/marvell,mmp2.h>
11 12
12/ { 13/ {
13 aliases { 14 aliases {
@@ -135,6 +136,8 @@
135 compatible = "mrvl,mmp-uart"; 136 compatible = "mrvl,mmp-uart";
136 reg = <0xd4030000 0x1000>; 137 reg = <0xd4030000 0x1000>;
137 interrupts = <27>; 138 interrupts = <27>;
139 clocks = <&soc_clocks MMP2_CLK_UART0>;
140 resets = <&soc_clocks MMP2_CLK_UART0>;
138 status = "disabled"; 141 status = "disabled";
139 }; 142 };
140 143
@@ -142,6 +145,8 @@
142 compatible = "mrvl,mmp-uart"; 145 compatible = "mrvl,mmp-uart";
143 reg = <0xd4017000 0x1000>; 146 reg = <0xd4017000 0x1000>;
144 interrupts = <28>; 147 interrupts = <28>;
148 clocks = <&soc_clocks MMP2_CLK_UART1>;
149 resets = <&soc_clocks MMP2_CLK_UART1>;
145 status = "disabled"; 150 status = "disabled";
146 }; 151 };
147 152
@@ -149,6 +154,8 @@
149 compatible = "mrvl,mmp-uart"; 154 compatible = "mrvl,mmp-uart";
150 reg = <0xd4018000 0x1000>; 155 reg = <0xd4018000 0x1000>;
151 interrupts = <24>; 156 interrupts = <24>;
157 clocks = <&soc_clocks MMP2_CLK_UART2>;
158 resets = <&soc_clocks MMP2_CLK_UART2>;
152 status = "disabled"; 159 status = "disabled";
153 }; 160 };
154 161
@@ -156,6 +163,8 @@
156 compatible = "mrvl,mmp-uart"; 163 compatible = "mrvl,mmp-uart";
157 reg = <0xd4016000 0x1000>; 164 reg = <0xd4016000 0x1000>;
158 interrupts = <46>; 165 interrupts = <46>;
166 clocks = <&soc_clocks MMP2_CLK_UART3>;
167 resets = <&soc_clocks MMP2_CLK_UART3>;
159 status = "disabled"; 168 status = "disabled";
160 }; 169 };
161 170
@@ -168,6 +177,8 @@
168 #gpio-cells = <2>; 177 #gpio-cells = <2>;
169 interrupts = <49>; 178 interrupts = <49>;
170 interrupt-names = "gpio_mux"; 179 interrupt-names = "gpio_mux";
180 clocks = <&soc_clocks MMP2_CLK_GPIO>;
181 resets = <&soc_clocks MMP2_CLK_GPIO>;
171 interrupt-controller; 182 interrupt-controller;
172 #interrupt-cells = <1>; 183 #interrupt-cells = <1>;
173 ranges; 184 ranges;
@@ -201,6 +212,8 @@
201 compatible = "mrvl,mmp-twsi"; 212 compatible = "mrvl,mmp-twsi";
202 reg = <0xd4011000 0x1000>; 213 reg = <0xd4011000 0x1000>;
203 interrupts = <7>; 214 interrupts = <7>;
215 clocks = <&soc_clocks MMP2_CLK_TWSI0>;
216 resets = <&soc_clocks MMP2_CLK_TWSI0>;
204 #address-cells = <1>; 217 #address-cells = <1>;
205 #size-cells = <0>; 218 #size-cells = <0>;
206 mrvl,i2c-fast-mode; 219 mrvl,i2c-fast-mode;
@@ -211,6 +224,8 @@
211 compatible = "mrvl,mmp-twsi"; 224 compatible = "mrvl,mmp-twsi";
212 reg = <0xd4025000 0x1000>; 225 reg = <0xd4025000 0x1000>;
213 interrupts = <58>; 226 interrupts = <58>;
227 clocks = <&soc_clocks MMP2_CLK_TWSI1>;
228 resets = <&soc_clocks MMP2_CLK_TWSI1>;
214 status = "disabled"; 229 status = "disabled";
215 }; 230 };
216 231
@@ -220,8 +235,20 @@
220 interrupts = <1 0>; 235 interrupts = <1 0>;
221 interrupt-names = "rtc 1Hz", "rtc alarm"; 236 interrupt-names = "rtc 1Hz", "rtc alarm";
222 interrupt-parent = <&intcmux5>; 237 interrupt-parent = <&intcmux5>;
238 clocks = <&soc_clocks MMP2_CLK_RTC>;
239 resets = <&soc_clocks MMP2_CLK_RTC>;
223 status = "disabled"; 240 status = "disabled";
224 }; 241 };
225 }; 242 };
243
244 soc_clocks: clocks{
245 compatible = "marvell,mmp2-clock";
246 reg = <0xd4050000 0x1000>,
247 <0xd4282800 0x400>,
248 <0xd4015000 0x1000>;
249 reg-names = "mpmu", "apmu", "apbc";
250 #clock-cells = <1>;
251 #reset-cells = <1>;
252 };
226 }; 253 };
227}; 254};
diff --git a/arch/arm/boot/dts/pxa168.dtsi b/arch/arm/boot/dts/pxa168.dtsi
index bfcbdef39d0e..b899e25cbb1b 100644
--- a/arch/arm/boot/dts/pxa168.dtsi
+++ b/arch/arm/boot/dts/pxa168.dtsi
@@ -8,6 +8,7 @@
8 */ 8 */
9 9
10#include "skeleton.dtsi" 10#include "skeleton.dtsi"
11#include <dt-bindings/clock/marvell,pxa168.h>
11 12
12/ { 13/ {
13 aliases { 14 aliases {
@@ -59,6 +60,8 @@
59 compatible = "mrvl,mmp-uart"; 60 compatible = "mrvl,mmp-uart";
60 reg = <0xd4017000 0x1000>; 61 reg = <0xd4017000 0x1000>;
61 interrupts = <27>; 62 interrupts = <27>;
63 clocks = <&soc_clocks PXA168_CLK_UART0>;
64 resets = <&soc_clocks PXA168_CLK_UART0>;
62 status = "disabled"; 65 status = "disabled";
63 }; 66 };
64 67
@@ -66,6 +69,8 @@
66 compatible = "mrvl,mmp-uart"; 69 compatible = "mrvl,mmp-uart";
67 reg = <0xd4018000 0x1000>; 70 reg = <0xd4018000 0x1000>;
68 interrupts = <28>; 71 interrupts = <28>;
72 clocks = <&soc_clocks PXA168_CLK_UART1>;
73 resets = <&soc_clocks PXA168_CLK_UART1>;
69 status = "disabled"; 74 status = "disabled";
70 }; 75 };
71 76
@@ -73,6 +78,8 @@
73 compatible = "mrvl,mmp-uart"; 78 compatible = "mrvl,mmp-uart";
74 reg = <0xd4026000 0x1000>; 79 reg = <0xd4026000 0x1000>;
75 interrupts = <29>; 80 interrupts = <29>;
81 clocks = <&soc_clocks PXA168_CLK_UART2>;
82 resets = <&soc_clocks PXA168_CLK_UART2>;
76 status = "disabled"; 83 status = "disabled";
77 }; 84 };
78 85
@@ -84,6 +91,8 @@
84 gpio-controller; 91 gpio-controller;
85 #gpio-cells = <2>; 92 #gpio-cells = <2>;
86 interrupts = <49>; 93 interrupts = <49>;
94 clocks = <&soc_clocks PXA168_CLK_GPIO>;
95 resets = <&soc_clocks PXA168_CLK_GPIO>;
87 interrupt-names = "gpio_mux"; 96 interrupt-names = "gpio_mux";
88 interrupt-controller; 97 interrupt-controller;
89 #interrupt-cells = <1>; 98 #interrupt-cells = <1>;
@@ -110,6 +119,8 @@
110 compatible = "mrvl,mmp-twsi"; 119 compatible = "mrvl,mmp-twsi";
111 reg = <0xd4011000 0x1000>; 120 reg = <0xd4011000 0x1000>;
112 interrupts = <7>; 121 interrupts = <7>;
122 clocks = <&soc_clocks PXA168_CLK_TWSI0>;
123 resets = <&soc_clocks PXA168_CLK_TWSI0>;
113 mrvl,i2c-fast-mode; 124 mrvl,i2c-fast-mode;
114 status = "disabled"; 125 status = "disabled";
115 }; 126 };
@@ -118,6 +129,8 @@
118 compatible = "mrvl,mmp-twsi"; 129 compatible = "mrvl,mmp-twsi";
119 reg = <0xd4025000 0x1000>; 130 reg = <0xd4025000 0x1000>;
120 interrupts = <58>; 131 interrupts = <58>;
132 clocks = <&soc_clocks PXA168_CLK_TWSI1>;
133 resets = <&soc_clocks PXA168_CLK_TWSI1>;
121 status = "disabled"; 134 status = "disabled";
122 }; 135 };
123 136
@@ -126,8 +139,20 @@
126 reg = <0xd4010000 0x1000>; 139 reg = <0xd4010000 0x1000>;
127 interrupts = <5 6>; 140 interrupts = <5 6>;
128 interrupt-names = "rtc 1Hz", "rtc alarm"; 141 interrupt-names = "rtc 1Hz", "rtc alarm";
142 clocks = <&soc_clocks PXA168_CLK_RTC>;
143 resets = <&soc_clocks PXA168_CLK_RTC>;
129 status = "disabled"; 144 status = "disabled";
130 }; 145 };
131 }; 146 };
147
148 soc_clocks: clocks{
149 compatible = "marvell,pxa168-clock";
150 reg = <0xd4050000 0x1000>,
151 <0xd4282800 0x400>,
152 <0xd4015000 0x1000>;
153 reg-names = "mpmu", "apmu", "apbc";
154 #clock-cells = <1>;
155 #reset-cells = <1>;
156 };
132 }; 157 };
133}; 158};
diff --git a/arch/arm/boot/dts/pxa910.dtsi b/arch/arm/boot/dts/pxa910.dtsi
index 884c6e8642ee..0868f6729be1 100644
--- a/arch/arm/boot/dts/pxa910.dtsi
+++ b/arch/arm/boot/dts/pxa910.dtsi
@@ -8,6 +8,7 @@
8 */ 8 */
9 9
10#include "skeleton.dtsi" 10#include "skeleton.dtsi"
11#include <dt-bindings/clock/marvell,pxa910.h>
11 12
12/ { 13/ {
13 aliases { 14 aliases {
@@ -71,6 +72,8 @@
71 compatible = "mrvl,mmp-uart"; 72 compatible = "mrvl,mmp-uart";
72 reg = <0xd4017000 0x1000>; 73 reg = <0xd4017000 0x1000>;
73 interrupts = <27>; 74 interrupts = <27>;
75 clocks = <&soc_clocks PXA910_CLK_UART0>;
76 resets = <&soc_clocks PXA910_CLK_UART0>;
74 status = "disabled"; 77 status = "disabled";
75 }; 78 };
76 79
@@ -78,6 +81,8 @@
78 compatible = "mrvl,mmp-uart"; 81 compatible = "mrvl,mmp-uart";
79 reg = <0xd4018000 0x1000>; 82 reg = <0xd4018000 0x1000>;
80 interrupts = <28>; 83 interrupts = <28>;
84 clocks = <&soc_clocks PXA910_CLK_UART1>;
85 resets = <&soc_clocks PXA910_CLK_UART1>;
81 status = "disabled"; 86 status = "disabled";
82 }; 87 };
83 88
@@ -85,6 +90,8 @@
85 compatible = "mrvl,mmp-uart"; 90 compatible = "mrvl,mmp-uart";
86 reg = <0xd4036000 0x1000>; 91 reg = <0xd4036000 0x1000>;
87 interrupts = <59>; 92 interrupts = <59>;
93 clocks = <&soc_clocks PXA910_CLK_UART2>;
94 resets = <&soc_clocks PXA910_CLK_UART2>;
88 status = "disabled"; 95 status = "disabled";
89 }; 96 };
90 97
@@ -97,6 +104,8 @@
97 #gpio-cells = <2>; 104 #gpio-cells = <2>;
98 interrupts = <49>; 105 interrupts = <49>;
99 interrupt-names = "gpio_mux"; 106 interrupt-names = "gpio_mux";
107 clocks = <&soc_clocks PXA910_CLK_GPIO>;
108 resets = <&soc_clocks PXA910_CLK_GPIO>;
100 interrupt-controller; 109 interrupt-controller;
101 #interrupt-cells = <1>; 110 #interrupt-cells = <1>;
102 ranges; 111 ranges;
@@ -124,6 +133,8 @@
124 #size-cells = <0>; 133 #size-cells = <0>;
125 reg = <0xd4011000 0x1000>; 134 reg = <0xd4011000 0x1000>;
126 interrupts = <7>; 135 interrupts = <7>;
136 clocks = <&soc_clocks PXA910_CLK_TWSI0>;
137 resets = <&soc_clocks PXA910_CLK_TWSI0>;
127 mrvl,i2c-fast-mode; 138 mrvl,i2c-fast-mode;
128 status = "disabled"; 139 status = "disabled";
129 }; 140 };
@@ -134,6 +145,8 @@
134 #size-cells = <0>; 145 #size-cells = <0>;
135 reg = <0xd4037000 0x1000>; 146 reg = <0xd4037000 0x1000>;
136 interrupts = <54>; 147 interrupts = <54>;
148 clocks = <&soc_clocks PXA910_CLK_TWSI1>;
149 resets = <&soc_clocks PXA910_CLK_TWSI1>;
137 status = "disabled"; 150 status = "disabled";
138 }; 151 };
139 152
@@ -142,8 +155,21 @@
142 reg = <0xd4010000 0x1000>; 155 reg = <0xd4010000 0x1000>;
143 interrupts = <5 6>; 156 interrupts = <5 6>;
144 interrupt-names = "rtc 1Hz", "rtc alarm"; 157 interrupt-names = "rtc 1Hz", "rtc alarm";
158 clocks = <&soc_clocks PXA910_CLK_RTC>;
159 resets = <&soc_clocks PXA910_CLK_RTC>;
145 status = "disabled"; 160 status = "disabled";
146 }; 161 };
147 }; 162 };
163
164 soc_clocks: clocks{
165 compatible = "marvell,pxa910-clock";
166 reg = <0xd4050000 0x1000>,
167 <0xd4282800 0x400>,
168 <0xd4015000 0x1000>,
169 <0xd403b000 0x1000>;
170 reg-names = "mpmu", "apmu", "apbc", "apbcp";
171 #clock-cells = <1>;
172 #reset-cells = <1>;
173 };
148 }; 174 };
149}; 175};
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index ebdba87b9671..fdbfadf00c84 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -86,11 +86,12 @@ config MACH_GPLUGD
86 86
87config MACH_MMP_DT 87config MACH_MMP_DT
88 bool "Support MMP (ARMv5) platforms from device tree" 88 bool "Support MMP (ARMv5) platforms from device tree"
89 select CPU_PXA168
90 select CPU_PXA910
91 select USE_OF 89 select USE_OF
92 select PINCTRL 90 select PINCTRL
93 select PINCTRL_SINGLE 91 select PINCTRL_SINGLE
92 select COMMON_CLK
93 select ARCH_HAS_RESET_CONTROLLER
94 select CPU_MOHAWK
94 help 95 help
95 Include support for Marvell MMP2 based platforms using 96 Include support for Marvell MMP2 based platforms using
96 the device tree. Needn't select any other machine while 97 the device tree. Needn't select any other machine while
@@ -99,10 +100,12 @@ config MACH_MMP_DT
99config MACH_MMP2_DT 100config MACH_MMP2_DT
100 bool "Support MMP2 (ARMv7) platforms from device tree" 101 bool "Support MMP2 (ARMv7) platforms from device tree"
101 depends on !CPU_MOHAWK 102 depends on !CPU_MOHAWK
102 select CPU_MMP2
103 select USE_OF 103 select USE_OF
104 select PINCTRL 104 select PINCTRL
105 select PINCTRL_SINGLE 105 select PINCTRL_SINGLE
106 select COMMON_CLK
107 select ARCH_HAS_RESET_CONTROLLER
108 select CPU_PJ4
106 help 109 help
107 Include support for Marvell MMP2 based platforms using 110 Include support for Marvell MMP2 based platforms using
108 the device tree. 111 the device tree.
@@ -111,21 +114,18 @@ endmenu
111 114
112config CPU_PXA168 115config CPU_PXA168
113 bool 116 bool
114 select COMMON_CLK
115 select CPU_MOHAWK 117 select CPU_MOHAWK
116 help 118 help
117 Select code specific to PXA168 119 Select code specific to PXA168
118 120
119config CPU_PXA910 121config CPU_PXA910
120 bool 122 bool
121 select COMMON_CLK
122 select CPU_MOHAWK 123 select CPU_MOHAWK
123 help 124 help
124 Select code specific to PXA910 125 Select code specific to PXA910
125 126
126config CPU_MMP2 127config CPU_MMP2
127 bool 128 bool
128 select COMMON_CLK
129 select CPU_PJ4 129 select CPU_PJ4
130 help 130 help
131 Select code specific to MMP2. MMP2 is ARMv7 compatible. 131 Select code specific to MMP2. MMP2 is ARMv7 compatible.
diff --git a/arch/arm/mach-mmp/mmp-dt.c b/arch/arm/mach-mmp/mmp-dt.c
index cca529ceecb7..b2296c9309b8 100644
--- a/arch/arm/mach-mmp/mmp-dt.c
+++ b/arch/arm/mach-mmp/mmp-dt.c
@@ -11,63 +11,42 @@
11 11
12#include <linux/irqchip.h> 12#include <linux/irqchip.h>
13#include <linux/of_platform.h> 13#include <linux/of_platform.h>
14#include <linux/clk-provider.h>
14#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
15#include <asm/mach/time.h> 16#include <asm/mach/time.h>
17#include <asm/hardware/cache-tauros2.h>
16 18
17#include "common.h" 19#include "common.h"
18 20
19extern void __init mmp_dt_init_timer(void); 21extern void __init mmp_dt_init_timer(void);
20 22
21static const struct of_dev_auxdata pxa168_auxdata_lookup[] __initconst = { 23static const char *pxa168_dt_board_compat[] __initdata = {
22 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.0", NULL), 24 "mrvl,pxa168-aspenite",
23 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4018000, "pxa2xx-uart.1", NULL), 25 NULL,
24 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4026000, "pxa2xx-uart.2", NULL),
25 OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4011000, "pxa2xx-i2c.0", NULL),
26 OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4025000, "pxa2xx-i2c.1", NULL),
27 OF_DEV_AUXDATA("marvell,mmp-gpio", 0xd4019000, "mmp-gpio", NULL),
28 OF_DEV_AUXDATA("mrvl,mmp-rtc", 0xd4010000, "sa1100-rtc", NULL),
29 {}
30}; 26};
31 27
32static const struct of_dev_auxdata pxa910_auxdata_lookup[] __initconst = { 28static const char *pxa910_dt_board_compat[] __initdata = {
33 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.0", NULL), 29 "mrvl,pxa910-dkb",
34 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4018000, "pxa2xx-uart.1", NULL), 30 NULL,
35 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4036000, "pxa2xx-uart.2", NULL),
36 OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4011000, "pxa2xx-i2c.0", NULL),
37 OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4037000, "pxa2xx-i2c.1", NULL),
38 OF_DEV_AUXDATA("marvell,mmp-gpio", 0xd4019000, "mmp-gpio", NULL),
39 OF_DEV_AUXDATA("mrvl,mmp-rtc", 0xd4010000, "sa1100-rtc", NULL),
40 {}
41}; 31};
42 32
43static void __init pxa168_dt_init(void) 33static void __init mmp_init_time(void)
44{
45 of_platform_populate(NULL, of_default_bus_match_table,
46 pxa168_auxdata_lookup, NULL);
47}
48
49static void __init pxa910_dt_init(void)
50{ 34{
51 of_platform_populate(NULL, of_default_bus_match_table, 35#ifdef CONFIG_CACHE_TAUROS2
52 pxa910_auxdata_lookup, NULL); 36 tauros2_init(0);
37#endif
38 mmp_dt_init_timer();
39 of_clk_init(NULL);
53} 40}
54 41
55static const char *mmp_dt_board_compat[] __initdata = {
56 "mrvl,pxa168-aspenite",
57 "mrvl,pxa910-dkb",
58 NULL,
59};
60
61DT_MACHINE_START(PXA168_DT, "Marvell PXA168 (Device Tree Support)") 42DT_MACHINE_START(PXA168_DT, "Marvell PXA168 (Device Tree Support)")
62 .map_io = mmp_map_io, 43 .map_io = mmp_map_io,
63 .init_time = mmp_dt_init_timer, 44 .init_time = mmp_init_time,
64 .init_machine = pxa168_dt_init, 45 .dt_compat = pxa168_dt_board_compat,
65 .dt_compat = mmp_dt_board_compat,
66MACHINE_END 46MACHINE_END
67 47
68DT_MACHINE_START(PXA910_DT, "Marvell PXA910 (Device Tree Support)") 48DT_MACHINE_START(PXA910_DT, "Marvell PXA910 (Device Tree Support)")
69 .map_io = mmp_map_io, 49 .map_io = mmp_map_io,
70 .init_time = mmp_dt_init_timer, 50 .init_time = mmp_init_time,
71 .init_machine = pxa910_dt_init, 51 .dt_compat = pxa910_dt_board_compat,
72 .dt_compat = mmp_dt_board_compat,
73MACHINE_END 52MACHINE_END
diff --git a/arch/arm/mach-mmp/mmp2-dt.c b/arch/arm/mach-mmp/mmp2-dt.c
index 023cb453f157..998c0f533abc 100644
--- a/arch/arm/mach-mmp/mmp2-dt.c
+++ b/arch/arm/mach-mmp/mmp2-dt.c
@@ -12,29 +12,22 @@
12#include <linux/io.h> 12#include <linux/io.h>
13#include <linux/irqchip.h> 13#include <linux/irqchip.h>
14#include <linux/of_platform.h> 14#include <linux/of_platform.h>
15#include <linux/clk-provider.h>
15#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
16#include <asm/mach/time.h> 17#include <asm/mach/time.h>
18#include <asm/hardware/cache-tauros2.h>
17 19
18#include "common.h" 20#include "common.h"
19 21
20extern void __init mmp_dt_init_timer(void); 22extern void __init mmp_dt_init_timer(void);
21 23
22static const struct of_dev_auxdata mmp2_auxdata_lookup[] __initconst = { 24static void __init mmp_init_time(void)
23 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4030000, "pxa2xx-uart.0", NULL),
24 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.1", NULL),
25 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4018000, "pxa2xx-uart.2", NULL),
26 OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4016000, "pxa2xx-uart.3", NULL),
27 OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4011000, "pxa2xx-i2c.0", NULL),
28 OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4025000, "pxa2xx-i2c.1", NULL),
29 OF_DEV_AUXDATA("marvell,mmp-gpio", 0xd4019000, "mmp2-gpio", NULL),
30 OF_DEV_AUXDATA("mrvl,mmp-rtc", 0xd4010000, "sa1100-rtc", NULL),
31 {}
32};
33
34static void __init mmp2_dt_init(void)
35{ 25{
36 of_platform_populate(NULL, of_default_bus_match_table, 26#ifdef CONFIG_CACHE_TAUROS2
37 mmp2_auxdata_lookup, NULL); 27 tauros2_init(0);
28#endif
29 mmp_dt_init_timer();
30 of_clk_init(NULL);
38} 31}
39 32
40static const char *mmp2_dt_board_compat[] __initdata = { 33static const char *mmp2_dt_board_compat[] __initdata = {
@@ -44,7 +37,6 @@ static const char *mmp2_dt_board_compat[] __initdata = {
44 37
45DT_MACHINE_START(MMP2_DT, "Marvell MMP2 (Device Tree Support)") 38DT_MACHINE_START(MMP2_DT, "Marvell MMP2 (Device Tree Support)")
46 .map_io = mmp_map_io, 39 .map_io = mmp_map_io,
47 .init_time = mmp_dt_init_timer, 40 .init_time = mmp_init_time,
48 .init_machine = mmp2_dt_init,
49 .dt_compat = mmp2_dt_board_compat, 41 .dt_compat = mmp2_dt_board_compat,
50MACHINE_END 42MACHINE_END
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-07 08:29:25 -0500