diff options
author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2011-04-01 18:15:49 -0400 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2011-05-19 07:11:32 -0400 |
commit | d286a43aa248cb657e0876b5aa4fe0034170d05c (patch) | |
tree | 14ab77f7d3a85ff9f397153e58c3cc90405d60ba /arch/arm | |
parent | 7db4d88206e20b8d91e8e7bba3b79805a1b1a98d (diff) |
ARM: mx3: make ioremap quirk ready for multi-SoC kernels
To be able to compile e.g. i.MX31 and i.MX51 in a single kernel image
the ioremap quirk needs a runtime check.
While touching this code make the comment more understandable by adding
a sentence from the commit log that introduced it
(eadefef ([ARM] MX3: Use ioremap wrapper to map SoC devices nonshared)).
As mach/io.h now uses cpu_is_ some header reshuffling in mach/hardware.h
was necessary. (mach/mx27.h and mach/mx31.h #include <linux/io.h> which
#includes <mach/io.h>. So mach/mxc.h which provides the cpu_is_ macros
needs to be included before mach/mx27.h and mach/mx31.h.)
LAKML-Reference: 1302464943-20721-5-git-send-email-u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/plat-mxc/include/mach/hardware.h | 4 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/io.h | 23 |
2 files changed, 17 insertions, 10 deletions
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h index a881db5c395e..67d3e2bed065 100644 --- a/arch/arm/plat-mxc/include/mach/hardware.h +++ b/arch/arm/plat-mxc/include/mach/hardware.h | |||
@@ -95,6 +95,8 @@ | |||
95 | 95 | ||
96 | #define IMX_IO_ADDRESS(x) IOMEM(IMX_IO_P2V(x)) | 96 | #define IMX_IO_ADDRESS(x) IOMEM(IMX_IO_P2V(x)) |
97 | 97 | ||
98 | #include <mach/mxc.h> | ||
99 | |||
98 | #ifdef CONFIG_ARCH_MX5 | 100 | #ifdef CONFIG_ARCH_MX5 |
99 | #include <mach/mx50.h> | 101 | #include <mach/mx50.h> |
100 | #include <mach/mx51.h> | 102 | #include <mach/mx51.h> |
@@ -125,8 +127,6 @@ | |||
125 | # include <mach/mx25.h> | 127 | # include <mach/mx25.h> |
126 | #endif | 128 | #endif |
127 | 129 | ||
128 | #include <mach/mxc.h> | ||
129 | |||
130 | #define imx_map_entry(soc, name, _type) { \ | 130 | #define imx_map_entry(soc, name, _type) { \ |
131 | .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \ | 131 | .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \ |
132 | .pfn = __phys_to_pfn(soc ## _ ## name ## _BASE_ADDR), \ | 132 | .pfn = __phys_to_pfn(soc ## _ ## name ## _BASE_ADDR), \ |
diff --git a/arch/arm/plat-mxc/include/mach/io.h b/arch/arm/plat-mxc/include/mach/io.h index b4f2de769466..4347a87d2bb0 100644 --- a/arch/arm/plat-mxc/include/mach/io.h +++ b/arch/arm/plat-mxc/include/mach/io.h | |||
@@ -14,19 +14,26 @@ | |||
14 | /* Allow IO space to be anywhere in the memory */ | 14 | /* Allow IO space to be anywhere in the memory */ |
15 | #define IO_SPACE_LIMIT 0xffffffff | 15 | #define IO_SPACE_LIMIT 0xffffffff |
16 | 16 | ||
17 | #ifdef CONFIG_ARCH_MX3 | 17 | #if defined(CONFIG_SOC_IMX31) || defined(CONFIG_SOC_IMX35) |
18 | #define __arch_ioremap __mx3_ioremap | 18 | #include <mach/hardware.h> |
19 | |||
20 | #define __arch_ioremap __imx_ioremap | ||
19 | #define __arch_iounmap __iounmap | 21 | #define __arch_iounmap __iounmap |
20 | 22 | ||
23 | #define addr_in_module(addr, mod) \ | ||
24 | ((unsigned long)(addr) - mod ## _BASE_ADDR < mod ## _SIZE) | ||
25 | |||
21 | static inline void __iomem * | 26 | static inline void __iomem * |
22 | __mx3_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) | 27 | __imx_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) |
23 | { | 28 | { |
24 | if (mtype == MT_DEVICE) { | 29 | if (mtype == MT_DEVICE && (cpu_is_mx31() || cpu_is_mx35())) { |
25 | /* Access all peripherals below 0x80000000 as nonshared device | 30 | /* |
26 | * but leave l2cc alone. | 31 | * Access all peripherals below 0x80000000 as nonshared device |
32 | * on mx3, but leave l2cc alone. Otherwise cache corruptions | ||
33 | * can occur. | ||
27 | */ | 34 | */ |
28 | if ((phys_addr < 0x80000000) && ((phys_addr < 0x30000000) || | 35 | if (phys_addr < 0x80000000 && |
29 | (phys_addr >= 0x30000000 + SZ_1M))) | 36 | !addr_in_module(phys_addr, MX3x_L2CC)) |
30 | mtype = MT_DEVICE_NONSHARED; | 37 | mtype = MT_DEVICE_NONSHARED; |
31 | } | 38 | } |
32 | 39 | ||