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authorAndy Green <andy@warmcat.com>2011-05-30 10:43:06 -0400
committerBen Dooks <ben-linux@fluff.org>2011-10-29 04:37:07 -0400
commitd177e5ddb83a4bc518270e705e60ccc5a5aa6410 (patch)
treea281d57a553dec3d86a3bc69dd3ce2dd61be8823 /arch/arm
parent67b90c67205149173dc0cfdc46039be92fa390b6 (diff)
I2C: OMAP2+: Pass hwmod rev knowledge via platform_data when i2c bus added
Mark each OMAP I2C bus with the hwmod's knowledge of which I2C IP version is in the chip we're running on. Cc: patches@linaro.org Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/plat-omap/i2c.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index a938df0908a2..0d3eda77e7ce 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -155,6 +155,12 @@ static inline int omap2_i2c_add_bus(int bus_id)
155 155
156 pdata = &i2c_pdata[bus_id - 1]; 156 pdata = &i2c_pdata[bus_id - 1];
157 /* 157 /*
158 * pass the hwmod class's CPU-specific knowledge of I2C IP revision in
159 * use up to the OMAP I2C driver via platform data
160 */
161 pdata->rev = oh->class->rev;
162
163 /*
158 * When waiting for completion of a i2c transfer, we need to 164 * When waiting for completion of a i2c transfer, we need to
159 * set a wake up latency constraint for the MPU. This is to 165 * set a wake up latency constraint for the MPU. This is to
160 * ensure quick enough wakeup from idle, when transfer 166 * ensure quick enough wakeup from idle, when transfer