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authorCatalin Marinas <catalin.marinas@arm.com>2010-06-21 10:12:09 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-07-01 05:13:41 -0400
commitcf0bb91b3ce7e42142ccea46232da19a9bbf28d5 (patch)
tree45c8c9403b519212211ee5bd5dd24040f3545617 /arch/arm
parentad642d9f58f1af6e96efccb5f84e52c6d01db5c4 (diff)
ARM: 6192/1: VExpress: Align the machine_desc.phys_io to 1MB section
When not aligned, random bits could be written in the initial page table by the __create_page_tables() function. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-vexpress/ct-ca9x4.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index 9b11eedba65f..6353459bb567 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -10,6 +10,7 @@
10#include <linux/amba/clcd.h> 10#include <linux/amba/clcd.h>
11 11
12#include <asm/clkdev.h> 12#include <asm/clkdev.h>
13#include <asm/pgtable.h>
13#include <asm/hardware/arm_timer.h> 14#include <asm/hardware/arm_timer.h>
14#include <asm/hardware/cache-l2x0.h> 15#include <asm/hardware/cache-l2x0.h>
15#include <asm/hardware/gic.h> 16#include <asm/hardware/gic.h>
@@ -236,7 +237,7 @@ static void ct_ca9x4_init(void)
236} 237}
237 238
238MACHINE_START(VEXPRESS, "ARM-Versatile Express CA9x4") 239MACHINE_START(VEXPRESS, "ARM-Versatile Express CA9x4")
239 .phys_io = V2M_UART0, 240 .phys_io = V2M_UART0 & SECTION_MASK,
240 .io_pg_offst = (__MMIO_P2V(V2M_UART0) >> 18) & 0xfffc, 241 .io_pg_offst = (__MMIO_P2V(V2M_UART0) >> 18) & 0xfffc,
241 .boot_params = PHYS_OFFSET + 0x00000100, 242 .boot_params = PHYS_OFFSET + 0x00000100,
242 .map_io = ct_ca9x4_map_io, 243 .map_io = ct_ca9x4_map_io,