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authorNicolas Pitre <nicolas.pitre@linaro.org>2014-03-24 11:51:58 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2014-04-07 10:27:05 -0400
commitc9d347e0277696c80496161cbef47393b850a0aa (patch)
treeb7fe1b735170ae1760dc2f551bc24640120ec3d0 /arch/arm
parentfff00db852f2ff0faf5f539b5e28ac498fc007f8 (diff)
ARM: 8009/1: dcscb.c: remove call to outer_flush_all()
Strictly speaking this call is a no-op on the platform where dcscb.c is used since it only has architected caches. The call was there as a hint to people inspired by this code when writing their own backend, but the hint might not always be correct. For example, if a PL310 were to be used it wouldn't be safe to call the regular outer_flush_all() as atomic instructions for locking are involved in that case and those instructions cannot be assumed to still be operational after v7_exit_coherency_flush() has returned. Given no other CPUs (in the cluster) should be running at that point then standard concurrency concerns wouldn't apply. So let's simply kill this call for now and enhance the existing comment. Signed-off-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-vexpress/dcscb.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/arch/arm/mach-vexpress/dcscb.c b/arch/arm/mach-vexpress/dcscb.c
index 14d499688736..788495d35cf9 100644
--- a/arch/arm/mach-vexpress/dcscb.c
+++ b/arch/arm/mach-vexpress/dcscb.c
@@ -137,11 +137,16 @@ static void dcscb_power_down(void)
137 v7_exit_coherency_flush(all); 137 v7_exit_coherency_flush(all);
138 138
139 /* 139 /*
140 * This is a harmless no-op. On platforms with a real 140 * A full outer cache flush could be needed at this point
141 * outer cache this might either be needed or not, 141 * on platforms with such a cache, depending on where the
142 * depending on where the outer cache sits. 142 * outer cache sits. In some cases the notion of a "last
143 * cluster standing" would need to be implemented if the
144 * outer cache is shared across clusters. In any case, when
145 * the outer cache needs flushing, there is no concurrent
146 * access to the cache controller to worry about and no
147 * special locking besides what is already provided by the
148 * MCPM state machinery is needed.
143 */ 149 */
144 outer_flush_all();
145 150
146 /* 151 /*
147 * Disable cluster-level coherency by masking 152 * Disable cluster-level coherency by masking