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authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>2013-05-26 20:53:37 -0400
committerSimon Horman <horms+renesas@verge.net.au>2013-07-16 21:02:17 -0400
commitc9031fbb35bd44d99c5cfe7d3c97ec238d63643a (patch)
treec41a17d81684bc5f0b63a8a918433ff4c74448d2 /arch/arm
parentbcfed2a8a61a0f6ee7769f5093a8279a9e50c526 (diff)
ARM: shmobile: r8a7778: add __initdata on resource and device data
These data will be kmemdup()'ed on platform_device_add_resources() and platform_device_add_data() Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7778.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
index 80c20392ad7c..b70bfeef2f6c 100644
--- a/arch/arm/mach-shmobile/setup-r8a7778.c
+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
@@ -53,7 +53,7 @@
53 .irqs = SCIx_IRQ_MUXED(irq), \ 53 .irqs = SCIx_IRQ_MUXED(irq), \
54} 54}
55 55
56static struct plat_sci_port scif_platform_data[] = { 56static struct plat_sci_port scif_platform_data[] __initdata = {
57 SCIF_INFO(0xffe40000, gic_iid(0x66)), 57 SCIF_INFO(0xffe40000, gic_iid(0x66)),
58 SCIF_INFO(0xffe41000, gic_iid(0x67)), 58 SCIF_INFO(0xffe41000, gic_iid(0x67)),
59 SCIF_INFO(0xffe42000, gic_iid(0x68)), 59 SCIF_INFO(0xffe42000, gic_iid(0x68)),
@@ -63,24 +63,24 @@ static struct plat_sci_port scif_platform_data[] = {
63}; 63};
64 64
65/* TMU */ 65/* TMU */
66static struct resource sh_tmu0_resources[] = { 66static struct resource sh_tmu0_resources[] __initdata = {
67 DEFINE_RES_MEM(0xffd80008, 12), 67 DEFINE_RES_MEM(0xffd80008, 12),
68 DEFINE_RES_IRQ(gic_iid(0x40)), 68 DEFINE_RES_IRQ(gic_iid(0x40)),
69}; 69};
70 70
71static struct sh_timer_config sh_tmu0_platform_data = { 71static struct sh_timer_config sh_tmu0_platform_data __initdata = {
72 .name = "TMU00", 72 .name = "TMU00",
73 .channel_offset = 0x4, 73 .channel_offset = 0x4,
74 .timer_bit = 0, 74 .timer_bit = 0,
75 .clockevent_rating = 200, 75 .clockevent_rating = 200,
76}; 76};
77 77
78static struct resource sh_tmu1_resources[] = { 78static struct resource sh_tmu1_resources[] __initdata = {
79 DEFINE_RES_MEM(0xffd80014, 12), 79 DEFINE_RES_MEM(0xffd80014, 12),
80 DEFINE_RES_IRQ(gic_iid(0x41)), 80 DEFINE_RES_IRQ(gic_iid(0x41)),
81}; 81};
82 82
83static struct sh_timer_config sh_tmu1_platform_data = { 83static struct sh_timer_config sh_tmu1_platform_data __initdata = {
84 .name = "TMU01", 84 .name = "TMU01",
85 .channel_offset = 0x10, 85 .channel_offset = 0x10,
86 .timer_bit = 1, 86 .timer_bit = 1,
@@ -189,7 +189,7 @@ USB_PLATFORM_INFO(ehci);
189USB_PLATFORM_INFO(ohci); 189USB_PLATFORM_INFO(ohci);
190 190
191/* Ether */ 191/* Ether */
192static struct resource ether_resources[] = { 192static struct resource ether_resources[] __initdata = {
193 DEFINE_RES_MEM(0xfde00000, 0x400), 193 DEFINE_RES_MEM(0xfde00000, 0x400),
194 DEFINE_RES_IRQ(gic_iid(0x89)), 194 DEFINE_RES_IRQ(gic_iid(0x89)),
195}; 195};
@@ -203,17 +203,17 @@ void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata)
203} 203}
204 204
205/* PFC/GPIO */ 205/* PFC/GPIO */
206static struct resource pfc_resources[] = { 206static struct resource pfc_resources[] __initdata = {
207 DEFINE_RES_MEM(0xfffc0000, 0x118), 207 DEFINE_RES_MEM(0xfffc0000, 0x118),
208}; 208};
209 209
210#define R8A7778_GPIO(idx) \ 210#define R8A7778_GPIO(idx) \
211static struct resource r8a7778_gpio##idx##_resources[] = { \ 211static struct resource r8a7778_gpio##idx##_resources[] __initdata = { \
212 DEFINE_RES_MEM(0xffc40000 + 0x1000 * (idx), 0x30), \ 212 DEFINE_RES_MEM(0xffc40000 + 0x1000 * (idx), 0x30), \
213 DEFINE_RES_IRQ(gic_iid(0x87)), \ 213 DEFINE_RES_IRQ(gic_iid(0x87)), \
214}; \ 214}; \
215 \ 215 \
216static struct gpio_rcar_config r8a7778_gpio##idx##_platform_data = { \ 216static struct gpio_rcar_config r8a7778_gpio##idx##_platform_data __initdata = { \
217 .gpio_base = 32 * (idx), \ 217 .gpio_base = 32 * (idx), \
218 .irq_base = GPIO_IRQ_BASE(idx), \ 218 .irq_base = GPIO_IRQ_BASE(idx), \
219 .number_of_pins = 32, \ 219 .number_of_pins = 32, \
@@ -249,7 +249,7 @@ void __init r8a7778_pinmux_init(void)
249}; 249};
250 250
251/* SDHI */ 251/* SDHI */
252static struct resource sdhi_resources[] = { 252static struct resource sdhi_resources[] __initdata = {
253 /* SDHI0 */ 253 /* SDHI0 */
254 DEFINE_RES_MEM(0xFFE4C000, 0x100), 254 DEFINE_RES_MEM(0xFFE4C000, 0x100),
255 DEFINE_RES_IRQ(gic_iid(0x77)), 255 DEFINE_RES_IRQ(gic_iid(0x77)),
@@ -365,12 +365,12 @@ void __init r8a7778_init_late(void)
365 platform_device_register_full(&ohci_info); 365 platform_device_register_full(&ohci_info);
366} 366}
367 367
368static struct renesas_intc_irqpin_config irqpin_platform_data = { 368static struct renesas_intc_irqpin_config irqpin_platform_data __initdata = {
369 .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */ 369 .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
370 .sense_bitfield_width = 2, 370 .sense_bitfield_width = 2,
371}; 371};
372 372
373static struct resource irqpin_resources[] = { 373static struct resource irqpin_resources[] __initdata = {
374 DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */ 374 DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */
375 DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */ 375 DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */
376 DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */ 376 DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */