diff options
| author | sricharan <r.sricharan@ti.com> | 2011-02-07 10:42:11 -0500 |
|---|---|---|
| committer | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2011-03-09 06:53:57 -0500 |
| commit | c464523488063f240652c445fcae2ca8a0eb2647 (patch) | |
| tree | c44e6818979bd72befaa9318314494ec6b9fac6e /arch/arm | |
| parent | e2fa61d409195550b3b05b213d7715bc67b0e855 (diff) | |
OMAP4: hwmod_data: Add address space and irq in L3 hwmod.
Add the address spaces, irqs of the l3 interconnect to the
hwmod data. The hwmod change is aligned with Benoit Cousson.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: sricharan <r.sricharan@ti.com>
Acked-by: Benoit Cousson <b-cousson@ti.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 7b72316781da..3e88dd3f8ef3 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | |||
| @@ -264,11 +264,27 @@ static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = { | |||
| 264 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 264 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 265 | }; | 265 | }; |
| 266 | 266 | ||
| 267 | /* L3 target configuration and error log registers */ | ||
| 268 | static struct omap_hwmod_irq_info omap44xx_l3_targ_irqs[] = { | ||
| 269 | { .irq = 9 + OMAP44XX_IRQ_GIC_START }, | ||
| 270 | { .irq = 10 + OMAP44XX_IRQ_GIC_START }, | ||
| 271 | }; | ||
| 272 | |||
| 273 | static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { | ||
| 274 | { | ||
| 275 | .pa_start = 0x44000000, | ||
| 276 | .pa_end = 0x44000fff, | ||
| 277 | .flags = ADDR_TYPE_RT, | ||
| 278 | }, | ||
| 279 | }; | ||
| 280 | |||
| 267 | /* mpu -> l3_main_1 */ | 281 | /* mpu -> l3_main_1 */ |
| 268 | static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = { | 282 | static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = { |
| 269 | .master = &omap44xx_mpu_hwmod, | 283 | .master = &omap44xx_mpu_hwmod, |
| 270 | .slave = &omap44xx_l3_main_1_hwmod, | 284 | .slave = &omap44xx_l3_main_1_hwmod, |
| 271 | .clk = "l3_div_ck", | 285 | .clk = "l3_div_ck", |
| 286 | .addr = omap44xx_l3_main_1_addrs, | ||
| 287 | .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_1_addrs), | ||
| 272 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 288 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 273 | }; | 289 | }; |
| 274 | 290 | ||
| @@ -286,6 +302,8 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = { | |||
| 286 | static struct omap_hwmod omap44xx_l3_main_1_hwmod = { | 302 | static struct omap_hwmod omap44xx_l3_main_1_hwmod = { |
| 287 | .name = "l3_main_1", | 303 | .name = "l3_main_1", |
| 288 | .class = &omap44xx_l3_hwmod_class, | 304 | .class = &omap44xx_l3_hwmod_class, |
| 305 | .mpu_irqs = omap44xx_l3_targ_irqs, | ||
| 306 | .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_l3_targ_irqs), | ||
| 289 | .slaves = omap44xx_l3_main_1_slaves, | 307 | .slaves = omap44xx_l3_main_1_slaves, |
| 290 | .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), | 308 | .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), |
| 291 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | 309 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
| @@ -332,11 +350,21 @@ static struct omap_hwmod_ocp_if omap44xx_iva__l3_main_2 = { | |||
| 332 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 350 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 333 | }; | 351 | }; |
| 334 | 352 | ||
| 353 | static struct omap_hwmod_addr_space omap44xx_l3_main_2_addrs[] = { | ||
| 354 | { | ||
| 355 | .pa_start = 0x44800000, | ||
| 356 | .pa_end = 0x44801fff, | ||
| 357 | .flags = ADDR_TYPE_RT, | ||
| 358 | }, | ||
| 359 | }; | ||
| 360 | |||
| 335 | /* l3_main_1 -> l3_main_2 */ | 361 | /* l3_main_1 -> l3_main_2 */ |
| 336 | static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = { | 362 | static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = { |
| 337 | .master = &omap44xx_l3_main_1_hwmod, | 363 | .master = &omap44xx_l3_main_1_hwmod, |
| 338 | .slave = &omap44xx_l3_main_2_hwmod, | 364 | .slave = &omap44xx_l3_main_2_hwmod, |
| 339 | .clk = "l3_div_ck", | 365 | .clk = "l3_div_ck", |
| 366 | .addr = omap44xx_l3_main_2_addrs, | ||
| 367 | .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_2_addrs), | ||
| 340 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 368 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 341 | }; | 369 | }; |
| 342 | 370 | ||
| @@ -377,11 +405,21 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = { | |||
| 377 | }; | 405 | }; |
| 378 | 406 | ||
| 379 | /* l3_main_3 interface data */ | 407 | /* l3_main_3 interface data */ |
| 408 | static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = { | ||
| 409 | { | ||
| 410 | .pa_start = 0x45000000, | ||
| 411 | .pa_end = 0x45000fff, | ||
| 412 | .flags = ADDR_TYPE_RT, | ||
| 413 | }, | ||
| 414 | }; | ||
| 415 | |||
| 380 | /* l3_main_1 -> l3_main_3 */ | 416 | /* l3_main_1 -> l3_main_3 */ |
| 381 | static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = { | 417 | static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = { |
| 382 | .master = &omap44xx_l3_main_1_hwmod, | 418 | .master = &omap44xx_l3_main_1_hwmod, |
| 383 | .slave = &omap44xx_l3_main_3_hwmod, | 419 | .slave = &omap44xx_l3_main_3_hwmod, |
| 384 | .clk = "l3_div_ck", | 420 | .clk = "l3_div_ck", |
| 421 | .addr = omap44xx_l3_main_3_addrs, | ||
| 422 | .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_3_addrs), | ||
| 385 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 423 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 386 | }; | 424 | }; |
| 387 | 425 | ||
