diff options
author | Alexander Shiyan <shc_work@mail.ru> | 2014-06-07 12:09:26 -0400 |
---|---|---|
committer | Shawn Guo <shawn.guo@freescale.com> | 2014-07-18 04:10:12 -0400 |
commit | c349adde00e8aba6c05316ef8670836baff2d503 (patch) | |
tree | 2b692ea315281487886258dac87723e59f91f69a /arch/arm | |
parent | bb9c3398efd109e48932af46c3e1fed10adddc17 (diff) |
ARM: i.MX27 clk: Use of_clk_init() for DT case
Replace .init_time() hook with of_clk_init() for DT targets.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-imx/clk-imx27.c | 57 | ||||
-rw-r--r-- | arch/arm/mach-imx/common.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-imx/imx27-dt.c | 6 |
3 files changed, 29 insertions, 35 deletions
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c index f5a6a3fd541a..8c55797dc3e2 100644 --- a/arch/arm/mach-imx/clk-imx27.c +++ b/arch/arm/mach-imx/clk-imx27.c | |||
@@ -1,32 +1,31 @@ | |||
1 | #include <linux/clk.h> | 1 | #include <linux/clk.h> |
2 | #include <linux/io.h> | 2 | #include <linux/clk-provider.h> |
3 | #include <linux/module.h> | ||
4 | #include <linux/clkdev.h> | 3 | #include <linux/clkdev.h> |
5 | #include <linux/err.h> | 4 | #include <linux/err.h> |
6 | #include <linux/clk-provider.h> | ||
7 | #include <linux/of.h> | 5 | #include <linux/of.h> |
6 | #include <linux/of_address.h> | ||
8 | 7 | ||
9 | #include "clk.h" | 8 | #include "clk.h" |
10 | #include "common.h" | 9 | #include "common.h" |
11 | #include "hardware.h" | 10 | #include "hardware.h" |
12 | 11 | ||
13 | #define IO_ADDR_CCM(off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off))) | 12 | static void __iomem *ccm __initdata; |
14 | 13 | ||
15 | /* Register offsets */ | 14 | /* Register offsets */ |
16 | #define CCM_CSCR IO_ADDR_CCM(0x0) | 15 | #define CCM_CSCR (ccm + 0x00) |
17 | #define CCM_MPCTL0 IO_ADDR_CCM(0x4) | 16 | #define CCM_MPCTL0 (ccm + 0x04) |
18 | #define CCM_MPCTL1 IO_ADDR_CCM(0x8) | 17 | #define CCM_MPCTL1 (ccm + 0x08) |
19 | #define CCM_SPCTL0 IO_ADDR_CCM(0xc) | 18 | #define CCM_SPCTL0 (ccm + 0x0c) |
20 | #define CCM_SPCTL1 IO_ADDR_CCM(0x10) | 19 | #define CCM_SPCTL1 (ccm + 0x10) |
21 | #define CCM_OSC26MCTL IO_ADDR_CCM(0x14) | 20 | #define CCM_OSC26MCTL (ccm + 0x14) |
22 | #define CCM_PCDR0 IO_ADDR_CCM(0x18) | 21 | #define CCM_PCDR0 (ccm + 0x18) |
23 | #define CCM_PCDR1 IO_ADDR_CCM(0x1c) | 22 | #define CCM_PCDR1 (ccm + 0x1c) |
24 | #define CCM_PCCR0 IO_ADDR_CCM(0x20) | 23 | #define CCM_PCCR0 (ccm + 0x20) |
25 | #define CCM_PCCR1 IO_ADDR_CCM(0x24) | 24 | #define CCM_PCCR1 (ccm + 0x24) |
26 | #define CCM_CCSR IO_ADDR_CCM(0x28) | 25 | #define CCM_CCSR (ccm + 0x28) |
27 | #define CCM_PMCTL IO_ADDR_CCM(0x2c) | 26 | #define CCM_PMCTL (ccm + 0x2c) |
28 | #define CCM_PMCOUNT IO_ADDR_CCM(0x30) | 27 | #define CCM_PMCOUNT (ccm + 0x30) |
29 | #define CCM_WKGDCTL IO_ADDR_CCM(0x34) | 28 | #define CCM_WKGDCTL (ccm + 0x34) |
30 | 29 | ||
31 | #define CCM_CSCR_UPDATE_DIS (1 << 31) | 30 | #define CCM_CSCR_UPDATE_DIS (1 << 31) |
32 | #define CCM_CSCR_SSI2 (1 << 23) | 31 | #define CCM_CSCR_SSI2 (1 << 23) |
@@ -93,6 +92,8 @@ static void __init _mx27_clocks_init(unsigned long fref) | |||
93 | { | 92 | { |
94 | unsigned i; | 93 | unsigned i; |
95 | 94 | ||
95 | BUG_ON(!ccm); | ||
96 | |||
96 | clk[dummy] = imx_clk_fixed("dummy", 0); | 97 | clk[dummy] = imx_clk_fixed("dummy", 0); |
97 | clk[ckih] = imx_clk_fixed("ckih", fref); | 98 | clk[ckih] = imx_clk_fixed("ckih", fref); |
98 | clk[ckil] = imx_clk_fixed("ckil", 32768); | 99 | clk[ckil] = imx_clk_fixed("ckil", 32768); |
@@ -214,6 +215,8 @@ static void __init _mx27_clocks_init(unsigned long fref) | |||
214 | 215 | ||
215 | int __init mx27_clocks_init(unsigned long fref) | 216 | int __init mx27_clocks_init(unsigned long fref) |
216 | { | 217 | { |
218 | ccm = ioremap(MX27_CCM_BASE_ADDR, SZ_4K); | ||
219 | |||
217 | _mx27_clocks_init(fref); | 220 | _mx27_clocks_init(fref); |
218 | 221 | ||
219 | clk_register_clkdev(clk[uart1_ipg_gate], "ipg", "imx21-uart.0"); | 222 | clk_register_clkdev(clk[uart1_ipg_gate], "ipg", "imx21-uart.0"); |
@@ -283,29 +286,27 @@ int __init mx27_clocks_init(unsigned long fref) | |||
283 | return 0; | 286 | return 0; |
284 | } | 287 | } |
285 | 288 | ||
286 | int __init mx27_clocks_init_dt(void) | 289 | static void __init mx27_clocks_init_dt(struct device_node *np) |
287 | { | 290 | { |
288 | struct device_node *np; | 291 | struct device_node *refnp; |
289 | u32 fref = 26000000; /* default */ | 292 | u32 fref = 26000000; /* default */ |
290 | 293 | ||
291 | for_each_compatible_node(np, NULL, "fixed-clock") { | 294 | for_each_compatible_node(refnp, NULL, "fixed-clock") { |
292 | if (!of_device_is_compatible(np, "fsl,imx-osc26m")) | 295 | if (!of_device_is_compatible(refnp, "fsl,imx-osc26m")) |
293 | continue; | 296 | continue; |
294 | 297 | ||
295 | if (!of_property_read_u32(np, "clock-frequency", &fref)) | 298 | if (!of_property_read_u32(refnp, "clock-frequency", &fref)) |
296 | break; | 299 | break; |
297 | } | 300 | } |
298 | 301 | ||
299 | _mx27_clocks_init(fref); | 302 | ccm = of_iomap(np, 0); |
300 | 303 | ||
301 | np = of_find_compatible_node(NULL, NULL, "fsl,imx27-ccm"); | 304 | _mx27_clocks_init(fref); |
302 | BUG_ON(!np); | ||
303 | 305 | ||
304 | clk_data.clks = clk; | 306 | clk_data.clks = clk; |
305 | clk_data.clk_num = ARRAY_SIZE(clk); | 307 | clk_data.clk_num = ARRAY_SIZE(clk); |
306 | of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); | 308 | of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); |
307 | 309 | ||
308 | mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx1-gpt")); | 310 | mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx1-gpt")); |
309 | |||
310 | return 0; | ||
311 | } | 311 | } |
312 | CLK_OF_DECLARE(imx27_ccm, "fsl,imx27-ccm", mx27_clocks_init_dt); | ||
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 5aaea2bcf4f3..7668ff53773f 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h | |||
@@ -56,7 +56,6 @@ int mx27_clocks_init(unsigned long fref); | |||
56 | int mx31_clocks_init(unsigned long fref); | 56 | int mx31_clocks_init(unsigned long fref); |
57 | int mx35_clocks_init(void); | 57 | int mx35_clocks_init(void); |
58 | int mx25_clocks_init_dt(void); | 58 | int mx25_clocks_init_dt(void); |
59 | int mx27_clocks_init_dt(void); | ||
60 | int mx31_clocks_init_dt(void); | 59 | int mx31_clocks_init_dt(void); |
61 | struct platform_device *mxc_register_gpio(char *name, int id, | 60 | struct platform_device *mxc_register_gpio(char *name, int id, |
62 | resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); | 61 | resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); |
diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c index 17bd4058133d..080e66c6a1d0 100644 --- a/arch/arm/mach-imx/imx27-dt.c +++ b/arch/arm/mach-imx/imx27-dt.c | |||
@@ -34,16 +34,10 @@ static const char * const imx27_dt_board_compat[] __initconst = { | |||
34 | NULL | 34 | NULL |
35 | }; | 35 | }; |
36 | 36 | ||
37 | static void __init imx27_timer_init(void) | ||
38 | { | ||
39 | mx27_clocks_init_dt(); | ||
40 | } | ||
41 | |||
42 | DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)") | 37 | DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)") |
43 | .map_io = mx27_map_io, | 38 | .map_io = mx27_map_io, |
44 | .init_early = imx27_init_early, | 39 | .init_early = imx27_init_early, |
45 | .init_irq = mx27_init_irq, | 40 | .init_irq = mx27_init_irq, |
46 | .init_time = imx27_timer_init, | ||
47 | .init_machine = imx27_dt_init, | 41 | .init_machine = imx27_dt_init, |
48 | .dt_compat = imx27_dt_board_compat, | 42 | .dt_compat = imx27_dt_board_compat, |
49 | .restart = mxc_restart, | 43 | .restart = mxc_restart, |