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authorVladimir Barinov <vova.barinov@gmail.com>2009-04-28 20:00:48 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2009-05-07 10:18:44 -0400
commitc1a6f12383c79b28dd7c40a4e7293c80db265f59 (patch)
tree96377fb359ae60ed485d913282af845a4813f461 /arch/arm
parent3211705f76cccd52cd3f3c2744aef798bf705702 (diff)
MX27ADS: setup all pins at once in one table
Setup all pins at once in one table Signed-off-by: Vladimir Barinov <vbarinov@embeddedalley.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-mx2/mx27ads.c186
1 files changed, 43 insertions, 143 deletions
diff --git a/arch/arm/mach-mx2/mx27ads.c b/arch/arm/mach-mx2/mx27ads.c
index ab389c22f4dd..13accbed8886 100644
--- a/arch/arm/mach-mx2/mx27ads.c
+++ b/arch/arm/mach-mx2/mx27ads.c
@@ -36,148 +36,38 @@
36 36
37#include "devices.h" 37#include "devices.h"
38 38
39/* ADS's NOR flash */ 39static unsigned int mx27ads_pins[] = {
40static struct physmap_flash_data mx27ads_flash_data = { 40 /* UART0 */
41 .width = 2,
42};
43
44static struct resource mx27ads_flash_resource = {
45 .start = 0xc0000000,
46 .end = 0xc0000000 + 0x02000000 - 1,
47 .flags = IORESOURCE_MEM,
48
49};
50
51static struct platform_device mx27ads_nor_mtd_device = {
52 .name = "physmap-flash",
53 .id = 0,
54 .dev = {
55 .platform_data = &mx27ads_flash_data,
56 },
57 .num_resources = 1,
58 .resource = &mx27ads_flash_resource,
59};
60
61static int mxc_uart0_pins[] = {
62 PE12_PF_UART1_TXD, 41 PE12_PF_UART1_TXD,
63 PE13_PF_UART1_RXD, 42 PE13_PF_UART1_RXD,
64 PE14_PF_UART1_CTS, 43 PE14_PF_UART1_CTS,
65 PE15_PF_UART1_RTS 44 PE15_PF_UART1_RTS,
66}; 45 /* UART1 */
67
68static int uart_mxc_port0_init(struct platform_device *pdev)
69{
70 return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
71 ARRAY_SIZE(mxc_uart0_pins), "UART0");
72}
73
74static void uart_mxc_port0_exit(struct platform_device *pdev)
75{
76 mxc_gpio_release_multiple_pins(mxc_uart0_pins,
77 ARRAY_SIZE(mxc_uart0_pins));
78}
79
80static int mxc_uart1_pins[] = {
81 PE3_PF_UART2_CTS, 46 PE3_PF_UART2_CTS,
82 PE4_PF_UART2_RTS, 47 PE4_PF_UART2_RTS,
83 PE6_PF_UART2_TXD, 48 PE6_PF_UART2_TXD,
84 PE7_PF_UART2_RXD 49 PE7_PF_UART2_RXD,
85}; 50 /* UART2 */
86
87static int uart_mxc_port1_init(struct platform_device *pdev)
88{
89 return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
90 ARRAY_SIZE(mxc_uart1_pins), "UART1");
91}
92
93static void uart_mxc_port1_exit(struct platform_device *pdev)
94{
95 mxc_gpio_release_multiple_pins(mxc_uart1_pins,
96 ARRAY_SIZE(mxc_uart1_pins));
97}
98
99static int mxc_uart2_pins[] = {
100 PE8_PF_UART3_TXD, 51 PE8_PF_UART3_TXD,
101 PE9_PF_UART3_RXD, 52 PE9_PF_UART3_RXD,
102 PE10_PF_UART3_CTS, 53 PE10_PF_UART3_CTS,
103 PE11_PF_UART3_RTS 54 PE11_PF_UART3_RTS,
104}; 55 /* UART3 */
105
106static int uart_mxc_port2_init(struct platform_device *pdev)
107{
108 return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
109 ARRAY_SIZE(mxc_uart2_pins), "UART2");
110}
111
112static void uart_mxc_port2_exit(struct platform_device *pdev)
113{
114 mxc_gpio_release_multiple_pins(mxc_uart2_pins,
115 ARRAY_SIZE(mxc_uart2_pins));
116}
117
118static int mxc_uart3_pins[] = {
119 PB26_AF_UART4_RTS, 56 PB26_AF_UART4_RTS,
120 PB28_AF_UART4_TXD, 57 PB28_AF_UART4_TXD,
121 PB29_AF_UART4_CTS, 58 PB29_AF_UART4_CTS,
122 PB31_AF_UART4_RXD 59 PB31_AF_UART4_RXD,
123}; 60 /* UART4 */
124
125static int uart_mxc_port3_init(struct platform_device *pdev)
126{
127 return mxc_gpio_setup_multiple_pins(mxc_uart3_pins,
128 ARRAY_SIZE(mxc_uart3_pins), "UART3");
129}
130
131static void uart_mxc_port3_exit(struct platform_device *pdev)
132{
133 mxc_gpio_release_multiple_pins(mxc_uart3_pins,
134 ARRAY_SIZE(mxc_uart3_pins));
135}
136
137static int mxc_uart4_pins[] = {
138 PB18_AF_UART5_TXD, 61 PB18_AF_UART5_TXD,
139 PB19_AF_UART5_RXD, 62 PB19_AF_UART5_RXD,
140 PB20_AF_UART5_CTS, 63 PB20_AF_UART5_CTS,
141 PB21_AF_UART5_RTS 64 PB21_AF_UART5_RTS,
142}; 65 /* UART5 */
143
144static int uart_mxc_port4_init(struct platform_device *pdev)
145{
146 return mxc_gpio_setup_multiple_pins(mxc_uart4_pins,
147 ARRAY_SIZE(mxc_uart4_pins), "UART4");
148}
149
150static void uart_mxc_port4_exit(struct platform_device *pdev)
151{
152 mxc_gpio_release_multiple_pins(mxc_uart4_pins,
153 ARRAY_SIZE(mxc_uart4_pins));
154}
155
156static int mxc_uart5_pins[] = {
157 PB10_AF_UART6_TXD, 66 PB10_AF_UART6_TXD,
158 PB12_AF_UART6_CTS, 67 PB12_AF_UART6_CTS,
159 PB11_AF_UART6_RXD, 68 PB11_AF_UART6_RXD,
160 PB13_AF_UART6_RTS 69 PB13_AF_UART6_RTS,
161}; 70 /* FEC */
162
163static int uart_mxc_port5_init(struct platform_device *pdev)
164{
165 return mxc_gpio_setup_multiple_pins(mxc_uart5_pins,
166 ARRAY_SIZE(mxc_uart5_pins), "UART5");
167}
168
169static void uart_mxc_port5_exit(struct platform_device *pdev)
170{
171 mxc_gpio_release_multiple_pins(mxc_uart5_pins,
172 ARRAY_SIZE(mxc_uart5_pins));
173}
174
175static struct platform_device *platform_devices[] __initdata = {
176 &mx27ads_nor_mtd_device,
177 &mxc_fec_device,
178};
179
180static int mxc_fec_pins[] = {
181 PD0_AIN_FEC_TXD0, 71 PD0_AIN_FEC_TXD0,
182 PD1_AIN_FEC_TXD1, 72 PD1_AIN_FEC_TXD1,
183 PD2_AIN_FEC_TXD2, 73 PD2_AIN_FEC_TXD2,
@@ -195,46 +85,56 @@ static int mxc_fec_pins[] = {
195 PD14_AOUT_FEC_RX_CLK, 85 PD14_AOUT_FEC_RX_CLK,
196 PD15_AOUT_FEC_COL, 86 PD15_AOUT_FEC_COL,
197 PD16_AIN_FEC_TX_ER, 87 PD16_AIN_FEC_TX_ER,
198 PF23_AIN_FEC_TX_EN 88 PF23_AIN_FEC_TX_EN,
199}; 89};
200 90
201static void gpio_fec_active(void) 91/* ADS's NOR flash */
202{ 92static struct physmap_flash_data mx27ads_flash_data = {
203 mxc_gpio_setup_multiple_pins(mxc_fec_pins, 93 .width = 2,
204 ARRAY_SIZE(mxc_fec_pins), "FEC"); 94};
205} 95
96static struct resource mx27ads_flash_resource = {
97 .start = 0xc0000000,
98 .end = 0xc0000000 + 0x02000000 - 1,
99 .flags = IORESOURCE_MEM,
100
101};
102
103static struct platform_device mx27ads_nor_mtd_device = {
104 .name = "physmap-flash",
105 .id = 0,
106 .dev = {
107 .platform_data = &mx27ads_flash_data,
108 },
109 .num_resources = 1,
110 .resource = &mx27ads_flash_resource,
111};
112
113static struct platform_device *platform_devices[] __initdata = {
114 &mx27ads_nor_mtd_device,
115 &mxc_fec_device,
116};
206 117
207static struct imxuart_platform_data uart_pdata[] = { 118static struct imxuart_platform_data uart_pdata[] = {
208 { 119 {
209 .init = uart_mxc_port0_init,
210 .exit = uart_mxc_port0_exit,
211 .flags = IMXUART_HAVE_RTSCTS, 120 .flags = IMXUART_HAVE_RTSCTS,
212 }, { 121 }, {
213 .init = uart_mxc_port1_init,
214 .exit = uart_mxc_port1_exit,
215 .flags = IMXUART_HAVE_RTSCTS, 122 .flags = IMXUART_HAVE_RTSCTS,
216 }, { 123 }, {
217 .init = uart_mxc_port2_init,
218 .exit = uart_mxc_port2_exit,
219 .flags = IMXUART_HAVE_RTSCTS, 124 .flags = IMXUART_HAVE_RTSCTS,
220 }, { 125 }, {
221 .init = uart_mxc_port3_init,
222 .exit = uart_mxc_port3_exit,
223 .flags = IMXUART_HAVE_RTSCTS, 126 .flags = IMXUART_HAVE_RTSCTS,
224 }, { 127 }, {
225 .init = uart_mxc_port4_init,
226 .exit = uart_mxc_port4_exit,
227 .flags = IMXUART_HAVE_RTSCTS, 128 .flags = IMXUART_HAVE_RTSCTS,
228 }, { 129 }, {
229 .init = uart_mxc_port5_init,
230 .exit = uart_mxc_port5_exit,
231 .flags = IMXUART_HAVE_RTSCTS, 130 .flags = IMXUART_HAVE_RTSCTS,
232 }, 131 },
233}; 132};
234 133
235static void __init mx27ads_board_init(void) 134static void __init mx27ads_board_init(void)
236{ 135{
237 gpio_fec_active(); 136 mxc_gpio_setup_multiple_pins(mx27ads_pins, ARRAY_SIZE(mx27ads_pins),
137 "mx27ads");
238 138
239 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); 139 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
240 mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); 140 mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);