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authorIngo Molnar <mingo@kernel.org>2013-12-17 09:27:08 -0500
committerIngo Molnar <mingo@kernel.org>2013-12-17 09:27:08 -0500
commitbb799d3b980eb803ca2da4a4eefbd9308f8d988a (patch)
tree69fbe0cd6d47b23a50f5e1d87bf7489532fae149 /arch/arm
parent919fc6e34831d1c2b58bfb5ae261dc3facc9b269 (diff)
parent319e2e3f63c348a9b66db4667efa73178e18b17d (diff)
Merge tag 'v3.13-rc4' into core/locking
Merge Linux 3.13-rc4, to refresh this rather old tree with the latest fixes. Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig11
-rw-r--r--arch/arm/boot/dts/am335x-base0033.dts79
-rw-r--r--arch/arm/boot/dts/am335x-igep0033.dtsi29
-rw-r--r--arch/arm/boot/dts/am3517-evm.dts6
-rw-r--r--arch/arm/boot/dts/am3517.dtsi63
-rw-r--r--arch/arm/boot/dts/armada-370-db.dts28
-rw-r--r--arch/arm/boot/dts/armada-370-xp.dtsi2
-rw-r--r--arch/arm/boot/dts/armada-xp-mv78230.dtsi24
-rw-r--r--arch/arm/boot/dts/armada-xp-mv78260.dtsi109
-rw-r--r--arch/arm/boot/dts/at91sam9x5_usart3.dtsi4
-rw-r--r--arch/arm/boot/dts/bcm2835.dtsi4
-rw-r--r--arch/arm/boot/dts/cros5250-common.dtsi12
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi2
-rw-r--r--arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi4
-rw-r--r--arch/arm/boot/dts/omap-zoom-common.dtsi2
-rw-r--r--arch/arm/boot/dts/omap2.dtsi96
-rw-r--r--arch/arm/boot/dts/omap2420.dtsi23
-rw-r--r--arch/arm/boot/dts/omap2430.dtsi49
-rw-r--r--arch/arm/boot/dts/omap3-beagle-xm.dts7
-rw-r--r--arch/arm/boot/dts/omap3-beagle.dts21
-rw-r--r--arch/arm/boot/dts/omap3-igep.dtsi85
-rw-r--r--arch/arm/boot/dts/omap3-igep0020.dts50
-rw-r--r--arch/arm/boot/dts/omap3-igep0030.dts4
-rw-r--r--arch/arm/boot/dts/omap3-n900.dts25
-rw-r--r--arch/arm/boot/dts/omap3-n950-n9.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3.dtsi42
-rw-r--r--arch/arm/boot/dts/omap34xx-hs.dtsi16
-rw-r--r--arch/arm/boot/dts/omap36xx-hs.dtsi16
-rw-r--r--arch/arm/boot/dts/omap4-panda-common.dtsi20
-rw-r--r--arch/arm/boot/dts/omap4-sdp.dts12
-rw-r--r--arch/arm/boot/dts/socfpga.dtsi7
-rw-r--r--arch/arm/boot/dts/sun6i-a31.dtsi27
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi42
-rw-r--r--arch/arm/common/edma.c4
-rw-r--r--arch/arm/configs/multi_v7_defconfig3
-rw-r--r--arch/arm/configs/omap2plus_defconfig1
-rw-r--r--arch/arm/configs/sunxi_defconfig7
-rw-r--r--arch/arm/configs/u8500_defconfig3
-rw-r--r--arch/arm/include/asm/hardware/iop3xx-adma.h30
-rw-r--r--arch/arm/include/asm/hardware/iop_adma.h4
-rw-r--r--arch/arm/include/asm/memory.h40
-rw-r--r--arch/arm/include/asm/pgtable.h2
-rw-r--r--arch/arm/kernel/head-nommu.S4
-rw-r--r--arch/arm/kernel/head.S9
-rw-r--r--arch/arm/kernel/machine_kexec.c17
-rw-r--r--arch/arm/kernel/process.c7
-rw-r--r--arch/arm/kernel/relocate_kernel.S8
-rw-r--r--arch/arm/kernel/setup.c3
-rw-r--r--arch/arm/kernel/sigreturn_codes.S40
-rw-r--r--arch/arm/kernel/stacktrace.c2
-rw-r--r--arch/arm/kernel/traps.c5
-rw-r--r--arch/arm/kvm/mmu.c34
-rw-r--r--arch/arm/lib/bitops.h2
-rw-r--r--arch/arm/lib/delay-loop.S1
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c7
-rw-r--r--arch/arm/mach-at91/pm.h4
-rw-r--r--arch/arm/mach-at91/sama5d3.c6
-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c4
-rw-r--r--arch/arm/mach-davinci/dm355.c3
-rw-r--r--arch/arm/mach-davinci/dm365.c3
-rw-r--r--arch/arm/mach-davinci/dm644x.c3
-rw-r--r--arch/arm/mach-davinci/dm646x.c6
-rw-r--r--arch/arm/mach-footbridge/common.c3
-rw-r--r--arch/arm/mach-footbridge/dc21285.c2
-rw-r--r--arch/arm/mach-footbridge/ebsa285.c22
-rw-r--r--arch/arm/mach-highbank/highbank.c23
-rw-r--r--arch/arm/mach-iop13xx/include/mach/adma.h26
-rw-r--r--arch/arm/mach-omap2/Makefile6
-rw-r--r--arch/arm/mach-omap2/board-generic.c18
-rw-r--r--arch/arm/mach-omap2/common.h1
-rw-r--r--arch/arm/mach-omap2/display.c78
-rw-r--r--arch/arm/mach-omap2/dss-common.c2
-rw-r--r--arch/arm/mach-omap2/gpmc.c58
-rw-r--r--arch/arm/mach-omap2/omap-secure.h7
-rw-r--r--arch/arm/mach-omap2/omap4-common.c57
-rw-r--r--arch/arm/mach-omap2/omap_device.c24
-rw-r--r--arch/arm/mach-omap2/omap_device.h1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c143
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c13
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c12
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_54xx_data.c13
-rw-r--r--arch/arm/mach-omap2/pdata-quirks.c1
-rw-r--r--arch/arm/mach-omap2/pm34xx.c2
-rw-r--r--arch/arm/mach-omap2/powerdomain.c3
-rw-r--r--arch/arm/mach-omap2/prm44xx_54xx.h2
-rw-r--r--arch/arm/mach-pxa/reset.c8
-rw-r--r--arch/arm/mach-pxa/tosa.c102
-rw-r--r--arch/arm/mach-socfpga/Kconfig1
-rw-r--r--arch/arm/mach-tegra/fuse.c12
-rw-r--r--arch/arm/mach-ux500/cpu-db8500.c4
-rw-r--r--arch/arm/mach-vexpress/spc.c40
-rw-r--r--arch/arm/mach-vexpress/spc.h1
-rw-r--r--arch/arm/mach-vexpress/tc2_pm.c66
-rw-r--r--arch/arm/mm/dma-mapping.c88
-rw-r--r--arch/arm/mm/init.c2
-rw-r--r--arch/arm/mm/mmap.c2
-rw-r--r--arch/arm/mm/mmu.c4
-rw-r--r--arch/arm/mm/nommu.c1
-rw-r--r--arch/arm/mm/pgd.c3
-rw-r--r--arch/arm/mm/proc-v7.S17
-rw-r--r--arch/arm/plat-omap/include/plat/dmtimer.h5
-rw-r--r--arch/arm/xen/p2m.c5
102 files changed, 1431 insertions, 632 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 214b698cefea..c1f1a7eee953 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -25,7 +25,7 @@ config ARM
25 select HARDIRQS_SW_RESEND 25 select HARDIRQS_SW_RESEND
26 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL 26 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
27 select HAVE_ARCH_KGDB 27 select HAVE_ARCH_KGDB
28 select HAVE_ARCH_SECCOMP_FILTER 28 select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)
29 select HAVE_ARCH_TRACEHOOK 29 select HAVE_ARCH_TRACEHOOK
30 select HAVE_BPF_JIT 30 select HAVE_BPF_JIT
31 select HAVE_CONTEXT_TRACKING 31 select HAVE_CONTEXT_TRACKING
@@ -1496,6 +1496,7 @@ config HAVE_ARM_ARCH_TIMER
1496 bool "Architected timer support" 1496 bool "Architected timer support"
1497 depends on CPU_V7 1497 depends on CPU_V7
1498 select ARM_ARCH_TIMER 1498 select ARM_ARCH_TIMER
1499 select GENERIC_CLOCKEVENTS
1499 help 1500 help
1500 This option enables support for the ARM architected timer 1501 This option enables support for the ARM architected timer
1501 1502
@@ -1719,7 +1720,6 @@ config AEABI
1719config OABI_COMPAT 1720config OABI_COMPAT
1720 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" 1721 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1721 depends on AEABI && !THUMB2_KERNEL 1722 depends on AEABI && !THUMB2_KERNEL
1722 default y
1723 help 1723 help
1724 This option preserves the old syscall interface along with the 1724 This option preserves the old syscall interface along with the
1725 new (ARM EABI) one. It also provides a compatibility layer to 1725 new (ARM EABI) one. It also provides a compatibility layer to
@@ -1727,11 +1727,16 @@ config OABI_COMPAT
1727 in memory differs between the legacy ABI and the new ARM EABI 1727 in memory differs between the legacy ABI and the new ARM EABI
1728 (only for non "thumb" binaries). This option adds a tiny 1728 (only for non "thumb" binaries). This option adds a tiny
1729 overhead to all syscalls and produces a slightly larger kernel. 1729 overhead to all syscalls and produces a slightly larger kernel.
1730
1731 The seccomp filter system will not be available when this is
1732 selected, since there is no way yet to sensibly distinguish
1733 between calling conventions during filtering.
1734
1730 If you know you'll be using only pure EABI user space then you 1735 If you know you'll be using only pure EABI user space then you
1731 can say N here. If this option is not selected and you attempt 1736 can say N here. If this option is not selected and you attempt
1732 to execute a legacy ABI binary then the result will be 1737 to execute a legacy ABI binary then the result will be
1733 UNPREDICTABLE (in fact it can be predicted that it won't work 1738 UNPREDICTABLE (in fact it can be predicted that it won't work
1734 at all). If in doubt say Y. 1739 at all). If in doubt say N.
1735 1740
1736config ARCH_HAS_HOLES_MEMORYMODEL 1741config ARCH_HAS_HOLES_MEMORYMODEL
1737 bool 1742 bool
diff --git a/arch/arm/boot/dts/am335x-base0033.dts b/arch/arm/boot/dts/am335x-base0033.dts
index b4f95c2bbf74..72a9b3fc4251 100644
--- a/arch/arm/boot/dts/am335x-base0033.dts
+++ b/arch/arm/boot/dts/am335x-base0033.dts
@@ -13,4 +13,83 @@
13/ { 13/ {
14 model = "IGEP COM AM335x on AQUILA Expansion"; 14 model = "IGEP COM AM335x on AQUILA Expansion";
15 compatible = "isee,am335x-base0033", "isee,am335x-igep0033", "ti,am33xx"; 15 compatible = "isee,am335x-base0033", "isee,am335x-igep0033", "ti,am33xx";
16
17 hdmi {
18 compatible = "ti,tilcdc,slave";
19 i2c = <&i2c0>;
20 pinctrl-names = "default", "off";
21 pinctrl-0 = <&nxp_hdmi_pins>;
22 pinctrl-1 = <&nxp_hdmi_off_pins>;
23 status = "okay";
24 };
25
26 leds_base {
27 pinctrl-names = "default";
28 pinctrl-0 = <&leds_base_pins>;
29
30 compatible = "gpio-leds";
31
32 led@0 {
33 label = "base:red:user";
34 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; /* gpio1_21 */
35 default-state = "off";
36 };
37
38 led@1 {
39 label = "base:green:user";
40 gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>; /* gpio2_0 */
41 default-state = "off";
42 };
43 };
44};
45
46&am33xx_pinmux {
47 nxp_hdmi_pins: pinmux_nxp_hdmi_pins {
48 pinctrl-single,pins = <
49 0x1b0 (PIN_OUTPUT | MUX_MODE3) /* xdma_event_intr0.clkout1 */
50 0xa0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data0 */
51 0xa4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data1 */
52 0xa8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data2 */
53 0xac (PIN_OUTPUT | MUX_MODE0) /* lcd_data3 */
54 0xb0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data4 */
55 0xb4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data5 */
56 0xb8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data6 */
57 0xbc (PIN_OUTPUT | MUX_MODE0) /* lcd_data7 */
58 0xc0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data8 */
59 0xc4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data9 */
60 0xc8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data10 */
61 0xcc (PIN_OUTPUT | MUX_MODE0) /* lcd_data11 */
62 0xd0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data12 */
63 0xd4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data13 */
64 0xd8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data14 */
65 0xdc (PIN_OUTPUT | MUX_MODE0) /* lcd_data15 */
66 0xe0 (PIN_OUTPUT | MUX_MODE0) /* lcd_vsync */
67 0xe4 (PIN_OUTPUT | MUX_MODE0) /* lcd_hsync */
68 0xe8 (PIN_OUTPUT | MUX_MODE0) /* lcd_pclk */
69 0xec (PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en */
70 >;
71 };
72 nxp_hdmi_off_pins: pinmux_nxp_hdmi_off_pins {
73 pinctrl-single,pins = <
74 0x1b0 (PIN_OUTPUT | MUX_MODE3) /* xdma_event_intr0.clkout1 */
75 >;
76 };
77
78 leds_base_pins: pinmux_leds_base_pins {
79 pinctrl-single,pins = <
80 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
81 0x88 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn3.gpio2_0 */
82 >;
83 };
84};
85
86&lcdc {
87 status = "okay";
88};
89
90&i2c0 {
91 eeprom: eeprom@50 {
92 compatible = "at,24c256";
93 reg = <0x50>;
94 };
16}; 95};
diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi
index 619624479311..7063311a58d9 100644
--- a/arch/arm/boot/dts/am335x-igep0033.dtsi
+++ b/arch/arm/boot/dts/am335x-igep0033.dtsi
@@ -199,6 +199,35 @@
199 pinctrl-0 = <&uart0_pins>; 199 pinctrl-0 = <&uart0_pins>;
200}; 200};
201 201
202&usb {
203 status = "okay";
204
205 control@44e10000 {
206 status = "okay";
207 };
208
209 usb-phy@47401300 {
210 status = "okay";
211 };
212
213 usb-phy@47401b00 {
214 status = "okay";
215 };
216
217 usb@47401000 {
218 status = "okay";
219 };
220
221 usb@47401800 {
222 status = "okay";
223 dr_mode = "host";
224 };
225
226 dma-controller@07402000 {
227 status = "okay";
228 };
229};
230
202#include "tps65910.dtsi" 231#include "tps65910.dtsi"
203 232
204&tps { 233&tps {
diff --git a/arch/arm/boot/dts/am3517-evm.dts b/arch/arm/boot/dts/am3517-evm.dts
index e99dfaf70052..03fcbf0a88a8 100644
--- a/arch/arm/boot/dts/am3517-evm.dts
+++ b/arch/arm/boot/dts/am3517-evm.dts
@@ -7,11 +7,11 @@
7 */ 7 */
8/dts-v1/; 8/dts-v1/;
9 9
10#include "omap34xx.dtsi" 10#include "am3517.dtsi"
11 11
12/ { 12/ {
13 model = "TI AM3517 EVM (AM3517/05)"; 13 model = "TI AM3517 EVM (AM3517/05 TMDSEVM3517)";
14 compatible = "ti,am3517-evm", "ti,omap3"; 14 compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3";
15 15
16 memory { 16 memory {
17 device_type = "memory"; 17 device_type = "memory";
diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi
new file mode 100644
index 000000000000..2fbe02faa8b1
--- /dev/null
+++ b/arch/arm/boot/dts/am3517.dtsi
@@ -0,0 +1,63 @@
1/*
2 * Device Tree Source for am3517 SoC
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#include "omap3.dtsi"
12
13/ {
14 aliases {
15 serial3 = &uart4;
16 };
17
18 ocp {
19 am35x_otg_hs: am35x_otg_hs@5c040000 {
20 compatible = "ti,omap3-musb";
21 ti,hwmods = "am35x_otg_hs";
22 status = "disabled";
23 reg = <0x5c040000 0x1000>;
24 interrupts = <71>;
25 interrupt-names = "mc";
26 };
27
28 davinci_emac: ethernet@0x5c000000 {
29 compatible = "ti,am3517-emac";
30 ti,hwmods = "davinci_emac";
31 status = "disabled";
32 reg = <0x5c000000 0x30000>;
33 interrupts = <67 68 69 70>;
34 ti,davinci-ctrl-reg-offset = <0x10000>;
35 ti,davinci-ctrl-mod-reg-offset = <0>;
36 ti,davinci-ctrl-ram-offset = <0x20000>;
37 ti,davinci-ctrl-ram-size = <0x2000>;
38 ti,davinci-rmii-en = /bits/ 8 <1>;
39 local-mac-address = [ 00 00 00 00 00 00 ];
40 };
41
42 davinci_mdio: ethernet@0x5c030000 {
43 compatible = "ti,davinci_mdio";
44 ti,hwmods = "davinci_mdio";
45 status = "disabled";
46 reg = <0x5c030000 0x1000>;
47 bus_freq = <1000000>;
48 #address-cells = <1>;
49 #size-cells = <0>;
50 };
51
52 uart4: serial@4809e000 {
53 compatible = "ti,omap3-uart";
54 ti,hwmods = "uart4";
55 status = "disabled";
56 reg = <0x4809e000 0x400>;
57 interrupts = <84>;
58 dmas = <&sdma 55 &sdma 54>;
59 dma-names = "tx", "rx";
60 clock-frequency = <48000000>;
61 };
62 };
63};
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index 90ce29dbe119..08a56bcfc724 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -99,22 +99,22 @@
99 spi-max-frequency = <50000000>; 99 spi-max-frequency = <50000000>;
100 }; 100 };
101 }; 101 };
102 };
102 103
103 pcie-controller { 104 pcie-controller {
105 status = "okay";
106 /*
107 * The two PCIe units are accessible through
108 * both standard PCIe slots and mini-PCIe
109 * slots on the board.
110 */
111 pcie@1,0 {
112 /* Port 0, Lane 0 */
113 status = "okay";
114 };
115 pcie@2,0 {
116 /* Port 1, Lane 0 */
104 status = "okay"; 117 status = "okay";
105 /*
106 * The two PCIe units are accessible through
107 * both standard PCIe slots and mini-PCIe
108 * slots on the board.
109 */
110 pcie@1,0 {
111 /* Port 0, Lane 0 */
112 status = "okay";
113 };
114 pcie@2,0 {
115 /* Port 1, Lane 0 */
116 status = "okay";
117 };
118 }; 118 };
119 }; 119 };
120 }; 120 };
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 00d6a798c705..7f10f627ae5b 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -118,7 +118,7 @@
118 118
119 coherency-fabric@20200 { 119 coherency-fabric@20200 {
120 compatible = "marvell,coherency-fabric"; 120 compatible = "marvell,coherency-fabric";
121 reg = <0x20200 0xb0>, <0x21810 0x1c>; 121 reg = <0x20200 0xb0>, <0x21010 0x1c>;
122 }; 122 };
123 123
124 serial@12000 { 124 serial@12000 {
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index 3f5e6121c730..98335fb34b7a 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -47,7 +47,7 @@
47 /* 47 /*
48 * MV78230 has 2 PCIe units Gen2.0: One unit can be 48 * MV78230 has 2 PCIe units Gen2.0: One unit can be
49 * configured as x4 or quad x1 lanes. One unit is 49 * configured as x4 or quad x1 lanes. One unit is
50 * x4/x1. 50 * x1 only.
51 */ 51 */
52 pcie-controller { 52 pcie-controller {
53 compatible = "marvell,armada-xp-pcie"; 53 compatible = "marvell,armada-xp-pcie";
@@ -62,10 +62,10 @@
62 62
63 ranges = 63 ranges =
64 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */ 64 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
65 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
66 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */ 65 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
67 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */ 66 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
68 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */ 67 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
68 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */
69 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 69 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
70 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */ 70 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
71 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */ 71 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */
@@ -74,8 +74,8 @@
74 0x81000000 0x3 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO */ 74 0x81000000 0x3 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO */
75 0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */ 75 0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */
76 0x81000000 0x4 0 MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO */ 76 0x81000000 0x4 0 MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO */
77 0x82000000 0x9 0 MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */ 77 0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
78 0x81000000 0x9 0 MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO */>; 78 0x81000000 0x5 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */>;
79 79
80 pcie@1,0 { 80 pcie@1,0 {
81 device_type = "pci"; 81 device_type = "pci";
@@ -145,20 +145,20 @@
145 status = "disabled"; 145 status = "disabled";
146 }; 146 };
147 147
148 pcie@9,0 { 148 pcie@5,0 {
149 device_type = "pci"; 149 device_type = "pci";
150 assigned-addresses = <0x82000800 0 0x42000 0 0x2000>; 150 assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
151 reg = <0x4800 0 0 0 0>; 151 reg = <0x2800 0 0 0 0>;
152 #address-cells = <3>; 152 #address-cells = <3>;
153 #size-cells = <2>; 153 #size-cells = <2>;
154 #interrupt-cells = <1>; 154 #interrupt-cells = <1>;
155 ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0 155 ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
156 0x81000000 0 0 0x81000000 0x9 0 1 0>; 156 0x81000000 0 0 0x81000000 0x5 0 1 0>;
157 interrupt-map-mask = <0 0 0 0>; 157 interrupt-map-mask = <0 0 0 0>;
158 interrupt-map = <0 0 0 0 &mpic 99>; 158 interrupt-map = <0 0 0 0 &mpic 62>;
159 marvell,pcie-port = <2>; 159 marvell,pcie-port = <1>;
160 marvell,pcie-lane = <0>; 160 marvell,pcie-lane = <0>;
161 clocks = <&gateclk 26>; 161 clocks = <&gateclk 9>;
162 status = "disabled"; 162 status = "disabled";
163 }; 163 };
164 }; 164 };
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index 3e9fd1353f89..66609684d41b 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -48,7 +48,7 @@
48 /* 48 /*
49 * MV78260 has 3 PCIe units Gen2.0: Two units can be 49 * MV78260 has 3 PCIe units Gen2.0: Two units can be
50 * configured as x4 or quad x1 lanes. One unit is 50 * configured as x4 or quad x1 lanes. One unit is
51 * x4/x1. 51 * x4 only.
52 */ 52 */
53 pcie-controller { 53 pcie-controller {
54 compatible = "marvell,armada-xp-pcie"; 54 compatible = "marvell,armada-xp-pcie";
@@ -68,7 +68,9 @@
68 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */ 68 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
69 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */ 69 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
70 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */ 70 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */
71 0x82000000 0 0x82000 MBUS_ID(0xf0, 0x01) 0x82000 0 0x00002000 /* Port 3.0 registers */ 71 0x82000000 0 0x84000 MBUS_ID(0xf0, 0x01) 0x84000 0 0x00002000 /* Port 1.1 registers */
72 0x82000000 0 0x88000 MBUS_ID(0xf0, 0x01) 0x88000 0 0x00002000 /* Port 1.2 registers */
73 0x82000000 0 0x8c000 MBUS_ID(0xf0, 0x01) 0x8c000 0 0x00002000 /* Port 1.3 registers */
72 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 74 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
73 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */ 75 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
74 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */ 76 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */
@@ -77,10 +79,18 @@
77 0x81000000 0x3 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO */ 79 0x81000000 0x3 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO */
78 0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */ 80 0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */
79 0x81000000 0x4 0 MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO */ 81 0x81000000 0x4 0 MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO */
80 0x82000000 0x9 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */ 82
81 0x81000000 0x9 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */ 83 0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
82 0x82000000 0xa 0 MBUS_ID(0x08, 0xf8) 0 1 0 /* Port 3.0 MEM */ 84 0x81000000 0x5 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */
83 0x81000000 0xa 0 MBUS_ID(0x08, 0xf0) 0 1 0 /* Port 3.0 IO */>; 85 0x82000000 0x6 0 MBUS_ID(0x08, 0xd8) 0 1 0 /* Port 1.1 MEM */
86 0x81000000 0x6 0 MBUS_ID(0x08, 0xd0) 0 1 0 /* Port 1.1 IO */
87 0x82000000 0x7 0 MBUS_ID(0x08, 0xb8) 0 1 0 /* Port 1.2 MEM */
88 0x81000000 0x7 0 MBUS_ID(0x08, 0xb0) 0 1 0 /* Port 1.2 IO */
89 0x82000000 0x8 0 MBUS_ID(0x08, 0x78) 0 1 0 /* Port 1.3 MEM */
90 0x81000000 0x8 0 MBUS_ID(0x08, 0x70) 0 1 0 /* Port 1.3 IO */
91
92 0x82000000 0x9 0 MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */
93 0x81000000 0x9 0 MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO */>;
84 94
85 pcie@1,0 { 95 pcie@1,0 {
86 device_type = "pci"; 96 device_type = "pci";
@@ -106,8 +116,8 @@
106 #address-cells = <3>; 116 #address-cells = <3>;
107 #size-cells = <2>; 117 #size-cells = <2>;
108 #interrupt-cells = <1>; 118 #interrupt-cells = <1>;
109 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 119 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
110 0x81000000 0 0 0x81000000 0x2 0 1 0>; 120 0x81000000 0 0 0x81000000 0x2 0 1 0>;
111 interrupt-map-mask = <0 0 0 0>; 121 interrupt-map-mask = <0 0 0 0>;
112 interrupt-map = <0 0 0 0 &mpic 59>; 122 interrupt-map = <0 0 0 0 &mpic 59>;
113 marvell,pcie-port = <0>; 123 marvell,pcie-port = <0>;
@@ -150,37 +160,88 @@
150 status = "disabled"; 160 status = "disabled";
151 }; 161 };
152 162
153 pcie@9,0 { 163 pcie@5,0 {
154 device_type = "pci"; 164 device_type = "pci";
155 assigned-addresses = <0x82000800 0 0x42000 0 0x2000>; 165 assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
156 reg = <0x4800 0 0 0 0>; 166 reg = <0x2800 0 0 0 0>;
157 #address-cells = <3>; 167 #address-cells = <3>;
158 #size-cells = <2>; 168 #size-cells = <2>;
159 #interrupt-cells = <1>; 169 #interrupt-cells = <1>;
160 ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0 170 ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
161 0x81000000 0 0 0x81000000 0x9 0 1 0>; 171 0x81000000 0 0 0x81000000 0x5 0 1 0>;
162 interrupt-map-mask = <0 0 0 0>; 172 interrupt-map-mask = <0 0 0 0>;
163 interrupt-map = <0 0 0 0 &mpic 99>; 173 interrupt-map = <0 0 0 0 &mpic 62>;
164 marvell,pcie-port = <2>; 174 marvell,pcie-port = <1>;
165 marvell,pcie-lane = <0>; 175 marvell,pcie-lane = <0>;
166 clocks = <&gateclk 26>; 176 clocks = <&gateclk 9>;
167 status = "disabled"; 177 status = "disabled";
168 }; 178 };
169 179
170 pcie@10,0 { 180 pcie@6,0 {
171 device_type = "pci"; 181 device_type = "pci";
172 assigned-addresses = <0x82000800 0 0x82000 0 0x2000>; 182 assigned-addresses = <0x82000800 0 0x84000 0 0x2000>;
173 reg = <0x5000 0 0 0 0>; 183 reg = <0x3000 0 0 0 0>;
174 #address-cells = <3>; 184 #address-cells = <3>;
175 #size-cells = <2>; 185 #size-cells = <2>;
176 #interrupt-cells = <1>; 186 #interrupt-cells = <1>;
177 ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0 187 ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0
178 0x81000000 0 0 0x81000000 0xa 0 1 0>; 188 0x81000000 0 0 0x81000000 0x6 0 1 0>;
179 interrupt-map-mask = <0 0 0 0>; 189 interrupt-map-mask = <0 0 0 0>;
180 interrupt-map = <0 0 0 0 &mpic 103>; 190 interrupt-map = <0 0 0 0 &mpic 63>;
181 marvell,pcie-port = <3>; 191 marvell,pcie-port = <1>;
192 marvell,pcie-lane = <1>;
193 clocks = <&gateclk 10>;
194 status = "disabled";
195 };
196
197 pcie@7,0 {
198 device_type = "pci";
199 assigned-addresses = <0x82000800 0 0x88000 0 0x2000>;
200 reg = <0x3800 0 0 0 0>;
201 #address-cells = <3>;
202 #size-cells = <2>;
203 #interrupt-cells = <1>;
204 ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0
205 0x81000000 0 0 0x81000000 0x7 0 1 0>;
206 interrupt-map-mask = <0 0 0 0>;
207 interrupt-map = <0 0 0 0 &mpic 64>;
208 marvell,pcie-port = <1>;
209 marvell,pcie-lane = <2>;
210 clocks = <&gateclk 11>;
211 status = "disabled";
212 };
213
214 pcie@8,0 {
215 device_type = "pci";
216 assigned-addresses = <0x82000800 0 0x8c000 0 0x2000>;
217 reg = <0x4000 0 0 0 0>;
218 #address-cells = <3>;
219 #size-cells = <2>;
220 #interrupt-cells = <1>;
221 ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0
222 0x81000000 0 0 0x81000000 0x8 0 1 0>;
223 interrupt-map-mask = <0 0 0 0>;
224 interrupt-map = <0 0 0 0 &mpic 65>;
225 marvell,pcie-port = <1>;
226 marvell,pcie-lane = <3>;
227 clocks = <&gateclk 12>;
228 status = "disabled";
229 };
230
231 pcie@9,0 {
232 device_type = "pci";
233 assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
234 reg = <0x4800 0 0 0 0>;
235 #address-cells = <3>;
236 #size-cells = <2>;
237 #interrupt-cells = <1>;
238 ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
239 0x81000000 0 0 0x81000000 0x9 0 1 0>;
240 interrupt-map-mask = <0 0 0 0>;
241 interrupt-map = <0 0 0 0 &mpic 99>;
242 marvell,pcie-port = <2>;
182 marvell,pcie-lane = <0>; 243 marvell,pcie-lane = <0>;
183 clocks = <&gateclk 27>; 244 clocks = <&gateclk 26>;
184 status = "disabled"; 245 status = "disabled";
185 }; 246 };
186 }; 247 };
diff --git a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
index 2347e9563cef..6801106fa1f8 100644
--- a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
@@ -11,6 +11,10 @@
11#include <dt-bindings/interrupt-controller/irq.h> 11#include <dt-bindings/interrupt-controller/irq.h>
12 12
13/ { 13/ {
14 aliases {
15 serial4 = &usart3;
16 };
17
14 ahb { 18 ahb {
15 apb { 19 apb {
16 pinctrl@fffff400 { 20 pinctrl@fffff400 {
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 1e12aeff403b..aa537ed13f0a 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -85,6 +85,8 @@
85 reg = <0x7e205000 0x1000>; 85 reg = <0x7e205000 0x1000>;
86 interrupts = <2 21>; 86 interrupts = <2 21>;
87 clocks = <&clk_i2c>; 87 clocks = <&clk_i2c>;
88 #address-cells = <1>;
89 #size-cells = <0>;
88 status = "disabled"; 90 status = "disabled";
89 }; 91 };
90 92
@@ -93,6 +95,8 @@
93 reg = <0x7e804000 0x1000>; 95 reg = <0x7e804000 0x1000>;
94 interrupts = <2 21>; 96 interrupts = <2 21>;
95 clocks = <&clk_i2c>; 97 clocks = <&clk_i2c>;
98 #address-cells = <1>;
99 #size-cells = <0>;
96 status = "disabled"; 100 status = "disabled";
97 }; 101 };
98 102
diff --git a/arch/arm/boot/dts/cros5250-common.dtsi b/arch/arm/boot/dts/cros5250-common.dtsi
index dc259e8b8a73..9b186ac06c8b 100644
--- a/arch/arm/boot/dts/cros5250-common.dtsi
+++ b/arch/arm/boot/dts/cros5250-common.dtsi
@@ -27,6 +27,13 @@
27 i2c2_bus: i2c2-bus { 27 i2c2_bus: i2c2-bus {
28 samsung,pin-pud = <0>; 28 samsung,pin-pud = <0>;
29 }; 29 };
30
31 max77686_irq: max77686-irq {
32 samsung,pins = "gpx3-2";
33 samsung,pin-function = <0>;
34 samsung,pin-pud = <0>;
35 samsung,pin-drv = <0>;
36 };
30 }; 37 };
31 38
32 i2c@12C60000 { 39 i2c@12C60000 {
@@ -35,6 +42,11 @@
35 42
36 max77686@09 { 43 max77686@09 {
37 compatible = "maxim,max77686"; 44 compatible = "maxim,max77686";
45 interrupt-parent = <&gpx3>;
46 interrupts = <2 0>;
47 pinctrl-names = "default";
48 pinctrl-0 = <&max77686_irq>;
49 wakeup-source;
38 reg = <0x09>; 50 reg = <0x09>;
39 51
40 voltage-regulators { 52 voltage-regulators {
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 59154dc15fe4..fb28b2ecb1db 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -161,7 +161,7 @@
161 clocks = <&clks 197>, <&clks 3>, 161 clocks = <&clks 197>, <&clks 3>,
162 <&clks 197>, <&clks 107>, 162 <&clks 197>, <&clks 107>,
163 <&clks 0>, <&clks 118>, 163 <&clks 0>, <&clks 118>,
164 <&clks 62>, <&clks 139>, 164 <&clks 0>, <&clks 139>,
165 <&clks 0>; 165 <&clks 0>;
166 clock-names = "core", "rxtx0", 166 clock-names = "core", "rxtx0",
167 "rxtx1", "rxtx2", 167 "rxtx1", "rxtx2",
diff --git a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
index 9c18adf788f7..f577b7df9a29 100644
--- a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
+++ b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
@@ -44,8 +44,8 @@
44 gpmc,wr-access-ns = <186>; 44 gpmc,wr-access-ns = <186>;
45 gpmc,cycle2cycle-samecsen; 45 gpmc,cycle2cycle-samecsen;
46 gpmc,cycle2cycle-diffcsen; 46 gpmc,cycle2cycle-diffcsen;
47 vmmc-supply = <&vddvario>; 47 vddvario-supply = <&vddvario>;
48 vmmc_aux-supply = <&vdd33a>; 48 vdd33a-supply = <&vdd33a>;
49 reg-io-width = <4>; 49 reg-io-width = <4>;
50 smsc,save-mac-address; 50 smsc,save-mac-address;
51 }; 51 };
diff --git a/arch/arm/boot/dts/omap-zoom-common.dtsi b/arch/arm/boot/dts/omap-zoom-common.dtsi
index b0ee342598f0..68221fab978d 100644
--- a/arch/arm/boot/dts/omap-zoom-common.dtsi
+++ b/arch/arm/boot/dts/omap-zoom-common.dtsi
@@ -13,7 +13,7 @@
13 * they probably share the same GPIO IRQ 13 * they probably share the same GPIO IRQ
14 * REVISIT: Add timing support from slls644g.pdf 14 * REVISIT: Add timing support from slls644g.pdf
15 */ 15 */
16 8250@3,0 { 16 uart@3,0 {
17 compatible = "ns16550a"; 17 compatible = "ns16550a";
18 reg = <3 0 0x100>; 18 reg = <3 0 0x100>;
19 bank-width = <2>; 19 bank-width = <2>;
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index a2bfcde858a6..d0c5b37e248c 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -9,6 +9,7 @@
9 */ 9 */
10 10
11#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/pinctrl/omap.h> 13#include <dt-bindings/pinctrl/omap.h>
13 14
14#include "skeleton.dtsi" 15#include "skeleton.dtsi"
@@ -21,6 +22,8 @@
21 serial0 = &uart1; 22 serial0 = &uart1;
22 serial1 = &uart2; 23 serial1 = &uart2;
23 serial2 = &uart3; 24 serial2 = &uart3;
25 i2c0 = &i2c1;
26 i2c1 = &i2c2;
24 }; 27 };
25 28
26 cpus { 29 cpus {
@@ -53,6 +56,28 @@
53 ranges; 56 ranges;
54 ti,hwmods = "l3_main"; 57 ti,hwmods = "l3_main";
55 58
59 aes: aes@480a6000 {
60 compatible = "ti,omap2-aes";
61 ti,hwmods = "aes";
62 reg = <0x480a6000 0x50>;
63 dmas = <&sdma 9 &sdma 10>;
64 dma-names = "tx", "rx";
65 };
66
67 hdq1w: 1w@480b2000 {
68 compatible = "ti,omap2420-1w";
69 ti,hwmods = "hdq1w";
70 reg = <0x480b2000 0x1000>;
71 interrupts = <58>;
72 };
73
74 mailbox: mailbox@48094000 {
75 compatible = "ti,omap2-mailbox";
76 ti,hwmods = "mailbox";
77 reg = <0x48094000 0x200>;
78 interrupts = <26>;
79 };
80
56 intc: interrupt-controller@1 { 81 intc: interrupt-controller@1 {
57 compatible = "ti,omap2-intc"; 82 compatible = "ti,omap2-intc";
58 interrupt-controller; 83 interrupt-controller;
@@ -63,6 +88,7 @@
63 88
64 sdma: dma-controller@48056000 { 89 sdma: dma-controller@48056000 {
65 compatible = "ti,omap2430-sdma", "ti,omap2420-sdma"; 90 compatible = "ti,omap2430-sdma", "ti,omap2420-sdma";
91 ti,hwmods = "dma";
66 reg = <0x48056000 0x1000>; 92 reg = <0x48056000 0x1000>;
67 interrupts = <12>, 93 interrupts = <12>,
68 <13>, 94 <13>,
@@ -73,21 +99,91 @@
73 #dma-requests = <64>; 99 #dma-requests = <64>;
74 }; 100 };
75 101
102 i2c1: i2c@48070000 {
103 compatible = "ti,omap2-i2c";
104 ti,hwmods = "i2c1";
105 reg = <0x48070000 0x80>;
106 #address-cells = <1>;
107 #size-cells = <0>;
108 interrupts = <56>;
109 dmas = <&sdma 27 &sdma 28>;
110 dma-names = "tx", "rx";
111 };
112
113 i2c2: i2c@48072000 {
114 compatible = "ti,omap2-i2c";
115 ti,hwmods = "i2c2";
116 reg = <0x48072000 0x80>;
117 #address-cells = <1>;
118 #size-cells = <0>;
119 interrupts = <57>;
120 dmas = <&sdma 29 &sdma 30>;
121 dma-names = "tx", "rx";
122 };
123
124 mcspi1: mcspi@48098000 {
125 compatible = "ti,omap2-mcspi";
126 ti,hwmods = "mcspi1";
127 reg = <0x48098000 0x100>;
128 interrupts = <65>;
129 dmas = <&sdma 35 &sdma 36 &sdma 37 &sdma 38
130 &sdma 39 &sdma 40 &sdma 41 &sdma 42>;
131 dma-names = "tx0", "rx0", "tx1", "rx1",
132 "tx2", "rx2", "tx3", "rx3";
133 };
134
135 mcspi2: mcspi@4809a000 {
136 compatible = "ti,omap2-mcspi";
137 ti,hwmods = "mcspi2";
138 reg = <0x4809a000 0x100>;
139 interrupts = <66>;
140 dmas = <&sdma 43 &sdma 44 &sdma 45 &sdma 46>;
141 dma-names = "tx0", "rx0", "tx1", "rx1";
142 };
143
144 rng: rng@480a0000 {
145 compatible = "ti,omap2-rng";
146 ti,hwmods = "rng";
147 reg = <0x480a0000 0x50>;
148 interrupts = <36>;
149 };
150
151 sham: sham@480a4000 {
152 compatible = "ti,omap2-sham";
153 ti,hwmods = "sham";
154 reg = <0x480a4000 0x64>;
155 interrupts = <51>;
156 dmas = <&sdma 13>;
157 dma-names = "rx";
158 };
159
76 uart1: serial@4806a000 { 160 uart1: serial@4806a000 {
77 compatible = "ti,omap2-uart"; 161 compatible = "ti,omap2-uart";
78 ti,hwmods = "uart1"; 162 ti,hwmods = "uart1";
163 reg = <0x4806a000 0x2000>;
164 interrupts = <72>;
165 dmas = <&sdma 49 &sdma 50>;
166 dma-names = "tx", "rx";
79 clock-frequency = <48000000>; 167 clock-frequency = <48000000>;
80 }; 168 };
81 169
82 uart2: serial@4806c000 { 170 uart2: serial@4806c000 {
83 compatible = "ti,omap2-uart"; 171 compatible = "ti,omap2-uart";
84 ti,hwmods = "uart2"; 172 ti,hwmods = "uart2";
173 reg = <0x4806c000 0x400>;
174 interrupts = <73>;
175 dmas = <&sdma 51 &sdma 52>;
176 dma-names = "tx", "rx";
85 clock-frequency = <48000000>; 177 clock-frequency = <48000000>;
86 }; 178 };
87 179
88 uart3: serial@4806e000 { 180 uart3: serial@4806e000 {
89 compatible = "ti,omap2-uart"; 181 compatible = "ti,omap2-uart";
90 ti,hwmods = "uart3"; 182 ti,hwmods = "uart3";
183 reg = <0x4806e000 0x400>;
184 interrupts = <74>;
185 dmas = <&sdma 53 &sdma 54>;
186 dma-names = "tx", "rx";
91 clock-frequency = <48000000>; 187 clock-frequency = <48000000>;
92 }; 188 };
93 189
diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi
index c8f9c55169ea..60c605de22dd 100644
--- a/arch/arm/boot/dts/omap2420.dtsi
+++ b/arch/arm/boot/dts/omap2420.dtsi
@@ -114,6 +114,15 @@
114 dma-names = "tx", "rx"; 114 dma-names = "tx", "rx";
115 }; 115 };
116 116
117 msdi1: mmc@4809c000 {
118 compatible = "ti,omap2420-mmc";
119 ti,hwmods = "msdi1";
120 reg = <0x4809c000 0x80>;
121 interrupts = <83>;
122 dmas = <&sdma 61 &sdma 62>;
123 dma-names = "tx", "rx";
124 };
125
117 timer1: timer@48028000 { 126 timer1: timer@48028000 {
118 compatible = "ti,omap2420-timer"; 127 compatible = "ti,omap2420-timer";
119 reg = <0x48028000 0x400>; 128 reg = <0x48028000 0x400>;
@@ -121,5 +130,19 @@
121 ti,hwmods = "timer1"; 130 ti,hwmods = "timer1";
122 ti,timer-alwon; 131 ti,timer-alwon;
123 }; 132 };
133
134 wd_timer2: wdt@48022000 {
135 compatible = "ti,omap2-wdt";
136 ti,hwmods = "wd_timer2";
137 reg = <0x48022000 0x80>;
138 };
124 }; 139 };
125}; 140};
141
142&i2c1 {
143 compatible = "ti,omap2420-i2c";
144};
145
146&i2c2 {
147 compatible = "ti,omap2420-i2c";
148};
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi
index c535a5a2b27f..d624345666f5 100644
--- a/arch/arm/boot/dts/omap2430.dtsi
+++ b/arch/arm/boot/dts/omap2430.dtsi
@@ -175,6 +175,25 @@
175 dma-names = "tx", "rx"; 175 dma-names = "tx", "rx";
176 }; 176 };
177 177
178 mmc1: mmc@4809c000 {
179 compatible = "ti,omap2-hsmmc";
180 reg = <0x4809c000 0x200>;
181 interrupts = <83>;
182 ti,hwmods = "mmc1";
183 ti,dual-volt;
184 dmas = <&sdma 61>, <&sdma 62>;
185 dma-names = "tx", "rx";
186 };
187
188 mmc2: mmc@480b4000 {
189 compatible = "ti,omap2-hsmmc";
190 reg = <0x480b4000 0x200>;
191 interrupts = <86>;
192 ti,hwmods = "mmc2";
193 dmas = <&sdma 47>, <&sdma 48>;
194 dma-names = "tx", "rx";
195 };
196
178 timer1: timer@49018000 { 197 timer1: timer@49018000 {
179 compatible = "ti,omap2420-timer"; 198 compatible = "ti,omap2420-timer";
180 reg = <0x49018000 0x400>; 199 reg = <0x49018000 0x400>;
@@ -182,5 +201,35 @@
182 ti,hwmods = "timer1"; 201 ti,hwmods = "timer1";
183 ti,timer-alwon; 202 ti,timer-alwon;
184 }; 203 };
204
205 mcspi3: mcspi@480b8000 {
206 compatible = "ti,omap2-mcspi";
207 ti,hwmods = "mcspi3";
208 reg = <0x480b8000 0x100>;
209 interrupts = <91>;
210 dmas = <&sdma 15 &sdma 16 &sdma 23 &sdma 24>;
211 dma-names = "tx0", "rx0", "tx1", "rx1";
212 };
213
214 usb_otg_hs: usb_otg_hs@480ac000 {
215 compatible = "ti,omap2-musb";
216 ti,hwmods = "usb_otg_hs";
217 reg = <0x480ac000 0x1000>;
218 interrupts = <93>;
219 };
220
221 wd_timer2: wdt@49016000 {
222 compatible = "ti,omap2-wdt";
223 ti,hwmods = "wd_timer2";
224 reg = <0x49016000 0x80>;
225 };
185 }; 226 };
186}; 227};
228
229&i2c1 {
230 compatible = "ti,omap2430-i2c";
231};
232
233&i2c2 {
234 compatible = "ti,omap2430-i2c";
235};
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index 31a632f7effb..df33a50bc070 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -215,3 +215,10 @@
215&usbhsehci { 215&usbhsehci {
216 phys = <0 &hsusb2_phy>; 216 phys = <0 &hsusb2_phy>;
217}; 217};
218
219&vaux2 {
220 regulator-name = "usb_1v8";
221 regulator-min-microvolt = <1800000>;
222 regulator-max-microvolt = <1800000>;
223 regulator-always-on;
224};
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index fa532aaacc68..3ba4a625ea5b 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -61,6 +61,14 @@
61 vcc-supply = <&hsusb2_power>; 61 vcc-supply = <&hsusb2_power>;
62 }; 62 };
63 63
64 sound {
65 compatible = "ti,omap-twl4030";
66 ti,model = "omap3beagle";
67
68 ti,mcbsp = <&mcbsp2>;
69 ti,codec = <&twl_audio>;
70 };
71
64 gpio_keys { 72 gpio_keys {
65 compatible = "gpio-keys"; 73 compatible = "gpio-keys";
66 74
@@ -120,6 +128,12 @@
120 reg = <0x48>; 128 reg = <0x48>;
121 interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 129 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
122 interrupt-parent = <&intc>; 130 interrupt-parent = <&intc>;
131
132 twl_audio: audio {
133 compatible = "ti,twl4030-audio";
134 codec {
135 };
136 };
123 }; 137 };
124}; 138};
125 139
@@ -178,3 +192,10 @@
178 mode = <3>; 192 mode = <3>;
179 power = <50>; 193 power = <50>;
180}; 194};
195
196&vaux2 {
197 regulator-name = "vdd_ehci";
198 regulator-min-microvolt = <1800000>;
199 regulator-max-microvolt = <1800000>;
200 regulator-always-on;
201};
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi
index ba1e58b7b7e3..165aaf7591ba 100644
--- a/arch/arm/boot/dts/omap3-igep.dtsi
+++ b/arch/arm/boot/dts/omap3-igep.dtsi
@@ -1,5 +1,5 @@
1/* 1/*
2 * Device Tree Source for IGEP Technology devices 2 * Common device tree for IGEP boards based on AM/DM37x
3 * 3 *
4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk> 4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com> 5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
@@ -10,7 +10,7 @@
10 */ 10 */
11/dts-v1/; 11/dts-v1/;
12 12
13#include "omap34xx.dtsi" 13#include "omap36xx.dtsi"
14 14
15/ { 15/ {
16 memory { 16 memory {
@@ -24,6 +24,25 @@
24 ti,mcbsp = <&mcbsp2>; 24 ti,mcbsp = <&mcbsp2>;
25 ti,codec = <&twl_audio>; 25 ti,codec = <&twl_audio>;
26 }; 26 };
27
28 vdd33: regulator-vdd33 {
29 compatible = "regulator-fixed";
30 regulator-name = "vdd33";
31 regulator-always-on;
32 };
33
34 lbee1usjyc_vmmc: lbee1usjyc_vmmc {
35 pinctrl-names = "default";
36 pinctrl-0 = <&lbee1usjyc_pins>;
37 compatible = "regulator-fixed";
38 regulator-name = "regulator-lbee1usjyc";
39 regulator-min-microvolt = <3300000>;
40 regulator-max-microvolt = <3300000>;
41 gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>; /* gpio_138 WIFI_PDN */
42 startup-delay-us = <10000>;
43 enable-active-high;
44 vin-supply = <&vdd33>;
45 };
27}; 46};
28 47
29&omap3_pmx_core { 48&omap3_pmx_core {
@@ -48,6 +67,15 @@
48 >; 67 >;
49 }; 68 };
50 69
70 /* WiFi/BT combo */
71 lbee1usjyc_pins: pinmux_lbee1usjyc_pins {
72 pinctrl-single,pins = <
73 0x136 (PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat5.gpio_137 */
74 0x138 (PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat6.gpio_138 */
75 0x13a (PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat7.gpio_139 */
76 >;
77 };
78
51 mcbsp2_pins: pinmux_mcbsp2_pins { 79 mcbsp2_pins: pinmux_mcbsp2_pins {
52 pinctrl-single,pins = < 80 pinctrl-single,pins = <
53 0x10c (PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */ 81 0x10c (PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
@@ -65,10 +93,17 @@
65 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ 93 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
66 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ 94 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
67 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ 95 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
68 0x120 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */ 96 >;
69 0x122 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */ 97 };
70 0x124 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */ 98
71 0x126 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */ 99 mmc2_pins: pinmux_mmc2_pins {
100 pinctrl-single,pins = <
101 0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
102 0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
103 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
104 0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
105 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
106 0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
72 >; 107 >;
73 }; 108 };
74 109
@@ -78,10 +113,33 @@
78 >; 113 >;
79 }; 114 };
80 115
116 i2c1_pins: pinmux_i2c1_pins {
117 pinctrl-single,pins = <
118 0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
119 0x18c (PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
120 >;
121 };
122
123 i2c2_pins: pinmux_i2c2_pins {
124 pinctrl-single,pins = <
125 0x18e (PIN_INPUT | MUX_MODE0) /* i2c2_scl.i2c2_scl */
126 0x190 (PIN_INPUT | MUX_MODE0) /* i2c2_sda.i2c2_sda */
127 >;
128 };
129
130 i2c3_pins: pinmux_i2c3_pins {
131 pinctrl-single,pins = <
132 0x192 (PIN_INPUT | MUX_MODE0) /* i2c3_scl.i2c3_scl */
133 0x194 (PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */
134 >;
135 };
136
81 leds_pins: pinmux_leds_pins { }; 137 leds_pins: pinmux_leds_pins { };
82}; 138};
83 139
84&i2c1 { 140&i2c1 {
141 pinctrl-names = "default";
142 pinctrl-0 = <&i2c1_pins>;
85 clock-frequency = <2600000>; 143 clock-frequency = <2600000>;
86 144
87 twl: twl@48 { 145 twl: twl@48 {
@@ -101,9 +159,16 @@
101#include "twl4030_omap3.dtsi" 159#include "twl4030_omap3.dtsi"
102 160
103&i2c2 { 161&i2c2 {
162 pinctrl-names = "default";
163 pinctrl-0 = <&i2c2_pins>;
104 clock-frequency = <400000>; 164 clock-frequency = <400000>;
105}; 165};
106 166
167&i2c3 {
168 pinctrl-names = "default";
169 pinctrl-0 = <&i2c3_pins>;
170};
171
107&mcbsp2 { 172&mcbsp2 {
108 pinctrl-names = "default"; 173 pinctrl-names = "default";
109 pinctrl-0 = <&mcbsp2_pins>; 174 pinctrl-0 = <&mcbsp2_pins>;
@@ -114,11 +179,15 @@
114 pinctrl-0 = <&mmc1_pins>; 179 pinctrl-0 = <&mmc1_pins>;
115 vmmc-supply = <&vmmc1>; 180 vmmc-supply = <&vmmc1>;
116 vmmc_aux-supply = <&vsim>; 181 vmmc_aux-supply = <&vsim>;
117 bus-width = <8>; 182 bus-width = <4>;
118}; 183};
119 184
120&mmc2 { 185&mmc2 {
121 status = "disabled"; 186 pinctrl-names = "default";
187 pinctrl-0 = <&mmc2_pins>;
188 vmmc-supply = <&lbee1usjyc_vmmc>;
189 bus-width = <4>;
190 non-removable;
122}; 191};
123 192
124&mmc3 { 193&mmc3 {
diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts
index d5cc79267250..1c7e74d2d2bc 100644
--- a/arch/arm/boot/dts/omap3-igep0020.dts
+++ b/arch/arm/boot/dts/omap3-igep0020.dts
@@ -1,5 +1,5 @@
1/* 1/*
2 * Device Tree Source for IGEPv2 board 2 * Device Tree Source for IGEPv2 Rev. (TI OMAP AM/DM37x)
3 * 3 *
4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk> 4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com> 5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
@@ -13,7 +13,7 @@
13#include "omap-gpmc-smsc911x.dtsi" 13#include "omap-gpmc-smsc911x.dtsi"
14 14
15/ { 15/ {
16 model = "IGEPv2"; 16 model = "IGEPv2 (TI OMAP AM/DM37x)";
17 compatible = "isee,omap3-igep0020", "ti,omap3"; 17 compatible = "isee,omap3-igep0020", "ti,omap3";
18 18
19 leds { 19 leds {
@@ -67,6 +67,8 @@
67 pinctrl-names = "default"; 67 pinctrl-names = "default";
68 pinctrl-0 = < 68 pinctrl-0 = <
69 &hsusbb1_pins 69 &hsusbb1_pins
70 &tfp410_pins
71 &dss_pins
70 >; 72 >;
71 73
72 hsusbb1_pins: pinmux_hsusbb1_pins { 74 hsusbb1_pins: pinmux_hsusbb1_pins {
@@ -85,6 +87,45 @@
85 0x5ba (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */ 87 0x5ba (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */
86 >; 88 >;
87 }; 89 };
90
91 tfp410_pins: tfp410_dvi_pins {
92 pinctrl-single,pins = <
93 0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
94 >;
95 };
96
97 dss_pins: pinmux_dss_dvi_pins {
98 pinctrl-single,pins = <
99 0x0a4 (PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
100 0x0a6 (PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
101 0x0a8 (PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
102 0x0aa (PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
103 0x0ac (PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
104 0x0ae (PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
105 0x0b0 (PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
106 0x0b2 (PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
107 0x0b4 (PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
108 0x0b6 (PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
109 0x0b8 (PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
110 0x0ba (PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
111 0x0bc (PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
112 0x0be (PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
113 0x0c0 (PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
114 0x0c2 (PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
115 0x0c4 (PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
116 0x0c6 (PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
117 0x0c8 (PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
118 0x0ca (PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
119 0x0cc (PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
120 0x0ce (PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
121 0x0d0 (PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
122 0x0d2 (PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
123 0x0d4 (PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
124 0x0d6 (PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
125 0x0d8 (PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
126 0x0da (PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
127 >;
128 };
88}; 129};
89 130
90&leds_pins { 131&leds_pins {
@@ -174,3 +215,8 @@
174&usbhsehci { 215&usbhsehci {
175 phys = <&hsusb1_phy>; 216 phys = <&hsusb1_phy>;
176}; 217};
218
219&vpll2 {
220 /* Needed for DSS */
221 regulator-name = "vdds_dsi";
222};
diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts
index 525e6d9b0978..02a23f8a3384 100644
--- a/arch/arm/boot/dts/omap3-igep0030.dts
+++ b/arch/arm/boot/dts/omap3-igep0030.dts
@@ -1,5 +1,5 @@
1/* 1/*
2 * Device Tree Source for IGEP COM Module 2 * Device Tree Source for IGEP COM MODULE (TI OMAP AM/DM37x)
3 * 3 *
4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk> 4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com> 5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
@@ -12,7 +12,7 @@
12#include "omap3-igep.dtsi" 12#include "omap3-igep.dtsi"
13 13
14/ { 14/ {
15 model = "IGEP COM Module"; 15 model = "IGEP COM MODULE (TI OMAP AM/DM37x)";
16 compatible = "isee,omap3-igep0030", "ti,omap3"; 16 compatible = "isee,omap3-igep0030", "ti,omap3";
17 17
18 leds { 18 leds {
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index c4f20bfe4cce..6fc85f963530 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -9,7 +9,7 @@
9 9
10/dts-v1/; 10/dts-v1/;
11 11
12#include "omap34xx.dtsi" 12#include "omap34xx-hs.dtsi"
13 13
14/ { 14/ {
15 model = "Nokia N900"; 15 model = "Nokia N900";
@@ -125,6 +125,21 @@
125 >; 125 >;
126 }; 126 };
127 127
128 mmc2_pins: pinmux_mmc2_pins {
129 pinctrl-single,pins = <
130 0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
131 0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
132 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
133 0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
134 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
135 0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
136 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
137 0x136 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
138 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
139 0x13a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
140 >;
141 };
142
128 display_pins: pinmux_display_pins { 143 display_pins: pinmux_display_pins {
129 pinctrl-single,pins = < 144 pinctrl-single,pins = <
130 0x0d4 (PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */ 145 0x0d4 (PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */
@@ -358,8 +373,14 @@
358 cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */ 373 cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */
359}; 374};
360 375
376/* most boards use vaux3, only some old versions use vmmc2 instead */
361&mmc2 { 377&mmc2 {
362 status = "disabled"; 378 pinctrl-names = "default";
379 pinctrl-0 = <&mmc2_pins>;
380 vmmc-supply = <&vaux3>;
381 vmmc_aux-supply = <&vsim>;
382 bus-width = <8>;
383 non-removable;
363}; 384};
364 385
365&mmc3 { 386&mmc3 {
diff --git a/arch/arm/boot/dts/omap3-n950-n9.dtsi b/arch/arm/boot/dts/omap3-n950-n9.dtsi
index 94eb77d3b9dd..5c26c184f2c1 100644
--- a/arch/arm/boot/dts/omap3-n950-n9.dtsi
+++ b/arch/arm/boot/dts/omap3-n950-n9.dtsi
@@ -8,7 +8,7 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#include "omap36xx.dtsi" 11#include "omap36xx-hs.dtsi"
12 12
13/ { 13/ {
14 cpus { 14 cpus {
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index f3a0c26ed0c2..daabf99d402a 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -82,6 +82,13 @@
82 ranges; 82 ranges;
83 ti,hwmods = "l3_main"; 83 ti,hwmods = "l3_main";
84 84
85 aes: aes@480c5000 {
86 compatible = "ti,omap3-aes";
87 ti,hwmods = "aes";
88 reg = <0x480c5000 0x50>;
89 interrupts = <0>;
90 };
91
85 counter32k: counter@48320000 { 92 counter32k: counter@48320000 {
86 compatible = "ti,omap-counter32k"; 93 compatible = "ti,omap-counter32k";
87 reg = <0x48320000 0x20>; 94 reg = <0x48320000 0x20>;
@@ -260,6 +267,13 @@
260 ti,hwmods = "i2c3"; 267 ti,hwmods = "i2c3";
261 }; 268 };
262 269
270 mailbox: mailbox@48094000 {
271 compatible = "ti,omap3-mailbox";
272 ti,hwmods = "mailbox";
273 reg = <0x48094000 0x200>;
274 interrupts = <26>;
275 };
276
263 mcspi1: spi@48098000 { 277 mcspi1: spi@48098000 {
264 compatible = "ti,omap2-mcspi"; 278 compatible = "ti,omap2-mcspi";
265 reg = <0x48098000 0x100>; 279 reg = <0x48098000 0x100>;
@@ -357,6 +371,13 @@
357 dma-names = "tx", "rx"; 371 dma-names = "tx", "rx";
358 }; 372 };
359 373
374 mmu_isp: mmu@480bd400 {
375 compatible = "ti,omap3-mmu-isp";
376 ti,hwmods = "mmu_isp";
377 reg = <0x480bd400 0x80>;
378 interrupts = <8>;
379 };
380
360 wdt2: wdt@48314000 { 381 wdt2: wdt@48314000 {
361 compatible = "ti,omap3-wdt"; 382 compatible = "ti,omap3-wdt";
362 reg = <0x48314000 0x80>; 383 reg = <0x48314000 0x80>;
@@ -442,6 +463,27 @@
442 dma-names = "tx", "rx"; 463 dma-names = "tx", "rx";
443 }; 464 };
444 465
466 sham: sham@480c3000 {
467 compatible = "ti,omap3-sham";
468 ti,hwmods = "sham";
469 reg = <0x480c3000 0x64>;
470 interrupts = <49>;
471 };
472
473 smartreflex_core: smartreflex@480cb000 {
474 compatible = "ti,omap3-smartreflex-core";
475 ti,hwmods = "smartreflex_core";
476 reg = <0x480cb000 0x400>;
477 interrupts = <19>;
478 };
479
480 smartreflex_mpu_iva: smartreflex@480c9000 {
481 compatible = "ti,omap3-smartreflex-iva";
482 ti,hwmods = "smartreflex_mpu_iva";
483 reg = <0x480c9000 0x400>;
484 interrupts = <18>;
485 };
486
445 timer1: timer@48318000 { 487 timer1: timer@48318000 {
446 compatible = "ti,omap3430-timer"; 488 compatible = "ti,omap3430-timer";
447 reg = <0x48318000 0x400>; 489 reg = <0x48318000 0x400>;
diff --git a/arch/arm/boot/dts/omap34xx-hs.dtsi b/arch/arm/boot/dts/omap34xx-hs.dtsi
new file mode 100644
index 000000000000..1ff626489546
--- /dev/null
+++ b/arch/arm/boot/dts/omap34xx-hs.dtsi
@@ -0,0 +1,16 @@
1/* Disabled modules for secure omaps */
2
3#include "omap34xx.dtsi"
4
5/* Secure omaps have some devices inaccessible depending on the firmware */
6&aes {
7 status = "disabled";
8};
9
10&sham {
11 status = "disabled";
12};
13
14&timer12 {
15 status = "disabled";
16};
diff --git a/arch/arm/boot/dts/omap36xx-hs.dtsi b/arch/arm/boot/dts/omap36xx-hs.dtsi
new file mode 100644
index 000000000000..2c7febb0e016
--- /dev/null
+++ b/arch/arm/boot/dts/omap36xx-hs.dtsi
@@ -0,0 +1,16 @@
1/* Disabled modules for secure omaps */
2
3#include "omap36xx.dtsi"
4
5/* Secure omaps have some devices inaccessible depending on the firmware */
6&aes {
7 status = "disabled";
8};
9
10&sham {
11 status = "disabled";
12};
13
14&timer12 {
15 status = "disabled";
16};
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
index 298e85020e1b..88c6a05cab41 100644
--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
@@ -246,15 +246,6 @@
246 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */ 246 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
247 >; 247 >;
248 }; 248 };
249};
250
251&omap4_pmx_wkup {
252 led_wkgpio_pins: pinmux_leds_wkpins {
253 pinctrl-single,pins = <
254 0x1a (PIN_OUTPUT | MUX_MODE3) /* gpio_wk7 */
255 0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */
256 >;
257 };
258 249
259 /* 250 /*
260 * wl12xx GPIO outputs for WLAN_EN, BT_EN, FM_EN, BT_WAKEUP 251 * wl12xx GPIO outputs for WLAN_EN, BT_EN, FM_EN, BT_WAKEUP
@@ -274,7 +265,7 @@
274 pinctrl-single,pins = < 265 pinctrl-single,pins = <
275 0x38 (PIN_INPUT | MUX_MODE3) /* gpmc_ncs2.gpio_52 */ 266 0x38 (PIN_INPUT | MUX_MODE3) /* gpmc_ncs2.gpio_52 */
276 0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */ 267 0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
277 0x108 (PIN_OUTPUT | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */ 268 0x108 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
278 0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */ 269 0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */
279 0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */ 270 0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */
280 0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */ 271 0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */
@@ -284,6 +275,15 @@
284 }; 275 };
285}; 276};
286 277
278&omap4_pmx_wkup {
279 led_wkgpio_pins: pinmux_leds_wkpins {
280 pinctrl-single,pins = <
281 0x1a (PIN_OUTPUT | MUX_MODE3) /* gpio_wk7 */
282 0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */
283 >;
284 };
285};
286
287&i2c1 { 287&i2c1 {
288 pinctrl-names = "default"; 288 pinctrl-names = "default";
289 pinctrl-0 = <&i2c1_pins>; 289 pinctrl-0 = <&i2c1_pins>;
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index 5fc3f43c5a81..dbc81fb6ef03 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -300,12 +300,12 @@
300 wl12xx_pins: pinmux_wl12xx_pins { 300 wl12xx_pins: pinmux_wl12xx_pins {
301 pinctrl-single,pins = < 301 pinctrl-single,pins = <
302 0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */ 302 0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
303 0x108 (PIN_OUTPUT | MUX_MODE3) /* sdmmc5_clk.sdmmc5_clk */ 303 0x108 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
304 0x10a (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_cmd.sdmmc5_cmd */ 304 0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */
305 0x10c (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat0.sdmmc5_dat0 */ 305 0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */
306 0x10e (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat1.sdmmc5_dat1 */ 306 0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */
307 0x110 (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat2.sdmmc5_dat2 */ 307 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2.sdmmc5_dat2 */
308 0x112 (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat3.sdmmc5_dat3 */ 308 0x112 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */
309 >; 309 >;
310 }; 310 };
311}; 311};
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 6d09b8d42fdd..f936476c2753 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -245,14 +245,14 @@
245 245
246 mpu_periph_clk: mpu_periph_clk { 246 mpu_periph_clk: mpu_periph_clk {
247 #clock-cells = <0>; 247 #clock-cells = <0>;
248 compatible = "altr,socfpga-gate-clk"; 248 compatible = "altr,socfpga-perip-clk";
249 clocks = <&mpuclk>; 249 clocks = <&mpuclk>;
250 fixed-divider = <4>; 250 fixed-divider = <4>;
251 }; 251 };
252 252
253 mpu_l2_ram_clk: mpu_l2_ram_clk { 253 mpu_l2_ram_clk: mpu_l2_ram_clk {
254 #clock-cells = <0>; 254 #clock-cells = <0>;
255 compatible = "altr,socfpga-gate-clk"; 255 compatible = "altr,socfpga-perip-clk";
256 clocks = <&mpuclk>; 256 clocks = <&mpuclk>;
257 fixed-divider = <2>; 257 fixed-divider = <2>;
258 }; 258 };
@@ -266,8 +266,9 @@
266 266
267 l3_main_clk: l3_main_clk { 267 l3_main_clk: l3_main_clk {
268 #clock-cells = <0>; 268 #clock-cells = <0>;
269 compatible = "altr,socfpga-gate-clk"; 269 compatible = "altr,socfpga-perip-clk";
270 clocks = <&mainclk>; 270 clocks = <&mainclk>;
271 fixed-divider = <1>;
271 }; 272 };
272 273
273 l3_mp_clk: l3_mp_clk { 274 l3_mp_clk: l3_mp_clk {
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index c1751a64889a..7f5878c2784a 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -193,7 +193,10 @@
193 pio: pinctrl@01c20800 { 193 pio: pinctrl@01c20800 {
194 compatible = "allwinner,sun6i-a31-pinctrl"; 194 compatible = "allwinner,sun6i-a31-pinctrl";
195 reg = <0x01c20800 0x400>; 195 reg = <0x01c20800 0x400>;
196 interrupts = <0 11 1>, <0 15 1>, <0 16 1>, <0 17 1>; 196 interrupts = <0 11 4>,
197 <0 15 4>,
198 <0 16 4>,
199 <0 17 4>;
197 clocks = <&apb1_gates 5>; 200 clocks = <&apb1_gates 5>;
198 gpio-controller; 201 gpio-controller;
199 interrupt-controller; 202 interrupt-controller;
@@ -212,11 +215,11 @@
212 timer@01c20c00 { 215 timer@01c20c00 {
213 compatible = "allwinner,sun4i-timer"; 216 compatible = "allwinner,sun4i-timer";
214 reg = <0x01c20c00 0xa0>; 217 reg = <0x01c20c00 0xa0>;
215 interrupts = <0 18 1>, 218 interrupts = <0 18 4>,
216 <0 19 1>, 219 <0 19 4>,
217 <0 20 1>, 220 <0 20 4>,
218 <0 21 1>, 221 <0 21 4>,
219 <0 22 1>; 222 <0 22 4>;
220 clocks = <&osc24M>; 223 clocks = <&osc24M>;
221 }; 224 };
222 225
@@ -228,7 +231,7 @@
228 uart0: serial@01c28000 { 231 uart0: serial@01c28000 {
229 compatible = "snps,dw-apb-uart"; 232 compatible = "snps,dw-apb-uart";
230 reg = <0x01c28000 0x400>; 233 reg = <0x01c28000 0x400>;
231 interrupts = <0 0 1>; 234 interrupts = <0 0 4>;
232 reg-shift = <2>; 235 reg-shift = <2>;
233 reg-io-width = <4>; 236 reg-io-width = <4>;
234 clocks = <&apb2_gates 16>; 237 clocks = <&apb2_gates 16>;
@@ -238,7 +241,7 @@
238 uart1: serial@01c28400 { 241 uart1: serial@01c28400 {
239 compatible = "snps,dw-apb-uart"; 242 compatible = "snps,dw-apb-uart";
240 reg = <0x01c28400 0x400>; 243 reg = <0x01c28400 0x400>;
241 interrupts = <0 1 1>; 244 interrupts = <0 1 4>;
242 reg-shift = <2>; 245 reg-shift = <2>;
243 reg-io-width = <4>; 246 reg-io-width = <4>;
244 clocks = <&apb2_gates 17>; 247 clocks = <&apb2_gates 17>;
@@ -248,7 +251,7 @@
248 uart2: serial@01c28800 { 251 uart2: serial@01c28800 {
249 compatible = "snps,dw-apb-uart"; 252 compatible = "snps,dw-apb-uart";
250 reg = <0x01c28800 0x400>; 253 reg = <0x01c28800 0x400>;
251 interrupts = <0 2 1>; 254 interrupts = <0 2 4>;
252 reg-shift = <2>; 255 reg-shift = <2>;
253 reg-io-width = <4>; 256 reg-io-width = <4>;
254 clocks = <&apb2_gates 18>; 257 clocks = <&apb2_gates 18>;
@@ -258,7 +261,7 @@
258 uart3: serial@01c28c00 { 261 uart3: serial@01c28c00 {
259 compatible = "snps,dw-apb-uart"; 262 compatible = "snps,dw-apb-uart";
260 reg = <0x01c28c00 0x400>; 263 reg = <0x01c28c00 0x400>;
261 interrupts = <0 3 1>; 264 interrupts = <0 3 4>;
262 reg-shift = <2>; 265 reg-shift = <2>;
263 reg-io-width = <4>; 266 reg-io-width = <4>;
264 clocks = <&apb2_gates 19>; 267 clocks = <&apb2_gates 19>;
@@ -268,7 +271,7 @@
268 uart4: serial@01c29000 { 271 uart4: serial@01c29000 {
269 compatible = "snps,dw-apb-uart"; 272 compatible = "snps,dw-apb-uart";
270 reg = <0x01c29000 0x400>; 273 reg = <0x01c29000 0x400>;
271 interrupts = <0 4 1>; 274 interrupts = <0 4 4>;
272 reg-shift = <2>; 275 reg-shift = <2>;
273 reg-io-width = <4>; 276 reg-io-width = <4>;
274 clocks = <&apb2_gates 20>; 277 clocks = <&apb2_gates 20>;
@@ -278,7 +281,7 @@
278 uart5: serial@01c29400 { 281 uart5: serial@01c29400 {
279 compatible = "snps,dw-apb-uart"; 282 compatible = "snps,dw-apb-uart";
280 reg = <0x01c29400 0x400>; 283 reg = <0x01c29400 0x400>;
281 interrupts = <0 5 1>; 284 interrupts = <0 5 4>;
282 reg-shift = <2>; 285 reg-shift = <2>;
283 reg-io-width = <4>; 286 reg-io-width = <4>;
284 clocks = <&apb2_gates 21>; 287 clocks = <&apb2_gates 21>;
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index e46cfedde74c..367611a0730b 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -170,7 +170,7 @@
170 emac: ethernet@01c0b000 { 170 emac: ethernet@01c0b000 {
171 compatible = "allwinner,sun4i-emac"; 171 compatible = "allwinner,sun4i-emac";
172 reg = <0x01c0b000 0x1000>; 172 reg = <0x01c0b000 0x1000>;
173 interrupts = <0 55 1>; 173 interrupts = <0 55 4>;
174 clocks = <&ahb_gates 17>; 174 clocks = <&ahb_gates 17>;
175 status = "disabled"; 175 status = "disabled";
176 }; 176 };
@@ -186,7 +186,7 @@
186 pio: pinctrl@01c20800 { 186 pio: pinctrl@01c20800 {
187 compatible = "allwinner,sun7i-a20-pinctrl"; 187 compatible = "allwinner,sun7i-a20-pinctrl";
188 reg = <0x01c20800 0x400>; 188 reg = <0x01c20800 0x400>;
189 interrupts = <0 28 1>; 189 interrupts = <0 28 4>;
190 clocks = <&apb0_gates 5>; 190 clocks = <&apb0_gates 5>;
191 gpio-controller; 191 gpio-controller;
192 interrupt-controller; 192 interrupt-controller;
@@ -251,12 +251,12 @@
251 timer@01c20c00 { 251 timer@01c20c00 {
252 compatible = "allwinner,sun4i-timer"; 252 compatible = "allwinner,sun4i-timer";
253 reg = <0x01c20c00 0x90>; 253 reg = <0x01c20c00 0x90>;
254 interrupts = <0 22 1>, 254 interrupts = <0 22 4>,
255 <0 23 1>, 255 <0 23 4>,
256 <0 24 1>, 256 <0 24 4>,
257 <0 25 1>, 257 <0 25 4>,
258 <0 67 1>, 258 <0 67 4>,
259 <0 68 1>; 259 <0 68 4>;
260 clocks = <&osc24M>; 260 clocks = <&osc24M>;
261 }; 261 };
262 262
@@ -273,7 +273,7 @@
273 uart0: serial@01c28000 { 273 uart0: serial@01c28000 {
274 compatible = "snps,dw-apb-uart"; 274 compatible = "snps,dw-apb-uart";
275 reg = <0x01c28000 0x400>; 275 reg = <0x01c28000 0x400>;
276 interrupts = <0 1 1>; 276 interrupts = <0 1 4>;
277 reg-shift = <2>; 277 reg-shift = <2>;
278 reg-io-width = <4>; 278 reg-io-width = <4>;
279 clocks = <&apb1_gates 16>; 279 clocks = <&apb1_gates 16>;
@@ -283,7 +283,7 @@
283 uart1: serial@01c28400 { 283 uart1: serial@01c28400 {
284 compatible = "snps,dw-apb-uart"; 284 compatible = "snps,dw-apb-uart";
285 reg = <0x01c28400 0x400>; 285 reg = <0x01c28400 0x400>;
286 interrupts = <0 2 1>; 286 interrupts = <0 2 4>;
287 reg-shift = <2>; 287 reg-shift = <2>;
288 reg-io-width = <4>; 288 reg-io-width = <4>;
289 clocks = <&apb1_gates 17>; 289 clocks = <&apb1_gates 17>;
@@ -293,7 +293,7 @@
293 uart2: serial@01c28800 { 293 uart2: serial@01c28800 {
294 compatible = "snps,dw-apb-uart"; 294 compatible = "snps,dw-apb-uart";
295 reg = <0x01c28800 0x400>; 295 reg = <0x01c28800 0x400>;
296 interrupts = <0 3 1>; 296 interrupts = <0 3 4>;
297 reg-shift = <2>; 297 reg-shift = <2>;
298 reg-io-width = <4>; 298 reg-io-width = <4>;
299 clocks = <&apb1_gates 18>; 299 clocks = <&apb1_gates 18>;
@@ -303,7 +303,7 @@
303 uart3: serial@01c28c00 { 303 uart3: serial@01c28c00 {
304 compatible = "snps,dw-apb-uart"; 304 compatible = "snps,dw-apb-uart";
305 reg = <0x01c28c00 0x400>; 305 reg = <0x01c28c00 0x400>;
306 interrupts = <0 4 1>; 306 interrupts = <0 4 4>;
307 reg-shift = <2>; 307 reg-shift = <2>;
308 reg-io-width = <4>; 308 reg-io-width = <4>;
309 clocks = <&apb1_gates 19>; 309 clocks = <&apb1_gates 19>;
@@ -313,7 +313,7 @@
313 uart4: serial@01c29000 { 313 uart4: serial@01c29000 {
314 compatible = "snps,dw-apb-uart"; 314 compatible = "snps,dw-apb-uart";
315 reg = <0x01c29000 0x400>; 315 reg = <0x01c29000 0x400>;
316 interrupts = <0 17 1>; 316 interrupts = <0 17 4>;
317 reg-shift = <2>; 317 reg-shift = <2>;
318 reg-io-width = <4>; 318 reg-io-width = <4>;
319 clocks = <&apb1_gates 20>; 319 clocks = <&apb1_gates 20>;
@@ -323,7 +323,7 @@
323 uart5: serial@01c29400 { 323 uart5: serial@01c29400 {
324 compatible = "snps,dw-apb-uart"; 324 compatible = "snps,dw-apb-uart";
325 reg = <0x01c29400 0x400>; 325 reg = <0x01c29400 0x400>;
326 interrupts = <0 18 1>; 326 interrupts = <0 18 4>;
327 reg-shift = <2>; 327 reg-shift = <2>;
328 reg-io-width = <4>; 328 reg-io-width = <4>;
329 clocks = <&apb1_gates 21>; 329 clocks = <&apb1_gates 21>;
@@ -333,7 +333,7 @@
333 uart6: serial@01c29800 { 333 uart6: serial@01c29800 {
334 compatible = "snps,dw-apb-uart"; 334 compatible = "snps,dw-apb-uart";
335 reg = <0x01c29800 0x400>; 335 reg = <0x01c29800 0x400>;
336 interrupts = <0 19 1>; 336 interrupts = <0 19 4>;
337 reg-shift = <2>; 337 reg-shift = <2>;
338 reg-io-width = <4>; 338 reg-io-width = <4>;
339 clocks = <&apb1_gates 22>; 339 clocks = <&apb1_gates 22>;
@@ -343,7 +343,7 @@
343 uart7: serial@01c29c00 { 343 uart7: serial@01c29c00 {
344 compatible = "snps,dw-apb-uart"; 344 compatible = "snps,dw-apb-uart";
345 reg = <0x01c29c00 0x400>; 345 reg = <0x01c29c00 0x400>;
346 interrupts = <0 20 1>; 346 interrupts = <0 20 4>;
347 reg-shift = <2>; 347 reg-shift = <2>;
348 reg-io-width = <4>; 348 reg-io-width = <4>;
349 clocks = <&apb1_gates 23>; 349 clocks = <&apb1_gates 23>;
@@ -353,7 +353,7 @@
353 i2c0: i2c@01c2ac00 { 353 i2c0: i2c@01c2ac00 {
354 compatible = "allwinner,sun4i-i2c"; 354 compatible = "allwinner,sun4i-i2c";
355 reg = <0x01c2ac00 0x400>; 355 reg = <0x01c2ac00 0x400>;
356 interrupts = <0 7 1>; 356 interrupts = <0 7 4>;
357 clocks = <&apb1_gates 0>; 357 clocks = <&apb1_gates 0>;
358 clock-frequency = <100000>; 358 clock-frequency = <100000>;
359 status = "disabled"; 359 status = "disabled";
@@ -362,7 +362,7 @@
362 i2c1: i2c@01c2b000 { 362 i2c1: i2c@01c2b000 {
363 compatible = "allwinner,sun4i-i2c"; 363 compatible = "allwinner,sun4i-i2c";
364 reg = <0x01c2b000 0x400>; 364 reg = <0x01c2b000 0x400>;
365 interrupts = <0 8 1>; 365 interrupts = <0 8 4>;
366 clocks = <&apb1_gates 1>; 366 clocks = <&apb1_gates 1>;
367 clock-frequency = <100000>; 367 clock-frequency = <100000>;
368 status = "disabled"; 368 status = "disabled";
@@ -371,7 +371,7 @@
371 i2c2: i2c@01c2b400 { 371 i2c2: i2c@01c2b400 {
372 compatible = "allwinner,sun4i-i2c"; 372 compatible = "allwinner,sun4i-i2c";
373 reg = <0x01c2b400 0x400>; 373 reg = <0x01c2b400 0x400>;
374 interrupts = <0 9 1>; 374 interrupts = <0 9 4>;
375 clocks = <&apb1_gates 2>; 375 clocks = <&apb1_gates 2>;
376 clock-frequency = <100000>; 376 clock-frequency = <100000>;
377 status = "disabled"; 377 status = "disabled";
@@ -380,7 +380,7 @@
380 i2c3: i2c@01c2b800 { 380 i2c3: i2c@01c2b800 {
381 compatible = "allwinner,sun4i-i2c"; 381 compatible = "allwinner,sun4i-i2c";
382 reg = <0x01c2b800 0x400>; 382 reg = <0x01c2b800 0x400>;
383 interrupts = <0 88 1>; 383 interrupts = <0 88 4>;
384 clocks = <&apb1_gates 3>; 384 clocks = <&apb1_gates 3>;
385 clock-frequency = <100000>; 385 clock-frequency = <100000>;
386 status = "disabled"; 386 status = "disabled";
@@ -389,7 +389,7 @@
389 i2c4: i2c@01c2bc00 { 389 i2c4: i2c@01c2bc00 {
390 compatible = "allwinner,sun4i-i2c"; 390 compatible = "allwinner,sun4i-i2c";
391 reg = <0x01c2bc00 0x400>; 391 reg = <0x01c2bc00 0x400>;
392 interrupts = <0 89 1>; 392 interrupts = <0 89 4>;
393 clocks = <&apb1_gates 15>; 393 clocks = <&apb1_gates 15>;
394 clock-frequency = <100000>; 394 clock-frequency = <100000>;
395 status = "disabled"; 395 status = "disabled";
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index 8e1a0245907f..41bca32409fc 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -404,7 +404,7 @@ static irqreturn_t dma_irq_handler(int irq, void *data)
404 BIT(slot)); 404 BIT(slot));
405 if (edma_cc[ctlr]->intr_data[channel].callback) 405 if (edma_cc[ctlr]->intr_data[channel].callback)
406 edma_cc[ctlr]->intr_data[channel].callback( 406 edma_cc[ctlr]->intr_data[channel].callback(
407 channel, DMA_COMPLETE, 407 channel, EDMA_DMA_COMPLETE,
408 edma_cc[ctlr]->intr_data[channel].data); 408 edma_cc[ctlr]->intr_data[channel].data);
409 } 409 }
410 } while (sh_ipr); 410 } while (sh_ipr);
@@ -459,7 +459,7 @@ static irqreturn_t dma_ccerr_handler(int irq, void *data)
459 callback) { 459 callback) {
460 edma_cc[ctlr]->intr_data[k]. 460 edma_cc[ctlr]->intr_data[k].
461 callback(k, 461 callback(k,
462 DMA_CC_ERROR, 462 EDMA_DMA_CC_ERROR,
463 edma_cc[ctlr]->intr_data 463 edma_cc[ctlr]->intr_data
464 [k].data); 464 [k].data);
465 } 465 }
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 4a5903e04827..c1df4e9db140 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -69,6 +69,7 @@ CONFIG_KS8851=y
69CONFIG_SMSC911X=y 69CONFIG_SMSC911X=y
70CONFIG_STMMAC_ETH=y 70CONFIG_STMMAC_ETH=y
71CONFIG_MDIO_SUN4I=y 71CONFIG_MDIO_SUN4I=y
72CONFIG_TI_CPSW=y
72CONFIG_KEYBOARD_SPEAR=y 73CONFIG_KEYBOARD_SPEAR=y
73CONFIG_SERIO_AMBAKMI=y 74CONFIG_SERIO_AMBAKMI=y
74CONFIG_SERIAL_8250=y 75CONFIG_SERIAL_8250=y
@@ -133,12 +134,14 @@ CONFIG_USB_GPIO_VBUS=y
133CONFIG_USB_ISP1301=y 134CONFIG_USB_ISP1301=y
134CONFIG_USB_MXS_PHY=y 135CONFIG_USB_MXS_PHY=y
135CONFIG_MMC=y 136CONFIG_MMC=y
137CONFIG_MMC_BLOCK_MINORS=16
136CONFIG_MMC_ARMMMCI=y 138CONFIG_MMC_ARMMMCI=y
137CONFIG_MMC_SDHCI=y 139CONFIG_MMC_SDHCI=y
138CONFIG_MMC_SDHCI_PLTFM=y 140CONFIG_MMC_SDHCI_PLTFM=y
139CONFIG_MMC_SDHCI_ESDHC_IMX=y 141CONFIG_MMC_SDHCI_ESDHC_IMX=y
140CONFIG_MMC_SDHCI_TEGRA=y 142CONFIG_MMC_SDHCI_TEGRA=y
141CONFIG_MMC_SDHCI_SPEAR=y 143CONFIG_MMC_SDHCI_SPEAR=y
144CONFIG_MMC_SDHCI_BCM_KONA=y
142CONFIG_MMC_OMAP=y 145CONFIG_MMC_OMAP=y
143CONFIG_MMC_OMAP_HS=y 146CONFIG_MMC_OMAP_HS=y
144CONFIG_EDAC=y 147CONFIG_EDAC=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 98a50c309b90..bfa80a11e8c7 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -173,6 +173,7 @@ CONFIG_MFD_PALMAS=y
173CONFIG_MFD_TPS65217=y 173CONFIG_MFD_TPS65217=y
174CONFIG_MFD_TPS65910=y 174CONFIG_MFD_TPS65910=y
175CONFIG_TWL6040_CORE=y 175CONFIG_TWL6040_CORE=y
176CONFIG_REGULATOR_FIXED_VOLTAGE=y
176CONFIG_REGULATOR_PALMAS=y 177CONFIG_REGULATOR_PALMAS=y
177CONFIG_REGULATOR_TPS65023=y 178CONFIG_REGULATOR_TPS65023=y
178CONFIG_REGULATOR_TPS6507X=y 179CONFIG_REGULATOR_TPS6507X=y
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index d57a85badb5e..3e2259b60236 100644
--- a/arch/arm/configs/sunxi_defconfig
+++ b/arch/arm/configs/sunxi_defconfig
@@ -12,6 +12,9 @@ CONFIG_NET=y
12CONFIG_PACKET=y 12CONFIG_PACKET=y
13CONFIG_UNIX=y 13CONFIG_UNIX=y
14CONFIG_INET=y 14CONFIG_INET=y
15CONFIG_IP_PNP=y
16CONFIG_IP_PNP_DHCP=y
17CONFIG_IP_PNP_BOOTP=y
15# CONFIG_INET_XFRM_MODE_TRANSPORT is not set 18# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
16# CONFIG_INET_XFRM_MODE_TUNNEL is not set 19# CONFIG_INET_XFRM_MODE_TUNNEL is not set
17# CONFIG_INET_XFRM_MODE_BEET is not set 20# CONFIG_INET_XFRM_MODE_BEET is not set
@@ -58,4 +61,8 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
58CONFIG_LEDS_TRIGGER_DEFAULT_ON=y 61CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
59CONFIG_COMMON_CLK_DEBUG=y 62CONFIG_COMMON_CLK_DEBUG=y
60# CONFIG_IOMMU_SUPPORT is not set 63# CONFIG_IOMMU_SUPPORT is not set
64CONFIG_TMPFS=y
65CONFIG_NFS_FS=y
66CONFIG_ROOT_NFS=y
61CONFIG_NLS=y 67CONFIG_NLS=y
68CONFIG_PRINTK_TIME=y
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index ac632cc38f24..c6ebc184bf68 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMDLINE="root=/dev/ram0 console=ttyAMA2,115200n8"
22CONFIG_CPU_FREQ=y 22CONFIG_CPU_FREQ=y
23CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y 23CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
24CONFIG_CPU_IDLE=y 24CONFIG_CPU_IDLE=y
25CONFIG_ARM_U8500_CPUIDLE=y
25CONFIG_VFP=y 26CONFIG_VFP=y
26CONFIG_NEON=y 27CONFIG_NEON=y
27CONFIG_PM_RUNTIME=y 28CONFIG_PM_RUNTIME=y
@@ -109,6 +110,8 @@ CONFIG_EXT2_FS_SECURITY=y
109CONFIG_EXT3_FS=y 110CONFIG_EXT3_FS=y
110CONFIG_EXT4_FS=y 111CONFIG_EXT4_FS=y
111CONFIG_VFAT_FS=y 112CONFIG_VFAT_FS=y
113CONFIG_DEVTMPFS=y
114CONFIG_DEVTMPFS_MOUNT=y
112CONFIG_TMPFS=y 115CONFIG_TMPFS=y
113CONFIG_TMPFS_POSIX_ACL=y 116CONFIG_TMPFS_POSIX_ACL=y
114# CONFIG_MISC_FILESYSTEMS is not set 117# CONFIG_MISC_FILESYSTEMS is not set
diff --git a/arch/arm/include/asm/hardware/iop3xx-adma.h b/arch/arm/include/asm/hardware/iop3xx-adma.h
index 9b28f1243bdc..240b29ef17db 100644
--- a/arch/arm/include/asm/hardware/iop3xx-adma.h
+++ b/arch/arm/include/asm/hardware/iop3xx-adma.h
@@ -393,36 +393,6 @@ static inline int iop_chan_zero_sum_slot_count(size_t len, int src_cnt,
393 return slot_cnt; 393 return slot_cnt;
394} 394}
395 395
396static inline int iop_desc_is_pq(struct iop_adma_desc_slot *desc)
397{
398 return 0;
399}
400
401static inline u32 iop_desc_get_dest_addr(struct iop_adma_desc_slot *desc,
402 struct iop_adma_chan *chan)
403{
404 union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, };
405
406 switch (chan->device->id) {
407 case DMA0_ID:
408 case DMA1_ID:
409 return hw_desc.dma->dest_addr;
410 case AAU_ID:
411 return hw_desc.aau->dest_addr;
412 default:
413 BUG();
414 }
415 return 0;
416}
417
418
419static inline u32 iop_desc_get_qdest_addr(struct iop_adma_desc_slot *desc,
420 struct iop_adma_chan *chan)
421{
422 BUG();
423 return 0;
424}
425
426static inline u32 iop_desc_get_byte_count(struct iop_adma_desc_slot *desc, 396static inline u32 iop_desc_get_byte_count(struct iop_adma_desc_slot *desc,
427 struct iop_adma_chan *chan) 397 struct iop_adma_chan *chan)
428{ 398{
diff --git a/arch/arm/include/asm/hardware/iop_adma.h b/arch/arm/include/asm/hardware/iop_adma.h
index 122f86d8c991..250760e08103 100644
--- a/arch/arm/include/asm/hardware/iop_adma.h
+++ b/arch/arm/include/asm/hardware/iop_adma.h
@@ -82,8 +82,6 @@ struct iop_adma_chan {
82 * @slot_cnt: total slots used in an transaction (group of operations) 82 * @slot_cnt: total slots used in an transaction (group of operations)
83 * @slots_per_op: number of slots per operation 83 * @slots_per_op: number of slots per operation
84 * @idx: pool index 84 * @idx: pool index
85 * @unmap_src_cnt: number of xor sources
86 * @unmap_len: transaction bytecount
87 * @tx_list: list of descriptors that are associated with one operation 85 * @tx_list: list of descriptors that are associated with one operation
88 * @async_tx: support for the async_tx api 86 * @async_tx: support for the async_tx api
89 * @group_list: list of slots that make up a multi-descriptor transaction 87 * @group_list: list of slots that make up a multi-descriptor transaction
@@ -99,8 +97,6 @@ struct iop_adma_desc_slot {
99 u16 slot_cnt; 97 u16 slot_cnt;
100 u16 slots_per_op; 98 u16 slots_per_op;
101 u16 idx; 99 u16 idx;
102 u16 unmap_src_cnt;
103 size_t unmap_len;
104 struct list_head tx_list; 100 struct list_head tx_list;
105 struct dma_async_tx_descriptor async_tx; 101 struct dma_async_tx_descriptor async_tx;
106 union { 102 union {
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 4dd21457ef9d..6976b03e5213 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -100,23 +100,19 @@
100#define TASK_UNMAPPED_BASE UL(0x00000000) 100#define TASK_UNMAPPED_BASE UL(0x00000000)
101#endif 101#endif
102 102
103#ifndef PHYS_OFFSET
104#define PHYS_OFFSET UL(CONFIG_DRAM_BASE)
105#endif
106
107#ifndef END_MEM 103#ifndef END_MEM
108#define END_MEM (UL(CONFIG_DRAM_BASE) + CONFIG_DRAM_SIZE) 104#define END_MEM (UL(CONFIG_DRAM_BASE) + CONFIG_DRAM_SIZE)
109#endif 105#endif
110 106
111#ifndef PAGE_OFFSET 107#ifndef PAGE_OFFSET
112#define PAGE_OFFSET (PHYS_OFFSET) 108#define PAGE_OFFSET PLAT_PHYS_OFFSET
113#endif 109#endif
114 110
115/* 111/*
116 * The module can be at any place in ram in nommu mode. 112 * The module can be at any place in ram in nommu mode.
117 */ 113 */
118#define MODULES_END (END_MEM) 114#define MODULES_END (END_MEM)
119#define MODULES_VADDR (PHYS_OFFSET) 115#define MODULES_VADDR PAGE_OFFSET
120 116
121#define XIP_VIRT_ADDR(physaddr) (physaddr) 117#define XIP_VIRT_ADDR(physaddr) (physaddr)
122 118
@@ -157,6 +153,16 @@
157#endif 153#endif
158#define ARCH_PGD_MASK ((1 << ARCH_PGD_SHIFT) - 1) 154#define ARCH_PGD_MASK ((1 << ARCH_PGD_SHIFT) - 1)
159 155
156/*
157 * PLAT_PHYS_OFFSET is the offset (from zero) of the start of physical
158 * memory. This is used for XIP and NoMMU kernels, or by kernels which
159 * have their own mach/memory.h. Assembly code must always use
160 * PLAT_PHYS_OFFSET and not PHYS_OFFSET.
161 */
162#ifndef PLAT_PHYS_OFFSET
163#define PLAT_PHYS_OFFSET UL(CONFIG_PHYS_OFFSET)
164#endif
165
160#ifndef __ASSEMBLY__ 166#ifndef __ASSEMBLY__
161 167
162/* 168/*
@@ -226,12 +232,21 @@ static inline phys_addr_t __virt_to_phys(unsigned long x)
226static inline unsigned long __phys_to_virt(phys_addr_t x) 232static inline unsigned long __phys_to_virt(phys_addr_t x)
227{ 233{
228 unsigned long t; 234 unsigned long t;
229 __pv_stub(x, t, "sub", __PV_BITS_31_24); 235
236 /*
237 * 'unsigned long' cast discard upper word when
238 * phys_addr_t is 64 bit, and makes sure that inline
239 * assembler expression receives 32 bit argument
240 * in place where 'r' 32 bit operand is expected.
241 */
242 __pv_stub((unsigned long) x, t, "sub", __PV_BITS_31_24);
230 return t; 243 return t;
231} 244}
232 245
233#else 246#else
234 247
248#define PHYS_OFFSET PLAT_PHYS_OFFSET
249
235static inline phys_addr_t __virt_to_phys(unsigned long x) 250static inline phys_addr_t __virt_to_phys(unsigned long x)
236{ 251{
237 return (phys_addr_t)x - PAGE_OFFSET + PHYS_OFFSET; 252 return (phys_addr_t)x - PAGE_OFFSET + PHYS_OFFSET;
@@ -244,17 +259,6 @@ static inline unsigned long __phys_to_virt(phys_addr_t x)
244 259
245#endif 260#endif
246#endif 261#endif
247#endif /* __ASSEMBLY__ */
248
249#ifndef PHYS_OFFSET
250#ifdef PLAT_PHYS_OFFSET
251#define PHYS_OFFSET PLAT_PHYS_OFFSET
252#else
253#define PHYS_OFFSET UL(CONFIG_PHYS_OFFSET)
254#endif
255#endif
256
257#ifndef __ASSEMBLY__
258 262
259/* 263/*
260 * PFNs are used to describe any physical page; this means 264 * PFNs are used to describe any physical page; this means
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index be956dbf6bae..1571d126e9dd 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -61,7 +61,7 @@ extern void __pgd_error(const char *file, int line, pgd_t);
61 * mapping to be mapped at. This is particularly important for 61 * mapping to be mapped at. This is particularly important for
62 * non-high vector CPUs. 62 * non-high vector CPUs.
63 */ 63 */
64#define FIRST_USER_ADDRESS PAGE_SIZE 64#define FIRST_USER_ADDRESS (PAGE_SIZE * 2)
65 65
66/* 66/*
67 * Use TASK_SIZE as the ceiling argument for free_pgtables() and 67 * Use TASK_SIZE as the ceiling argument for free_pgtables() and
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index 14235ba64a90..716249cc2ee1 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -68,7 +68,7 @@ ENTRY(stext)
68 68
69#ifdef CONFIG_ARM_MPU 69#ifdef CONFIG_ARM_MPU
70 /* Calculate the size of a region covering just the kernel */ 70 /* Calculate the size of a region covering just the kernel */
71 ldr r5, =PHYS_OFFSET @ Region start: PHYS_OFFSET 71 ldr r5, =PLAT_PHYS_OFFSET @ Region start: PHYS_OFFSET
72 ldr r6, =(_end) @ Cover whole kernel 72 ldr r6, =(_end) @ Cover whole kernel
73 sub r6, r6, r5 @ Minimum size of region to map 73 sub r6, r6, r5 @ Minimum size of region to map
74 clz r6, r6 @ Region size must be 2^N... 74 clz r6, r6 @ Region size must be 2^N...
@@ -213,7 +213,7 @@ ENTRY(__setup_mpu)
213 set_region_nr r0, #MPU_RAM_REGION 213 set_region_nr r0, #MPU_RAM_REGION
214 isb 214 isb
215 /* Full access from PL0, PL1, shared for CONFIG_SMP, cacheable */ 215 /* Full access from PL0, PL1, shared for CONFIG_SMP, cacheable */
216 ldr r0, =PHYS_OFFSET @ RAM starts at PHYS_OFFSET 216 ldr r0, =PLAT_PHYS_OFFSET @ RAM starts at PHYS_OFFSET
217 ldr r5,=(MPU_AP_PL1RW_PL0RW | MPU_RGN_NORMAL) 217 ldr r5,=(MPU_AP_PL1RW_PL0RW | MPU_RGN_NORMAL)
218 218
219 setup_region r0, r5, r6, MPU_DATA_SIDE @ PHYS_OFFSET, shared, enabled 219 setup_region r0, r5, r6, MPU_DATA_SIDE @ PHYS_OFFSET, shared, enabled
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 7801866e626a..32f317e5828a 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -110,7 +110,7 @@ ENTRY(stext)
110 sub r4, r3, r4 @ (PHYS_OFFSET - PAGE_OFFSET) 110 sub r4, r3, r4 @ (PHYS_OFFSET - PAGE_OFFSET)
111 add r8, r8, r4 @ PHYS_OFFSET 111 add r8, r8, r4 @ PHYS_OFFSET
112#else 112#else
113 ldr r8, =PHYS_OFFSET @ always constant in this case 113 ldr r8, =PLAT_PHYS_OFFSET @ always constant in this case
114#endif 114#endif
115 115
116 /* 116 /*
@@ -508,6 +508,7 @@ __fixup_smp:
508 teq r0, #0x0 @ '0' on actual UP A9 hardware 508 teq r0, #0x0 @ '0' on actual UP A9 hardware
509 beq __fixup_smp_on_up @ So its an A9 UP 509 beq __fixup_smp_on_up @ So its an A9 UP
510 ldr r0, [r0, #4] @ read SCU Config 510 ldr r0, [r0, #4] @ read SCU Config
511ARM_BE8(rev r0, r0) @ byteswap if big endian
511 and r0, r0, #0x3 @ number of CPUs 512 and r0, r0, #0x3 @ number of CPUs
512 teq r0, #0x0 @ is 1? 513 teq r0, #0x0 @ is 1?
513 movne pc, lr 514 movne pc, lr
@@ -644,7 +645,11 @@ ARM_BE8(rev16 ip, ip)
644 bcc 1b 645 bcc 1b
645 bx lr 646 bx lr
646#else 647#else
648#ifdef CONFIG_CPU_ENDIAN_BE8
649 moveq r0, #0x00004000 @ set bit 22, mov to mvn instruction
650#else
647 moveq r0, #0x400000 @ set bit 22, mov to mvn instruction 651 moveq r0, #0x400000 @ set bit 22, mov to mvn instruction
652#endif
648 b 2f 653 b 2f
6491: ldr ip, [r7, r3] 6541: ldr ip, [r7, r3]
650#ifdef CONFIG_CPU_ENDIAN_BE8 655#ifdef CONFIG_CPU_ENDIAN_BE8
@@ -653,7 +658,7 @@ ARM_BE8(rev16 ip, ip)
653 tst ip, #0x000f0000 @ check the rotation field 658 tst ip, #0x000f0000 @ check the rotation field
654 orrne ip, ip, r6, lsl #24 @ mask in offset bits 31-24 659 orrne ip, ip, r6, lsl #24 @ mask in offset bits 31-24
655 biceq ip, ip, #0x00004000 @ clear bit 22 660 biceq ip, ip, #0x00004000 @ clear bit 22
656 orreq ip, ip, r0, lsl #24 @ mask in offset bits 7-0 661 orreq ip, ip, r0 @ mask in offset bits 7-0
657#else 662#else
658 bic ip, ip, #0x000000ff 663 bic ip, ip, #0x000000ff
659 tst ip, #0xf00 @ check the rotation field 664 tst ip, #0xf00 @ check the rotation field
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index 57221e349a7c..f0d180d8b29f 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -14,11 +14,12 @@
14#include <asm/pgalloc.h> 14#include <asm/pgalloc.h>
15#include <asm/mmu_context.h> 15#include <asm/mmu_context.h>
16#include <asm/cacheflush.h> 16#include <asm/cacheflush.h>
17#include <asm/fncpy.h>
17#include <asm/mach-types.h> 18#include <asm/mach-types.h>
18#include <asm/smp_plat.h> 19#include <asm/smp_plat.h>
19#include <asm/system_misc.h> 20#include <asm/system_misc.h>
20 21
21extern const unsigned char relocate_new_kernel[]; 22extern void relocate_new_kernel(void);
22extern const unsigned int relocate_new_kernel_size; 23extern const unsigned int relocate_new_kernel_size;
23 24
24extern unsigned long kexec_start_address; 25extern unsigned long kexec_start_address;
@@ -142,6 +143,8 @@ void machine_kexec(struct kimage *image)
142{ 143{
143 unsigned long page_list; 144 unsigned long page_list;
144 unsigned long reboot_code_buffer_phys; 145 unsigned long reboot_code_buffer_phys;
146 unsigned long reboot_entry = (unsigned long)relocate_new_kernel;
147 unsigned long reboot_entry_phys;
145 void *reboot_code_buffer; 148 void *reboot_code_buffer;
146 149
147 /* 150 /*
@@ -168,16 +171,16 @@ void machine_kexec(struct kimage *image)
168 171
169 172
170 /* copy our kernel relocation code to the control code page */ 173 /* copy our kernel relocation code to the control code page */
171 memcpy(reboot_code_buffer, 174 reboot_entry = fncpy(reboot_code_buffer,
172 relocate_new_kernel, relocate_new_kernel_size); 175 reboot_entry,
176 relocate_new_kernel_size);
177 reboot_entry_phys = (unsigned long)reboot_entry +
178 (reboot_code_buffer_phys - (unsigned long)reboot_code_buffer);
173 179
174
175 flush_icache_range((unsigned long) reboot_code_buffer,
176 (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
177 printk(KERN_INFO "Bye!\n"); 180 printk(KERN_INFO "Bye!\n");
178 181
179 if (kexec_reinit) 182 if (kexec_reinit)
180 kexec_reinit(); 183 kexec_reinit();
181 184
182 soft_restart(reboot_code_buffer_phys); 185 soft_restart(reboot_entry_phys);
183} 186}
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 94f6b05f9e24..92f7b15dd221 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -404,6 +404,7 @@ EXPORT_SYMBOL(dump_fpu);
404unsigned long get_wchan(struct task_struct *p) 404unsigned long get_wchan(struct task_struct *p)
405{ 405{
406 struct stackframe frame; 406 struct stackframe frame;
407 unsigned long stack_page;
407 int count = 0; 408 int count = 0;
408 if (!p || p == current || p->state == TASK_RUNNING) 409 if (!p || p == current || p->state == TASK_RUNNING)
409 return 0; 410 return 0;
@@ -412,9 +413,11 @@ unsigned long get_wchan(struct task_struct *p)
412 frame.sp = thread_saved_sp(p); 413 frame.sp = thread_saved_sp(p);
413 frame.lr = 0; /* recovered from the stack */ 414 frame.lr = 0; /* recovered from the stack */
414 frame.pc = thread_saved_pc(p); 415 frame.pc = thread_saved_pc(p);
416 stack_page = (unsigned long)task_stack_page(p);
415 do { 417 do {
416 int ret = unwind_frame(&frame); 418 if (frame.sp < stack_page ||
417 if (ret < 0) 419 frame.sp >= stack_page + THREAD_SIZE ||
420 unwind_frame(&frame) < 0)
418 return 0; 421 return 0;
419 if (!in_sched_functions(frame.pc)) 422 if (!in_sched_functions(frame.pc))
420 return frame.pc; 423 return frame.pc;
diff --git a/arch/arm/kernel/relocate_kernel.S b/arch/arm/kernel/relocate_kernel.S
index d0cdedf4864d..95858966d84e 100644
--- a/arch/arm/kernel/relocate_kernel.S
+++ b/arch/arm/kernel/relocate_kernel.S
@@ -2,10 +2,12 @@
2 * relocate_kernel.S - put the kernel image in place to boot 2 * relocate_kernel.S - put the kernel image in place to boot
3 */ 3 */
4 4
5#include <linux/linkage.h>
5#include <asm/kexec.h> 6#include <asm/kexec.h>
6 7
7 .globl relocate_new_kernel 8 .align 3 /* not needed for this code, but keeps fncpy() happy */
8relocate_new_kernel: 9
10ENTRY(relocate_new_kernel)
9 11
10 ldr r0,kexec_indirection_page 12 ldr r0,kexec_indirection_page
11 ldr r1,kexec_start_address 13 ldr r1,kexec_start_address
@@ -79,6 +81,8 @@ kexec_mach_type:
79kexec_boot_atags: 81kexec_boot_atags:
80 .long 0x0 82 .long 0x0
81 83
84ENDPROC(relocate_new_kernel)
85
82relocate_new_kernel_end: 86relocate_new_kernel_end:
83 87
84 .globl relocate_new_kernel_size 88 .globl relocate_new_kernel_size
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 6a1b8a81b1ae..987a7f5bce5f 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -873,8 +873,6 @@ void __init setup_arch(char **cmdline_p)
873 machine_desc = mdesc; 873 machine_desc = mdesc;
874 machine_name = mdesc->name; 874 machine_name = mdesc->name;
875 875
876 setup_dma_zone(mdesc);
877
878 if (mdesc->reboot_mode != REBOOT_HARD) 876 if (mdesc->reboot_mode != REBOOT_HARD)
879 reboot_mode = mdesc->reboot_mode; 877 reboot_mode = mdesc->reboot_mode;
880 878
@@ -892,6 +890,7 @@ void __init setup_arch(char **cmdline_p)
892 sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL); 890 sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL);
893 891
894 early_paging_init(mdesc, lookup_processor_type(read_cpuid_id())); 892 early_paging_init(mdesc, lookup_processor_type(read_cpuid_id()));
893 setup_dma_zone(mdesc);
895 sanity_check_meminfo(); 894 sanity_check_meminfo();
896 arm_memblock_init(&meminfo, mdesc); 895 arm_memblock_init(&meminfo, mdesc);
897 896
diff --git a/arch/arm/kernel/sigreturn_codes.S b/arch/arm/kernel/sigreturn_codes.S
index 3c5d0f2170fd..b84d0cb13682 100644
--- a/arch/arm/kernel/sigreturn_codes.S
+++ b/arch/arm/kernel/sigreturn_codes.S
@@ -30,6 +30,27 @@
30 * snippets. 30 * snippets.
31 */ 31 */
32 32
33/*
34 * In CPU_THUMBONLY case kernel arm opcodes are not allowed.
35 * Note in this case codes skips those instructions but it uses .org
36 * directive to keep correct layout of sigreturn_codes array.
37 */
38#ifndef CONFIG_CPU_THUMBONLY
39#define ARM_OK(code...) code
40#else
41#define ARM_OK(code...)
42#endif
43
44 .macro arm_slot n
45 .org sigreturn_codes + 12 * (\n)
46ARM_OK( .arm )
47 .endm
48
49 .macro thumb_slot n
50 .org sigreturn_codes + 12 * (\n) + 8
51 .thumb
52 .endm
53
33#if __LINUX_ARM_ARCH__ <= 4 54#if __LINUX_ARM_ARCH__ <= 4
34 /* 55 /*
35 * Note we manually set minimally required arch that supports 56 * Note we manually set minimally required arch that supports
@@ -45,26 +66,27 @@
45 .global sigreturn_codes 66 .global sigreturn_codes
46 .type sigreturn_codes, #object 67 .type sigreturn_codes, #object
47 68
48 .arm 69 .align
49 70
50sigreturn_codes: 71sigreturn_codes:
51 72
52 /* ARM sigreturn syscall code snippet */ 73 /* ARM sigreturn syscall code snippet */
53 mov r7, #(__NR_sigreturn - __NR_SYSCALL_BASE) 74 arm_slot 0
54 swi #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE) 75ARM_OK( mov r7, #(__NR_sigreturn - __NR_SYSCALL_BASE) )
76ARM_OK( swi #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE) )
55 77
56 /* Thumb sigreturn syscall code snippet */ 78 /* Thumb sigreturn syscall code snippet */
57 .thumb 79 thumb_slot 0
58 movs r7, #(__NR_sigreturn - __NR_SYSCALL_BASE) 80 movs r7, #(__NR_sigreturn - __NR_SYSCALL_BASE)
59 swi #0 81 swi #0
60 82
61 /* ARM sigreturn_rt syscall code snippet */ 83 /* ARM sigreturn_rt syscall code snippet */
62 .arm 84 arm_slot 1
63 mov r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE) 85ARM_OK( mov r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE) )
64 swi #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE) 86ARM_OK( swi #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE) )
65 87
66 /* Thumb sigreturn_rt syscall code snippet */ 88 /* Thumb sigreturn_rt syscall code snippet */
67 .thumb 89 thumb_slot 1
68 movs r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE) 90 movs r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE)
69 swi #0 91 swi #0
70 92
@@ -74,7 +96,7 @@ sigreturn_codes:
74 * it is thumb case or not, so we need additional 96 * it is thumb case or not, so we need additional
75 * word after real last entry. 97 * word after real last entry.
76 */ 98 */
77 .arm 99 arm_slot 2
78 .space 4 100 .space 4
79 101
80 .size sigreturn_codes, . - sigreturn_codes 102 .size sigreturn_codes, . - sigreturn_codes
diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c
index 00f79e59985b..af4e8c8a5422 100644
--- a/arch/arm/kernel/stacktrace.c
+++ b/arch/arm/kernel/stacktrace.c
@@ -31,7 +31,7 @@ int notrace unwind_frame(struct stackframe *frame)
31 high = ALIGN(low, THREAD_SIZE); 31 high = ALIGN(low, THREAD_SIZE);
32 32
33 /* check current frame pointer is within bounds */ 33 /* check current frame pointer is within bounds */
34 if (fp < (low + 12) || fp + 4 >= high) 34 if (fp < low + 12 || fp > high - 4)
35 return -EINVAL; 35 return -EINVAL;
36 36
37 /* restore the registers from the stack frame */ 37 /* restore the registers from the stack frame */
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 6125f259b7b5..7940241f0576 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -509,9 +509,10 @@ static inline int
509__do_cache_op(unsigned long start, unsigned long end) 509__do_cache_op(unsigned long start, unsigned long end)
510{ 510{
511 int ret; 511 int ret;
512 unsigned long chunk = PAGE_SIZE;
513 512
514 do { 513 do {
514 unsigned long chunk = min(PAGE_SIZE, end - start);
515
515 if (signal_pending(current)) { 516 if (signal_pending(current)) {
516 struct thread_info *ti = current_thread_info(); 517 struct thread_info *ti = current_thread_info();
517 518
@@ -856,7 +857,7 @@ static void __init kuser_init(void *vectors)
856 memcpy(vectors + 0xfe0, vectors + 0xfe8, 4); 857 memcpy(vectors + 0xfe0, vectors + 0xfe8, 4);
857} 858}
858#else 859#else
859static void __init kuser_init(void *vectors) 860static inline void __init kuser_init(void *vectors)
860{ 861{
861} 862}
862#endif 863#endif
diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
index 371958370de4..580906989db1 100644
--- a/arch/arm/kvm/mmu.c
+++ b/arch/arm/kvm/mmu.c
@@ -334,6 +334,17 @@ out:
334 return err; 334 return err;
335} 335}
336 336
337static phys_addr_t kvm_kaddr_to_phys(void *kaddr)
338{
339 if (!is_vmalloc_addr(kaddr)) {
340 BUG_ON(!virt_addr_valid(kaddr));
341 return __pa(kaddr);
342 } else {
343 return page_to_phys(vmalloc_to_page(kaddr)) +
344 offset_in_page(kaddr);
345 }
346}
347
337/** 348/**
338 * create_hyp_mappings - duplicate a kernel virtual address range in Hyp mode 349 * create_hyp_mappings - duplicate a kernel virtual address range in Hyp mode
339 * @from: The virtual kernel start address of the range 350 * @from: The virtual kernel start address of the range
@@ -345,16 +356,27 @@ out:
345 */ 356 */
346int create_hyp_mappings(void *from, void *to) 357int create_hyp_mappings(void *from, void *to)
347{ 358{
348 unsigned long phys_addr = virt_to_phys(from); 359 phys_addr_t phys_addr;
360 unsigned long virt_addr;
349 unsigned long start = KERN_TO_HYP((unsigned long)from); 361 unsigned long start = KERN_TO_HYP((unsigned long)from);
350 unsigned long end = KERN_TO_HYP((unsigned long)to); 362 unsigned long end = KERN_TO_HYP((unsigned long)to);
351 363
352 /* Check for a valid kernel memory mapping */ 364 start = start & PAGE_MASK;
353 if (!virt_addr_valid(from) || !virt_addr_valid(to - 1)) 365 end = PAGE_ALIGN(end);
354 return -EINVAL;
355 366
356 return __create_hyp_mappings(hyp_pgd, start, end, 367 for (virt_addr = start; virt_addr < end; virt_addr += PAGE_SIZE) {
357 __phys_to_pfn(phys_addr), PAGE_HYP); 368 int err;
369
370 phys_addr = kvm_kaddr_to_phys(from + virt_addr - start);
371 err = __create_hyp_mappings(hyp_pgd, virt_addr,
372 virt_addr + PAGE_SIZE,
373 __phys_to_pfn(phys_addr),
374 PAGE_HYP);
375 if (err)
376 return err;
377 }
378
379 return 0;
358} 380}
359 381
360/** 382/**
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h
index e0c68d5bb7dc..52886b89706c 100644
--- a/arch/arm/lib/bitops.h
+++ b/arch/arm/lib/bitops.h
@@ -10,7 +10,7 @@ UNWIND( .fnstart )
10 and r3, r0, #31 @ Get bit offset 10 and r3, r0, #31 @ Get bit offset
11 mov r0, r0, lsr #5 11 mov r0, r0, lsr #5
12 add r1, r1, r0, lsl #2 @ Get word offset 12 add r1, r1, r0, lsl #2 @ Get word offset
13#if __LINUX_ARM_ARCH__ >= 7 13#if __LINUX_ARM_ARCH__ >= 7 && defined(CONFIG_SMP)
14 .arch_extension mp 14 .arch_extension mp
15 ALT_SMP(W(pldw) [r1]) 15 ALT_SMP(W(pldw) [r1])
16 ALT_UP(W(nop)) 16 ALT_UP(W(nop))
diff --git a/arch/arm/lib/delay-loop.S b/arch/arm/lib/delay-loop.S
index 36b668d8e121..bc1033b897b4 100644
--- a/arch/arm/lib/delay-loop.S
+++ b/arch/arm/lib/delay-loop.S
@@ -40,6 +40,7 @@ ENTRY(__loop_const_udelay) @ 0 <= r0 <= 0x7fffff06
40/* 40/*
41 * loops = r0 * HZ * loops_per_jiffy / 1000000 41 * loops = r0 * HZ * loops_per_jiffy / 1000000
42 */ 42 */
43 .align 3
43 44
44@ Delay routine 45@ Delay routine
45ENTRY(__loop_delay) 46ENTRY(__loop_delay)
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index f607deb40f4d..bc7b363a3083 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -174,7 +174,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
174static struct clock_event_device clkevt = { 174static struct clock_event_device clkevt = {
175 .name = "at91_tick", 175 .name = "at91_tick",
176 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 176 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
177 .shift = 32,
178 .rating = 150, 177 .rating = 150,
179 .set_next_event = clkevt32k_next_event, 178 .set_next_event = clkevt32k_next_event,
180 .set_mode = clkevt32k_mode, 179 .set_mode = clkevt32k_mode,
@@ -265,11 +264,9 @@ void __init at91rm9200_timer_init(void)
265 at91_st_write(AT91_ST_RTMR, 1); 264 at91_st_write(AT91_ST_RTMR, 1);
266 265
267 /* Setup timer clockevent, with minimum of two ticks (important!!) */ 266 /* Setup timer clockevent, with minimum of two ticks (important!!) */
268 clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
269 clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
270 clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
271 clkevt.cpumask = cpumask_of(0); 267 clkevt.cpumask = cpumask_of(0);
272 clockevents_register_device(&clkevt); 268 clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK,
269 2, AT91_ST_ALMV);
273 270
274 /* register clocksource */ 271 /* register clocksource */
275 clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK); 272 clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index 3ed190ce062b..c5101dcb4fb0 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -16,7 +16,11 @@
16#include <mach/at91_ramc.h> 16#include <mach/at91_ramc.h>
17#include <mach/at91rm9200_sdramc.h> 17#include <mach/at91rm9200_sdramc.h>
18 18
19#ifdef CONFIG_PM
19extern void at91_pm_set_standby(void (*at91_standby)(void)); 20extern void at91_pm_set_standby(void (*at91_standby)(void));
21#else
22static inline void at91_pm_set_standby(void (*at91_standby)(void)) { }
23#endif
20 24
21/* 25/*
22 * The AT91RM9200 goes into self-refresh mode with this command, and will 26 * The AT91RM9200 goes into self-refresh mode with this command, and will
diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
index 3ea86428ee09..a28873fe3049 100644
--- a/arch/arm/mach-at91/sama5d3.c
+++ b/arch/arm/mach-at91/sama5d3.c
@@ -95,19 +95,19 @@ static struct clk twi0_clk = {
95 .name = "twi0_clk", 95 .name = "twi0_clk",
96 .pid = SAMA5D3_ID_TWI0, 96 .pid = SAMA5D3_ID_TWI0,
97 .type = CLK_TYPE_PERIPHERAL, 97 .type = CLK_TYPE_PERIPHERAL,
98 .div = AT91_PMC_PCR_DIV2, 98 .div = AT91_PMC_PCR_DIV8,
99}; 99};
100static struct clk twi1_clk = { 100static struct clk twi1_clk = {
101 .name = "twi1_clk", 101 .name = "twi1_clk",
102 .pid = SAMA5D3_ID_TWI1, 102 .pid = SAMA5D3_ID_TWI1,
103 .type = CLK_TYPE_PERIPHERAL, 103 .type = CLK_TYPE_PERIPHERAL,
104 .div = AT91_PMC_PCR_DIV2, 104 .div = AT91_PMC_PCR_DIV8,
105}; 105};
106static struct clk twi2_clk = { 106static struct clk twi2_clk = {
107 .name = "twi2_clk", 107 .name = "twi2_clk",
108 .pid = SAMA5D3_ID_TWI2, 108 .pid = SAMA5D3_ID_TWI2,
109 .type = CLK_TYPE_PERIPHERAL, 109 .type = CLK_TYPE_PERIPHERAL,
110 .div = AT91_PMC_PCR_DIV2, 110 .div = AT91_PMC_PCR_DIV8,
111}; 111};
112static struct clk mmc0_clk = { 112static struct clk mmc0_clk = {
113 .name = "mci0_clk", 113 .name = "mci0_clk",
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index c46eccbbd512..78829c513fdc 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -487,7 +487,7 @@ int __init da8xx_register_emac(void)
487 487
488static struct resource da830_mcasp1_resources[] = { 488static struct resource da830_mcasp1_resources[] = {
489 { 489 {
490 .name = "mcasp1", 490 .name = "mpu",
491 .start = DAVINCI_DA830_MCASP1_REG_BASE, 491 .start = DAVINCI_DA830_MCASP1_REG_BASE,
492 .end = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1, 492 .end = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1,
493 .flags = IORESOURCE_MEM, 493 .flags = IORESOURCE_MEM,
@@ -515,7 +515,7 @@ static struct platform_device da830_mcasp1_device = {
515 515
516static struct resource da850_mcasp_resources[] = { 516static struct resource da850_mcasp_resources[] = {
517 { 517 {
518 .name = "mcasp", 518 .name = "mpu",
519 .start = DAVINCI_DA8XX_MCASP0_REG_BASE, 519 .start = DAVINCI_DA8XX_MCASP0_REG_BASE,
520 .end = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1, 520 .end = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1,
521 .flags = IORESOURCE_MEM, 521 .flags = IORESOURCE_MEM,
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index ef9ff1fb6f52..6117fc644188 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -641,6 +641,7 @@ static struct platform_device dm355_edma_device = {
641 641
642static struct resource dm355_asp1_resources[] = { 642static struct resource dm355_asp1_resources[] = {
643 { 643 {
644 .name = "mpu",
644 .start = DAVINCI_ASP1_BASE, 645 .start = DAVINCI_ASP1_BASE,
645 .end = DAVINCI_ASP1_BASE + SZ_8K - 1, 646 .end = DAVINCI_ASP1_BASE + SZ_8K - 1,
646 .flags = IORESOURCE_MEM, 647 .flags = IORESOURCE_MEM,
@@ -906,7 +907,7 @@ static struct davinci_gpio_platform_data dm355_gpio_platform_data = {
906int __init dm355_gpio_register(void) 907int __init dm355_gpio_register(void)
907{ 908{
908 return davinci_gpio_register(dm355_gpio_resources, 909 return davinci_gpio_register(dm355_gpio_resources,
909 sizeof(dm355_gpio_resources), 910 ARRAY_SIZE(dm355_gpio_resources),
910 &dm355_gpio_platform_data); 911 &dm355_gpio_platform_data);
911} 912}
912/*----------------------------------------------------------------------*/ 913/*----------------------------------------------------------------------*/
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 1511a0680f9a..d7c6f85d3fc9 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -720,7 +720,7 @@ static struct davinci_gpio_platform_data dm365_gpio_platform_data = {
720int __init dm365_gpio_register(void) 720int __init dm365_gpio_register(void)
721{ 721{
722 return davinci_gpio_register(dm365_gpio_resources, 722 return davinci_gpio_register(dm365_gpio_resources,
723 sizeof(dm365_gpio_resources), 723 ARRAY_SIZE(dm365_gpio_resources),
724 &dm365_gpio_platform_data); 724 &dm365_gpio_platform_data);
725} 725}
726 726
@@ -942,6 +942,7 @@ static struct platform_device dm365_edma_device = {
942 942
943static struct resource dm365_asp_resources[] = { 943static struct resource dm365_asp_resources[] = {
944 { 944 {
945 .name = "mpu",
945 .start = DAVINCI_DM365_ASP0_BASE, 946 .start = DAVINCI_DM365_ASP0_BASE,
946 .end = DAVINCI_DM365_ASP0_BASE + SZ_8K - 1, 947 .end = DAVINCI_DM365_ASP0_BASE + SZ_8K - 1,
947 .flags = IORESOURCE_MEM, 948 .flags = IORESOURCE_MEM,
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 143a3217e8ef..3ce47997bb46 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -572,6 +572,7 @@ static struct platform_device dm644x_edma_device = {
572/* DM6446 EVM uses ASP0; line-out is a pair of RCA jacks */ 572/* DM6446 EVM uses ASP0; line-out is a pair of RCA jacks */
573static struct resource dm644x_asp_resources[] = { 573static struct resource dm644x_asp_resources[] = {
574 { 574 {
575 .name = "mpu",
575 .start = DAVINCI_ASP0_BASE, 576 .start = DAVINCI_ASP0_BASE,
576 .end = DAVINCI_ASP0_BASE + SZ_8K - 1, 577 .end = DAVINCI_ASP0_BASE + SZ_8K - 1,
577 .flags = IORESOURCE_MEM, 578 .flags = IORESOURCE_MEM,
@@ -792,7 +793,7 @@ static struct davinci_gpio_platform_data dm644_gpio_platform_data = {
792int __init dm644x_gpio_register(void) 793int __init dm644x_gpio_register(void)
793{ 794{
794 return davinci_gpio_register(dm644_gpio_resources, 795 return davinci_gpio_register(dm644_gpio_resources,
795 sizeof(dm644_gpio_resources), 796 ARRAY_SIZE(dm644_gpio_resources),
796 &dm644_gpio_platform_data); 797 &dm644_gpio_platform_data);
797} 798}
798/*----------------------------------------------------------------------*/ 799/*----------------------------------------------------------------------*/
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 2a73f299c1d0..0e81fea65e7f 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -621,7 +621,7 @@ static struct platform_device dm646x_edma_device = {
621 621
622static struct resource dm646x_mcasp0_resources[] = { 622static struct resource dm646x_mcasp0_resources[] = {
623 { 623 {
624 .name = "mcasp0", 624 .name = "mpu",
625 .start = DAVINCI_DM646X_MCASP0_REG_BASE, 625 .start = DAVINCI_DM646X_MCASP0_REG_BASE,
626 .end = DAVINCI_DM646X_MCASP0_REG_BASE + (SZ_1K << 1) - 1, 626 .end = DAVINCI_DM646X_MCASP0_REG_BASE + (SZ_1K << 1) - 1,
627 .flags = IORESOURCE_MEM, 627 .flags = IORESOURCE_MEM,
@@ -641,7 +641,7 @@ static struct resource dm646x_mcasp0_resources[] = {
641 641
642static struct resource dm646x_mcasp1_resources[] = { 642static struct resource dm646x_mcasp1_resources[] = {
643 { 643 {
644 .name = "mcasp1", 644 .name = "mpu",
645 .start = DAVINCI_DM646X_MCASP1_REG_BASE, 645 .start = DAVINCI_DM646X_MCASP1_REG_BASE,
646 .end = DAVINCI_DM646X_MCASP1_REG_BASE + (SZ_1K << 1) - 1, 646 .end = DAVINCI_DM646X_MCASP1_REG_BASE + (SZ_1K << 1) - 1,
647 .flags = IORESOURCE_MEM, 647 .flags = IORESOURCE_MEM,
@@ -769,7 +769,7 @@ static struct davinci_gpio_platform_data dm646x_gpio_platform_data = {
769int __init dm646x_gpio_register(void) 769int __init dm646x_gpio_register(void)
770{ 770{
771 return davinci_gpio_register(dm646x_gpio_resources, 771 return davinci_gpio_register(dm646x_gpio_resources,
772 sizeof(dm646x_gpio_resources), 772 ARRAY_SIZE(dm646x_gpio_resources),
773 &dm646x_gpio_platform_data); 773 &dm646x_gpio_platform_data);
774} 774}
775/*----------------------------------------------------------------------*/ 775/*----------------------------------------------------------------------*/
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index 2739ca2c1334..e0091685fd48 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -15,6 +15,7 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/spinlock.h> 17#include <linux/spinlock.h>
18#include <video/vga.h>
18 19
19#include <asm/pgtable.h> 20#include <asm/pgtable.h>
20#include <asm/page.h> 21#include <asm/page.h>
@@ -196,6 +197,8 @@ void __init footbridge_map_io(void)
196 iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc)); 197 iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
197 pci_map_io_early(__phys_to_pfn(DC21285_PCI_IO)); 198 pci_map_io_early(__phys_to_pfn(DC21285_PCI_IO));
198 } 199 }
200
201 vga_base = PCIMEM_BASE;
199} 202}
200 203
201void footbridge_restart(enum reboot_mode mode, const char *cmd) 204void footbridge_restart(enum reboot_mode mode, const char *cmd)
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index 3490a24f969e..7c2fdae9a38b 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -18,7 +18,6 @@
18#include <linux/irq.h> 18#include <linux/irq.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/spinlock.h> 20#include <linux/spinlock.h>
21#include <video/vga.h>
22 21
23#include <asm/irq.h> 22#include <asm/irq.h>
24#include <asm/mach/pci.h> 23#include <asm/mach/pci.h>
@@ -291,7 +290,6 @@ void __init dc21285_preinit(void)
291 int cfn_mode; 290 int cfn_mode;
292 291
293 pcibios_min_mem = 0x81000000; 292 pcibios_min_mem = 0x81000000;
294 vga_base = PCIMEM_BASE;
295 293
296 mem_size = (unsigned int)high_memory - PAGE_OFFSET; 294 mem_size = (unsigned int)high_memory - PAGE_OFFSET;
297 for (mem_mask = 0x00100000; mem_mask < 0x10000000; mem_mask <<= 1) 295 for (mem_mask = 0x00100000; mem_mask < 0x10000000; mem_mask <<= 1)
diff --git a/arch/arm/mach-footbridge/ebsa285.c b/arch/arm/mach-footbridge/ebsa285.c
index b08243500e2e..1a7235fb52ac 100644
--- a/arch/arm/mach-footbridge/ebsa285.c
+++ b/arch/arm/mach-footbridge/ebsa285.c
@@ -30,21 +30,24 @@ static const struct {
30 const char *name; 30 const char *name;
31 const char *trigger; 31 const char *trigger;
32} ebsa285_leds[] = { 32} ebsa285_leds[] = {
33 { "ebsa285:amber", "heartbeat", }, 33 { "ebsa285:amber", "cpu0", },
34 { "ebsa285:green", "cpu0", }, 34 { "ebsa285:green", "heartbeat", },
35 { "ebsa285:red",}, 35 { "ebsa285:red",},
36}; 36};
37 37
38static unsigned char hw_led_state;
39
38static void ebsa285_led_set(struct led_classdev *cdev, 40static void ebsa285_led_set(struct led_classdev *cdev,
39 enum led_brightness b) 41 enum led_brightness b)
40{ 42{
41 struct ebsa285_led *led = container_of(cdev, 43 struct ebsa285_led *led = container_of(cdev,
42 struct ebsa285_led, cdev); 44 struct ebsa285_led, cdev);
43 45
44 if (b != LED_OFF) 46 if (b == LED_OFF)
45 *XBUS_LEDS |= led->mask; 47 hw_led_state |= led->mask;
46 else 48 else
47 *XBUS_LEDS &= ~led->mask; 49 hw_led_state &= ~led->mask;
50 *XBUS_LEDS = hw_led_state;
48} 51}
49 52
50static enum led_brightness ebsa285_led_get(struct led_classdev *cdev) 53static enum led_brightness ebsa285_led_get(struct led_classdev *cdev)
@@ -52,18 +55,19 @@ static enum led_brightness ebsa285_led_get(struct led_classdev *cdev)
52 struct ebsa285_led *led = container_of(cdev, 55 struct ebsa285_led *led = container_of(cdev,
53 struct ebsa285_led, cdev); 56 struct ebsa285_led, cdev);
54 57
55 return (*XBUS_LEDS & led->mask) ? LED_FULL : LED_OFF; 58 return hw_led_state & led->mask ? LED_OFF : LED_FULL;
56} 59}
57 60
58static int __init ebsa285_leds_init(void) 61static int __init ebsa285_leds_init(void)
59{ 62{
60 int i; 63 int i;
61 64
62 if (machine_is_ebsa285()) 65 if (!machine_is_ebsa285())
63 return -ENODEV; 66 return -ENODEV;
64 67
65 /* 3 LEDS All ON */ 68 /* 3 LEDS all off */
66 *XBUS_LEDS |= XBUS_LED_AMBER | XBUS_LED_GREEN | XBUS_LED_RED; 69 hw_led_state = XBUS_LED_AMBER | XBUS_LED_GREEN | XBUS_LED_RED;
70 *XBUS_LEDS = hw_led_state;
67 71
68 for (i = 0; i < ARRAY_SIZE(ebsa285_leds); i++) { 72 for (i = 0; i < ARRAY_SIZE(ebsa285_leds); i++) {
69 struct ebsa285_led *led; 73 struct ebsa285_led *led;
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index b3d7e5634b83..bd3bf66ce344 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -17,12 +17,15 @@
17#include <linux/clkdev.h> 17#include <linux/clkdev.h>
18#include <linux/clocksource.h> 18#include <linux/clocksource.h>
19#include <linux/dma-mapping.h> 19#include <linux/dma-mapping.h>
20#include <linux/input.h>
20#include <linux/io.h> 21#include <linux/io.h>
21#include <linux/irqchip.h> 22#include <linux/irqchip.h>
23#include <linux/mailbox.h>
22#include <linux/of.h> 24#include <linux/of.h>
23#include <linux/of_irq.h> 25#include <linux/of_irq.h>
24#include <linux/of_platform.h> 26#include <linux/of_platform.h>
25#include <linux/of_address.h> 27#include <linux/of_address.h>
28#include <linux/reboot.h>
26#include <linux/amba/bus.h> 29#include <linux/amba/bus.h>
27#include <linux/platform_device.h> 30#include <linux/platform_device.h>
28 31
@@ -130,6 +133,24 @@ static struct platform_device highbank_cpuidle_device = {
130 .name = "cpuidle-calxeda", 133 .name = "cpuidle-calxeda",
131}; 134};
132 135
136static int hb_keys_notifier(struct notifier_block *nb, unsigned long event, void *data)
137{
138 u32 key = *(u32 *)data;
139
140 if (event != 0x1000)
141 return 0;
142
143 if (key == KEY_POWER)
144 orderly_poweroff(false);
145 else if (key == 0xffff)
146 ctrl_alt_del();
147
148 return 0;
149}
150static struct notifier_block hb_keys_nb = {
151 .notifier_call = hb_keys_notifier,
152};
153
133static void __init highbank_init(void) 154static void __init highbank_init(void)
134{ 155{
135 struct device_node *np; 156 struct device_node *np;
@@ -145,6 +166,8 @@ static void __init highbank_init(void)
145 bus_register_notifier(&platform_bus_type, &highbank_platform_nb); 166 bus_register_notifier(&platform_bus_type, &highbank_platform_nb);
146 bus_register_notifier(&amba_bustype, &highbank_amba_nb); 167 bus_register_notifier(&amba_bustype, &highbank_amba_nb);
147 168
169 pl320_ipc_register_notifier(&hb_keys_nb);
170
148 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 171 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
149 172
150 if (psci_ops.cpu_suspend) 173 if (psci_ops.cpu_suspend)
diff --git a/arch/arm/mach-iop13xx/include/mach/adma.h b/arch/arm/mach-iop13xx/include/mach/adma.h
index 6d3782d85a9f..a86fd0ed7757 100644
--- a/arch/arm/mach-iop13xx/include/mach/adma.h
+++ b/arch/arm/mach-iop13xx/include/mach/adma.h
@@ -218,20 +218,6 @@ iop_chan_xor_slot_count(size_t len, int src_cnt, int *slots_per_op)
218#define iop_chan_pq_slot_count iop_chan_xor_slot_count 218#define iop_chan_pq_slot_count iop_chan_xor_slot_count
219#define iop_chan_pq_zero_sum_slot_count iop_chan_xor_slot_count 219#define iop_chan_pq_zero_sum_slot_count iop_chan_xor_slot_count
220 220
221static inline u32 iop_desc_get_dest_addr(struct iop_adma_desc_slot *desc,
222 struct iop_adma_chan *chan)
223{
224 struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;
225 return hw_desc->dest_addr;
226}
227
228static inline u32 iop_desc_get_qdest_addr(struct iop_adma_desc_slot *desc,
229 struct iop_adma_chan *chan)
230{
231 struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;
232 return hw_desc->q_dest_addr;
233}
234
235static inline u32 iop_desc_get_byte_count(struct iop_adma_desc_slot *desc, 221static inline u32 iop_desc_get_byte_count(struct iop_adma_desc_slot *desc,
236 struct iop_adma_chan *chan) 222 struct iop_adma_chan *chan)
237{ 223{
@@ -350,18 +336,6 @@ iop_desc_init_pq(struct iop_adma_desc_slot *desc, int src_cnt,
350 hw_desc->desc_ctrl = u_desc_ctrl.value; 336 hw_desc->desc_ctrl = u_desc_ctrl.value;
351} 337}
352 338
353static inline int iop_desc_is_pq(struct iop_adma_desc_slot *desc)
354{
355 struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;
356 union {
357 u32 value;
358 struct iop13xx_adma_desc_ctrl field;
359 } u_desc_ctrl;
360
361 u_desc_ctrl.value = hw_desc->desc_ctrl;
362 return u_desc_ctrl.field.pq_xfer_en;
363}
364
365static inline void 339static inline void
366iop_desc_init_pq_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, 340iop_desc_init_pq_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt,
367 unsigned long flags) 341 unsigned long flags)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 1f25f3e99c05..adcef406ff0a 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -19,11 +19,11 @@ secure-common = omap-smc.o omap-secure.o
19 19
20obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) 20obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
21obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) 21obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
22obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common) 22obj-$(CONFIG_ARCH_OMAP4) += $(hwmod-common) $(secure-common)
23obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common) 23obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common)
24obj-$(CONFIG_SOC_OMAP5) += prm44xx.o $(hwmod-common) $(secure-common) 24obj-$(CONFIG_SOC_OMAP5) += $(hwmod-common) $(secure-common)
25obj-$(CONFIG_SOC_AM43XX) += $(hwmod-common) $(secure-common) 25obj-$(CONFIG_SOC_AM43XX) += $(hwmod-common) $(secure-common)
26obj-$(CONFIG_SOC_DRA7XX) += prm44xx.o $(hwmod-common) $(secure-common) 26obj-$(CONFIG_SOC_DRA7XX) += $(hwmod-common) $(secure-common)
27 27
28ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),) 28ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),)
29obj-y += mcbsp.o 29obj-y += mcbsp.o
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 19f1652e94cf..8d972ff18c56 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -131,6 +131,24 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
131 .dt_compat = omap3_gp_boards_compat, 131 .dt_compat = omap3_gp_boards_compat,
132 .restart = omap3xxx_restart, 132 .restart = omap3xxx_restart,
133MACHINE_END 133MACHINE_END
134
135static const char *am3517_boards_compat[] __initdata = {
136 "ti,am3517",
137 NULL,
138};
139
140DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)")
141 .reserve = omap_reserve,
142 .map_io = omap3_map_io,
143 .init_early = am35xx_init_early,
144 .init_irq = omap_intc_of_init,
145 .handle_irq = omap3_intc_handle_irq,
146 .init_machine = omap_generic_init,
147 .init_late = omap3_init_late,
148 .init_time = omap3_gptimer_timer_init,
149 .dt_compat = am3517_boards_compat,
150 .restart = omap3xxx_restart,
151MACHINE_END
134#endif 152#endif
135 153
136#ifdef CONFIG_SOC_AM33XX 154#ifdef CONFIG_SOC_AM33XX
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index f7644febee81..e30ef6797c63 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -299,7 +299,6 @@ struct omap_sdrc_params;
299extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, 299extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
300 struct omap_sdrc_params *sdrc_cs1); 300 struct omap_sdrc_params *sdrc_cs1);
301struct omap2_hsmmc_info; 301struct omap2_hsmmc_info;
302extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
303extern void omap_reserve(void); 302extern void omap_reserve(void);
304 303
305struct omap_hwmod; 304struct omap_hwmod;
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index a4e536b11ec9..58347bb874a0 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -32,7 +32,6 @@
32 32
33#include "soc.h" 33#include "soc.h"
34#include "iomap.h" 34#include "iomap.h"
35#include "mux.h"
36#include "control.h" 35#include "control.h"
37#include "display.h" 36#include "display.h"
38#include "prm.h" 37#include "prm.h"
@@ -102,90 +101,13 @@ static const struct omap_dss_hwmod_data omap4_dss_hwmod_data[] __initconst = {
102 { "dss_hdmi", "omapdss_hdmi", -1 }, 101 { "dss_hdmi", "omapdss_hdmi", -1 },
103}; 102};
104 103
105static void __init omap4_tpd12s015_mux_pads(void)
106{
107 omap_mux_init_signal("hdmi_cec",
108 OMAP_PIN_INPUT_PULLUP);
109 omap_mux_init_signal("hdmi_ddc_scl",
110 OMAP_PIN_INPUT_PULLUP);
111 omap_mux_init_signal("hdmi_ddc_sda",
112 OMAP_PIN_INPUT_PULLUP);
113}
114
115static void __init omap4_hdmi_mux_pads(enum omap_hdmi_flags flags)
116{
117 u32 reg;
118 u16 control_i2c_1;
119
120 /*
121 * CONTROL_I2C_1: HDMI_DDC_SDA_PULLUPRESX (bit 28) and
122 * HDMI_DDC_SCL_PULLUPRESX (bit 24) are set to disable
123 * internal pull up resistor.
124 */
125 if (flags & OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP) {
126 control_i2c_1 = OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_1;
127 reg = omap4_ctrl_pad_readl(control_i2c_1);
128 reg |= (OMAP4_HDMI_DDC_SDA_PULLUPRESX_MASK |
129 OMAP4_HDMI_DDC_SCL_PULLUPRESX_MASK);
130 omap4_ctrl_pad_writel(reg, control_i2c_1);
131 }
132}
133
134static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
135{
136 u32 enable_mask, enable_shift;
137 u32 pipd_mask, pipd_shift;
138 u32 reg;
139
140 if (dsi_id == 0) {
141 enable_mask = OMAP4_DSI1_LANEENABLE_MASK;
142 enable_shift = OMAP4_DSI1_LANEENABLE_SHIFT;
143 pipd_mask = OMAP4_DSI1_PIPD_MASK;
144 pipd_shift = OMAP4_DSI1_PIPD_SHIFT;
145 } else if (dsi_id == 1) {
146 enable_mask = OMAP4_DSI2_LANEENABLE_MASK;
147 enable_shift = OMAP4_DSI2_LANEENABLE_SHIFT;
148 pipd_mask = OMAP4_DSI2_PIPD_MASK;
149 pipd_shift = OMAP4_DSI2_PIPD_SHIFT;
150 } else {
151 return -ENODEV;
152 }
153
154 reg = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY);
155
156 reg &= ~enable_mask;
157 reg &= ~pipd_mask;
158
159 reg |= (lanes << enable_shift) & enable_mask;
160 reg |= (lanes << pipd_shift) & pipd_mask;
161
162 omap4_ctrl_pad_writel(reg, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY);
163
164 return 0;
165}
166
167int __init omap_hdmi_init(enum omap_hdmi_flags flags)
168{
169 if (cpu_is_omap44xx()) {
170 omap4_hdmi_mux_pads(flags);
171 omap4_tpd12s015_mux_pads();
172 }
173
174 return 0;
175}
176
177static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask) 104static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask)
178{ 105{
179 if (cpu_is_omap44xx())
180 return omap4_dsi_mux_pads(dsi_id, lane_mask);
181
182 return 0; 106 return 0;
183} 107}
184 108
185static void omap_dsi_disable_pads(int dsi_id, unsigned lane_mask) 109static void omap_dsi_disable_pads(int dsi_id, unsigned lane_mask)
186{ 110{
187 if (cpu_is_omap44xx())
188 omap4_dsi_mux_pads(dsi_id, 0);
189} 111}
190 112
191static int omap_dss_set_min_bus_tput(struct device *dev, unsigned long tput) 113static int omap_dss_set_min_bus_tput(struct device *dev, unsigned long tput)
diff --git a/arch/arm/mach-omap2/dss-common.c b/arch/arm/mach-omap2/dss-common.c
index 365bfd3d9c68..dadccc91488c 100644
--- a/arch/arm/mach-omap2/dss-common.c
+++ b/arch/arm/mach-omap2/dss-common.c
@@ -223,7 +223,7 @@ void __init omap_4430sdp_display_init_of(void)
223static struct connector_dvi_platform_data omap3_igep2_dvi_connector_pdata = { 223static struct connector_dvi_platform_data omap3_igep2_dvi_connector_pdata = {
224 .name = "dvi", 224 .name = "dvi",
225 .source = "tfp410.0", 225 .source = "tfp410.0",
226 .i2c_bus_num = 3, 226 .i2c_bus_num = 2,
227}; 227};
228 228
229static struct platform_device omap3_igep2_dvi_connector_device = { 229static struct platform_device omap3_igep2_dvi_connector_device = {
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 81de56251955..d24926e6340f 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1502,6 +1502,22 @@ static int gpmc_probe_generic_child(struct platform_device *pdev,
1502 } 1502 }
1503 1503
1504 /* 1504 /*
1505 * For some GPMC devices we still need to rely on the bootloader
1506 * timings because the devices can be connected via FPGA. So far
1507 * the list is smc91x on the omap2 SDP boards, and 8250 on zooms.
1508 * REVISIT: Add timing support from slls644g.pdf and from the
1509 * lan91c96 manual.
1510 */
1511 if (of_device_is_compatible(child, "ns16550a") ||
1512 of_device_is_compatible(child, "smsc,lan91c94") ||
1513 of_device_is_compatible(child, "smsc,lan91c111")) {
1514 dev_warn(&pdev->dev,
1515 "%s using bootloader timings on CS%d\n",
1516 child->name, cs);
1517 goto no_timings;
1518 }
1519
1520 /*
1505 * FIXME: gpmc_cs_request() will map the CS to an arbitary 1521 * FIXME: gpmc_cs_request() will map the CS to an arbitary
1506 * location in the gpmc address space. When booting with 1522 * location in the gpmc address space. When booting with
1507 * device-tree we want the NOR flash to be mapped to the 1523 * device-tree we want the NOR flash to be mapped to the
@@ -1529,6 +1545,7 @@ static int gpmc_probe_generic_child(struct platform_device *pdev,
1529 gpmc_read_timings_dt(child, &gpmc_t); 1545 gpmc_read_timings_dt(child, &gpmc_t);
1530 gpmc_cs_set_timings(cs, &gpmc_t); 1546 gpmc_cs_set_timings(cs, &gpmc_t);
1531 1547
1548no_timings:
1532 if (of_platform_device_create(child, NULL, &pdev->dev)) 1549 if (of_platform_device_create(child, NULL, &pdev->dev))
1533 return 0; 1550 return 0;
1534 1551
@@ -1541,42 +1558,6 @@ err:
1541 return ret; 1558 return ret;
1542} 1559}
1543 1560
1544/*
1545 * REVISIT: Add timing support from slls644g.pdf
1546 */
1547static int gpmc_probe_8250(struct platform_device *pdev,
1548 struct device_node *child)
1549{
1550 struct resource res;
1551 unsigned long base;
1552 int ret, cs;
1553
1554 if (of_property_read_u32(child, "reg", &cs) < 0) {
1555 dev_err(&pdev->dev, "%s has no 'reg' property\n",
1556 child->full_name);
1557 return -ENODEV;
1558 }
1559
1560 if (of_address_to_resource(child, 0, &res) < 0) {
1561 dev_err(&pdev->dev, "%s has malformed 'reg' property\n",
1562 child->full_name);
1563 return -ENODEV;
1564 }
1565
1566 ret = gpmc_cs_request(cs, resource_size(&res), &base);
1567 if (ret < 0) {
1568 dev_err(&pdev->dev, "cannot request GPMC CS %d\n", cs);
1569 return ret;
1570 }
1571
1572 if (of_platform_device_create(child, NULL, &pdev->dev))
1573 return 0;
1574
1575 dev_err(&pdev->dev, "failed to create gpmc child %s\n", child->name);
1576
1577 return -ENODEV;
1578}
1579
1580static int gpmc_probe_dt(struct platform_device *pdev) 1561static int gpmc_probe_dt(struct platform_device *pdev)
1581{ 1562{
1582 int ret; 1563 int ret;
@@ -1618,10 +1599,9 @@ static int gpmc_probe_dt(struct platform_device *pdev)
1618 else if (of_node_cmp(child->name, "onenand") == 0) 1599 else if (of_node_cmp(child->name, "onenand") == 0)
1619 ret = gpmc_probe_onenand_child(pdev, child); 1600 ret = gpmc_probe_onenand_child(pdev, child);
1620 else if (of_node_cmp(child->name, "ethernet") == 0 || 1601 else if (of_node_cmp(child->name, "ethernet") == 0 ||
1621 of_node_cmp(child->name, "nor") == 0) 1602 of_node_cmp(child->name, "nor") == 0 ||
1603 of_node_cmp(child->name, "uart") == 0)
1622 ret = gpmc_probe_generic_child(pdev, child); 1604 ret = gpmc_probe_generic_child(pdev, child);
1623 else if (of_node_cmp(child->name, "8250") == 0)
1624 ret = gpmc_probe_8250(pdev, child);
1625 1605
1626 if (WARN(ret < 0, "%s: probing gpmc child %s failed\n", 1606 if (WARN(ret < 0, "%s: probing gpmc child %s failed\n",
1627 __func__, child->full_name)) 1607 __func__, child->full_name))
diff --git a/arch/arm/mach-omap2/omap-secure.h b/arch/arm/mach-omap2/omap-secure.h
index 8cc7d331437d..3e97c6c8ecf1 100644
--- a/arch/arm/mach-omap2/omap-secure.h
+++ b/arch/arm/mach-omap2/omap-secure.h
@@ -76,6 +76,13 @@ static inline void omap_barrier_reserve_memblock(void)
76{ } 76{ }
77#endif 77#endif
78 78
79#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
79void set_cntfreq(void); 80void set_cntfreq(void);
81#else
82static inline void set_cntfreq(void)
83{
84}
85#endif
86
80#endif /* __ASSEMBLER__ */ 87#endif /* __ASSEMBLER__ */
81#endif /* OMAP_ARCH_OMAP_SECURE_H */ 88#endif /* OMAP_ARCH_OMAP_SECURE_H */
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 57911430324e..b39efd46abf9 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -35,7 +35,6 @@
35#include "iomap.h" 35#include "iomap.h"
36#include "common.h" 36#include "common.h"
37#include "mmc.h" 37#include "mmc.h"
38#include "hsmmc.h"
39#include "prminst44xx.h" 38#include "prminst44xx.h"
40#include "prcm_mpu44xx.h" 39#include "prcm_mpu44xx.h"
41#include "omap4-sar-layout.h" 40#include "omap4-sar-layout.h"
@@ -284,59 +283,3 @@ skip_errata_init:
284 omap_wakeupgen_init(); 283 omap_wakeupgen_init();
285 irqchip_init(); 284 irqchip_init();
286} 285}
287
288#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
289static int omap4_twl6030_hsmmc_late_init(struct device *dev)
290{
291 int irq = 0;
292 struct platform_device *pdev = container_of(dev,
293 struct platform_device, dev);
294 struct omap_mmc_platform_data *pdata = dev->platform_data;
295
296 /* Setting MMC1 Card detect Irq */
297 if (pdev->id == 0) {
298 irq = twl6030_mmc_card_detect_config();
299 if (irq < 0) {
300 dev_err(dev, "%s: Error card detect config(%d)\n",
301 __func__, irq);
302 return irq;
303 }
304 pdata->slots[0].card_detect_irq = irq;
305 pdata->slots[0].card_detect = twl6030_mmc_card_detect;
306 }
307 return 0;
308}
309
310static __init void omap4_twl6030_hsmmc_set_late_init(struct device *dev)
311{
312 struct omap_mmc_platform_data *pdata;
313
314 /* dev can be null if CONFIG_MMC_OMAP_HS is not set */
315 if (!dev) {
316 pr_err("Failed %s\n", __func__);
317 return;
318 }
319 pdata = dev->platform_data;
320 pdata->init = omap4_twl6030_hsmmc_late_init;
321}
322
323int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
324{
325 struct omap2_hsmmc_info *c;
326
327 omap_hsmmc_init(controllers);
328 for (c = controllers; c->mmc; c++) {
329 /* pdev can be null if CONFIG_MMC_OMAP_HS is not set */
330 if (!c->pdev)
331 continue;
332 omap4_twl6030_hsmmc_set_late_init(&c->pdev->dev);
333 }
334
335 return 0;
336}
337#else
338int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
339{
340 return 0;
341}
342#endif
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index 53f0735817bb..e0a398cf28d8 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -183,6 +183,10 @@ static int omap_device_build_from_dt(struct platform_device *pdev)
183odbfd_exit1: 183odbfd_exit1:
184 kfree(hwmods); 184 kfree(hwmods);
185odbfd_exit: 185odbfd_exit:
186 /* if data/we are at fault.. load up a fail handler */
187 if (ret)
188 pdev->dev.pm_domain = &omap_device_fail_pm_domain;
189
186 return ret; 190 return ret;
187} 191}
188 192
@@ -604,6 +608,19 @@ static int _od_runtime_resume(struct device *dev)
604 608
605 return pm_generic_runtime_resume(dev); 609 return pm_generic_runtime_resume(dev);
606} 610}
611
612static int _od_fail_runtime_suspend(struct device *dev)
613{
614 dev_warn(dev, "%s: FIXME: missing hwmod/omap_dev info\n", __func__);
615 return -ENODEV;
616}
617
618static int _od_fail_runtime_resume(struct device *dev)
619{
620 dev_warn(dev, "%s: FIXME: missing hwmod/omap_dev info\n", __func__);
621 return -ENODEV;
622}
623
607#endif 624#endif
608 625
609#ifdef CONFIG_SUSPEND 626#ifdef CONFIG_SUSPEND
@@ -657,6 +674,13 @@ static int _od_resume_noirq(struct device *dev)
657#define _od_resume_noirq NULL 674#define _od_resume_noirq NULL
658#endif 675#endif
659 676
677struct dev_pm_domain omap_device_fail_pm_domain = {
678 .ops = {
679 SET_RUNTIME_PM_OPS(_od_fail_runtime_suspend,
680 _od_fail_runtime_resume, NULL)
681 }
682};
683
660struct dev_pm_domain omap_device_pm_domain = { 684struct dev_pm_domain omap_device_pm_domain = {
661 .ops = { 685 .ops = {
662 SET_RUNTIME_PM_OPS(_od_runtime_suspend, _od_runtime_resume, 686 SET_RUNTIME_PM_OPS(_od_runtime_suspend, _od_runtime_resume,
diff --git a/arch/arm/mach-omap2/omap_device.h b/arch/arm/mach-omap2/omap_device.h
index 17ca1aec2710..78c02b355179 100644
--- a/arch/arm/mach-omap2/omap_device.h
+++ b/arch/arm/mach-omap2/omap_device.h
@@ -29,6 +29,7 @@
29#include "omap_hwmod.h" 29#include "omap_hwmod.h"
30 30
31extern struct dev_pm_domain omap_device_pm_domain; 31extern struct dev_pm_domain omap_device_pm_domain;
32extern struct dev_pm_domain omap_device_fail_pm_domain;
32 33
33/* omap_device._state values */ 34/* omap_device._state values */
34#define OMAP_DEVICE_STATE_UNKNOWN 0 35#define OMAP_DEVICE_STATE_UNKNOWN 0
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index e3f0ecaf87dd..8a1b5e0bad40 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -399,7 +399,7 @@ static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
399} 399}
400 400
401/** 401/**
402 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v 402 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
403 * @oh: struct omap_hwmod * 403 * @oh: struct omap_hwmod *
404 * @v: pointer to register contents to modify 404 * @v: pointer to register contents to modify
405 * 405 *
@@ -427,6 +427,36 @@ static int _set_softreset(struct omap_hwmod *oh, u32 *v)
427} 427}
428 428
429/** 429/**
430 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
431 * @oh: struct omap_hwmod *
432 * @v: pointer to register contents to modify
433 *
434 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
435 * error or 0 upon success.
436 */
437static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
438{
439 u32 softrst_mask;
440
441 if (!oh->class->sysc ||
442 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
443 return -EINVAL;
444
445 if (!oh->class->sysc->sysc_fields) {
446 WARN(1,
447 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
448 oh->name);
449 return -EINVAL;
450 }
451
452 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
453
454 *v &= ~softrst_mask;
455
456 return 0;
457}
458
459/**
430 * _wait_softreset_complete - wait for an OCP softreset to complete 460 * _wait_softreset_complete - wait for an OCP softreset to complete
431 * @oh: struct omap_hwmod * to wait on 461 * @oh: struct omap_hwmod * to wait on
432 * 462 *
@@ -785,6 +815,7 @@ static int _init_interface_clks(struct omap_hwmod *oh)
785 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n", 815 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
786 oh->name, os->clk); 816 oh->name, os->clk);
787 ret = -EINVAL; 817 ret = -EINVAL;
818 continue;
788 } 819 }
789 os->_clk = c; 820 os->_clk = c;
790 /* 821 /*
@@ -821,6 +852,7 @@ static int _init_opt_clks(struct omap_hwmod *oh)
821 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n", 852 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
822 oh->name, oc->clk); 853 oh->name, oc->clk);
823 ret = -EINVAL; 854 ret = -EINVAL;
855 continue;
824 } 856 }
825 oc->_clk = c; 857 oc->_clk = c;
826 /* 858 /*
@@ -1911,6 +1943,12 @@ static int _ocp_softreset(struct omap_hwmod *oh)
1911 ret = _set_softreset(oh, &v); 1943 ret = _set_softreset(oh, &v);
1912 if (ret) 1944 if (ret)
1913 goto dis_opt_clks; 1945 goto dis_opt_clks;
1946
1947 _write_sysconfig(v, oh);
1948 ret = _clear_softreset(oh, &v);
1949 if (ret)
1950 goto dis_opt_clks;
1951
1914 _write_sysconfig(v, oh); 1952 _write_sysconfig(v, oh);
1915 1953
1916 if (oh->class->sysc->srst_udelay) 1954 if (oh->class->sysc->srst_udelay)
@@ -2326,38 +2364,80 @@ static int _shutdown(struct omap_hwmod *oh)
2326 return 0; 2364 return 0;
2327} 2365}
2328 2366
2367static int of_dev_find_hwmod(struct device_node *np,
2368 struct omap_hwmod *oh)
2369{
2370 int count, i, res;
2371 const char *p;
2372
2373 count = of_property_count_strings(np, "ti,hwmods");
2374 if (count < 1)
2375 return -ENODEV;
2376
2377 for (i = 0; i < count; i++) {
2378 res = of_property_read_string_index(np, "ti,hwmods",
2379 i, &p);
2380 if (res)
2381 continue;
2382 if (!strcmp(p, oh->name)) {
2383 pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n",
2384 np->name, i, oh->name);
2385 return i;
2386 }
2387 }
2388
2389 return -ENODEV;
2390}
2391
2329/** 2392/**
2330 * of_dev_hwmod_lookup - look up needed hwmod from dt blob 2393 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2331 * @np: struct device_node * 2394 * @np: struct device_node *
2332 * @oh: struct omap_hwmod * 2395 * @oh: struct omap_hwmod *
2396 * @index: index of the entry found
2397 * @found: struct device_node * found or NULL
2333 * 2398 *
2334 * Parse the dt blob and find out needed hwmod. Recursive function is 2399 * Parse the dt blob and find out needed hwmod. Recursive function is
2335 * implemented to take care hierarchical dt blob parsing. 2400 * implemented to take care hierarchical dt blob parsing.
2336 * Return: The device node on success or NULL on failure. 2401 * Return: Returns 0 on success, -ENODEV when not found.
2337 */ 2402 */
2338static struct device_node *of_dev_hwmod_lookup(struct device_node *np, 2403static int of_dev_hwmod_lookup(struct device_node *np,
2339 struct omap_hwmod *oh) 2404 struct omap_hwmod *oh,
2405 int *index,
2406 struct device_node **found)
2340{ 2407{
2341 struct device_node *np0 = NULL, *np1 = NULL; 2408 struct device_node *np0 = NULL;
2342 const char *p; 2409 int res;
2410
2411 res = of_dev_find_hwmod(np, oh);
2412 if (res >= 0) {
2413 *found = np;
2414 *index = res;
2415 return 0;
2416 }
2343 2417
2344 for_each_child_of_node(np, np0) { 2418 for_each_child_of_node(np, np0) {
2345 if (of_find_property(np0, "ti,hwmods", NULL)) { 2419 struct device_node *fc;
2346 p = of_get_property(np0, "ti,hwmods", NULL); 2420 int i;
2347 if (!strcmp(p, oh->name)) 2421
2348 return np0; 2422 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2349 np1 = of_dev_hwmod_lookup(np0, oh); 2423 if (res == 0) {
2350 if (np1) 2424 *found = fc;
2351 return np1; 2425 *index = i;
2426 return 0;
2352 } 2427 }
2353 } 2428 }
2354 return NULL; 2429
2430 *found = NULL;
2431 *index = 0;
2432
2433 return -ENODEV;
2355} 2434}
2356 2435
2357/** 2436/**
2358 * _init_mpu_rt_base - populate the virtual address for a hwmod 2437 * _init_mpu_rt_base - populate the virtual address for a hwmod
2359 * @oh: struct omap_hwmod * to locate the virtual address 2438 * @oh: struct omap_hwmod * to locate the virtual address
2360 * @data: (unused, caller should pass NULL) 2439 * @data: (unused, caller should pass NULL)
2440 * @index: index of the reg entry iospace in device tree
2361 * @np: struct device_node * of the IP block's device node in the DT data 2441 * @np: struct device_node * of the IP block's device node in the DT data
2362 * 2442 *
2363 * Cache the virtual address used by the MPU to access this IP block's 2443 * Cache the virtual address used by the MPU to access this IP block's
@@ -2368,7 +2448,7 @@ static struct device_node *of_dev_hwmod_lookup(struct device_node *np,
2368 * -ENXIO on absent or invalid register target address space. 2448 * -ENXIO on absent or invalid register target address space.
2369 */ 2449 */
2370static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data, 2450static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2371 struct device_node *np) 2451 int index, struct device_node *np)
2372{ 2452{
2373 struct omap_hwmod_addr_space *mem; 2453 struct omap_hwmod_addr_space *mem;
2374 void __iomem *va_start = NULL; 2454 void __iomem *va_start = NULL;
@@ -2390,13 +2470,17 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2390 if (!np) 2470 if (!np)
2391 return -ENXIO; 2471 return -ENXIO;
2392 2472
2393 va_start = of_iomap(np, oh->mpu_rt_idx); 2473 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2394 } else { 2474 } else {
2395 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start); 2475 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2396 } 2476 }
2397 2477
2398 if (!va_start) { 2478 if (!va_start) {
2399 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name); 2479 if (mem)
2480 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2481 else
2482 pr_err("omap_hwmod: %s: Missing dt reg%i for %s\n",
2483 oh->name, index, np->full_name);
2400 return -ENXIO; 2484 return -ENXIO;
2401 } 2485 }
2402 2486
@@ -2422,17 +2506,29 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2422 */ 2506 */
2423static int __init _init(struct omap_hwmod *oh, void *data) 2507static int __init _init(struct omap_hwmod *oh, void *data)
2424{ 2508{
2425 int r; 2509 int r, index;
2426 struct device_node *np = NULL; 2510 struct device_node *np = NULL;
2427 2511
2428 if (oh->_state != _HWMOD_STATE_REGISTERED) 2512 if (oh->_state != _HWMOD_STATE_REGISTERED)
2429 return 0; 2513 return 0;
2430 2514
2431 if (of_have_populated_dt()) 2515 if (of_have_populated_dt()) {
2432 np = of_dev_hwmod_lookup(of_find_node_by_name(NULL, "ocp"), oh); 2516 struct device_node *bus;
2517
2518 bus = of_find_node_by_name(NULL, "ocp");
2519 if (!bus)
2520 return -ENODEV;
2521
2522 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2523 if (r)
2524 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2525 else if (np && index)
2526 pr_warn("omap_hwmod: %s using broken dt data from %s\n",
2527 oh->name, np->name);
2528 }
2433 2529
2434 if (oh->class->sysc) { 2530 if (oh->class->sysc) {
2435 r = _init_mpu_rt_base(oh, NULL, np); 2531 r = _init_mpu_rt_base(oh, NULL, index, np);
2436 if (r < 0) { 2532 if (r < 0) {
2437 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n", 2533 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2438 oh->name); 2534 oh->name);
@@ -3169,6 +3265,11 @@ int omap_hwmod_softreset(struct omap_hwmod *oh)
3169 goto error; 3265 goto error;
3170 _write_sysconfig(v, oh); 3266 _write_sysconfig(v, oh);
3171 3267
3268 ret = _clear_softreset(oh, &v);
3269 if (ret)
3270 goto error;
3271 _write_sysconfig(v, oh);
3272
3172error: 3273error:
3173 return ret; 3274 return ret;
3174} 3275}
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 9e56fabd7fa3..d33742908f97 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1943,7 +1943,8 @@ static struct omap_hwmod_class_sysconfig omap3xxx_usb_host_hs_sysc = {
1943 .syss_offs = 0x0014, 1943 .syss_offs = 0x0014,
1944 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY | 1944 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
1945 SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP | 1945 SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP |
1946 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), 1946 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
1947 SYSS_HAS_RESET_STATUS),
1947 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 1948 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
1948 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), 1949 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
1949 .sysc_fields = &omap_hwmod_sysc_type1, 1950 .sysc_fields = &omap_hwmod_sysc_type1,
@@ -2021,15 +2022,7 @@ static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
2021 * hence HWMOD_SWSUP_MSTANDBY 2022 * hence HWMOD_SWSUP_MSTANDBY
2022 */ 2023 */
2023 2024
2024 /* 2025 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
2025 * During system boot; If the hwmod framework resets the module
2026 * the module will have smart idle settings; which can lead to deadlock
2027 * (above Errata Id:i660); so, dont reset the module during boot;
2028 * Use HWMOD_INIT_NO_RESET.
2029 */
2030
2031 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
2032 HWMOD_INIT_NO_RESET,
2033}; 2026};
2034 2027
2035/* 2028/*
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 1e5b12cb8246..3318cae96e7d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2937,7 +2937,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_usb_host_hs_sysc = {
2937 .sysc_offs = 0x0010, 2937 .sysc_offs = 0x0010,
2938 .syss_offs = 0x0014, 2938 .syss_offs = 0x0014,
2939 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE | 2939 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE |
2940 SYSC_HAS_SOFTRESET), 2940 SYSC_HAS_SOFTRESET | SYSC_HAS_RESET_STATUS),
2941 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 2941 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
2942 SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | 2942 SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
2943 MSTANDBY_SMART | MSTANDBY_SMART_WKUP), 2943 MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
@@ -3001,15 +3001,7 @@ static struct omap_hwmod omap44xx_usb_host_hs_hwmod = {
3001 * hence HWMOD_SWSUP_MSTANDBY 3001 * hence HWMOD_SWSUP_MSTANDBY
3002 */ 3002 */
3003 3003
3004 /* 3004 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
3005 * During system boot; If the hwmod framework resets the module
3006 * the module will have smart idle settings; which can lead to deadlock
3007 * (above Errata Id:i660); so, dont reset the module during boot;
3008 * Use HWMOD_INIT_NO_RESET.
3009 */
3010
3011 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
3012 HWMOD_INIT_NO_RESET,
3013}; 3005};
3014 3006
3015/* 3007/*
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index 9e08d6994a0b..e297d6231c3a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -1544,7 +1544,8 @@ static struct omap_hwmod_class_sysconfig omap54xx_usb_host_hs_sysc = {
1544 .rev_offs = 0x0000, 1544 .rev_offs = 0x0000,
1545 .sysc_offs = 0x0010, 1545 .sysc_offs = 0x0010,
1546 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS | 1546 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS |
1547 SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), 1547 SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
1548 SYSC_HAS_RESET_STATUS),
1548 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 1549 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
1549 SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | 1550 SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
1550 MSTANDBY_SMART | MSTANDBY_SMART_WKUP), 1551 MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
@@ -1598,15 +1599,7 @@ static struct omap_hwmod omap54xx_usb_host_hs_hwmod = {
1598 * hence HWMOD_SWSUP_MSTANDBY 1599 * hence HWMOD_SWSUP_MSTANDBY
1599 */ 1600 */
1600 1601
1601 /* 1602 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
1602 * During system boot; If the hwmod framework resets the module
1603 * the module will have smart idle settings; which can lead to deadlock
1604 * (above Errata Id:i660); so, dont reset the module during boot;
1605 * Use HWMOD_INIT_NO_RESET.
1606 */
1607
1608 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
1609 HWMOD_INIT_NO_RESET,
1610 .main_clk = "l3init_60m_fclk", 1603 .main_clk = "l3init_60m_fclk",
1611 .prcm = { 1604 .prcm = {
1612 .omap4 = { 1605 .omap4 = {
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 10c71450cf63..39f020c982e8 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -139,6 +139,7 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
139 139
140static struct pdata_init pdata_quirks[] __initdata = { 140static struct pdata_init pdata_quirks[] __initdata = {
141#ifdef CONFIG_ARCH_OMAP3 141#ifdef CONFIG_ARCH_OMAP3
142 { "nokia,omap3-n900", hsmmc2_internal_input_clk, },
142 { "nokia,omap3-n9", hsmmc2_internal_input_clk, }, 143 { "nokia,omap3-n9", hsmmc2_internal_input_clk, },
143 { "nokia,omap3-n950", hsmmc2_internal_input_clk, }, 144 { "nokia,omap3-n950", hsmmc2_internal_input_clk, },
144 { "isee,omap3-igep0020", omap3_igep0020_legacy_init, }, 145 { "isee,omap3-igep0020", omap3_igep0020_legacy_init, },
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 93b80e5da8d4..1f3770a8a728 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -120,7 +120,7 @@ static void omap3_save_secure_ram_context(void)
120 * will hang the system. 120 * will hang the system.
121 */ 121 */
122 pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); 122 pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
123 ret = _omap_save_secure_sram((u32 *) 123 ret = _omap_save_secure_sram((u32 *)(unsigned long)
124 __pa(omap3_secure_ram_storage)); 124 __pa(omap3_secure_ram_storage));
125 pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state); 125 pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state);
126 /* Following is for error tracking, it should not happen */ 126 /* Following is for error tracking, it should not happen */
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index e233dfcbc186..93a2a6e4260f 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -128,7 +128,8 @@ skip_voltdm:
128 for (i = 0; i < pwrdm->banks; i++) 128 for (i = 0; i < pwrdm->banks; i++)
129 pwrdm->ret_mem_off_counter[i] = 0; 129 pwrdm->ret_mem_off_counter[i] = 0;
130 130
131 arch_pwrdm->pwrdm_wait_transition(pwrdm); 131 if (arch_pwrdm && arch_pwrdm->pwrdm_wait_transition)
132 arch_pwrdm->pwrdm_wait_transition(pwrdm);
132 pwrdm->state = pwrdm_read_pwrst(pwrdm); 133 pwrdm->state = pwrdm_read_pwrst(pwrdm);
133 pwrdm->state_counter[pwrdm->state] = 1; 134 pwrdm->state_counter[pwrdm->state] = 1;
134 135
diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h b/arch/arm/mach-omap2/prm44xx_54xx.h
index 7a976065e138..8d95aa543ef5 100644
--- a/arch/arm/mach-omap2/prm44xx_54xx.h
+++ b/arch/arm/mach-omap2/prm44xx_54xx.h
@@ -43,7 +43,7 @@ extern void omap4_prm_vcvp_write(u32 val, u8 offset);
43extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); 43extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
44 44
45#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \ 45#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
46 defined(CONFIG_SOC_DRA7XX) 46 defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
47void omap44xx_prm_reconfigure_io_chain(void); 47void omap44xx_prm_reconfigure_io_chain(void);
48#else 48#else
49static inline void omap44xx_prm_reconfigure_io_chain(void) 49static inline void omap44xx_prm_reconfigure_io_chain(void)
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index 0d5dd646f61f..263b15249b5b 100644
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -13,6 +13,7 @@
13 13
14#include <mach/regs-ost.h> 14#include <mach/regs-ost.h>
15#include <mach/reset.h> 15#include <mach/reset.h>
16#include <mach/smemc.h>
16 17
17unsigned int reset_status; 18unsigned int reset_status;
18EXPORT_SYMBOL(reset_status); 19EXPORT_SYMBOL(reset_status);
@@ -81,6 +82,12 @@ static void do_hw_reset(void)
81 writel_relaxed(OSSR_M3, OSSR); 82 writel_relaxed(OSSR_M3, OSSR);
82 /* ... in 100 ms */ 83 /* ... in 100 ms */
83 writel_relaxed(readl_relaxed(OSCR) + 368640, OSMR3); 84 writel_relaxed(readl_relaxed(OSCR) + 368640, OSMR3);
85 /*
86 * SDRAM hangs on watchdog reset on Marvell PXA270 (erratum 71)
87 * we put SDRAM into self-refresh to prevent that
88 */
89 while (1)
90 writel_relaxed(MDREFR_SLFRSH, MDREFR);
84} 91}
85 92
86void pxa_restart(enum reboot_mode mode, const char *cmd) 93void pxa_restart(enum reboot_mode mode, const char *cmd)
@@ -104,4 +111,3 @@ void pxa_restart(enum reboot_mode mode, const char *cmd)
104 break; 111 break;
105 } 112 }
106} 113}
107
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 0206b915a6f6..ef5557b807ed 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -425,57 +425,57 @@ static struct platform_device tosa_power_device = {
425 * Tosa Keyboard 425 * Tosa Keyboard
426 */ 426 */
427static const uint32_t tosakbd_keymap[] = { 427static const uint32_t tosakbd_keymap[] = {
428 KEY(0, 2, KEY_W), 428 KEY(0, 1, KEY_W),
429 KEY(0, 6, KEY_K), 429 KEY(0, 5, KEY_K),
430 KEY(0, 7, KEY_BACKSPACE), 430 KEY(0, 6, KEY_BACKSPACE),
431 KEY(0, 8, KEY_P), 431 KEY(0, 7, KEY_P),
432 KEY(1, 1, KEY_Q), 432 KEY(1, 0, KEY_Q),
433 KEY(1, 2, KEY_E), 433 KEY(1, 1, KEY_E),
434 KEY(1, 3, KEY_T), 434 KEY(1, 2, KEY_T),
435 KEY(1, 4, KEY_Y), 435 KEY(1, 3, KEY_Y),
436 KEY(1, 6, KEY_O), 436 KEY(1, 5, KEY_O),
437 KEY(1, 7, KEY_I), 437 KEY(1, 6, KEY_I),
438 KEY(1, 8, KEY_COMMA), 438 KEY(1, 7, KEY_COMMA),
439 KEY(2, 1, KEY_A), 439 KEY(2, 0, KEY_A),
440 KEY(2, 2, KEY_D), 440 KEY(2, 1, KEY_D),
441 KEY(2, 3, KEY_G), 441 KEY(2, 2, KEY_G),
442 KEY(2, 4, KEY_U), 442 KEY(2, 3, KEY_U),
443 KEY(2, 6, KEY_L), 443 KEY(2, 5, KEY_L),
444 KEY(2, 7, KEY_ENTER), 444 KEY(2, 6, KEY_ENTER),
445 KEY(2, 8, KEY_DOT), 445 KEY(2, 7, KEY_DOT),
446 KEY(3, 1, KEY_Z), 446 KEY(3, 0, KEY_Z),
447 KEY(3, 2, KEY_C), 447 KEY(3, 1, KEY_C),
448 KEY(3, 3, KEY_V), 448 KEY(3, 2, KEY_V),
449 KEY(3, 4, KEY_J), 449 KEY(3, 3, KEY_J),
450 KEY(3, 5, TOSA_KEY_ADDRESSBOOK), 450 KEY(3, 4, TOSA_KEY_ADDRESSBOOK),
451 KEY(3, 6, TOSA_KEY_CANCEL), 451 KEY(3, 5, TOSA_KEY_CANCEL),
452 KEY(3, 7, TOSA_KEY_CENTER), 452 KEY(3, 6, TOSA_KEY_CENTER),
453 KEY(3, 8, TOSA_KEY_OK), 453 KEY(3, 7, TOSA_KEY_OK),
454 KEY(3, 9, KEY_LEFTSHIFT), 454 KEY(3, 8, KEY_LEFTSHIFT),
455 KEY(4, 1, KEY_S), 455 KEY(4, 0, KEY_S),
456 KEY(4, 2, KEY_R), 456 KEY(4, 1, KEY_R),
457 KEY(4, 3, KEY_B), 457 KEY(4, 2, KEY_B),
458 KEY(4, 4, KEY_N), 458 KEY(4, 3, KEY_N),
459 KEY(4, 5, TOSA_KEY_CALENDAR), 459 KEY(4, 4, TOSA_KEY_CALENDAR),
460 KEY(4, 6, TOSA_KEY_HOMEPAGE), 460 KEY(4, 5, TOSA_KEY_HOMEPAGE),
461 KEY(4, 7, KEY_LEFTCTRL), 461 KEY(4, 6, KEY_LEFTCTRL),
462 KEY(4, 8, TOSA_KEY_LIGHT), 462 KEY(4, 7, TOSA_KEY_LIGHT),
463 KEY(4, 10, KEY_RIGHTSHIFT), 463 KEY(4, 9, KEY_RIGHTSHIFT),
464 KEY(5, 1, KEY_TAB), 464 KEY(5, 0, KEY_TAB),
465 KEY(5, 2, KEY_SLASH), 465 KEY(5, 1, KEY_SLASH),
466 KEY(5, 3, KEY_H), 466 KEY(5, 2, KEY_H),
467 KEY(5, 4, KEY_M), 467 KEY(5, 3, KEY_M),
468 KEY(5, 5, TOSA_KEY_MENU), 468 KEY(5, 4, TOSA_KEY_MENU),
469 KEY(5, 7, KEY_UP), 469 KEY(5, 6, KEY_UP),
470 KEY(5, 11, TOSA_KEY_FN), 470 KEY(5, 10, TOSA_KEY_FN),
471 KEY(6, 1, KEY_X), 471 KEY(6, 0, KEY_X),
472 KEY(6, 2, KEY_F), 472 KEY(6, 1, KEY_F),
473 KEY(6, 3, KEY_SPACE), 473 KEY(6, 2, KEY_SPACE),
474 KEY(6, 4, KEY_APOSTROPHE), 474 KEY(6, 3, KEY_APOSTROPHE),
475 KEY(6, 5, TOSA_KEY_MAIL), 475 KEY(6, 4, TOSA_KEY_MAIL),
476 KEY(6, 6, KEY_LEFT), 476 KEY(6, 5, KEY_LEFT),
477 KEY(6, 7, KEY_DOWN), 477 KEY(6, 6, KEY_DOWN),
478 KEY(6, 8, KEY_RIGHT), 478 KEY(6, 7, KEY_RIGHT),
479}; 479};
480 480
481static struct matrix_keymap_data tosakbd_keymap_data = { 481static struct matrix_keymap_data tosakbd_keymap_data = {
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 037100a1563a..aee77f06f887 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -10,6 +10,7 @@ config ARCH_SOCFPGA
10 select GENERIC_CLOCKEVENTS 10 select GENERIC_CLOCKEVENTS
11 select GPIO_PL061 if GPIOLIB 11 select GPIO_PL061 if GPIOLIB
12 select HAVE_ARM_SCU 12 select HAVE_ARM_SCU
13 select HAVE_ARM_TWD if SMP
13 select HAVE_SMP 14 select HAVE_SMP
14 select MFD_SYSCON 15 select MFD_SYSCON
15 select SPARSE_IRQ 16 select SPARSE_IRQ
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c
index d4639c506622..3a9c1f1c219d 100644
--- a/arch/arm/mach-tegra/fuse.c
+++ b/arch/arm/mach-tegra/fuse.c
@@ -198,10 +198,12 @@ void __init tegra_init_fuse(void)
198 switch (tegra_chip_id) { 198 switch (tegra_chip_id) {
199 case TEGRA20: 199 case TEGRA20:
200 tegra20_fuse_init_randomness(); 200 tegra20_fuse_init_randomness();
201 break;
201 case TEGRA30: 202 case TEGRA30:
202 case TEGRA114: 203 case TEGRA114:
203 default: 204 default:
204 tegra30_fuse_init_randomness(); 205 tegra30_fuse_init_randomness();
206 break;
205 } 207 }
206 208
207 pr_info("Tegra Revision: %s SKU: %d CPU Process: %d Core Process: %d\n", 209 pr_info("Tegra Revision: %s SKU: %d CPU Process: %d Core Process: %d\n",
@@ -209,13 +211,3 @@ void __init tegra_init_fuse(void)
209 tegra_sku_id, tegra_cpu_process_id, 211 tegra_sku_id, tegra_cpu_process_id,
210 tegra_core_process_id); 212 tegra_core_process_id);
211} 213}
212
213unsigned long long tegra_chip_uid(void)
214{
215 unsigned long long lo, hi;
216
217 lo = tegra_fuse_readl(FUSE_UID_LOW);
218 hi = tegra_fuse_readl(FUSE_UID_HIGH);
219 return (hi << 32ull) | lo;
220}
221EXPORT_SYMBOL(tegra_chip_uid);
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 2e85c1e72535..12c7e5c03ea4 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -140,6 +140,10 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
140 /* Requires call-back bindings. */ 140 /* Requires call-back bindings. */
141 OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata), 141 OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
142 /* Requires DMA bindings. */ 142 /* Requires DMA bindings. */
143 OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0", &mop500_sdi0_data),
144 OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1", &mop500_sdi1_data),
145 OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2", &mop500_sdi2_data),
146 OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4", &mop500_sdi4_data),
143 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000, 147 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
144 "ux500-msp-i2s.0", &msp0_platform_data), 148 "ux500-msp-i2s.0", &msp0_platform_data),
145 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000, 149 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
diff --git a/arch/arm/mach-vexpress/spc.c b/arch/arm/mach-vexpress/spc.c
index 033d34dcbd3f..c26ef5b92ca7 100644
--- a/arch/arm/mach-vexpress/spc.c
+++ b/arch/arm/mach-vexpress/spc.c
@@ -53,6 +53,11 @@
53#define A15_BX_ADDR0 0x68 53#define A15_BX_ADDR0 0x68
54#define A7_BX_ADDR0 0x78 54#define A7_BX_ADDR0 0x78
55 55
56/* SPC CPU/cluster reset statue */
57#define STANDBYWFI_STAT 0x3c
58#define STANDBYWFI_STAT_A15_CPU_MASK(cpu) (1 << (cpu))
59#define STANDBYWFI_STAT_A7_CPU_MASK(cpu) (1 << (3 + (cpu)))
60
56/* SPC system config interface registers */ 61/* SPC system config interface registers */
57#define SYSCFG_WDATA 0x70 62#define SYSCFG_WDATA 0x70
58#define SYSCFG_RDATA 0x74 63#define SYSCFG_RDATA 0x74
@@ -213,6 +218,41 @@ void ve_spc_powerdown(u32 cluster, bool enable)
213 writel_relaxed(enable, info->baseaddr + pwdrn_reg); 218 writel_relaxed(enable, info->baseaddr + pwdrn_reg);
214} 219}
215 220
221static u32 standbywfi_cpu_mask(u32 cpu, u32 cluster)
222{
223 return cluster_is_a15(cluster) ?
224 STANDBYWFI_STAT_A15_CPU_MASK(cpu)
225 : STANDBYWFI_STAT_A7_CPU_MASK(cpu);
226}
227
228/**
229 * ve_spc_cpu_in_wfi(u32 cpu, u32 cluster)
230 *
231 * @cpu: mpidr[7:0] bitfield describing CPU affinity level within cluster
232 * @cluster: mpidr[15:8] bitfield describing cluster affinity level
233 *
234 * @return: non-zero if and only if the specified CPU is in WFI
235 *
236 * Take care when interpreting the result of this function: a CPU might
237 * be in WFI temporarily due to idle, and is not necessarily safely
238 * parked.
239 */
240int ve_spc_cpu_in_wfi(u32 cpu, u32 cluster)
241{
242 int ret;
243 u32 mask = standbywfi_cpu_mask(cpu, cluster);
244
245 if (cluster >= MAX_CLUSTERS)
246 return 1;
247
248 ret = readl_relaxed(info->baseaddr + STANDBYWFI_STAT);
249
250 pr_debug("%s: PCFGREG[0x%X] = 0x%08X, mask = 0x%X\n",
251 __func__, STANDBYWFI_STAT, ret, mask);
252
253 return ret & mask;
254}
255
216static int ve_spc_get_performance(int cluster, u32 *freq) 256static int ve_spc_get_performance(int cluster, u32 *freq)
217{ 257{
218 struct ve_spc_opp *opps = info->opps[cluster]; 258 struct ve_spc_opp *opps = info->opps[cluster];
diff --git a/arch/arm/mach-vexpress/spc.h b/arch/arm/mach-vexpress/spc.h
index dbd44c3720f9..793d065243b9 100644
--- a/arch/arm/mach-vexpress/spc.h
+++ b/arch/arm/mach-vexpress/spc.h
@@ -20,5 +20,6 @@ void ve_spc_global_wakeup_irq(bool set);
20void ve_spc_cpu_wakeup_irq(u32 cluster, u32 cpu, bool set); 20void ve_spc_cpu_wakeup_irq(u32 cluster, u32 cpu, bool set);
21void ve_spc_set_resume_addr(u32 cluster, u32 cpu, u32 addr); 21void ve_spc_set_resume_addr(u32 cluster, u32 cpu, u32 addr);
22void ve_spc_powerdown(u32 cluster, bool enable); 22void ve_spc_powerdown(u32 cluster, bool enable);
23int ve_spc_cpu_in_wfi(u32 cpu, u32 cluster);
23 24
24#endif 25#endif
diff --git a/arch/arm/mach-vexpress/tc2_pm.c b/arch/arm/mach-vexpress/tc2_pm.c
index 05a364c5077a..29e7785a54bc 100644
--- a/arch/arm/mach-vexpress/tc2_pm.c
+++ b/arch/arm/mach-vexpress/tc2_pm.c
@@ -12,6 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14 14
15#include <linux/delay.h>
15#include <linux/init.h> 16#include <linux/init.h>
16#include <linux/io.h> 17#include <linux/io.h>
17#include <linux/kernel.h> 18#include <linux/kernel.h>
@@ -32,11 +33,17 @@
32#include "spc.h" 33#include "spc.h"
33 34
34/* SCC conf registers */ 35/* SCC conf registers */
36#define RESET_CTRL 0x018
37#define RESET_A15_NCORERESET(cpu) (1 << (2 + (cpu)))
38#define RESET_A7_NCORERESET(cpu) (1 << (16 + (cpu)))
39
35#define A15_CONF 0x400 40#define A15_CONF 0x400
36#define A7_CONF 0x500 41#define A7_CONF 0x500
37#define SYS_INFO 0x700 42#define SYS_INFO 0x700
38#define SPC_BASE 0xb00 43#define SPC_BASE 0xb00
39 44
45static void __iomem *scc;
46
40/* 47/*
41 * We can't use regular spinlocks. In the switcher case, it is possible 48 * We can't use regular spinlocks. In the switcher case, it is possible
42 * for an outbound CPU to call power_down() after its inbound counterpart 49 * for an outbound CPU to call power_down() after its inbound counterpart
@@ -190,6 +197,55 @@ static void tc2_pm_power_down(void)
190 tc2_pm_down(0); 197 tc2_pm_down(0);
191} 198}
192 199
200static int tc2_core_in_reset(unsigned int cpu, unsigned int cluster)
201{
202 u32 mask = cluster ?
203 RESET_A7_NCORERESET(cpu)
204 : RESET_A15_NCORERESET(cpu);
205
206 return !(readl_relaxed(scc + RESET_CTRL) & mask);
207}
208
209#define POLL_MSEC 10
210#define TIMEOUT_MSEC 1000
211
212static int tc2_pm_power_down_finish(unsigned int cpu, unsigned int cluster)
213{
214 unsigned tries;
215
216 pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
217 BUG_ON(cluster >= TC2_CLUSTERS || cpu >= TC2_MAX_CPUS_PER_CLUSTER);
218
219 for (tries = 0; tries < TIMEOUT_MSEC / POLL_MSEC; ++tries) {
220 /*
221 * Only examine the hardware state if the target CPU has
222 * caught up at least as far as tc2_pm_down():
223 */
224 if (ACCESS_ONCE(tc2_pm_use_count[cpu][cluster]) == 0) {
225 pr_debug("%s(cpu=%u, cluster=%u): RESET_CTRL = 0x%08X\n",
226 __func__, cpu, cluster,
227 readl_relaxed(scc + RESET_CTRL));
228
229 /*
230 * We need the CPU to reach WFI, but the power
231 * controller may put the cluster in reset and
232 * power it off as soon as that happens, before
233 * we have a chance to see STANDBYWFI.
234 *
235 * So we need to check for both conditions:
236 */
237 if (tc2_core_in_reset(cpu, cluster) ||
238 ve_spc_cpu_in_wfi(cpu, cluster))
239 return 0; /* success: the CPU is halted */
240 }
241
242 /* Otherwise, wait and retry: */
243 msleep(POLL_MSEC);
244 }
245
246 return -ETIMEDOUT; /* timeout */
247}
248
193static void tc2_pm_suspend(u64 residency) 249static void tc2_pm_suspend(u64 residency)
194{ 250{
195 unsigned int mpidr, cpu, cluster; 251 unsigned int mpidr, cpu, cluster;
@@ -232,10 +288,11 @@ static void tc2_pm_powered_up(void)
232} 288}
233 289
234static const struct mcpm_platform_ops tc2_pm_power_ops = { 290static const struct mcpm_platform_ops tc2_pm_power_ops = {
235 .power_up = tc2_pm_power_up, 291 .power_up = tc2_pm_power_up,
236 .power_down = tc2_pm_power_down, 292 .power_down = tc2_pm_power_down,
237 .suspend = tc2_pm_suspend, 293 .power_down_finish = tc2_pm_power_down_finish,
238 .powered_up = tc2_pm_powered_up, 294 .suspend = tc2_pm_suspend,
295 .powered_up = tc2_pm_powered_up,
239}; 296};
240 297
241static bool __init tc2_pm_usage_count_init(void) 298static bool __init tc2_pm_usage_count_init(void)
@@ -269,7 +326,6 @@ static void __naked tc2_pm_power_up_setup(unsigned int affinity_level)
269static int __init tc2_pm_init(void) 326static int __init tc2_pm_init(void)
270{ 327{
271 int ret, irq; 328 int ret, irq;
272 void __iomem *scc;
273 u32 a15_cluster_id, a7_cluster_id, sys_info; 329 u32 a15_cluster_id, a7_cluster_id, sys_info;
274 struct device_node *np; 330 struct device_node *np;
275 331
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 79f8b39801a8..f61a5707823a 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -9,6 +9,7 @@
9 * 9 *
10 * DMA uncached mapping support. 10 * DMA uncached mapping support.
11 */ 11 */
12#include <linux/bootmem.h>
12#include <linux/module.h> 13#include <linux/module.h>
13#include <linux/mm.h> 14#include <linux/mm.h>
14#include <linux/gfp.h> 15#include <linux/gfp.h>
@@ -157,6 +158,44 @@ struct dma_map_ops arm_coherent_dma_ops = {
157}; 158};
158EXPORT_SYMBOL(arm_coherent_dma_ops); 159EXPORT_SYMBOL(arm_coherent_dma_ops);
159 160
161static int __dma_supported(struct device *dev, u64 mask, bool warn)
162{
163 unsigned long max_dma_pfn;
164
165 /*
166 * If the mask allows for more memory than we can address,
167 * and we actually have that much memory, then we must
168 * indicate that DMA to this device is not supported.
169 */
170 if (sizeof(mask) != sizeof(dma_addr_t) &&
171 mask > (dma_addr_t)~0 &&
172 dma_to_pfn(dev, ~0) < max_pfn) {
173 if (warn) {
174 dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
175 mask);
176 dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
177 }
178 return 0;
179 }
180
181 max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);
182
183 /*
184 * Translate the device's DMA mask to a PFN limit. This
185 * PFN number includes the page which we can DMA to.
186 */
187 if (dma_to_pfn(dev, mask) < max_dma_pfn) {
188 if (warn)
189 dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
190 mask,
191 dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
192 max_dma_pfn + 1);
193 return 0;
194 }
195
196 return 1;
197}
198
160static u64 get_coherent_dma_mask(struct device *dev) 199static u64 get_coherent_dma_mask(struct device *dev)
161{ 200{
162 u64 mask = (u64)DMA_BIT_MASK(32); 201 u64 mask = (u64)DMA_BIT_MASK(32);
@@ -173,32 +212,8 @@ static u64 get_coherent_dma_mask(struct device *dev)
173 return 0; 212 return 0;
174 } 213 }
175 214
176 /* 215 if (!__dma_supported(dev, mask, true))
177 * If the mask allows for more memory than we can address,
178 * and we actually have that much memory, then fail the
179 * allocation.
180 */
181 if (sizeof(mask) != sizeof(dma_addr_t) &&
182 mask > (dma_addr_t)~0 &&
183 dma_to_pfn(dev, ~0) > arm_dma_pfn_limit) {
184 dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
185 mask);
186 dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
187 return 0;
188 }
189
190 /*
191 * Now check that the mask, when translated to a PFN,
192 * fits within the allowable addresses which we can
193 * allocate.
194 */
195 if (dma_to_pfn(dev, mask) < arm_dma_pfn_limit) {
196 dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
197 mask,
198 dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
199 arm_dma_pfn_limit + 1);
200 return 0; 216 return 0;
201 }
202 } 217 }
203 218
204 return mask; 219 return mask;
@@ -1027,28 +1042,7 @@ void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1027 */ 1042 */
1028int dma_supported(struct device *dev, u64 mask) 1043int dma_supported(struct device *dev, u64 mask)
1029{ 1044{
1030 unsigned long limit; 1045 return __dma_supported(dev, mask, false);
1031
1032 /*
1033 * If the mask allows for more memory than we can address,
1034 * and we actually have that much memory, then we must
1035 * indicate that DMA to this device is not supported.
1036 */
1037 if (sizeof(mask) != sizeof(dma_addr_t) &&
1038 mask > (dma_addr_t)~0 &&
1039 dma_to_pfn(dev, ~0) > arm_dma_pfn_limit)
1040 return 0;
1041
1042 /*
1043 * Translate the device's DMA mask to a PFN limit. This
1044 * PFN number includes the page which we can DMA to.
1045 */
1046 limit = dma_to_pfn(dev, mask);
1047
1048 if (limit < arm_dma_pfn_limit)
1049 return 0;
1050
1051 return 1;
1052} 1046}
1053EXPORT_SYMBOL(dma_supported); 1047EXPORT_SYMBOL(dma_supported);
1054 1048
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 3e8f106ee5fe..1f7b19a47060 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -229,7 +229,7 @@ void __init setup_dma_zone(const struct machine_desc *mdesc)
229#ifdef CONFIG_ZONE_DMA 229#ifdef CONFIG_ZONE_DMA
230 if (mdesc->dma_zone_size) { 230 if (mdesc->dma_zone_size) {
231 arm_dma_zone_size = mdesc->dma_zone_size; 231 arm_dma_zone_size = mdesc->dma_zone_size;
232 arm_dma_limit = PHYS_OFFSET + arm_dma_zone_size - 1; 232 arm_dma_limit = __pv_phys_offset + arm_dma_zone_size - 1;
233 } else 233 } else
234 arm_dma_limit = 0xffffffff; 234 arm_dma_limit = 0xffffffff;
235 arm_dma_pfn_limit = arm_dma_limit >> PAGE_SHIFT; 235 arm_dma_pfn_limit = arm_dma_limit >> PAGE_SHIFT;
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index d27158c38eb0..5e85ed371364 100644
--- a/arch/arm/mm/mmap.c
+++ b/arch/arm/mm/mmap.c
@@ -146,7 +146,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
146 146
147 info.flags = VM_UNMAPPED_AREA_TOPDOWN; 147 info.flags = VM_UNMAPPED_AREA_TOPDOWN;
148 info.length = len; 148 info.length = len;
149 info.low_limit = PAGE_SIZE; 149 info.low_limit = FIRST_USER_ADDRESS;
150 info.high_limit = mm->mmap_base; 150 info.high_limit = mm->mmap_base;
151 info.align_mask = do_align ? (PAGE_MASK & (SHMLBA - 1)) : 0; 151 info.align_mask = do_align ? (PAGE_MASK & (SHMLBA - 1)) : 0;
152 info.align_offset = pgoff << PAGE_SHIFT; 152 info.align_offset = pgoff << PAGE_SHIFT;
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 78eeeca78f5a..580ef2de82d7 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -558,8 +558,8 @@ static void __init build_mem_type_table(void)
558 mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_WB; 558 mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_WB;
559 break; 559 break;
560 } 560 }
561 printk("Memory policy: ECC %sabled, Data cache %s\n", 561 pr_info("Memory policy: %sData cache %s\n",
562 ecc_mask ? "en" : "dis", cp->policy); 562 ecc_mask ? "ECC enabled, " : "", cp->policy);
563 563
564 for (i = 0; i < ARRAY_SIZE(mem_types); i++) { 564 for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
565 struct mem_type *t = &mem_types[i]; 565 struct mem_type *t = &mem_types[i];
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 5c668b7a31f9..55764a7ef1f0 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -18,6 +18,7 @@
18#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
19#include <asm/cputype.h> 19#include <asm/cputype.h>
20#include <asm/mpu.h> 20#include <asm/mpu.h>
21#include <asm/procinfo.h>
21 22
22#include "mm.h" 23#include "mm.h"
23 24
diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c
index 0acb089d0f70..1046b373d1ae 100644
--- a/arch/arm/mm/pgd.c
+++ b/arch/arm/mm/pgd.c
@@ -87,7 +87,8 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
87 init_pud = pud_offset(init_pgd, 0); 87 init_pud = pud_offset(init_pgd, 0);
88 init_pmd = pmd_offset(init_pud, 0); 88 init_pmd = pmd_offset(init_pud, 0);
89 init_pte = pte_offset_map(init_pmd, 0); 89 init_pte = pte_offset_map(init_pmd, 0);
90 set_pte_ext(new_pte, *init_pte, 0); 90 set_pte_ext(new_pte + 0, init_pte[0], 0);
91 set_pte_ext(new_pte + 1, init_pte[1], 0);
91 pte_unmap(init_pte); 92 pte_unmap(init_pte);
92 pte_unmap(new_pte); 93 pte_unmap(new_pte);
93 } 94 }
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 60920f62fdf5..bd1781979a39 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -92,7 +92,7 @@ ENDPROC(cpu_v7_dcache_clean_area)
92 92
93/* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */ 93/* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */
94.globl cpu_v7_suspend_size 94.globl cpu_v7_suspend_size
95.equ cpu_v7_suspend_size, 4 * 8 95.equ cpu_v7_suspend_size, 4 * 9
96#ifdef CONFIG_ARM_CPU_SUSPEND 96#ifdef CONFIG_ARM_CPU_SUSPEND
97ENTRY(cpu_v7_do_suspend) 97ENTRY(cpu_v7_do_suspend)
98 stmfd sp!, {r4 - r10, lr} 98 stmfd sp!, {r4 - r10, lr}
@@ -101,13 +101,17 @@ ENTRY(cpu_v7_do_suspend)
101 stmia r0!, {r4 - r5} 101 stmia r0!, {r4 - r5}
102#ifdef CONFIG_MMU 102#ifdef CONFIG_MMU
103 mrc p15, 0, r6, c3, c0, 0 @ Domain ID 103 mrc p15, 0, r6, c3, c0, 0 @ Domain ID
104#ifdef CONFIG_ARM_LPAE
105 mrrc p15, 1, r5, r7, c2 @ TTB 1
106#else
104 mrc p15, 0, r7, c2, c0, 1 @ TTB 1 107 mrc p15, 0, r7, c2, c0, 1 @ TTB 1
108#endif
105 mrc p15, 0, r11, c2, c0, 2 @ TTB control register 109 mrc p15, 0, r11, c2, c0, 2 @ TTB control register
106#endif 110#endif
107 mrc p15, 0, r8, c1, c0, 0 @ Control register 111 mrc p15, 0, r8, c1, c0, 0 @ Control register
108 mrc p15, 0, r9, c1, c0, 1 @ Auxiliary control register 112 mrc p15, 0, r9, c1, c0, 1 @ Auxiliary control register
109 mrc p15, 0, r10, c1, c0, 2 @ Co-processor access control 113 mrc p15, 0, r10, c1, c0, 2 @ Co-processor access control
110 stmia r0, {r6 - r11} 114 stmia r0, {r5 - r11}
111 ldmfd sp!, {r4 - r10, pc} 115 ldmfd sp!, {r4 - r10, pc}
112ENDPROC(cpu_v7_do_suspend) 116ENDPROC(cpu_v7_do_suspend)
113 117
@@ -118,16 +122,19 @@ ENTRY(cpu_v7_do_resume)
118 ldmia r0!, {r4 - r5} 122 ldmia r0!, {r4 - r5}
119 mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID 123 mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID
120 mcr p15, 0, r5, c13, c0, 3 @ User r/o thread ID 124 mcr p15, 0, r5, c13, c0, 3 @ User r/o thread ID
121 ldmia r0, {r6 - r11} 125 ldmia r0, {r5 - r11}
122#ifdef CONFIG_MMU 126#ifdef CONFIG_MMU
123 mcr p15, 0, ip, c8, c7, 0 @ invalidate TLBs 127 mcr p15, 0, ip, c8, c7, 0 @ invalidate TLBs
124 mcr p15, 0, r6, c3, c0, 0 @ Domain ID 128 mcr p15, 0, r6, c3, c0, 0 @ Domain ID
125#ifndef CONFIG_ARM_LPAE 129#ifdef CONFIG_ARM_LPAE
130 mcrr p15, 0, r1, ip, c2 @ TTB 0
131 mcrr p15, 1, r5, r7, c2 @ TTB 1
132#else
126 ALT_SMP(orr r1, r1, #TTB_FLAGS_SMP) 133 ALT_SMP(orr r1, r1, #TTB_FLAGS_SMP)
127 ALT_UP(orr r1, r1, #TTB_FLAGS_UP) 134 ALT_UP(orr r1, r1, #TTB_FLAGS_UP)
128#endif
129 mcr p15, 0, r1, c2, c0, 0 @ TTB 0 135 mcr p15, 0, r1, c2, c0, 0 @ TTB 0
130 mcr p15, 0, r7, c2, c0, 1 @ TTB 1 136 mcr p15, 0, r7, c2, c0, 1 @ TTB 1
137#endif
131 mcr p15, 0, r11, c2, c0, 2 @ TTB control register 138 mcr p15, 0, r11, c2, c0, 2 @ TTB control register
132 ldr r4, =PRRR @ PRRR 139 ldr r4, =PRRR @ PRRR
133 ldr r5, =NMRR @ NMRR 140 ldr r5, =NMRR @ NMRR
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index fb92abb91628..2861b155485a 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -336,8 +336,11 @@ static inline void __omap_dm_timer_enable_posted(struct omap_dm_timer *timer)
336 if (timer->posted) 336 if (timer->posted)
337 return; 337 return;
338 338
339 if (timer->errata & OMAP_TIMER_ERRATA_I103_I767) 339 if (timer->errata & OMAP_TIMER_ERRATA_I103_I767) {
340 timer->posted = OMAP_TIMER_NONPOSTED;
341 __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG, 0, 0);
340 return; 342 return;
343 }
341 344
342 __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG, 345 __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG,
343 OMAP_TIMER_CTRL_POSTED, 0); 346 OMAP_TIMER_CTRL_POSTED, 0);
diff --git a/arch/arm/xen/p2m.c b/arch/arm/xen/p2m.c
index 23732cdff551..b31ee1b275b0 100644
--- a/arch/arm/xen/p2m.c
+++ b/arch/arm/xen/p2m.c
@@ -25,8 +25,9 @@ struct xen_p2m_entry {
25 struct rb_node rbnode_phys; 25 struct rb_node rbnode_phys;
26}; 26};
27 27
28rwlock_t p2m_lock; 28static rwlock_t p2m_lock;
29struct rb_root phys_to_mach = RB_ROOT; 29struct rb_root phys_to_mach = RB_ROOT;
30EXPORT_SYMBOL_GPL(phys_to_mach);
30static struct rb_root mach_to_phys = RB_ROOT; 31static struct rb_root mach_to_phys = RB_ROOT;
31 32
32static int xen_add_phys_to_mach_entry(struct xen_p2m_entry *new) 33static int xen_add_phys_to_mach_entry(struct xen_p2m_entry *new)
@@ -200,7 +201,7 @@ bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn)
200} 201}
201EXPORT_SYMBOL_GPL(__set_phys_to_machine); 202EXPORT_SYMBOL_GPL(__set_phys_to_machine);
202 203
203int p2m_init(void) 204static int p2m_init(void)
204{ 205{
205 rwlock_init(&p2m_lock); 206 rwlock_init(&p2m_lock);
206 return 0; 207 return 0;
generated by cgit v1.2.2 (git 2.25.0) at 2026-04-09 03:45:38 -0400