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authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>2013-11-21 02:25:32 -0500
committerSimon Horman <horms+renesas@verge.net.au>2013-12-10 03:20:14 -0500
commitb42831843e66688a18a65f0d24e79473b76905db (patch)
treed440948d521cdabd510555569cc43cf6462b684e /arch/arm
parent42a1ba525dd74552f68f3aee0756d16987ad719e (diff)
ARM: shmobile: r8a7778: add HPBIFx DMAEngine support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-shmobile/include/mach/r8a7778.h18
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7778.c51
2 files changed, 69 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
index 441886c9714b..b497f932d04f 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
@@ -27,6 +27,24 @@ enum {
27 HPBDMA_SLAVE_DUMMY, 27 HPBDMA_SLAVE_DUMMY,
28 HPBDMA_SLAVE_SDHI0_TX, 28 HPBDMA_SLAVE_SDHI0_TX,
29 HPBDMA_SLAVE_SDHI0_RX, 29 HPBDMA_SLAVE_SDHI0_RX,
30 HPBDMA_SLAVE_HPBIF0_TX,
31 HPBDMA_SLAVE_HPBIF0_RX,
32 HPBDMA_SLAVE_HPBIF1_TX,
33 HPBDMA_SLAVE_HPBIF1_RX,
34 HPBDMA_SLAVE_HPBIF2_TX,
35 HPBDMA_SLAVE_HPBIF2_RX,
36 HPBDMA_SLAVE_HPBIF3_TX,
37 HPBDMA_SLAVE_HPBIF3_RX,
38 HPBDMA_SLAVE_HPBIF4_TX,
39 HPBDMA_SLAVE_HPBIF4_RX,
40 HPBDMA_SLAVE_HPBIF5_TX,
41 HPBDMA_SLAVE_HPBIF5_RX,
42 HPBDMA_SLAVE_HPBIF6_TX,
43 HPBDMA_SLAVE_HPBIF6_RX,
44 HPBDMA_SLAVE_HPBIF7_TX,
45 HPBDMA_SLAVE_HPBIF7_RX,
46 HPBDMA_SLAVE_HPBIF8_TX,
47 HPBDMA_SLAVE_HPBIF8_RX,
30}; 48};
31 49
32extern void r8a7778_add_standard_devices(void); 50extern void r8a7778_add_standard_devices(void);
diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
index 03fcc5974ef9..81701cfb6cc6 100644
--- a/arch/arm/mach-shmobile/setup-r8a7778.c
+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
@@ -319,6 +319,29 @@ void __init r8a7778_add_dt_devices(void)
319#define HPB_DMAE_ASYNCMDR_ASMD21_SINGLE BIT(1) /* SDHI0 */ 319#define HPB_DMAE_ASYNCMDR_ASMD21_SINGLE BIT(1) /* SDHI0 */
320#define HPB_DMAE_ASYNCMDR_ASMD21_MULTI 0 /* SDHI0 */ 320#define HPB_DMAE_ASYNCMDR_ASMD21_MULTI 0 /* SDHI0 */
321 321
322#define HPBDMA_HPBIF(_id) \
323{ \
324 .id = HPBDMA_SLAVE_HPBIF## _id ##_TX, \
325 .addr = 0xffda0000 + (_id * 0x1000), \
326 .dcr = HPB_DMAE_DCR_CT | \
327 HPB_DMAE_DCR_DIP | \
328 HPB_DMAE_DCR_SPDS_32BIT | \
329 HPB_DMAE_DCR_DMDL | \
330 HPB_DMAE_DCR_DPDS_32BIT, \
331 .port = 0x1111, \
332 .dma_ch = (28 + _id), \
333}, { \
334 .id = HPBDMA_SLAVE_HPBIF## _id ##_RX, \
335 .addr = 0xffda0000 + (_id * 0x1000), \
336 .dcr = HPB_DMAE_DCR_CT | \
337 HPB_DMAE_DCR_DIP | \
338 HPB_DMAE_DCR_SMDL | \
339 HPB_DMAE_DCR_SPDS_32BIT | \
340 HPB_DMAE_DCR_DPDS_32BIT, \
341 .port = 0x1111, \
342 .dma_ch = (28 + _id), \
343}
344
322static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = { 345static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
323 { 346 {
324 .id = HPBDMA_SLAVE_SDHI0_TX, 347 .id = HPBDMA_SLAVE_SDHI0_TX,
@@ -349,11 +372,39 @@ static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
349 .flags = HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE, 372 .flags = HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE,
350 .dma_ch = 22, 373 .dma_ch = 22,
351 }, 374 },
375
376 HPBDMA_HPBIF(0),
377 HPBDMA_HPBIF(1),
378 HPBDMA_HPBIF(2),
379 HPBDMA_HPBIF(3),
380 HPBDMA_HPBIF(4),
381 HPBDMA_HPBIF(5),
382 HPBDMA_HPBIF(6),
383 HPBDMA_HPBIF(7),
384 HPBDMA_HPBIF(8),
352}; 385};
353 386
354static const struct hpb_dmae_channel hpb_dmae_channels[] = { 387static const struct hpb_dmae_channel hpb_dmae_channels[] = {
355 HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_TX), /* ch. 21 */ 388 HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_TX), /* ch. 21 */
356 HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_RX), /* ch. 22 */ 389 HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_RX), /* ch. 22 */
390 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_TX), /* ch. 28 */
391 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_RX), /* ch. 28 */
392 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_TX), /* ch. 29 */
393 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_RX), /* ch. 29 */
394 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_TX), /* ch. 30 */
395 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_RX), /* ch. 30 */
396 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_TX), /* ch. 31 */
397 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_RX), /* ch. 31 */
398 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_TX), /* ch. 32 */
399 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_RX), /* ch. 32 */
400 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_TX), /* ch. 33 */
401 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_RX), /* ch. 33 */
402 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_TX), /* ch. 34 */
403 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_RX), /* ch. 34 */
404 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_TX), /* ch. 35 */
405 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_RX), /* ch. 35 */
406 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_TX), /* ch. 36 */
407 HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_RX), /* ch. 36 */
357}; 408};
358 409
359static struct hpb_dmae_pdata dma_platform_data __initdata = { 410static struct hpb_dmae_pdata dma_platform_data __initdata = {