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authorArnd Bergmann <arnd@arndb.de>2012-03-19 16:46:32 -0400
committerArnd Bergmann <arnd@arndb.de>2012-03-20 05:41:43 -0400
commitb2f1df8d2fc14bf7e6d9d967043d4b60c2efd8dc (patch)
tree065282434bde6ef9b4357c042705c5fcef3782ea /arch/arm
parentc0206e228e34d8b414fcc63db45b831843adea06 (diff)
parent5cd9eb2736a572a9ef2689829f47ffd4262adc00 (diff)
Merge branch 'renesas/timer' into next/timer
Conflicts: arch/arm/mach-shmobile/timer.c This resolves a nonobvious merge conflict between renesas timer changes in the global timer changes with those from the renesas soc branch and last minute bug fixes that went into v3.3. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/boot/.gitignore1
-rw-r--r--arch/arm/common/it8152.c7
-rw-r--r--arch/arm/common/pl330.c3
-rw-r--r--arch/arm/include/asm/assembler.h5
-rw-r--r--arch/arm/include/asm/hardware/pl330.h2
-rw-r--r--arch/arm/include/asm/pmu.h2
-rw-r--r--arch/arm/include/asm/processor.h1
-rw-r--r--arch/arm/kernel/ecard.c1
-rw-r--r--arch/arm/kernel/perf_event.c45
-rw-r--r--arch/arm/kernel/perf_event_v6.c22
-rw-r--r--arch/arm/kernel/perf_event_v7.c11
-rw-r--r--arch/arm/kernel/perf_event_xscale.c20
-rw-r--r--arch/arm/kernel/ptrace.c9
-rw-r--r--arch/arm/kernel/smp_twd.c2
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c19
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c8
-rw-r--r--arch/arm/mach-ep93xx/vision_ep9307.c2
-rw-r--r--arch/arm/mach-exynos/mach-universal_c210.c2
-rw-r--r--arch/arm/mach-lpc32xx/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-lpc32xx/irq.c25
-rw-r--r--arch/arm/mach-lpc32xx/serial.c20
-rw-r--r--arch/arm/mach-mmp/aspenite.c1
-rw-r--r--arch/arm/mach-mmp/pxa168.c1
-rw-r--r--arch/arm/mach-mmp/tavorevb.c1
-rw-r--r--arch/arm/mach-omap1/board-innovator.c4
-rw-r--r--arch/arm/mach-omap2/Kconfig4
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c4
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c2
-rw-r--r--arch/arm/mach-omap2/common.h1
-rw-r--r--arch/arm/mach-omap2/cpuidle44xx.c5
-rw-r--r--arch/arm/mach-omap2/gpmc-smsc911x.c52
-rw-r--r--arch/arm/mach-omap2/hsmmc.c6
-rw-r--r--arch/arm/mach-omap2/id.c1
-rw-r--r--arch/arm/mach-omap2/io.c1
-rw-r--r--arch/arm/mach-omap2/mailbox.c10
-rw-r--r--arch/arm/mach-omap2/mux.c2
-rw-r--r--arch/arm/mach-omap2/omap-iommu.c3
-rw-r--r--arch/arm/mach-omap2/omap4-common.c27
-rw-r--r--arch/arm/mach-omap2/pm.c3
-rw-r--r--arch/arm/mach-omap2/twl-common.c1
-rw-r--r--arch/arm/mach-omap2/usb-host.c6
-rw-r--r--arch/arm/mach-omap2/voltagedomains3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/voltagedomains44xx_data.c2
-rw-r--r--arch/arm/mach-pxa/generic.h1
-rw-r--r--arch/arm/mach-pxa/hx4700.c25
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c7
-rw-r--r--arch/arm/mach-pxa/pxa25x.c3
-rw-r--r--arch/arm/mach-pxa/pxa27x.c3
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c1
-rw-r--r--arch/arm/mach-pxa/pxa95x.c1
-rw-r--r--arch/arm/mach-pxa/saarb.c1
-rw-r--r--arch/arm/mach-pxa/sharpsl_pm.c3
-rw-r--r--arch/arm/mach-pxa/spitz_pm.c5
-rw-r--r--arch/arm/mach-s3c2440/common.h2
-rw-r--r--arch/arm/mach-s3c2440/mach-anubis.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-at2440evb.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-gta02.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-mini2440.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-nexcoder.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-osiris.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-rx1950.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-rx3715.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-smdk2440.c2
-rw-r--r--arch/arm/mach-s3c2440/s3c2440.c13
-rw-r--r--arch/arm/mach-s3c2440/s3c244x.c12
-rw-r--r--arch/arm/mach-shmobile/board-ag5evm.c69
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c58
-rw-r--r--arch/arm/mach-shmobile/board-bonito.c47
-rw-r--r--arch/arm/mach-shmobile/board-g3evm.c38
-rw-r--r--arch/arm/mach-shmobile/board-g4evm.c38
-rw-r--r--arch/arm/mach-shmobile/board-kota2.c41
-rw-r--r--arch/arm/mach-shmobile/board-mackerel.c138
-rw-r--r--arch/arm/mach-shmobile/board-marzen.c62
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7740.c8
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7779.c4
-rw-r--r--arch/arm/mach-shmobile/clock-sh7367.c8
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c10
-rw-r--r--arch/arm/mach-shmobile/clock-sh7377.c8
-rw-r--r--arch/arm/mach-shmobile/clock-sh73a0.c125
-rw-r--r--arch/arm/mach-shmobile/clock.c2
-rw-r--r--arch/arm/mach-shmobile/include/mach/common.h9
-rw-r--r--arch/arm/mach-shmobile/include/mach/sh73a0.h6
-rw-r--r--arch/arm/mach-shmobile/intc-sh73a0.c2
-rw-r--r--arch/arm/mach-shmobile/pfc-r8a7779.c2
-rw-r--r--arch/arm/mach-shmobile/pfc-sh7372.c41
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7740.c45
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7779.c54
-rw-r--r--arch/arm/mach-shmobile/setup-sh7367.c32
-rw-r--r--arch/arm/mach-shmobile/setup-sh7372.c32
-rw-r--r--arch/arm/mach-shmobile/setup-sh7377.c32
-rw-r--r--arch/arm/mach-shmobile/setup-sh73a0.c32
-rw-r--r--arch/arm/mach-shmobile/smp-sh73a0.c2
-rw-r--r--arch/arm/mach-shmobile/timer.c6
-rw-r--r--arch/arm/mach-ux500/Kconfig2
-rw-r--r--arch/arm/mach-vexpress/Kconfig2
-rw-r--r--arch/arm/mm/Kconfig3
-rw-r--r--arch/arm/mm/cache-v7.S2
-rw-r--r--arch/arm/mm/proc-v7.S4
-rw-r--r--arch/arm/plat-omap/common.c1
-rw-r--r--arch/arm/plat-omap/include/plat/irqs.h10
-rw-r--r--arch/arm/plat-omap/include/plat/omap-secure.h6
-rw-r--r--arch/arm/plat-s3c24xx/dma.c2
-rw-r--r--arch/arm/plat-samsung/devs.c2
-rw-r--r--arch/arm/plat-spear/time.c6
105 files changed, 852 insertions, 584 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a48aecc17eac..dfb0312f4e73 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1280,7 +1280,7 @@ config ARM_ERRATA_743622
1280 depends on CPU_V7 1280 depends on CPU_V7
1281 help 1281 help
1282 This option enables the workaround for the 743622 Cortex-A9 1282 This option enables the workaround for the 743622 Cortex-A9
1283 (r2p0..r2p2) erratum. Under very rare conditions, a faulty 1283 (r2p*) erratum. Under very rare conditions, a faulty
1284 optimisation in the Cortex-A9 Store Buffer may lead to data 1284 optimisation in the Cortex-A9 Store Buffer may lead to data
1285 corruption. This workaround sets a specific bit in the diagnostic 1285 corruption. This workaround sets a specific bit in the diagnostic
1286 register of the Cortex-A9 which disables the Store Buffer 1286 register of the Cortex-A9 which disables the Store Buffer
diff --git a/arch/arm/boot/.gitignore b/arch/arm/boot/.gitignore
index ce1c5ff746e7..3c79f85975aa 100644
--- a/arch/arm/boot/.gitignore
+++ b/arch/arm/boot/.gitignore
@@ -3,3 +3,4 @@ zImage
3xipImage 3xipImage
4bootpImage 4bootpImage
5uImage 5uImage
6*.dtb
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index d1bcd7b13ebc..fb1f1cfce60c 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -320,13 +320,6 @@ err0:
320 return -EBUSY; 320 return -EBUSY;
321} 321}
322 322
323/*
324 * If we set up a device for bus mastering, we need to check the latency
325 * timer as we don't have even crappy BIOSes to set it properly.
326 * The implementation is from arch/i386/pci/i386.c
327 */
328unsigned int pcibios_max_latency = 255;
329
330/* ITE bridge requires setting latency timer to avoid early bus access 323/* ITE bridge requires setting latency timer to avoid early bus access
331 termination by PCI bus master devices 324 termination by PCI bus master devices
332*/ 325*/
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c
index d8e44a43047c..ff3ad2244824 100644
--- a/arch/arm/common/pl330.c
+++ b/arch/arm/common/pl330.c
@@ -1502,12 +1502,13 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
1502 struct pl330_thread *thrd = ch_id; 1502 struct pl330_thread *thrd = ch_id;
1503 struct pl330_dmac *pl330; 1503 struct pl330_dmac *pl330;
1504 unsigned long flags; 1504 unsigned long flags;
1505 int ret = 0, active = thrd->req_running; 1505 int ret = 0, active;
1506 1506
1507 if (!thrd || thrd->free || thrd->dmac->state == DYING) 1507 if (!thrd || thrd->free || thrd->dmac->state == DYING)
1508 return -EINVAL; 1508 return -EINVAL;
1509 1509
1510 pl330 = thrd->dmac; 1510 pl330 = thrd->dmac;
1511 active = thrd->req_running;
1511 1512
1512 spin_lock_irqsave(&pl330->lock, flags); 1513 spin_lock_irqsave(&pl330->lock, flags);
1513 1514
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 62f8095d46de..23371b17b23e 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -137,6 +137,11 @@
137 disable_irq 137 disable_irq
138 .endm 138 .endm
139 139
140 .macro save_and_disable_irqs_notrace, oldcpsr
141 mrs \oldcpsr, cpsr
142 disable_irq_notrace
143 .endm
144
140/* 145/*
141 * Restore interrupt state previously stored in a register. We don't 146 * Restore interrupt state previously stored in a register. We don't
142 * guarantee that this will preserve the flags. 147 * guarantee that this will preserve the flags.
diff --git a/arch/arm/include/asm/hardware/pl330.h b/arch/arm/include/asm/hardware/pl330.h
index 575fa8186ca0..c1821385abfa 100644
--- a/arch/arm/include/asm/hardware/pl330.h
+++ b/arch/arm/include/asm/hardware/pl330.h
@@ -41,7 +41,7 @@ enum pl330_dstcachectrl {
41 DCCTRL1, /* Bufferable only */ 41 DCCTRL1, /* Bufferable only */
42 DCCTRL2, /* Cacheable, but do not allocate */ 42 DCCTRL2, /* Cacheable, but do not allocate */
43 DCCTRL3, /* Cacheable and bufferable, but do not allocate */ 43 DCCTRL3, /* Cacheable and bufferable, but do not allocate */
44 DINVALID1 = 8, 44 DINVALID1, /* AWCACHE = 0x1000 */
45 DINVALID2, 45 DINVALID2,
46 DCCTRL6, /* Cacheable write-through, allocate on writes only */ 46 DCCTRL6, /* Cacheable write-through, allocate on writes only */
47 DCCTRL7, /* Cacheable write-back, allocate on writes only */ 47 DCCTRL7, /* Cacheable write-back, allocate on writes only */
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index b5a5be2536c1..90114faa9f3c 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -134,7 +134,7 @@ int __init armpmu_register(struct arm_pmu *armpmu, char *name, int type);
134 134
135u64 armpmu_event_update(struct perf_event *event, 135u64 armpmu_event_update(struct perf_event *event,
136 struct hw_perf_event *hwc, 136 struct hw_perf_event *hwc,
137 int idx, int overflow); 137 int idx);
138 138
139int armpmu_event_set_period(struct perf_event *event, 139int armpmu_event_set_period(struct perf_event *event,
140 struct hw_perf_event *hwc, 140 struct hw_perf_event *hwc,
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index ce280b8d613c..cb8d638924fd 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -22,6 +22,7 @@
22#include <asm/hw_breakpoint.h> 22#include <asm/hw_breakpoint.h>
23#include <asm/ptrace.h> 23#include <asm/ptrace.h>
24#include <asm/types.h> 24#include <asm/types.h>
25#include <asm/system.h>
25 26
26#ifdef __KERNEL__ 27#ifdef __KERNEL__
27#define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \ 28#define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
index 4dd0edab6a65..1651d4950744 100644
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/kernel/ecard.c
@@ -242,6 +242,7 @@ static void ecard_init_pgtables(struct mm_struct *mm)
242 242
243 memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (EASI_SIZE / PGDIR_SIZE)); 243 memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (EASI_SIZE / PGDIR_SIZE));
244 244
245 vma.vm_flags = VM_EXEC;
245 vma.vm_mm = mm; 246 vma.vm_mm = mm;
246 247
247 flush_tlb_range(&vma, IO_START, IO_START + IO_SIZE); 248 flush_tlb_range(&vma, IO_START, IO_START + IO_SIZE);
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 5bb91bf3d47f..b2abfa18f137 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -180,7 +180,7 @@ armpmu_event_set_period(struct perf_event *event,
180u64 180u64
181armpmu_event_update(struct perf_event *event, 181armpmu_event_update(struct perf_event *event,
182 struct hw_perf_event *hwc, 182 struct hw_perf_event *hwc,
183 int idx, int overflow) 183 int idx)
184{ 184{
185 struct arm_pmu *armpmu = to_arm_pmu(event->pmu); 185 struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
186 u64 delta, prev_raw_count, new_raw_count; 186 u64 delta, prev_raw_count, new_raw_count;
@@ -193,13 +193,7 @@ again:
193 new_raw_count) != prev_raw_count) 193 new_raw_count) != prev_raw_count)
194 goto again; 194 goto again;
195 195
196 new_raw_count &= armpmu->max_period; 196 delta = (new_raw_count - prev_raw_count) & armpmu->max_period;
197 prev_raw_count &= armpmu->max_period;
198
199 if (overflow)
200 delta = armpmu->max_period - prev_raw_count + new_raw_count + 1;
201 else
202 delta = new_raw_count - prev_raw_count;
203 197
204 local64_add(delta, &event->count); 198 local64_add(delta, &event->count);
205 local64_sub(delta, &hwc->period_left); 199 local64_sub(delta, &hwc->period_left);
@@ -216,7 +210,7 @@ armpmu_read(struct perf_event *event)
216 if (hwc->idx < 0) 210 if (hwc->idx < 0)
217 return; 211 return;
218 212
219 armpmu_event_update(event, hwc, hwc->idx, 0); 213 armpmu_event_update(event, hwc, hwc->idx);
220} 214}
221 215
222static void 216static void
@@ -232,7 +226,7 @@ armpmu_stop(struct perf_event *event, int flags)
232 if (!(hwc->state & PERF_HES_STOPPED)) { 226 if (!(hwc->state & PERF_HES_STOPPED)) {
233 armpmu->disable(hwc, hwc->idx); 227 armpmu->disable(hwc, hwc->idx);
234 barrier(); /* why? */ 228 barrier(); /* why? */
235 armpmu_event_update(event, hwc, hwc->idx, 0); 229 armpmu_event_update(event, hwc, hwc->idx);
236 hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE; 230 hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
237 } 231 }
238} 232}
@@ -518,7 +512,13 @@ __hw_perf_event_init(struct perf_event *event)
518 hwc->config_base |= (unsigned long)mapping; 512 hwc->config_base |= (unsigned long)mapping;
519 513
520 if (!hwc->sample_period) { 514 if (!hwc->sample_period) {
521 hwc->sample_period = armpmu->max_period; 515 /*
516 * For non-sampling runs, limit the sample_period to half
517 * of the counter width. That way, the new counter value
518 * is far less likely to overtake the previous one unless
519 * you have some serious IRQ latency issues.
520 */
521 hwc->sample_period = armpmu->max_period >> 1;
522 hwc->last_period = hwc->sample_period; 522 hwc->last_period = hwc->sample_period;
523 local64_set(&hwc->period_left, hwc->sample_period); 523 local64_set(&hwc->period_left, hwc->sample_period);
524 } 524 }
@@ -680,6 +680,28 @@ static void __init cpu_pmu_init(struct arm_pmu *armpmu)
680} 680}
681 681
682/* 682/*
683 * PMU hardware loses all context when a CPU goes offline.
684 * When a CPU is hotplugged back in, since some hardware registers are
685 * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
686 * junk values out of them.
687 */
688static int __cpuinit pmu_cpu_notify(struct notifier_block *b,
689 unsigned long action, void *hcpu)
690{
691 if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
692 return NOTIFY_DONE;
693
694 if (cpu_pmu && cpu_pmu->reset)
695 cpu_pmu->reset(NULL);
696
697 return NOTIFY_OK;
698}
699
700static struct notifier_block __cpuinitdata pmu_cpu_notifier = {
701 .notifier_call = pmu_cpu_notify,
702};
703
704/*
683 * CPU PMU identification and registration. 705 * CPU PMU identification and registration.
684 */ 706 */
685static int __init 707static int __init
@@ -730,6 +752,7 @@ init_hw_perf_events(void)
730 pr_info("enabled with %s PMU driver, %d counters available\n", 752 pr_info("enabled with %s PMU driver, %d counters available\n",
731 cpu_pmu->name, cpu_pmu->num_events); 753 cpu_pmu->name, cpu_pmu->num_events);
732 cpu_pmu_init(cpu_pmu); 754 cpu_pmu_init(cpu_pmu);
755 register_cpu_notifier(&pmu_cpu_notifier);
733 armpmu_register(cpu_pmu, "cpu", PERF_TYPE_RAW); 756 armpmu_register(cpu_pmu, "cpu", PERF_TYPE_RAW);
734 } else { 757 } else {
735 pr_info("no hardware support available\n"); 758 pr_info("no hardware support available\n");
diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c
index 533be9930ec2..b78af0cc6ef3 100644
--- a/arch/arm/kernel/perf_event_v6.c
+++ b/arch/arm/kernel/perf_event_v6.c
@@ -467,23 +467,6 @@ armv6pmu_enable_event(struct hw_perf_event *hwc,
467 raw_spin_unlock_irqrestore(&events->pmu_lock, flags); 467 raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
468} 468}
469 469
470static int counter_is_active(unsigned long pmcr, int idx)
471{
472 unsigned long mask = 0;
473 if (idx == ARMV6_CYCLE_COUNTER)
474 mask = ARMV6_PMCR_CCOUNT_IEN;
475 else if (idx == ARMV6_COUNTER0)
476 mask = ARMV6_PMCR_COUNT0_IEN;
477 else if (idx == ARMV6_COUNTER1)
478 mask = ARMV6_PMCR_COUNT1_IEN;
479
480 if (mask)
481 return pmcr & mask;
482
483 WARN_ONCE(1, "invalid counter number (%d)\n", idx);
484 return 0;
485}
486
487static irqreturn_t 470static irqreturn_t
488armv6pmu_handle_irq(int irq_num, 471armv6pmu_handle_irq(int irq_num,
489 void *dev) 472 void *dev)
@@ -513,7 +496,8 @@ armv6pmu_handle_irq(int irq_num,
513 struct perf_event *event = cpuc->events[idx]; 496 struct perf_event *event = cpuc->events[idx];
514 struct hw_perf_event *hwc; 497 struct hw_perf_event *hwc;
515 498
516 if (!counter_is_active(pmcr, idx)) 499 /* Ignore if we don't have an event. */
500 if (!event)
517 continue; 501 continue;
518 502
519 /* 503 /*
@@ -524,7 +508,7 @@ armv6pmu_handle_irq(int irq_num,
524 continue; 508 continue;
525 509
526 hwc = &event->hw; 510 hwc = &event->hw;
527 armpmu_event_update(event, hwc, idx, 1); 511 armpmu_event_update(event, hwc, idx);
528 data.period = event->hw.last_period; 512 data.period = event->hw.last_period;
529 if (!armpmu_event_set_period(event, hwc, idx)) 513 if (!armpmu_event_set_period(event, hwc, idx))
530 continue; 514 continue;
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 6933244c68f9..4d7095af2ab3 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -809,6 +809,11 @@ static inline int armv7_pmnc_disable_intens(int idx)
809 809
810 counter = ARMV7_IDX_TO_COUNTER(idx); 810 counter = ARMV7_IDX_TO_COUNTER(idx);
811 asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter))); 811 asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter)));
812 isb();
813 /* Clear the overflow flag in case an interrupt is pending. */
814 asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (BIT(counter)));
815 isb();
816
812 return idx; 817 return idx;
813} 818}
814 819
@@ -955,6 +960,10 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
955 struct perf_event *event = cpuc->events[idx]; 960 struct perf_event *event = cpuc->events[idx];
956 struct hw_perf_event *hwc; 961 struct hw_perf_event *hwc;
957 962
963 /* Ignore if we don't have an event. */
964 if (!event)
965 continue;
966
958 /* 967 /*
959 * We have a single interrupt for all counters. Check that 968 * We have a single interrupt for all counters. Check that
960 * each counter has overflowed before we process it. 969 * each counter has overflowed before we process it.
@@ -963,7 +972,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
963 continue; 972 continue;
964 973
965 hwc = &event->hw; 974 hwc = &event->hw;
966 armpmu_event_update(event, hwc, idx, 1); 975 armpmu_event_update(event, hwc, idx);
967 data.period = event->hw.last_period; 976 data.period = event->hw.last_period;
968 if (!armpmu_event_set_period(event, hwc, idx)) 977 if (!armpmu_event_set_period(event, hwc, idx))
969 continue; 978 continue;
diff --git a/arch/arm/kernel/perf_event_xscale.c b/arch/arm/kernel/perf_event_xscale.c
index 3b99d8269829..71a21e6712f5 100644
--- a/arch/arm/kernel/perf_event_xscale.c
+++ b/arch/arm/kernel/perf_event_xscale.c
@@ -255,11 +255,14 @@ xscale1pmu_handle_irq(int irq_num, void *dev)
255 struct perf_event *event = cpuc->events[idx]; 255 struct perf_event *event = cpuc->events[idx];
256 struct hw_perf_event *hwc; 256 struct hw_perf_event *hwc;
257 257
258 if (!event)
259 continue;
260
258 if (!xscale1_pmnc_counter_has_overflowed(pmnc, idx)) 261 if (!xscale1_pmnc_counter_has_overflowed(pmnc, idx))
259 continue; 262 continue;
260 263
261 hwc = &event->hw; 264 hwc = &event->hw;
262 armpmu_event_update(event, hwc, idx, 1); 265 armpmu_event_update(event, hwc, idx);
263 data.period = event->hw.last_period; 266 data.period = event->hw.last_period;
264 if (!armpmu_event_set_period(event, hwc, idx)) 267 if (!armpmu_event_set_period(event, hwc, idx))
265 continue; 268 continue;
@@ -592,11 +595,14 @@ xscale2pmu_handle_irq(int irq_num, void *dev)
592 struct perf_event *event = cpuc->events[idx]; 595 struct perf_event *event = cpuc->events[idx];
593 struct hw_perf_event *hwc; 596 struct hw_perf_event *hwc;
594 597
595 if (!xscale2_pmnc_counter_has_overflowed(pmnc, idx)) 598 if (!event)
599 continue;
600
601 if (!xscale2_pmnc_counter_has_overflowed(of_flags, idx))
596 continue; 602 continue;
597 603
598 hwc = &event->hw; 604 hwc = &event->hw;
599 armpmu_event_update(event, hwc, idx, 1); 605 armpmu_event_update(event, hwc, idx);
600 data.period = event->hw.last_period; 606 data.period = event->hw.last_period;
601 if (!armpmu_event_set_period(event, hwc, idx)) 607 if (!armpmu_event_set_period(event, hwc, idx))
602 continue; 608 continue;
@@ -663,7 +669,7 @@ xscale2pmu_enable_event(struct hw_perf_event *hwc, int idx)
663static void 669static void
664xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx) 670xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
665{ 671{
666 unsigned long flags, ien, evtsel; 672 unsigned long flags, ien, evtsel, of_flags;
667 struct pmu_hw_events *events = cpu_pmu->get_hw_events(); 673 struct pmu_hw_events *events = cpu_pmu->get_hw_events();
668 674
669 ien = xscale2pmu_read_int_enable(); 675 ien = xscale2pmu_read_int_enable();
@@ -672,26 +678,31 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
672 switch (idx) { 678 switch (idx) {
673 case XSCALE_CYCLE_COUNTER: 679 case XSCALE_CYCLE_COUNTER:
674 ien &= ~XSCALE2_CCOUNT_INT_EN; 680 ien &= ~XSCALE2_CCOUNT_INT_EN;
681 of_flags = XSCALE2_CCOUNT_OVERFLOW;
675 break; 682 break;
676 case XSCALE_COUNTER0: 683 case XSCALE_COUNTER0:
677 ien &= ~XSCALE2_COUNT0_INT_EN; 684 ien &= ~XSCALE2_COUNT0_INT_EN;
678 evtsel &= ~XSCALE2_COUNT0_EVT_MASK; 685 evtsel &= ~XSCALE2_COUNT0_EVT_MASK;
679 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT0_EVT_SHFT; 686 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT0_EVT_SHFT;
687 of_flags = XSCALE2_COUNT0_OVERFLOW;
680 break; 688 break;
681 case XSCALE_COUNTER1: 689 case XSCALE_COUNTER1:
682 ien &= ~XSCALE2_COUNT1_INT_EN; 690 ien &= ~XSCALE2_COUNT1_INT_EN;
683 evtsel &= ~XSCALE2_COUNT1_EVT_MASK; 691 evtsel &= ~XSCALE2_COUNT1_EVT_MASK;
684 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT1_EVT_SHFT; 692 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT1_EVT_SHFT;
693 of_flags = XSCALE2_COUNT1_OVERFLOW;
685 break; 694 break;
686 case XSCALE_COUNTER2: 695 case XSCALE_COUNTER2:
687 ien &= ~XSCALE2_COUNT2_INT_EN; 696 ien &= ~XSCALE2_COUNT2_INT_EN;
688 evtsel &= ~XSCALE2_COUNT2_EVT_MASK; 697 evtsel &= ~XSCALE2_COUNT2_EVT_MASK;
689 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT2_EVT_SHFT; 698 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT2_EVT_SHFT;
699 of_flags = XSCALE2_COUNT2_OVERFLOW;
690 break; 700 break;
691 case XSCALE_COUNTER3: 701 case XSCALE_COUNTER3:
692 ien &= ~XSCALE2_COUNT3_INT_EN; 702 ien &= ~XSCALE2_COUNT3_INT_EN;
693 evtsel &= ~XSCALE2_COUNT3_EVT_MASK; 703 evtsel &= ~XSCALE2_COUNT3_EVT_MASK;
694 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT3_EVT_SHFT; 704 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT3_EVT_SHFT;
705 of_flags = XSCALE2_COUNT3_OVERFLOW;
695 break; 706 break;
696 default: 707 default:
697 WARN_ONCE(1, "invalid counter number (%d)\n", idx); 708 WARN_ONCE(1, "invalid counter number (%d)\n", idx);
@@ -701,6 +712,7 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
701 raw_spin_lock_irqsave(&events->pmu_lock, flags); 712 raw_spin_lock_irqsave(&events->pmu_lock, flags);
702 xscale2pmu_write_event_select(evtsel); 713 xscale2pmu_write_event_select(evtsel);
703 xscale2pmu_write_int_enable(ien); 714 xscale2pmu_write_int_enable(ien);
715 xscale2pmu_write_overflow_flags(of_flags);
704 raw_spin_unlock_irqrestore(&events->pmu_lock, flags); 716 raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
705} 717}
706 718
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index e33870ff0ac0..ede6443c34d9 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -23,6 +23,7 @@
23#include <linux/perf_event.h> 23#include <linux/perf_event.h>
24#include <linux/hw_breakpoint.h> 24#include <linux/hw_breakpoint.h>
25#include <linux/regset.h> 25#include <linux/regset.h>
26#include <linux/audit.h>
26 27
27#include <asm/pgtable.h> 28#include <asm/pgtable.h>
28#include <asm/system.h> 29#include <asm/system.h>
@@ -904,6 +905,12 @@ long arch_ptrace(struct task_struct *child, long request,
904 return ret; 905 return ret;
905} 906}
906 907
908#ifdef __ARMEB__
909#define AUDIT_ARCH_NR AUDIT_ARCH_ARMEB
910#else
911#define AUDIT_ARCH_NR AUDIT_ARCH_ARM
912#endif
913
907asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) 914asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
908{ 915{
909 unsigned long ip; 916 unsigned long ip;
@@ -918,7 +925,7 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
918 if (!ip) 925 if (!ip)
919 audit_syscall_exit(regs); 926 audit_syscall_exit(regs);
920 else 927 else
921 audit_syscall_entry(AUDIT_ARCH_ARMEB, scno, regs->ARM_r0, 928 audit_syscall_entry(AUDIT_ARCH_NR, scno, regs->ARM_r0,
922 regs->ARM_r1, regs->ARM_r2, regs->ARM_r3); 929 regs->ARM_r1, regs->ARM_r2, regs->ARM_r3);
923 930
924 if (!test_thread_flag(TIF_SYSCALL_TRACE)) 931 if (!test_thread_flag(TIF_SYSCALL_TRACE))
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index a622e7a8b121..fef42b21cecb 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -132,7 +132,7 @@ static struct notifier_block twd_cpufreq_nb = {
132 132
133static int twd_cpufreq_init(void) 133static int twd_cpufreq_init(void)
134{ 134{
135 if (!IS_ERR(twd_clk)) 135 if (twd_evt && *__this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
136 return cpufreq_register_notifier(&twd_cpufreq_nb, 136 return cpufreq_register_notifier(&twd_cpufreq_nb,
137 CPUFREQ_TRANSITION_NOTIFIER); 137 CPUFREQ_TRANSITION_NOTIFIER);
138 138
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index b7582dd10dc3..96e2adcd5a84 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -38,10 +38,6 @@
38#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE) 38#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
39static u64 hdmac_dmamask = DMA_BIT_MASK(32); 39static u64 hdmac_dmamask = DMA_BIT_MASK(32);
40 40
41static struct at_dma_platform_data atdma_pdata = {
42 .nr_channels = 8,
43};
44
45static struct resource hdmac_resources[] = { 41static struct resource hdmac_resources[] = {
46 [0] = { 42 [0] = {
47 .start = AT91SAM9G45_BASE_DMA, 43 .start = AT91SAM9G45_BASE_DMA,
@@ -56,12 +52,11 @@ static struct resource hdmac_resources[] = {
56}; 52};
57 53
58static struct platform_device at_hdmac_device = { 54static struct platform_device at_hdmac_device = {
59 .name = "at_hdmac", 55 .name = "at91sam9g45_dma",
60 .id = -1, 56 .id = -1,
61 .dev = { 57 .dev = {
62 .dma_mask = &hdmac_dmamask, 58 .dma_mask = &hdmac_dmamask,
63 .coherent_dma_mask = DMA_BIT_MASK(32), 59 .coherent_dma_mask = DMA_BIT_MASK(32),
64 .platform_data = &atdma_pdata,
65 }, 60 },
66 .resource = hdmac_resources, 61 .resource = hdmac_resources,
67 .num_resources = ARRAY_SIZE(hdmac_resources), 62 .num_resources = ARRAY_SIZE(hdmac_resources),
@@ -69,9 +64,15 @@ static struct platform_device at_hdmac_device = {
69 64
70void __init at91_add_device_hdmac(void) 65void __init at91_add_device_hdmac(void)
71{ 66{
72 dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask); 67#if defined(CONFIG_OF)
73 dma_cap_set(DMA_SLAVE, atdma_pdata.cap_mask); 68 struct device_node *of_node =
74 platform_device_register(&at_hdmac_device); 69 of_find_node_by_name(NULL, "dma-controller");
70
71 if (of_node)
72 of_node_put(of_node);
73 else
74#endif
75 platform_device_register(&at_hdmac_device);
75} 76}
76#else 77#else
77void __init at91_add_device_hdmac(void) {} 78void __init at91_add_device_hdmac(void) {}
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 61908dce9784..9be71c11d0f0 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -33,10 +33,6 @@
33#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE) 33#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
34static u64 hdmac_dmamask = DMA_BIT_MASK(32); 34static u64 hdmac_dmamask = DMA_BIT_MASK(32);
35 35
36static struct at_dma_platform_data atdma_pdata = {
37 .nr_channels = 2,
38};
39
40static struct resource hdmac_resources[] = { 36static struct resource hdmac_resources[] = {
41 [0] = { 37 [0] = {
42 .start = AT91SAM9RL_BASE_DMA, 38 .start = AT91SAM9RL_BASE_DMA,
@@ -51,12 +47,11 @@ static struct resource hdmac_resources[] = {
51}; 47};
52 48
53static struct platform_device at_hdmac_device = { 49static struct platform_device at_hdmac_device = {
54 .name = "at_hdmac", 50 .name = "at91sam9rl_dma",
55 .id = -1, 51 .id = -1,
56 .dev = { 52 .dev = {
57 .dma_mask = &hdmac_dmamask, 53 .dma_mask = &hdmac_dmamask,
58 .coherent_dma_mask = DMA_BIT_MASK(32), 54 .coherent_dma_mask = DMA_BIT_MASK(32),
59 .platform_data = &atdma_pdata,
60 }, 55 },
61 .resource = hdmac_resources, 56 .resource = hdmac_resources,
62 .num_resources = ARRAY_SIZE(hdmac_resources), 57 .num_resources = ARRAY_SIZE(hdmac_resources),
@@ -64,7 +59,6 @@ static struct platform_device at_hdmac_device = {
64 59
65void __init at91_add_device_hdmac(void) 60void __init at91_add_device_hdmac(void)
66{ 61{
67 dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
68 platform_device_register(&at_hdmac_device); 62 platform_device_register(&at_hdmac_device);
69} 63}
70#else 64#else
diff --git a/arch/arm/mach-ep93xx/vision_ep9307.c b/arch/arm/mach-ep93xx/vision_ep9307.c
index d5fb44f16d31..d67d0b4feb6f 100644
--- a/arch/arm/mach-ep93xx/vision_ep9307.c
+++ b/arch/arm/mach-ep93xx/vision_ep9307.c
@@ -34,6 +34,7 @@
34#include <mach/ep93xx_spi.h> 34#include <mach/ep93xx_spi.h>
35#include <mach/gpio-ep93xx.h> 35#include <mach/gpio-ep93xx.h>
36 36
37#include <asm/hardware/vic.h>
37#include <asm/mach-types.h> 38#include <asm/mach-types.h>
38#include <asm/mach/map.h> 39#include <asm/mach/map.h>
39#include <asm/mach/arch.h> 40#include <asm/mach/arch.h>
@@ -361,6 +362,7 @@ MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
361 .atag_offset = 0x100, 362 .atag_offset = 0x100,
362 .map_io = vision_map_io, 363 .map_io = vision_map_io,
363 .init_irq = ep93xx_init_irq, 364 .init_irq = ep93xx_init_irq,
365 .handle_irq = vic_handle_irq,
364 .timer = &ep93xx_timer, 366 .timer = &ep93xx_timer,
365 .init_machine = vision_init_machine, 367 .init_machine = vision_init_machine,
366 .restart = ep93xx_restart, 368 .restart = ep93xx_restart,
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 0fc65ffde8ff..38939956c34f 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -13,6 +13,7 @@
13#include <linux/i2c.h> 13#include <linux/i2c.h>
14#include <linux/gpio_keys.h> 14#include <linux/gpio_keys.h>
15#include <linux/gpio.h> 15#include <linux/gpio.h>
16#include <linux/interrupt.h>
16#include <linux/fb.h> 17#include <linux/fb.h>
17#include <linux/mfd/max8998.h> 18#include <linux/mfd/max8998.h>
18#include <linux/regulator/machine.h> 19#include <linux/regulator/machine.h>
@@ -595,6 +596,7 @@ static struct mxt_platform_data qt602240_platform_data = {
595 .threshold = 0x28, 596 .threshold = 0x28,
596 .voltage = 2800000, /* 2.8V */ 597 .voltage = 2800000, /* 2.8V */
597 .orient = MXT_DIAGONAL, 598 .orient = MXT_DIAGONAL,
599 .irqflags = IRQF_TRIGGER_FALLING,
598}; 600};
599 601
600static struct i2c_board_info i2c3_devs[] __initdata = { 602static struct i2c_board_info i2c3_devs[] __initdata = {
diff --git a/arch/arm/mach-lpc32xx/include/mach/irqs.h b/arch/arm/mach-lpc32xx/include/mach/irqs.h
index 2667f52e3b04..9e3b90df32e1 100644
--- a/arch/arm/mach-lpc32xx/include/mach/irqs.h
+++ b/arch/arm/mach-lpc32xx/include/mach/irqs.h
@@ -61,7 +61,7 @@
61 */ 61 */
62#define IRQ_LPC32XX_JTAG_COMM_TX LPC32XX_SIC1_IRQ(1) 62#define IRQ_LPC32XX_JTAG_COMM_TX LPC32XX_SIC1_IRQ(1)
63#define IRQ_LPC32XX_JTAG_COMM_RX LPC32XX_SIC1_IRQ(2) 63#define IRQ_LPC32XX_JTAG_COMM_RX LPC32XX_SIC1_IRQ(2)
64#define IRQ_LPC32XX_GPI_11 LPC32XX_SIC1_IRQ(4) 64#define IRQ_LPC32XX_GPI_28 LPC32XX_SIC1_IRQ(4)
65#define IRQ_LPC32XX_TS_P LPC32XX_SIC1_IRQ(6) 65#define IRQ_LPC32XX_TS_P LPC32XX_SIC1_IRQ(6)
66#define IRQ_LPC32XX_TS_IRQ LPC32XX_SIC1_IRQ(7) 66#define IRQ_LPC32XX_TS_IRQ LPC32XX_SIC1_IRQ(7)
67#define IRQ_LPC32XX_TS_AUX LPC32XX_SIC1_IRQ(8) 67#define IRQ_LPC32XX_TS_AUX LPC32XX_SIC1_IRQ(8)
diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c
index 4eae566dfdc7..c74de01ab5b6 100644
--- a/arch/arm/mach-lpc32xx/irq.c
+++ b/arch/arm/mach-lpc32xx/irq.c
@@ -118,6 +118,10 @@ static const struct lpc32xx_event_info lpc32xx_events[NR_IRQS] = {
118 .event_group = &lpc32xx_event_pin_regs, 118 .event_group = &lpc32xx_event_pin_regs,
119 .mask = LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT, 119 .mask = LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT,
120 }, 120 },
121 [IRQ_LPC32XX_GPI_28] = {
122 .event_group = &lpc32xx_event_pin_regs,
123 .mask = LPC32XX_CLKPWR_EXTSRC_GPI_28_BIT,
124 },
121 [IRQ_LPC32XX_GPIO_00] = { 125 [IRQ_LPC32XX_GPIO_00] = {
122 .event_group = &lpc32xx_event_int_regs, 126 .event_group = &lpc32xx_event_int_regs,
123 .mask = LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT, 127 .mask = LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT,
@@ -305,9 +309,18 @@ static int lpc32xx_irq_wake(struct irq_data *d, unsigned int state)
305 309
306 if (state) 310 if (state)
307 eventreg |= lpc32xx_events[d->irq].mask; 311 eventreg |= lpc32xx_events[d->irq].mask;
308 else 312 else {
309 eventreg &= ~lpc32xx_events[d->irq].mask; 313 eventreg &= ~lpc32xx_events[d->irq].mask;
310 314
315 /*
316 * When disabling the wakeup, clear the latched
317 * event
318 */
319 __raw_writel(lpc32xx_events[d->irq].mask,
320 lpc32xx_events[d->irq].
321 event_group->rawstat_reg);
322 }
323
311 __raw_writel(eventreg, 324 __raw_writel(eventreg,
312 lpc32xx_events[d->irq].event_group->enab_reg); 325 lpc32xx_events[d->irq].event_group->enab_reg);
313 326
@@ -380,13 +393,15 @@ void __init lpc32xx_init_irq(void)
380 393
381 /* Setup SIC1 */ 394 /* Setup SIC1 */
382 __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC1_BASE)); 395 __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC1_BASE));
383 __raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE)); 396 __raw_writel(SIC1_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
384 __raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE)); 397 __raw_writel(SIC1_ATR_DEFAULT,
398 LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));
385 399
386 /* Setup SIC2 */ 400 /* Setup SIC2 */
387 __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE)); 401 __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE));
388 __raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE)); 402 __raw_writel(SIC2_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
389 __raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE)); 403 __raw_writel(SIC2_ATR_DEFAULT,
404 LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));
390 405
391 /* Configure supported IRQ's */ 406 /* Configure supported IRQ's */
392 for (i = 0; i < NR_IRQS; i++) { 407 for (i = 0; i < NR_IRQS; i++) {
diff --git a/arch/arm/mach-lpc32xx/serial.c b/arch/arm/mach-lpc32xx/serial.c
index 429cfdbb2b3d..f2735281616a 100644
--- a/arch/arm/mach-lpc32xx/serial.c
+++ b/arch/arm/mach-lpc32xx/serial.c
@@ -88,6 +88,7 @@ struct uartinit {
88 char *uart_ck_name; 88 char *uart_ck_name;
89 u32 ck_mode_mask; 89 u32 ck_mode_mask;
90 void __iomem *pdiv_clk_reg; 90 void __iomem *pdiv_clk_reg;
91 resource_size_t mapbase;
91}; 92};
92 93
93static struct uartinit uartinit_data[] __initdata = { 94static struct uartinit uartinit_data[] __initdata = {
@@ -97,6 +98,7 @@ static struct uartinit uartinit_data[] __initdata = {
97 .ck_mode_mask = 98 .ck_mode_mask =
98 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 5), 99 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 5),
99 .pdiv_clk_reg = LPC32XX_CLKPWR_UART5_CLK_CTRL, 100 .pdiv_clk_reg = LPC32XX_CLKPWR_UART5_CLK_CTRL,
101 .mapbase = LPC32XX_UART5_BASE,
100 }, 102 },
101#endif 103#endif
102#ifdef CONFIG_ARCH_LPC32XX_UART3_SELECT 104#ifdef CONFIG_ARCH_LPC32XX_UART3_SELECT
@@ -105,6 +107,7 @@ static struct uartinit uartinit_data[] __initdata = {
105 .ck_mode_mask = 107 .ck_mode_mask =
106 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 3), 108 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 3),
107 .pdiv_clk_reg = LPC32XX_CLKPWR_UART3_CLK_CTRL, 109 .pdiv_clk_reg = LPC32XX_CLKPWR_UART3_CLK_CTRL,
110 .mapbase = LPC32XX_UART3_BASE,
108 }, 111 },
109#endif 112#endif
110#ifdef CONFIG_ARCH_LPC32XX_UART4_SELECT 113#ifdef CONFIG_ARCH_LPC32XX_UART4_SELECT
@@ -113,6 +116,7 @@ static struct uartinit uartinit_data[] __initdata = {
113 .ck_mode_mask = 116 .ck_mode_mask =
114 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 4), 117 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 4),
115 .pdiv_clk_reg = LPC32XX_CLKPWR_UART4_CLK_CTRL, 118 .pdiv_clk_reg = LPC32XX_CLKPWR_UART4_CLK_CTRL,
119 .mapbase = LPC32XX_UART4_BASE,
116 }, 120 },
117#endif 121#endif
118#ifdef CONFIG_ARCH_LPC32XX_UART6_SELECT 122#ifdef CONFIG_ARCH_LPC32XX_UART6_SELECT
@@ -121,6 +125,7 @@ static struct uartinit uartinit_data[] __initdata = {
121 .ck_mode_mask = 125 .ck_mode_mask =
122 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 6), 126 LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 6),
123 .pdiv_clk_reg = LPC32XX_CLKPWR_UART6_CLK_CTRL, 127 .pdiv_clk_reg = LPC32XX_CLKPWR_UART6_CLK_CTRL,
128 .mapbase = LPC32XX_UART6_BASE,
124 }, 129 },
125#endif 130#endif
126}; 131};
@@ -165,11 +170,24 @@ void __init lpc32xx_serial_init(void)
165 170
166 /* pre-UART clock divider set to 1 */ 171 /* pre-UART clock divider set to 1 */
167 __raw_writel(0x0101, uartinit_data[i].pdiv_clk_reg); 172 __raw_writel(0x0101, uartinit_data[i].pdiv_clk_reg);
173
174 /*
175 * Force a flush of the RX FIFOs to work around a
176 * HW bug
177 */
178 puart = uartinit_data[i].mapbase;
179 __raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));
180 __raw_writel(0x00, LPC32XX_UART_DLL_FIFO(puart));
181 j = LPC32XX_SUART_FIFO_SIZE;
182 while (j--)
183 tmp = __raw_readl(
184 LPC32XX_UART_DLL_FIFO(puart));
185 __raw_writel(0, LPC32XX_UART_IIR_FCR(puart));
168 } 186 }
169 187
170 /* This needs to be done after all UART clocks are setup */ 188 /* This needs to be done after all UART clocks are setup */
171 __raw_writel(clkmodes, LPC32XX_UARTCTL_CLKMODE); 189 __raw_writel(clkmodes, LPC32XX_UARTCTL_CLKMODE);
172 for (i = 0; i < ARRAY_SIZE(uartinit_data) - 1; i++) { 190 for (i = 0; i < ARRAY_SIZE(uartinit_data); i++) {
173 /* Force a flush of the RX FIFOs to work around a HW bug */ 191 /* Force a flush of the RX FIFOs to work around a HW bug */
174 puart = serial_std_platform_data[i].mapbase; 192 puart = serial_std_platform_data[i].mapbase;
175 __raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart)); 193 __raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 17cb76060125..3588a5584153 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -17,7 +17,6 @@
17#include <linux/mtd/partitions.h> 17#include <linux/mtd/partitions.h>
18#include <linux/mtd/nand.h> 18#include <linux/mtd/nand.h>
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/gpio.h>
21 20
22#include <asm/mach-types.h> 21#include <asm/mach-types.h>
23#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 7bc17eaa12eb..ada1213982b4 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -24,7 +24,6 @@
24#include <mach/dma.h> 24#include <mach/dma.h>
25#include <mach/devices.h> 25#include <mach/devices.h>
26#include <mach/mfp.h> 26#include <mach/mfp.h>
27#include <linux/platform_device.h>
28#include <linux/dma-mapping.h> 27#include <linux/dma-mapping.h>
29#include <mach/pxa168.h> 28#include <mach/pxa168.h>
30 29
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index 8e3b5af04a57..bc97170125bf 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -12,7 +12,6 @@
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/smc91x.h> 14#include <linux/smc91x.h>
15#include <linux/gpio.h>
16 15
17#include <asm/mach-types.h> 16#include <asm/mach-types.h>
18#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 309369ea6978..be2002f42dea 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -416,13 +416,13 @@ static void __init innovator_init(void)
416#ifdef CONFIG_ARCH_OMAP15XX 416#ifdef CONFIG_ARCH_OMAP15XX
417 if (cpu_is_omap1510()) { 417 if (cpu_is_omap1510()) {
418 omap1_usb_init(&innovator1510_usb_config); 418 omap1_usb_init(&innovator1510_usb_config);
419 innovator_config[1].data = &innovator1510_lcd_config; 419 innovator_config[0].data = &innovator1510_lcd_config;
420 } 420 }
421#endif 421#endif
422#ifdef CONFIG_ARCH_OMAP16XX 422#ifdef CONFIG_ARCH_OMAP16XX
423 if (cpu_is_omap1610()) { 423 if (cpu_is_omap1610()) {
424 omap1_usb_init(&h2_usb_config); 424 omap1_usb_init(&h2_usb_config);
425 innovator_config[1].data = &innovator1610_lcd_config; 425 innovator_config[0].data = &innovator1610_lcd_config;
426 } 426 }
427#endif 427#endif
428 omap_board_config = innovator_config; 428 omap_board_config = innovator_config;
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index d965da45160e..e20c8ab80b0e 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -364,8 +364,8 @@ config OMAP3_SDRC_AC_TIMING
364 going on could result in system crashes; 364 going on could result in system crashes;
365 365
366config OMAP4_ERRATA_I688 366config OMAP4_ERRATA_I688
367 bool "OMAP4 errata: Async Bridge Corruption (BROKEN)" 367 bool "OMAP4 errata: Async Bridge Corruption"
368 depends on ARCH_OMAP4 && BROKEN 368 depends on ARCH_OMAP4
369 select ARCH_HAS_BARRIERS 369 select ARCH_HAS_BARRIERS
370 help 370 help
371 If a data is stalled inside asynchronous bridge because of back 371 If a data is stalled inside asynchronous bridge because of back
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 42a4d11fad23..672262717601 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -371,7 +371,11 @@ static void n8x0_mmc_callback(void *data, u8 card_mask)
371 else 371 else
372 *openp = 0; 372 *openp = 0;
373 373
374#ifdef CONFIG_MMC_OMAP
374 omap_mmc_notify_cover_event(mmc_device, index, *openp); 375 omap_mmc_notify_cover_event(mmc_device, index, *openp);
376#else
377 pr_warn("MMC: notify cover event not available\n");
378#endif
375} 379}
376 380
377static int n8x0_mmc_late_init(struct device *dev) 381static int n8x0_mmc_late_init(struct device *dev)
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index c775bead1497..c877236a8442 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -381,7 +381,7 @@ static int omap3evm_twl_gpio_setup(struct device *dev,
381 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI"); 381 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
382 382
383 /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */ 383 /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
384 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; 384 gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1;
385 385
386 platform_device_register(&leds_gpio); 386 platform_device_register(&leds_gpio);
387 387
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index febffde2ff10..7e9338e8d684 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -132,6 +132,7 @@ void omap3_map_io(void);
132void am33xx_map_io(void); 132void am33xx_map_io(void);
133void omap4_map_io(void); 133void omap4_map_io(void);
134void ti81xx_map_io(void); 134void ti81xx_map_io(void);
135void omap_barriers_init(void);
135 136
136/** 137/**
137 * omap_test_timeout - busy-loop, testing a condition 138 * omap_test_timeout - busy-loop, testing a condition
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index cfdbb86bc84e..72e018b9b260 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -65,7 +65,6 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
65 struct timespec ts_preidle, ts_postidle, ts_idle; 65 struct timespec ts_preidle, ts_postidle, ts_idle;
66 u32 cpu1_state; 66 u32 cpu1_state;
67 int idle_time; 67 int idle_time;
68 int new_state_idx;
69 int cpu_id = smp_processor_id(); 68 int cpu_id = smp_processor_id();
70 69
71 /* Used to keep track of the total time in idle */ 70 /* Used to keep track of the total time in idle */
@@ -84,8 +83,8 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
84 */ 83 */
85 cpu1_state = pwrdm_read_pwrst(cpu1_pd); 84 cpu1_state = pwrdm_read_pwrst(cpu1_pd);
86 if (cpu1_state != PWRDM_POWER_OFF) { 85 if (cpu1_state != PWRDM_POWER_OFF) {
87 new_state_idx = drv->safe_state_index; 86 index = drv->safe_state_index;
88 cx = cpuidle_get_statedata(&dev->states_usage[new_state_idx]); 87 cx = cpuidle_get_statedata(&dev->states_usage[index]);
89 } 88 }
90 89
91 if (index > 0) 90 if (index > 0)
diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c b/arch/arm/mach-omap2/gpmc-smsc911x.c
index 997033129d26..bbb870c04a5e 100644
--- a/arch/arm/mach-omap2/gpmc-smsc911x.c
+++ b/arch/arm/mach-omap2/gpmc-smsc911x.c
@@ -19,6 +19,8 @@
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/smsc911x.h> 21#include <linux/smsc911x.h>
22#include <linux/regulator/fixed.h>
23#include <linux/regulator/machine.h>
22 24
23#include <plat/board.h> 25#include <plat/board.h>
24#include <plat/gpmc.h> 26#include <plat/gpmc.h>
@@ -42,6 +44,50 @@ static struct smsc911x_platform_config gpmc_smsc911x_config = {
42 .flags = SMSC911X_USE_16BIT, 44 .flags = SMSC911X_USE_16BIT,
43}; 45};
44 46
47static struct regulator_consumer_supply gpmc_smsc911x_supply[] = {
48 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
49 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
50};
51
52/* Generic regulator definition to satisfy smsc911x */
53static struct regulator_init_data gpmc_smsc911x_reg_init_data = {
54 .constraints = {
55 .min_uV = 3300000,
56 .max_uV = 3300000,
57 .valid_modes_mask = REGULATOR_MODE_NORMAL
58 | REGULATOR_MODE_STANDBY,
59 .valid_ops_mask = REGULATOR_CHANGE_MODE
60 | REGULATOR_CHANGE_STATUS,
61 },
62 .num_consumer_supplies = ARRAY_SIZE(gpmc_smsc911x_supply),
63 .consumer_supplies = gpmc_smsc911x_supply,
64};
65
66static struct fixed_voltage_config gpmc_smsc911x_fixed_reg_data = {
67 .supply_name = "gpmc_smsc911x",
68 .microvolts = 3300000,
69 .gpio = -EINVAL,
70 .startup_delay = 0,
71 .enable_high = 0,
72 .enabled_at_boot = 1,
73 .init_data = &gpmc_smsc911x_reg_init_data,
74};
75
76/*
77 * Platform device id of 42 is a temporary fix to avoid conflicts
78 * with other reg-fixed-voltage devices. The real fix should
79 * involve the driver core providing a way of dynamically
80 * assigning a unique id on registration for platform devices
81 * in the same name space.
82 */
83static struct platform_device gpmc_smsc911x_regulator = {
84 .name = "reg-fixed-voltage",
85 .id = 42,
86 .dev = {
87 .platform_data = &gpmc_smsc911x_fixed_reg_data,
88 },
89};
90
45/* 91/*
46 * Initialize smsc911x device connected to the GPMC. Note that we 92 * Initialize smsc911x device connected to the GPMC. Note that we
47 * assume that pin multiplexing is done in the board-*.c file, 93 * assume that pin multiplexing is done in the board-*.c file,
@@ -55,6 +101,12 @@ void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data)
55 101
56 gpmc_cfg = board_data; 102 gpmc_cfg = board_data;
57 103
104 ret = platform_device_register(&gpmc_smsc911x_regulator);
105 if (ret < 0) {
106 pr_err("Unable to register smsc911x regulators: %d\n", ret);
107 return;
108 }
109
58 if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) { 110 if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) {
59 pr_err("Failed to request GPMC mem region\n"); 111 pr_err("Failed to request GPMC mem region\n");
60 return; 112 return;
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index b40c28895298..19dd1657245c 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -428,6 +428,7 @@ static int omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
428 return 0; 428 return 0;
429} 429}
430 430
431static int omap_hsmmc_done;
431#define MAX_OMAP_MMC_HWMOD_NAME_LEN 16 432#define MAX_OMAP_MMC_HWMOD_NAME_LEN 16
432 433
433void omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) 434void omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
@@ -491,6 +492,11 @@ void omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
491{ 492{
492 u32 reg; 493 u32 reg;
493 494
495 if (omap_hsmmc_done)
496 return;
497
498 omap_hsmmc_done = 1;
499
494 if (!cpu_is_omap44xx()) { 500 if (!cpu_is_omap44xx()) {
495 if (cpu_is_omap2430()) { 501 if (cpu_is_omap2430()) {
496 control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE; 502 control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 6c5826605eae..719ee423abe2 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -343,6 +343,7 @@ static void __init omap3_check_revision(const char **cpu_rev)
343 case 0xb944: 343 case 0xb944:
344 omap_revision = AM335X_REV_ES1_0; 344 omap_revision = AM335X_REV_ES1_0;
345 *cpu_rev = "1.0"; 345 *cpu_rev = "1.0";
346 break;
346 case 0xb8f2: 347 case 0xb8f2:
347 switch (rev) { 348 switch (rev) {
348 case 0: 349 case 0:
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index eb50c29fb644..fb11b44fbdec 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -307,6 +307,7 @@ void __init omapam33xx_map_common_io(void)
307void __init omap44xx_map_common_io(void) 307void __init omap44xx_map_common_io(void)
308{ 308{
309 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc)); 309 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
310 omap_barriers_init();
310} 311}
311#endif 312#endif
312 313
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 609ea2ded7e3..415a6f1cf419 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -281,8 +281,16 @@ static struct omap_mbox mbox_iva_info = {
281 .ops = &omap2_mbox_ops, 281 .ops = &omap2_mbox_ops,
282 .priv = &omap2_mbox_iva_priv, 282 .priv = &omap2_mbox_iva_priv,
283}; 283};
284#endif
284 285
285struct omap_mbox *omap2_mboxes[] = { &mbox_dsp_info, &mbox_iva_info, NULL }; 286#ifdef CONFIG_ARCH_OMAP2
287struct omap_mbox *omap2_mboxes[] = {
288 &mbox_dsp_info,
289#ifdef CONFIG_SOC_OMAP2420
290 &mbox_iva_info,
291#endif
292 NULL
293};
286#endif 294#endif
287 295
288#if defined(CONFIG_ARCH_OMAP4) 296#if defined(CONFIG_ARCH_OMAP4)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index fb8bc9fa43b1..611a0e3d54ca 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -218,7 +218,7 @@ static int _omap_mux_get_by_name(struct omap_mux_partition *partition,
218 return -ENODEV; 218 return -ENODEV;
219} 219}
220 220
221static int __init 221static int
222omap_mux_get_by_name(const char *muxname, 222omap_mux_get_by_name(const char *muxname,
223 struct omap_mux_partition **found_partition, 223 struct omap_mux_partition **found_partition,
224 struct omap_mux **found_mux) 224 struct omap_mux **found_mux)
diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c
index b8822048e409..ac49384d0285 100644
--- a/arch/arm/mach-omap2/omap-iommu.c
+++ b/arch/arm/mach-omap2/omap-iommu.c
@@ -150,7 +150,8 @@ err_out:
150 platform_device_put(omap_iommu_pdev[i]); 150 platform_device_put(omap_iommu_pdev[i]);
151 return err; 151 return err;
152} 152}
153module_init(omap_iommu_init); 153/* must be ready before omap3isp is probed */
154subsys_initcall(omap_iommu_init);
154 155
155static void __exit omap_iommu_exit(void) 156static void __exit omap_iommu_exit(void)
156{ 157{
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 40a8fbc07e4b..70de277f5c15 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -24,12 +24,14 @@
24 24
25#include <plat/irqs.h> 25#include <plat/irqs.h>
26#include <plat/sram.h> 26#include <plat/sram.h>
27#include <plat/omap-secure.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <mach/omap-wakeupgen.h> 30#include <mach/omap-wakeupgen.h>
30 31
31#include "common.h" 32#include "common.h"
32#include "omap4-sar-layout.h" 33#include "omap4-sar-layout.h"
34#include <linux/export.h>
33 35
34#ifdef CONFIG_CACHE_L2X0 36#ifdef CONFIG_CACHE_L2X0
35static void __iomem *l2cache_base; 37static void __iomem *l2cache_base;
@@ -43,6 +45,9 @@ static void __iomem *sar_ram_base;
43 45
44void __iomem *dram_sync, *sram_sync; 46void __iomem *dram_sync, *sram_sync;
45 47
48static phys_addr_t paddr;
49static u32 size;
50
46void omap_bus_sync(void) 51void omap_bus_sync(void)
47{ 52{
48 if (dram_sync && sram_sync) { 53 if (dram_sync && sram_sync) {
@@ -51,19 +56,22 @@ void omap_bus_sync(void)
51 isb(); 56 isb();
52 } 57 }
53} 58}
59EXPORT_SYMBOL(omap_bus_sync);
54 60
55static int __init omap_barriers_init(void) 61/* Steal one page physical memory for barrier implementation */
62int __init omap_barrier_reserve_memblock(void)
56{ 63{
57 struct map_desc dram_io_desc[1];
58 phys_addr_t paddr;
59 u32 size;
60
61 if (!cpu_is_omap44xx())
62 return -ENODEV;
63 64
64 size = ALIGN(PAGE_SIZE, SZ_1M); 65 size = ALIGN(PAGE_SIZE, SZ_1M);
65 paddr = arm_memblock_steal(size, SZ_1M); 66 paddr = arm_memblock_steal(size, SZ_1M);
66 67
68 return 0;
69}
70
71void __init omap_barriers_init(void)
72{
73 struct map_desc dram_io_desc[1];
74
67 dram_io_desc[0].virtual = OMAP4_DRAM_BARRIER_VA; 75 dram_io_desc[0].virtual = OMAP4_DRAM_BARRIER_VA;
68 dram_io_desc[0].pfn = __phys_to_pfn(paddr); 76 dram_io_desc[0].pfn = __phys_to_pfn(paddr);
69 dram_io_desc[0].length = size; 77 dram_io_desc[0].length = size;
@@ -75,9 +83,10 @@ static int __init omap_barriers_init(void)
75 pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n", 83 pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
76 (long long) paddr, dram_io_desc[0].virtual); 84 (long long) paddr, dram_io_desc[0].virtual);
77 85
78 return 0;
79} 86}
80core_initcall(omap_barriers_init); 87#else
88void __init omap_barriers_init(void)
89{}
81#endif 90#endif
82 91
83void __init gic_init_irq(void) 92void __init gic_init_irq(void)
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 1881fe915149..5a65dd04aa38 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -174,14 +174,17 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
174 freq = clk->rate; 174 freq = clk->rate;
175 clk_put(clk); 175 clk_put(clk);
176 176
177 rcu_read_lock();
177 opp = opp_find_freq_ceil(dev, &freq); 178 opp = opp_find_freq_ceil(dev, &freq);
178 if (IS_ERR(opp)) { 179 if (IS_ERR(opp)) {
180 rcu_read_unlock();
179 pr_err("%s: unable to find boot up OPP for vdd_%s\n", 181 pr_err("%s: unable to find boot up OPP for vdd_%s\n",
180 __func__, vdd_name); 182 __func__, vdd_name);
181 goto exit; 183 goto exit;
182 } 184 }
183 185
184 bootup_volt = opp_get_voltage(opp); 186 bootup_volt = opp_get_voltage(opp);
187 rcu_read_unlock();
185 if (!bootup_volt) { 188 if (!bootup_volt) {
186 pr_err("%s: unable to find voltage corresponding " 189 pr_err("%s: unable to find voltage corresponding "
187 "to the bootup OPP for vdd_%s\n", __func__, vdd_name); 190 "to the bootup OPP for vdd_%s\n", __func__, vdd_name);
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 10b20c652e5d..4b57757bf9d1 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -270,7 +270,6 @@ static struct regulator_init_data omap4_vusb_idata = {
270 .constraints = { 270 .constraints = {
271 .min_uV = 3300000, 271 .min_uV = 3300000,
272 .max_uV = 3300000, 272 .max_uV = 3300000,
273 .apply_uV = true,
274 .valid_modes_mask = REGULATOR_MODE_NORMAL 273 .valid_modes_mask = REGULATOR_MODE_NORMAL
275 | REGULATOR_MODE_STANDBY, 274 | REGULATOR_MODE_STANDBY,
276 .valid_ops_mask = REGULATOR_CHANGE_MODE 275 .valid_ops_mask = REGULATOR_CHANGE_MODE
diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
index 771dc781b746..f51348dafafd 100644
--- a/arch/arm/mach-omap2/usb-host.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -486,7 +486,7 @@ static void setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
486void __init usbhs_init(const struct usbhs_omap_board_data *pdata) 486void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
487{ 487{
488 struct omap_hwmod *oh[2]; 488 struct omap_hwmod *oh[2];
489 struct omap_device *od; 489 struct platform_device *pdev;
490 int bus_id = -1; 490 int bus_id = -1;
491 int i; 491 int i;
492 492
@@ -522,11 +522,11 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
522 return; 522 return;
523 } 523 }
524 524
525 od = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2, 525 pdev = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2,
526 (void *)&usbhs_data, sizeof(usbhs_data), 526 (void *)&usbhs_data, sizeof(usbhs_data),
527 omap_uhhtll_latency, 527 omap_uhhtll_latency,
528 ARRAY_SIZE(omap_uhhtll_latency), false); 528 ARRAY_SIZE(omap_uhhtll_latency), false);
529 if (IS_ERR(od)) { 529 if (IS_ERR(pdev)) {
530 pr_err("Could not build hwmod devices %s,%s\n", 530 pr_err("Could not build hwmod devices %s,%s\n",
531 USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME); 531 USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME);
532 return; 532 return;
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index c005e2f5e383..57db2038b23c 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -108,6 +108,7 @@ void __init omap3xxx_voltagedomains_init(void)
108 * XXX Will depend on the process, validation, and binning 108 * XXX Will depend on the process, validation, and binning
109 * for the currently-running IC 109 * for the currently-running IC
110 */ 110 */
111#ifdef CONFIG_PM_OPP
111 if (cpu_is_omap3630()) { 112 if (cpu_is_omap3630()) {
112 omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data; 113 omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data;
113 omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data; 114 omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data;
@@ -115,6 +116,7 @@ void __init omap3xxx_voltagedomains_init(void)
115 omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data; 116 omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data;
116 omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data; 117 omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data;
117 } 118 }
119#endif
118 120
119 if (cpu_is_omap3517() || cpu_is_omap3505()) 121 if (cpu_is_omap3517() || cpu_is_omap3505())
120 voltdms = voltagedomains_am35xx; 122 voltdms = voltagedomains_am35xx;
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index 4e11d022595d..c3115f6853d4 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -100,9 +100,11 @@ void __init omap44xx_voltagedomains_init(void)
100 * XXX Will depend on the process, validation, and binning 100 * XXX Will depend on the process, validation, and binning
101 * for the currently-running IC 101 * for the currently-running IC
102 */ 102 */
103#ifdef CONFIG_PM_OPP
103 omap4_voltdm_mpu.volt_data = omap44xx_vdd_mpu_volt_data; 104 omap4_voltdm_mpu.volt_data = omap44xx_vdd_mpu_volt_data;
104 omap4_voltdm_iva.volt_data = omap44xx_vdd_iva_volt_data; 105 omap4_voltdm_iva.volt_data = omap44xx_vdd_iva_volt_data;
105 omap4_voltdm_core.volt_data = omap44xx_vdd_core_volt_data; 106 omap4_voltdm_core.volt_data = omap44xx_vdd_core_volt_data;
107#endif
106 108
107 for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++) 109 for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++)
108 voltdm->sys_clk.name = sys_clk_name; 110 voltdm->sys_clk.name = sys_clk_name;
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 0d729e6619df..42d5cca66257 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -49,7 +49,6 @@ extern unsigned pxa3xx_get_clk_frequency_khz(int);
49#endif 49#endif
50 50
51extern struct syscore_ops pxa_irq_syscore_ops; 51extern struct syscore_ops pxa_irq_syscore_ops;
52extern struct syscore_ops pxa_gpio_syscore_ops;
53extern struct syscore_ops pxa2xx_mfp_syscore_ops; 52extern struct syscore_ops pxa2xx_mfp_syscore_ops;
54extern struct syscore_ops pxa3xx_mfp_syscore_ops; 53extern struct syscore_ops pxa3xx_mfp_syscore_ops;
55 54
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index fb9b62dcf4ca..208eef1c0485 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -45,6 +45,7 @@
45#include <mach/hx4700.h> 45#include <mach/hx4700.h>
46#include <mach/irda.h> 46#include <mach/irda.h>
47 47
48#include <sound/ak4641.h>
48#include <video/platform_lcd.h> 49#include <video/platform_lcd.h>
49#include <video/w100fb.h> 50#include <video/w100fb.h>
50 51
@@ -765,6 +766,28 @@ static struct i2c_board_info __initdata pi2c_board_info[] = {
765}; 766};
766 767
767/* 768/*
769 * Asahi Kasei AK4641 on I2C
770 */
771
772static struct ak4641_platform_data ak4641_info = {
773 .gpio_power = GPIO27_HX4700_CODEC_ON,
774 .gpio_npdn = GPIO109_HX4700_CODEC_nPDN,
775};
776
777static struct i2c_board_info i2c_board_info[] __initdata = {
778 {
779 I2C_BOARD_INFO("ak4641", 0x12),
780 .platform_data = &ak4641_info,
781 },
782};
783
784static struct platform_device audio = {
785 .name = "hx4700-audio",
786 .id = -1,
787};
788
789
790/*
768 * PCMCIA 791 * PCMCIA
769 */ 792 */
770 793
@@ -790,6 +813,7 @@ static struct platform_device *devices[] __initdata = {
790 &gpio_vbus, 813 &gpio_vbus,
791 &power_supply, 814 &power_supply,
792 &strataflash, 815 &strataflash,
816 &audio,
793 &pcmcia, 817 &pcmcia,
794}; 818};
795 819
@@ -827,6 +851,7 @@ static void __init hx4700_init(void)
827 pxa_set_ficp_info(&ficp_info); 851 pxa_set_ficp_info(&ficp_info);
828 pxa27x_set_i2c_power_info(NULL); 852 pxa27x_set_i2c_power_info(NULL);
829 pxa_set_i2c_info(NULL); 853 pxa_set_i2c_info(NULL);
854 i2c_register_board_info(0, ARRAY_AND_SIZE(i2c_board_info));
830 i2c_register_board_info(1, ARRAY_AND_SIZE(pi2c_board_info)); 855 i2c_register_board_info(1, ARRAY_AND_SIZE(pi2c_board_info));
831 pxa2xx_set_spi_info(2, &pxa_ssp2_master_info); 856 pxa2xx_set_spi_info(2, &pxa_ssp2_master_info);
832 spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info)); 857 spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info));
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index f14775536b83..29b62afc6f7c 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -226,6 +226,12 @@ static void __init pxa25x_mfp_init(void)
226{ 226{
227 int i; 227 int i;
228 228
229 /* running before pxa_gpio_probe() */
230#ifdef CONFIG_CPU_PXA26x
231 pxa_last_gpio = 89;
232#else
233 pxa_last_gpio = 84;
234#endif
229 for (i = 0; i <= pxa_last_gpio; i++) 235 for (i = 0; i <= pxa_last_gpio; i++)
230 gpio_desc[i].valid = 1; 236 gpio_desc[i].valid = 1;
231 237
@@ -295,6 +301,7 @@ static void __init pxa27x_mfp_init(void)
295{ 301{
296 int i, gpio; 302 int i, gpio;
297 303
304 pxa_last_gpio = 120; /* running before pxa_gpio_probe() */
298 for (i = 0; i <= pxa_last_gpio; i++) { 305 for (i = 0; i <= pxa_last_gpio; i++) {
299 /* skip GPIO2, 5, 6, 7, 8, they are not 306 /* skip GPIO2, 5, 6, 7, 8, they are not
300 * valid pins allow configuration 307 * valid pins allow configuration
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 91e4f6c03766..3352b37b60cf 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -25,7 +25,6 @@
25#include <linux/suspend.h> 25#include <linux/suspend.h>
26#include <linux/syscore_ops.h> 26#include <linux/syscore_ops.h>
27#include <linux/irq.h> 27#include <linux/irq.h>
28#include <linux/gpio.h>
29 28
30#include <asm/mach/map.h> 29#include <asm/mach/map.h>
31#include <asm/suspend.h> 30#include <asm/suspend.h>
@@ -209,6 +208,7 @@ static struct clk_lookup pxa25x_clkregs[] = {
209 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"), 208 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
210 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"), 209 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
211 INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL), 210 INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
211 INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
212}; 212};
213 213
214static struct clk_lookup pxa25x_hwuart_clkreg = 214static struct clk_lookup pxa25x_hwuart_clkreg =
@@ -368,7 +368,6 @@ static int __init pxa25x_init(void)
368 368
369 register_syscore_ops(&pxa_irq_syscore_ops); 369 register_syscore_ops(&pxa_irq_syscore_ops);
370 register_syscore_ops(&pxa2xx_mfp_syscore_ops); 370 register_syscore_ops(&pxa2xx_mfp_syscore_ops);
371 register_syscore_ops(&pxa_gpio_syscore_ops);
372 register_syscore_ops(&pxa2xx_clock_syscore_ops); 371 register_syscore_ops(&pxa2xx_clock_syscore_ops);
373 372
374 ret = platform_add_devices(pxa25x_devices, 373 ret = platform_add_devices(pxa25x_devices,
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index aed6cbcf3866..6bce78edce7a 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -22,7 +22,6 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/i2c/pxa-i2c.h> 24#include <linux/i2c/pxa-i2c.h>
25#include <linux/gpio.h>
26 25
27#include <asm/mach/map.h> 26#include <asm/mach/map.h>
28#include <mach/hardware.h> 27#include <mach/hardware.h>
@@ -230,6 +229,7 @@ static struct clk_lookup pxa27x_clkregs[] = {
230 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"), 229 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
231 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"), 230 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
232 INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL), 231 INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
232 INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
233}; 233};
234 234
235#ifdef CONFIG_PM 235#ifdef CONFIG_PM
@@ -456,7 +456,6 @@ static int __init pxa27x_init(void)
456 456
457 register_syscore_ops(&pxa_irq_syscore_ops); 457 register_syscore_ops(&pxa_irq_syscore_ops);
458 register_syscore_ops(&pxa2xx_mfp_syscore_ops); 458 register_syscore_ops(&pxa2xx_mfp_syscore_ops);
459 register_syscore_ops(&pxa_gpio_syscore_ops);
460 register_syscore_ops(&pxa2xx_clock_syscore_ops); 459 register_syscore_ops(&pxa2xx_clock_syscore_ops);
461 460
462 ret = platform_add_devices(devices, ARRAY_SIZE(devices)); 461 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 4f402afa6609..3918a672238e 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -462,7 +462,6 @@ static int __init pxa3xx_init(void)
462 462
463 register_syscore_ops(&pxa_irq_syscore_ops); 463 register_syscore_ops(&pxa_irq_syscore_ops);
464 register_syscore_ops(&pxa3xx_mfp_syscore_ops); 464 register_syscore_ops(&pxa3xx_mfp_syscore_ops);
465 register_syscore_ops(&pxa_gpio_syscore_ops);
466 register_syscore_ops(&pxa3xx_clock_syscore_ops); 465 register_syscore_ops(&pxa3xx_clock_syscore_ops);
467 466
468 ret = platform_add_devices(devices, ARRAY_SIZE(devices)); 467 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index d082a583df78..5ce434b95e87 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -283,7 +283,6 @@ static int __init pxa95x_init(void)
283 return ret; 283 return ret;
284 284
285 register_syscore_ops(&pxa_irq_syscore_ops); 285 register_syscore_ops(&pxa_irq_syscore_ops);
286 register_syscore_ops(&pxa_gpio_syscore_ops);
287 register_syscore_ops(&pxa3xx_clock_syscore_ops); 286 register_syscore_ops(&pxa3xx_clock_syscore_ops);
288 287
289 ret = platform_add_devices(devices, ARRAY_SIZE(devices)); 288 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
index febc809ed5a6..5aded5e6148f 100644
--- a/arch/arm/mach-pxa/saarb.c
+++ b/arch/arm/mach-pxa/saarb.c
@@ -15,7 +15,6 @@
15#include <linux/i2c.h> 15#include <linux/i2c.h>
16#include <linux/i2c/pxa-i2c.h> 16#include <linux/i2c/pxa-i2c.h>
17#include <linux/mfd/88pm860x.h> 17#include <linux/mfd/88pm860x.h>
18#include <linux/gpio.h>
19 18
20#include <asm/mach-types.h> 19#include <asm/mach-types.h>
21#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 8d5168d253a9..30989baf7f2a 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -168,6 +168,7 @@ struct battery_thresh sharpsl_battery_levels_noac[] = {
168#define MAXCTRL_SEL_SH 4 168#define MAXCTRL_SEL_SH 4
169#define MAXCTRL_STR (1u << 7) 169#define MAXCTRL_STR (1u << 7)
170 170
171extern int max1111_read_channel(int);
171/* 172/*
172 * Read MAX1111 ADC 173 * Read MAX1111 ADC
173 */ 174 */
@@ -177,8 +178,6 @@ int sharpsl_pm_pxa_read_max1111(int channel)
177 if (machine_is_tosa()) 178 if (machine_is_tosa())
178 return 0; 179 return 0;
179 180
180 extern int max1111_read_channel(int);
181
182 /* max1111 accepts channels from 0-3, however, 181 /* max1111 accepts channels from 0-3, however,
183 * it is encoded from 0-7 here in the code. 182 * it is encoded from 0-7 here in the code.
184 */ 183 */
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 34cbdac51525..438f02fe122a 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -172,10 +172,9 @@ static int spitz_should_wakeup(unsigned int resume_on_alarm)
172static unsigned long spitz_charger_wakeup(void) 172static unsigned long spitz_charger_wakeup(void)
173{ 173{
174 unsigned long ret; 174 unsigned long ret;
175 ret = (!gpio_get_value(SPITZ_GPIO_KEY_INT) 175 ret = ((!gpio_get_value(SPITZ_GPIO_KEY_INT)
176 << GPIO_bit(SPITZ_GPIO_KEY_INT)) 176 << GPIO_bit(SPITZ_GPIO_KEY_INT))
177 | (!gpio_get_value(SPITZ_GPIO_SYNC) 177 | gpio_get_value(SPITZ_GPIO_SYNC));
178 << GPIO_bit(SPITZ_GPIO_SYNC));
179 return ret; 178 return ret;
180} 179}
181 180
diff --git a/arch/arm/mach-s3c2440/common.h b/arch/arm/mach-s3c2440/common.h
index db8a98ac68c5..0c1eb1dfc534 100644
--- a/arch/arm/mach-s3c2440/common.h
+++ b/arch/arm/mach-s3c2440/common.h
@@ -12,6 +12,6 @@
12#ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H 12#ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H
13#define __ARCH_ARM_MACH_S3C2440_COMMON_H 13#define __ARCH_ARM_MACH_S3C2440_COMMON_H
14 14
15void s3c2440_restart(char mode, const char *cmd); 15void s3c244x_restart(char mode, const char *cmd);
16 16
17#endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */ 17#endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index 24569550de1a..19b577bc09b8 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -487,5 +487,5 @@ MACHINE_START(ANUBIS, "Simtec-Anubis")
487 .init_machine = anubis_init, 487 .init_machine = anubis_init,
488 .init_irq = s3c24xx_init_irq, 488 .init_irq = s3c24xx_init_irq,
489 .timer = &s3c24xx_timer, 489 .timer = &s3c24xx_timer,
490 .restart = s3c2440_restart, 490 .restart = s3c244x_restart,
491MACHINE_END 491MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c
index d6a9763110cd..d7ae49c90118 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -222,5 +222,5 @@ MACHINE_START(AT2440EVB, "AT2440EVB")
222 .init_machine = at2440evb_init, 222 .init_machine = at2440evb_init,
223 .init_irq = s3c24xx_init_irq, 223 .init_irq = s3c24xx_init_irq,
224 .timer = &s3c24xx_timer, 224 .timer = &s3c24xx_timer,
225 .restart = s3c2440_restart, 225 .restart = s3c244x_restart,
226MACHINE_END 226MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c
index 5859e609d28c..9a4a5bc008e6 100644
--- a/arch/arm/mach-s3c2440/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -601,5 +601,5 @@ MACHINE_START(NEO1973_GTA02, "GTA02")
601 .init_irq = s3c24xx_init_irq, 601 .init_irq = s3c24xx_init_irq,
602 .init_machine = gta02_machine_init, 602 .init_machine = gta02_machine_init,
603 .timer = &s3c24xx_timer, 603 .timer = &s3c24xx_timer,
604 .restart = s3c2440_restart, 604 .restart = s3c244x_restart,
605MACHINE_END 605MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index adbbb85bc4cd..5d66fb218a41 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -701,5 +701,5 @@ MACHINE_START(MINI2440, "MINI2440")
701 .init_machine = mini2440_init, 701 .init_machine = mini2440_init,
702 .init_irq = s3c24xx_init_irq, 702 .init_irq = s3c24xx_init_irq,
703 .timer = &s3c24xx_timer, 703 .timer = &s3c24xx_timer,
704 .restart = s3c2440_restart, 704 .restart = s3c244x_restart,
705MACHINE_END 705MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c
index 40eaf844bc1f..5198e3e1c5be 100644
--- a/arch/arm/mach-s3c2440/mach-nexcoder.c
+++ b/arch/arm/mach-s3c2440/mach-nexcoder.c
@@ -158,5 +158,5 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440")
158 .init_machine = nexcoder_init, 158 .init_machine = nexcoder_init,
159 .init_irq = s3c24xx_init_irq, 159 .init_irq = s3c24xx_init_irq,
160 .timer = &s3c24xx_timer, 160 .timer = &s3c24xx_timer,
161 .restart = s3c2440_restart, 161 .restart = s3c244x_restart,
162MACHINE_END 162MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index 4c480ef734f6..c5daeb612a88 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -436,5 +436,5 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS")
436 .init_irq = s3c24xx_init_irq, 436 .init_irq = s3c24xx_init_irq,
437 .init_machine = osiris_init, 437 .init_machine = osiris_init,
438 .timer = &s3c24xx_timer, 438 .timer = &s3c24xx_timer,
439 .restart = s3c2440_restart, 439 .restart = s3c244x_restart,
440MACHINE_END 440MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c
index 80077f6472ee..6f68abf44fab 100644
--- a/arch/arm/mach-s3c2440/mach-rx1950.c
+++ b/arch/arm/mach-s3c2440/mach-rx1950.c
@@ -822,5 +822,5 @@ MACHINE_START(RX1950, "HP iPAQ RX1950")
822 .init_irq = s3c24xx_init_irq, 822 .init_irq = s3c24xx_init_irq,
823 .init_machine = rx1950_init_machine, 823 .init_machine = rx1950_init_machine,
824 .timer = &s3c24xx_timer, 824 .timer = &s3c24xx_timer,
825 .restart = s3c2440_restart, 825 .restart = s3c244x_restart,
826MACHINE_END 826MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index 20103bafbd4b..56af35447598 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -213,5 +213,5 @@ MACHINE_START(RX3715, "IPAQ-RX3715")
213 .init_irq = rx3715_init_irq, 213 .init_irq = rx3715_init_irq,
214 .init_machine = rx3715_init_machine, 214 .init_machine = rx3715_init_machine,
215 .timer = &s3c24xx_timer, 215 .timer = &s3c24xx_timer,
216 .restart = s3c2440_restart, 216 .restart = s3c244x_restart,
217MACHINE_END 217MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c
index 1deb60d12a60..83a1036d7dcb 100644
--- a/arch/arm/mach-s3c2440/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2440/mach-smdk2440.c
@@ -183,5 +183,5 @@ MACHINE_START(S3C2440, "SMDK2440")
183 .map_io = smdk2440_map_io, 183 .map_io = smdk2440_map_io,
184 .init_machine = smdk2440_machine_init, 184 .init_machine = smdk2440_machine_init,
185 .timer = &s3c24xx_timer, 185 .timer = &s3c24xx_timer,
186 .restart = s3c2440_restart, 186 .restart = s3c244x_restart,
187MACHINE_END 187MACHINE_END
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index 517623a09fc5..2b3dddb49af7 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -35,7 +35,6 @@
35#include <plat/cpu.h> 35#include <plat/cpu.h>
36#include <plat/s3c244x.h> 36#include <plat/s3c244x.h>
37#include <plat/pm.h> 37#include <plat/pm.h>
38#include <plat/watchdog-reset.h>
39 38
40#include <plat/gpio-core.h> 39#include <plat/gpio-core.h>
41#include <plat/gpio-cfg.h> 40#include <plat/gpio-cfg.h>
@@ -74,15 +73,3 @@ void __init s3c2440_map_io(void)
74 s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up; 73 s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
75 s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up; 74 s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
76} 75}
77
78void s3c2440_restart(char mode, const char *cmd)
79{
80 if (mode == 's') {
81 soft_restart(0);
82 }
83
84 arch_wdt_reset();
85
86 /* we'll take a jump through zero as a poor second */
87 soft_restart(0);
88}
diff --git a/arch/arm/mach-s3c2440/s3c244x.c b/arch/arm/mach-s3c2440/s3c244x.c
index 36bc60f61d0a..d15852f642b7 100644
--- a/arch/arm/mach-s3c2440/s3c244x.c
+++ b/arch/arm/mach-s3c2440/s3c244x.c
@@ -46,6 +46,7 @@
46#include <plat/pm.h> 46#include <plat/pm.h>
47#include <plat/pll.h> 47#include <plat/pll.h>
48#include <plat/nand-core.h> 48#include <plat/nand-core.h>
49#include <plat/watchdog-reset.h>
49 50
50static struct map_desc s3c244x_iodesc[] __initdata = { 51static struct map_desc s3c244x_iodesc[] __initdata = {
51 IODESC_ENT(CLKPWR), 52 IODESC_ENT(CLKPWR),
@@ -196,3 +197,14 @@ struct syscore_ops s3c244x_pm_syscore_ops = {
196 .suspend = s3c244x_suspend, 197 .suspend = s3c244x_suspend,
197 .resume = s3c244x_resume, 198 .resume = s3c244x_resume,
198}; 199};
200
201void s3c244x_restart(char mode, const char *cmd)
202{
203 if (mode == 's')
204 soft_restart(0);
205
206 arch_wdt_reset();
207
208 /* we'll take a jump through zero as a poor second */
209 soft_restart(0);
210}
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index eff8a96c75ee..bd7953b59a84 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -30,6 +30,7 @@
30#include <linux/serial_sci.h> 30#include <linux/serial_sci.h>
31#include <linux/smsc911x.h> 31#include <linux/smsc911x.h>
32#include <linux/gpio.h> 32#include <linux/gpio.h>
33#include <linux/videodev2.h>
33#include <linux/input.h> 34#include <linux/input.h>
34#include <linux/input/sh_keysc.h> 35#include <linux/input/sh_keysc.h>
35#include <linux/mmc/host.h> 36#include <linux/mmc/host.h>
@@ -37,7 +38,7 @@
37#include <linux/mmc/sh_mobile_sdhi.h> 38#include <linux/mmc/sh_mobile_sdhi.h>
38#include <linux/mfd/tmio.h> 39#include <linux/mfd/tmio.h>
39#include <linux/sh_clk.h> 40#include <linux/sh_clk.h>
40#include <linux/dma-mapping.h> 41#include <linux/videodev2.h>
41#include <video/sh_mobile_lcdc.h> 42#include <video/sh_mobile_lcdc.h>
42#include <video/sh_mipi_dsi.h> 43#include <video/sh_mipi_dsi.h>
43#include <sound/sh_fsi.h> 44#include <sound/sh_fsi.h>
@@ -46,8 +47,6 @@
46#include <mach/common.h> 47#include <mach/common.h>
47#include <asm/mach-types.h> 48#include <asm/mach-types.h>
48#include <asm/mach/arch.h> 49#include <asm/mach/arch.h>
49#include <asm/mach/map.h>
50#include <asm/mach/time.h>
51#include <asm/hardware/gic.h> 50#include <asm/hardware/gic.h>
52#include <asm/hardware/cache-l2x0.h> 51#include <asm/hardware/cache-l2x0.h>
53#include <asm/traps.h> 52#include <asm/traps.h>
@@ -159,19 +158,12 @@ static struct resource sh_mmcif_resources[] = {
159 }, 158 },
160}; 159};
161 160
162static struct sh_mmcif_dma sh_mmcif_dma = {
163 .chan_priv_rx = {
164 .slave_id = SHDMA_SLAVE_MMCIF_RX,
165 },
166 .chan_priv_tx = {
167 .slave_id = SHDMA_SLAVE_MMCIF_TX,
168 },
169};
170static struct sh_mmcif_plat_data sh_mmcif_platdata = { 161static struct sh_mmcif_plat_data sh_mmcif_platdata = {
171 .sup_pclk = 0, 162 .sup_pclk = 0,
172 .ocr = MMC_VDD_165_195, 163 .ocr = MMC_VDD_165_195,
173 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, 164 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
174 .dma = &sh_mmcif_dma, 165 .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
166 .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
175}; 167};
176 168
177static struct platform_device mmc_device = { 169static struct platform_device mmc_device = {
@@ -321,12 +313,11 @@ static struct resource mipidsi0_resources[] = {
321 }, 313 },
322}; 314};
323 315
324#define DSI0PHYCR 0xe615006c
325static int sh_mipi_set_dot_clock(struct platform_device *pdev, 316static int sh_mipi_set_dot_clock(struct platform_device *pdev,
326 void __iomem *base, 317 void __iomem *base,
327 int enable) 318 int enable)
328{ 319{
329 struct clk *pck; 320 struct clk *pck, *phy;
330 int ret; 321 int ret;
331 322
332 pck = clk_get(&pdev->dev, "dsip_clk"); 323 pck = clk_get(&pdev->dev, "dsip_clk");
@@ -335,18 +326,27 @@ static int sh_mipi_set_dot_clock(struct platform_device *pdev,
335 goto sh_mipi_set_dot_clock_pck_err; 326 goto sh_mipi_set_dot_clock_pck_err;
336 } 327 }
337 328
329 phy = clk_get(&pdev->dev, "dsiphy_clk");
330 if (IS_ERR(phy)) {
331 ret = PTR_ERR(phy);
332 goto sh_mipi_set_dot_clock_phy_err;
333 }
334
338 if (enable) { 335 if (enable) {
339 clk_set_rate(pck, clk_round_rate(pck, 24000000)); 336 clk_set_rate(pck, clk_round_rate(pck, 24000000));
340 __raw_writel(0x2a809010, DSI0PHYCR); 337 clk_set_rate(phy, clk_round_rate(pck, 510000000));
341 clk_enable(pck); 338 clk_enable(pck);
339 clk_enable(phy);
342 } else { 340 } else {
343 clk_disable(pck); 341 clk_disable(pck);
342 clk_disable(phy);
344 } 343 }
345 344
346 ret = 0; 345 ret = 0;
347 346
347 clk_put(phy);
348sh_mipi_set_dot_clock_phy_err:
348 clk_put(pck); 349 clk_put(pck);
349
350sh_mipi_set_dot_clock_pck_err: 350sh_mipi_set_dot_clock_pck_err:
351 return ret; 351 return ret;
352} 352}
@@ -485,27 +485,6 @@ static struct platform_device *ag5evm_devices[] __initdata = {
485 &sdhi1_device, 485 &sdhi1_device,
486}; 486};
487 487
488static struct map_desc ag5evm_io_desc[] __initdata = {
489 /* create a 1:1 entity map for 0xe6xxxxxx
490 * used by CPGA, INTC and PFC.
491 */
492 {
493 .virtual = 0xe6000000,
494 .pfn = __phys_to_pfn(0xe6000000),
495 .length = 256 << 20,
496 .type = MT_DEVICE_NONSHARED
497 },
498};
499
500static void __init ag5evm_map_io(void)
501{
502 iotable_init(ag5evm_io_desc, ARRAY_SIZE(ag5evm_io_desc));
503
504 /* setup early devices and console here as well */
505 sh73a0_add_early_devices();
506 shmobile_setup_console();
507}
508
509static void __init ag5evm_init(void) 488static void __init ag5evm_init(void)
510{ 489{
511 sh73a0_pinmux_init(); 490 sh73a0_pinmux_init();
@@ -621,22 +600,12 @@ static void __init ag5evm_init(void)
621 platform_add_devices(ag5evm_devices, ARRAY_SIZE(ag5evm_devices)); 600 platform_add_devices(ag5evm_devices, ARRAY_SIZE(ag5evm_devices));
622} 601}
623 602
624static void __init ag5evm_timer_init(void)
625{
626 sh73a0_clock_init();
627 shmobile_timer.init();
628 return;
629}
630
631struct sys_timer ag5evm_timer = {
632 .init = ag5evm_timer_init,
633};
634
635MACHINE_START(AG5EVM, "ag5evm") 603MACHINE_START(AG5EVM, "ag5evm")
636 .map_io = ag5evm_map_io, 604 .map_io = sh73a0_map_io,
605 .init_early = sh73a0_add_early_devices,
637 .nr_irqs = NR_IRQS_LEGACY, 606 .nr_irqs = NR_IRQS_LEGACY,
638 .init_irq = sh73a0_init_irq, 607 .init_irq = sh73a0_init_irq,
639 .handle_irq = gic_handle_irq, 608 .handle_irq = gic_handle_irq,
640 .init_machine = ag5evm_init, 609 .init_machine = ag5evm_init,
641 .timer = &ag5evm_timer, 610 .timer = &shmobile_timer,
642MACHINE_END 611MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index aab0a349f759..4739f039650a 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -61,8 +61,6 @@
61 61
62#include <asm/mach-types.h> 62#include <asm/mach-types.h>
63#include <asm/mach/arch.h> 63#include <asm/mach/arch.h>
64#include <asm/mach/map.h>
65#include <asm/mach/time.h>
66#include <asm/setup.h> 64#include <asm/setup.h>
67 65
68/* 66/*
@@ -295,15 +293,6 @@ static struct resource sh_mmcif_resources[] = {
295 }, 293 },
296}; 294};
297 295
298static struct sh_mmcif_dma sh_mmcif_dma = {
299 .chan_priv_rx = {
300 .slave_id = SHDMA_SLAVE_MMCIF_RX,
301 },
302 .chan_priv_tx = {
303 .slave_id = SHDMA_SLAVE_MMCIF_TX,
304 },
305};
306
307static struct sh_mmcif_plat_data sh_mmcif_plat = { 296static struct sh_mmcif_plat_data sh_mmcif_plat = {
308 .sup_pclk = 0, 297 .sup_pclk = 0,
309 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, 298 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
@@ -311,7 +300,8 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = {
311 MMC_CAP_8_BIT_DATA | 300 MMC_CAP_8_BIT_DATA |
312 MMC_CAP_NEEDS_POLL, 301 MMC_CAP_NEEDS_POLL,
313 .get_cd = slot_cn7_get_cd, 302 .get_cd = slot_cn7_get_cd,
314 .dma = &sh_mmcif_dma, 303 .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
304 .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
315}; 305};
316 306
317static struct platform_device sh_mmcif_device = { 307static struct platform_device sh_mmcif_device = {
@@ -802,7 +792,7 @@ static struct fsi_ak4642_info fsi2_ak4643_info = {
802static struct platform_device fsi_ak4643_device = { 792static struct platform_device fsi_ak4643_device = {
803 .name = "fsi-ak4642-audio", 793 .name = "fsi-ak4642-audio",
804 .dev = { 794 .dev = {
805 .platform_data = &fsi_info, 795 .platform_data = &fsi2_ak4643_info,
806 }, 796 },
807}; 797};
808 798
@@ -1198,27 +1188,6 @@ static struct i2c_board_info i2c1_devices[] = {
1198 }, 1188 },
1199}; 1189};
1200 1190
1201static struct map_desc ap4evb_io_desc[] __initdata = {
1202 /* create a 1:1 entity map for 0xe6xxxxxx
1203 * used by CPGA, INTC and PFC.
1204 */
1205 {
1206 .virtual = 0xe6000000,
1207 .pfn = __phys_to_pfn(0xe6000000),
1208 .length = 256 << 20,
1209 .type = MT_DEVICE_NONSHARED
1210 },
1211};
1212
1213static void __init ap4evb_map_io(void)
1214{
1215 iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
1216
1217 /* setup early devices and console here as well */
1218 sh7372_add_early_devices();
1219 shmobile_setup_console();
1220}
1221
1222#define GPIO_PORT9CR 0xE6051009 1191#define GPIO_PORT9CR 0xE6051009
1223#define GPIO_PORT10CR 0xE605100A 1192#define GPIO_PORT10CR 0xE605100A
1224#define USCCR1 0xE6058144 1193#define USCCR1 0xE6058144
@@ -1227,6 +1196,9 @@ static void __init ap4evb_init(void)
1227 u32 srcr4; 1196 u32 srcr4;
1228 struct clk *clk; 1197 struct clk *clk;
1229 1198
1199 /* External clock source */
1200 clk_set_rate(&sh7372_dv_clki_clk, 27000000);
1201
1230 sh7372_pinmux_init(); 1202 sh7372_pinmux_init();
1231 1203
1232 /* enable SCIFA0 */ 1204 /* enable SCIFA0 */
@@ -1463,23 +1435,11 @@ static void __init ap4evb_init(void)
1463 pm_clk_add(&lcdc1_device.dev, "hdmi"); 1435 pm_clk_add(&lcdc1_device.dev, "hdmi");
1464} 1436}
1465 1437
1466static void __init ap4evb_timer_init(void)
1467{
1468 sh7372_clock_init();
1469 shmobile_timer.init();
1470
1471 /* External clock source */
1472 clk_set_rate(&sh7372_dv_clki_clk, 27000000);
1473}
1474
1475static struct sys_timer ap4evb_timer = {
1476 .init = ap4evb_timer_init,
1477};
1478
1479MACHINE_START(AP4EVB, "ap4evb") 1438MACHINE_START(AP4EVB, "ap4evb")
1480 .map_io = ap4evb_map_io, 1439 .map_io = sh7372_map_io,
1440 .init_early = sh7372_add_early_devices,
1481 .init_irq = sh7372_init_irq, 1441 .init_irq = sh7372_init_irq,
1482 .handle_irq = shmobile_handle_irq_intc, 1442 .handle_irq = shmobile_handle_irq_intc,
1483 .init_machine = ap4evb_init, 1443 .init_machine = ap4evb_init,
1484 .timer = &ap4evb_timer, 1444 .timer = &shmobile_timer,
1485MACHINE_END 1445MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
index 4d2201622323..396814a6a2c9 100644
--- a/arch/arm/mach-shmobile/board-bonito.c
+++ b/arch/arm/mach-shmobile/board-bonito.c
@@ -27,6 +27,7 @@
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/gpio.h> 28#include <linux/gpio.h>
29#include <linux/smsc911x.h> 29#include <linux/smsc911x.h>
30#include <linux/videodev2.h>
30#include <mach/common.h> 31#include <mach/common.h>
31#include <asm/mach-types.h> 32#include <asm/mach-types.h>
32#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
@@ -241,7 +242,7 @@ static struct sh_mobile_lcdc_info lcdc0_info = {
241 .clock_source = LCDC_CLK_BUS, 242 .clock_source = LCDC_CLK_BUS,
242 .ch[0] = { 243 .ch[0] = {
243 .chan = LCDC_CHAN_MAINLCD, 244 .chan = LCDC_CHAN_MAINLCD,
244 .bpp = 16, 245 .fourcc = V4L2_PIX_FMT_RGB565,
245 .interface_type = RGB24, 246 .interface_type = RGB24,
246 .clock_divider = 5, 247 .clock_divider = 5,
247 .flags = 0, 248 .flags = 0,
@@ -327,28 +328,6 @@ static struct platform_device *bonito_base_devices[] __initdata = {
327 * map I/O 328 * map I/O
328 */ 329 */
329static struct map_desc bonito_io_desc[] __initdata = { 330static struct map_desc bonito_io_desc[] __initdata = {
330 /*
331 * for CPGA/INTC/PFC
332 * 0xe6000000-0xefffffff -> 0xe6000000-0xefffffff
333 */
334 {
335 .virtual = 0xe6000000,
336 .pfn = __phys_to_pfn(0xe6000000),
337 .length = 160 << 20,
338 .type = MT_DEVICE_NONSHARED
339 },
340#ifdef CONFIG_CACHE_L2X0
341 /*
342 * for l2x0_init()
343 * 0xf0100000-0xf0101000 -> 0xf0002000-0xf0003000
344 */
345 {
346 .virtual = 0xf0002000,
347 .pfn = __phys_to_pfn(0xf0100000),
348 .length = PAGE_SIZE,
349 .type = MT_DEVICE_NONSHARED
350 },
351#endif
352 /* 331 /*
353 * for FPGA (0x1800000-0x19ffffff) 332 * for FPGA (0x1800000-0x19ffffff)
354 * 0x18000000-0x18002000 -> 0xf0003000-0xf0005000 333 * 0x18000000-0x18002000 -> 0xf0003000-0xf0005000
@@ -363,11 +342,8 @@ static struct map_desc bonito_io_desc[] __initdata = {
363 342
364static void __init bonito_map_io(void) 343static void __init bonito_map_io(void)
365{ 344{
345 r8a7740_map_io();
366 iotable_init(bonito_io_desc, ARRAY_SIZE(bonito_io_desc)); 346 iotable_init(bonito_io_desc, ARRAY_SIZE(bonito_io_desc));
367
368 /* setup early devices and console here as well */
369 r8a7740_add_early_devices();
370 shmobile_setup_console();
371} 347}
372 348
373/* 349/*
@@ -491,7 +467,7 @@ static void __init bonito_init(void)
491 } 467 }
492} 468}
493 469
494static void __init bonito_timer_init(void) 470static void __init bonito_earlytimer_init(void)
495{ 471{
496 u16 val; 472 u16 val;
497 u8 md_ck = 0; 473 u8 md_ck = 0;
@@ -506,17 +482,22 @@ static void __init bonito_timer_init(void)
506 md_ck |= MD_CK0; 482 md_ck |= MD_CK0;
507 483
508 r8a7740_clock_init(md_ck); 484 r8a7740_clock_init(md_ck);
509 shmobile_timer.init(); 485 shmobile_earlytimer_init();
510} 486}
511 487
512struct sys_timer bonito_timer = { 488void __init bonito_add_early_devices(void)
513 .init = bonito_timer_init, 489{
514}; 490 r8a7740_add_early_devices();
491
492 /* override timer setup with board-specific code */
493 shmobile_timer.init = bonito_earlytimer_init;
494}
515 495
516MACHINE_START(BONITO, "bonito") 496MACHINE_START(BONITO, "bonito")
517 .map_io = bonito_map_io, 497 .map_io = bonito_map_io,
498 .init_early = bonito_add_early_devices,
518 .init_irq = r8a7740_init_irq, 499 .init_irq = r8a7740_init_irq,
519 .handle_irq = shmobile_handle_irq_intc, 500 .handle_irq = shmobile_handle_irq_intc,
520 .init_machine = bonito_init, 501 .init_machine = bonito_init,
521 .timer = &bonito_timer, 502 .timer = &shmobile_timer,
522MACHINE_END 503MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c
index 72d557281b1f..b627e89037f5 100644
--- a/arch/arm/mach-shmobile/board-g3evm.c
+++ b/arch/arm/mach-shmobile/board-g3evm.c
@@ -37,8 +37,6 @@
37#include <mach/common.h> 37#include <mach/common.h>
38#include <asm/mach-types.h> 38#include <asm/mach-types.h>
39#include <asm/mach/arch.h> 39#include <asm/mach/arch.h>
40#include <asm/mach/map.h>
41#include <asm/mach/time.h>
42 40
43/* 41/*
44 * IrDA 42 * IrDA
@@ -246,27 +244,6 @@ static struct platform_device *g3evm_devices[] __initdata = {
246 &irda_device, 244 &irda_device,
247}; 245};
248 246
249static struct map_desc g3evm_io_desc[] __initdata = {
250 /* create a 1:1 entity map for 0xe6xxxxxx
251 * used by CPGA, INTC and PFC.
252 */
253 {
254 .virtual = 0xe6000000,
255 .pfn = __phys_to_pfn(0xe6000000),
256 .length = 256 << 20,
257 .type = MT_DEVICE_NONSHARED
258 },
259};
260
261static void __init g3evm_map_io(void)
262{
263 iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc));
264
265 /* setup early devices and console here as well */
266 sh7367_add_early_devices();
267 shmobile_setup_console();
268}
269
270static void __init g3evm_init(void) 247static void __init g3evm_init(void)
271{ 248{
272 sh7367_pinmux_init(); 249 sh7367_pinmux_init();
@@ -354,20 +331,11 @@ static void __init g3evm_init(void)
354 platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices)); 331 platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices));
355} 332}
356 333
357static void __init g3evm_timer_init(void)
358{
359 sh7367_clock_init();
360 shmobile_timer.init();
361}
362
363static struct sys_timer g3evm_timer = {
364 .init = g3evm_timer_init,
365};
366
367MACHINE_START(G3EVM, "g3evm") 334MACHINE_START(G3EVM, "g3evm")
368 .map_io = g3evm_map_io, 335 .map_io = sh7367_map_io,
336 .init_early = sh7367_add_early_devices,
369 .init_irq = sh7367_init_irq, 337 .init_irq = sh7367_init_irq,
370 .handle_irq = shmobile_handle_irq_intc, 338 .handle_irq = shmobile_handle_irq_intc,
371 .init_machine = g3evm_init, 339 .init_machine = g3evm_init,
372 .timer = &g3evm_timer, 340 .timer = &shmobile_timer,
373MACHINE_END 341MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c
index 2220b885cff5..46d757d2759d 100644
--- a/arch/arm/mach-shmobile/board-g4evm.c
+++ b/arch/arm/mach-shmobile/board-g4evm.c
@@ -38,8 +38,6 @@
38#include <mach/common.h> 38#include <mach/common.h>
39#include <asm/mach-types.h> 39#include <asm/mach-types.h>
40#include <asm/mach/arch.h> 40#include <asm/mach/arch.h>
41#include <asm/mach/map.h>
42#include <asm/mach/time.h>
43 41
44/* 42/*
45 * SDHI 43 * SDHI
@@ -260,27 +258,6 @@ static struct platform_device *g4evm_devices[] __initdata = {
260 &sdhi1_device, 258 &sdhi1_device,
261}; 259};
262 260
263static struct map_desc g4evm_io_desc[] __initdata = {
264 /* create a 1:1 entity map for 0xe6xxxxxx
265 * used by CPGA, INTC and PFC.
266 */
267 {
268 .virtual = 0xe6000000,
269 .pfn = __phys_to_pfn(0xe6000000),
270 .length = 256 << 20,
271 .type = MT_DEVICE_NONSHARED
272 },
273};
274
275static void __init g4evm_map_io(void)
276{
277 iotable_init(g4evm_io_desc, ARRAY_SIZE(g4evm_io_desc));
278
279 /* setup early devices and console here as well */
280 sh7377_add_early_devices();
281 shmobile_setup_console();
282}
283
284#define GPIO_SDHID0_D0 0xe60520fc 261#define GPIO_SDHID0_D0 0xe60520fc
285#define GPIO_SDHID0_D1 0xe60520fd 262#define GPIO_SDHID0_D1 0xe60520fd
286#define GPIO_SDHID0_D2 0xe60520fe 263#define GPIO_SDHID0_D2 0xe60520fe
@@ -397,20 +374,11 @@ static void __init g4evm_init(void)
397 platform_add_devices(g4evm_devices, ARRAY_SIZE(g4evm_devices)); 374 platform_add_devices(g4evm_devices, ARRAY_SIZE(g4evm_devices));
398} 375}
399 376
400static void __init g4evm_timer_init(void)
401{
402 sh7377_clock_init();
403 shmobile_timer.init();
404}
405
406static struct sys_timer g4evm_timer = {
407 .init = g4evm_timer_init,
408};
409
410MACHINE_START(G4EVM, "g4evm") 377MACHINE_START(G4EVM, "g4evm")
411 .map_io = g4evm_map_io, 378 .map_io = sh7377_map_io,
379 .init_early = sh7377_add_early_devices,
412 .init_irq = sh7377_init_irq, 380 .init_irq = sh7377_init_irq,
413 .handle_irq = shmobile_handle_irq_intc, 381 .handle_irq = shmobile_handle_irq_intc,
414 .init_machine = g4evm_init, 382 .init_machine = g4evm_init,
415 .timer = &g4evm_timer, 383 .timer = &shmobile_timer,
416MACHINE_END 384MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index 857ceeec1bb0..61c067294660 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -43,7 +43,6 @@
43#include <mach/common.h> 43#include <mach/common.h>
44#include <asm/mach-types.h> 44#include <asm/mach-types.h>
45#include <asm/mach/arch.h> 45#include <asm/mach/arch.h>
46#include <asm/mach/map.h>
47#include <asm/mach/time.h> 46#include <asm/mach/time.h>
48#include <asm/hardware/gic.h> 47#include <asm/hardware/gic.h>
49#include <asm/hardware/cache-l2x0.h> 48#include <asm/hardware/cache-l2x0.h>
@@ -143,11 +142,10 @@ static struct gpio_keys_button gpio_buttons[] = {
143static struct gpio_keys_platform_data gpio_key_info = { 142static struct gpio_keys_platform_data gpio_key_info = {
144 .buttons = gpio_buttons, 143 .buttons = gpio_buttons,
145 .nbuttons = ARRAY_SIZE(gpio_buttons), 144 .nbuttons = ARRAY_SIZE(gpio_buttons),
146 .poll_interval = 250, /* polled for now */
147}; 145};
148 146
149static struct platform_device gpio_keys_device = { 147static struct platform_device gpio_keys_device = {
150 .name = "gpio-keys-polled", /* polled for now */ 148 .name = "gpio-keys",
151 .id = -1, 149 .id = -1,
152 .dev = { 150 .dev = {
153 .platform_data = &gpio_key_info, 151 .platform_data = &gpio_key_info,
@@ -410,27 +408,6 @@ static struct platform_device *kota2_devices[] __initdata = {
410 &sdhi1_device, 408 &sdhi1_device,
411}; 409};
412 410
413static struct map_desc kota2_io_desc[] __initdata = {
414 /* create a 1:1 entity map for 0xe6xxxxxx
415 * used by CPGA, INTC and PFC.
416 */
417 {
418 .virtual = 0xe6000000,
419 .pfn = __phys_to_pfn(0xe6000000),
420 .length = 256 << 20,
421 .type = MT_DEVICE_NONSHARED
422 },
423};
424
425static void __init kota2_map_io(void)
426{
427 iotable_init(kota2_io_desc, ARRAY_SIZE(kota2_io_desc));
428
429 /* setup early devices and console here as well */
430 sh73a0_add_early_devices();
431 shmobile_setup_console();
432}
433
434static void __init kota2_init(void) 411static void __init kota2_init(void)
435{ 412{
436 sh73a0_pinmux_init(); 413 sh73a0_pinmux_init();
@@ -536,22 +513,12 @@ static void __init kota2_init(void)
536 platform_add_devices(kota2_devices, ARRAY_SIZE(kota2_devices)); 513 platform_add_devices(kota2_devices, ARRAY_SIZE(kota2_devices));
537} 514}
538 515
539static void __init kota2_timer_init(void)
540{
541 sh73a0_clock_init();
542 shmobile_timer.init();
543 return;
544}
545
546struct sys_timer kota2_timer = {
547 .init = kota2_timer_init,
548};
549
550MACHINE_START(KOTA2, "kota2") 516MACHINE_START(KOTA2, "kota2")
551 .map_io = kota2_map_io, 517 .map_io = sh73a0_map_io,
518 .init_early = sh73a0_add_early_devices,
552 .nr_irqs = NR_IRQS_LEGACY, 519 .nr_irqs = NR_IRQS_LEGACY,
553 .init_irq = sh73a0_init_irq, 520 .init_irq = sh73a0_init_irq,
554 .handle_irq = gic_handle_irq, 521 .handle_irq = gic_handle_irq,
555 .init_machine = kota2_init, 522 .init_machine = kota2_init,
556 .timer = &kota2_timer, 523 .timer = &shmobile_timer,
557MACHINE_END 524MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 9b42fbd10f8e..71d279150471 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -43,7 +43,6 @@
43#include <linux/smsc911x.h> 43#include <linux/smsc911x.h>
44#include <linux/sh_intc.h> 44#include <linux/sh_intc.h>
45#include <linux/tca6416_keypad.h> 45#include <linux/tca6416_keypad.h>
46#include <linux/usb/r8a66597.h>
47#include <linux/usb/renesas_usbhs.h> 46#include <linux/usb/renesas_usbhs.h>
48#include <linux/dma-mapping.h> 47#include <linux/dma-mapping.h>
49 48
@@ -58,8 +57,6 @@
58#include <mach/sh7372.h> 57#include <mach/sh7372.h>
59 58
60#include <asm/mach/arch.h> 59#include <asm/mach/arch.h>
61#include <asm/mach/time.h>
62#include <asm/mach/map.h>
63#include <asm/mach-types.h> 60#include <asm/mach-types.h>
64 61
65/* 62/*
@@ -145,11 +142,6 @@
145 * 1-2 short | VBUS 5V | Host 142 * 1-2 short | VBUS 5V | Host
146 * open | external VBUS | Function 143 * open | external VBUS | Function
147 * 144 *
148 * *1
149 * CN31 is used as
150 * CONFIG_USB_R8A66597_HCD Host
151 * CONFIG_USB_RENESAS_USBHS Function
152 *
153 * CAUTION 145 * CAUTION
154 * 146 *
155 * renesas_usbhs driver can use external interrupt mode 147 * renesas_usbhs driver can use external interrupt mode
@@ -161,15 +153,6 @@
161 * mackerel can not use external interrupt (IRQ7-PORT167) mode on "USB0", 153 * mackerel can not use external interrupt (IRQ7-PORT167) mode on "USB0",
162 * because Touchscreen is using IRQ7-PORT40. 154 * because Touchscreen is using IRQ7-PORT40.
163 * It is impossible to use IRQ7 demux on this board. 155 * It is impossible to use IRQ7 demux on this board.
164 *
165 * We can use external interrupt mode USB-Function on "USB1".
166 * USB1 can become Host by r8a66597, and become Function by renesas_usbhs.
167 * But don't select both drivers in same time.
168 * These uses same IRQ number for request_irq(), and aren't supporting
169 * IRQF_SHARED / IORESOURCE_IRQ_SHAREABLE.
170 *
171 * Actually these are old/new version of USB driver.
172 * This mean its register will be broken if it supports shared IRQ,
173 */ 156 */
174 157
175/* 158/*
@@ -208,6 +191,16 @@
208 */ 191 */
209 192
210/* 193/*
194 * FSI - AK4642
195 *
196 * it needs amixer settings for playing
197 *
198 * amixer set "Headphone" on
199 * amixer set "HPOUTL Mixer DACH" on
200 * amixer set "HPOUTR Mixer DACH" on
201 */
202
203/*
211 * FIXME !! 204 * FIXME !!
212 * 205 *
213 * gpio_no_direction 206 * gpio_no_direction
@@ -676,51 +669,16 @@ static struct platform_device usbhs0_device = {
676 * Use J30 to select between Host and Function. This setting 669 * Use J30 to select between Host and Function. This setting
677 * can however not be detected by software. Hotplug of USBHS1 670 * can however not be detected by software. Hotplug of USBHS1
678 * is provided via IRQ8. 671 * is provided via IRQ8.
672 *
673 * Current USB1 works as "USB Host".
674 * - set J30 "short"
675 *
676 * If you want to use it as "USB gadget",
677 * - J30 "open"
678 * - modify usbhs1_get_id() USBHS_HOST -> USBHS_GADGET
679 * - add .get_vbus = usbhs_get_vbus in usbhs1_private
679 */ 680 */
680#define IRQ8 evt2irq(0x0300) 681#define IRQ8 evt2irq(0x0300)
681
682/* USBHS1 USB Host support via r8a66597_hcd */
683static void usb1_host_port_power(int port, int power)
684{
685 if (!power) /* only power-on is supported for now */
686 return;
687
688 /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
689 __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
690}
691
692static struct r8a66597_platdata usb1_host_data = {
693 .on_chip = 1,
694 .port_power = usb1_host_port_power,
695};
696
697static struct resource usb1_host_resources[] = {
698 [0] = {
699 .name = "USBHS1",
700 .start = 0xe68b0000,
701 .end = 0xe68b00e6 - 1,
702 .flags = IORESOURCE_MEM,
703 },
704 [1] = {
705 .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
706 .flags = IORESOURCE_IRQ,
707 },
708};
709
710static struct platform_device usb1_host_device = {
711 .name = "r8a66597_hcd",
712 .id = 1,
713 .dev = {
714 .dma_mask = NULL, /* not use dma */
715 .coherent_dma_mask = 0xffffffff,
716 .platform_data = &usb1_host_data,
717 },
718 .num_resources = ARRAY_SIZE(usb1_host_resources),
719 .resource = usb1_host_resources,
720};
721
722/* USBHS1 USB Function support via renesas_usbhs */
723
724#define USB_PHY_MODE (1 << 4) 682#define USB_PHY_MODE (1 << 4)
725#define USB_PHY_INT_EN ((1 << 3) | (1 << 2)) 683#define USB_PHY_INT_EN ((1 << 3) | (1 << 2))
726#define USB_PHY_ON (1 << 1) 684#define USB_PHY_ON (1 << 1)
@@ -776,7 +734,7 @@ static void usbhs1_hardware_exit(struct platform_device *pdev)
776 734
777static int usbhs1_get_id(struct platform_device *pdev) 735static int usbhs1_get_id(struct platform_device *pdev)
778{ 736{
779 return USBHS_GADGET; 737 return USBHS_HOST;
780} 738}
781 739
782static u32 usbhs1_pipe_cfg[] = { 740static u32 usbhs1_pipe_cfg[] = {
@@ -807,7 +765,6 @@ static struct usbhs_private usbhs1_private = {
807 .hardware_exit = usbhs1_hardware_exit, 765 .hardware_exit = usbhs1_hardware_exit,
808 .get_id = usbhs1_get_id, 766 .get_id = usbhs1_get_id,
809 .phy_reset = usbhs_phy_reset, 767 .phy_reset = usbhs_phy_reset,
810 .get_vbus = usbhs_get_vbus,
811 }, 768 },
812 .driver_param = { 769 .driver_param = {
813 .buswait_bwait = 4, 770 .buswait_bwait = 4,
@@ -1184,15 +1141,6 @@ static struct resource sh_mmcif_resources[] = {
1184 }, 1141 },
1185}; 1142};
1186 1143
1187static struct sh_mmcif_dma sh_mmcif_dma = {
1188 .chan_priv_rx = {
1189 .slave_id = SHDMA_SLAVE_MMCIF_RX,
1190 },
1191 .chan_priv_tx = {
1192 .slave_id = SHDMA_SLAVE_MMCIF_TX,
1193 },
1194};
1195
1196static struct sh_mmcif_plat_data sh_mmcif_plat = { 1144static struct sh_mmcif_plat_data sh_mmcif_plat = {
1197 .sup_pclk = 0, 1145 .sup_pclk = 0,
1198 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, 1146 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
@@ -1200,7 +1148,8 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = {
1200 MMC_CAP_8_BIT_DATA | 1148 MMC_CAP_8_BIT_DATA |
1201 MMC_CAP_NEEDS_POLL, 1149 MMC_CAP_NEEDS_POLL,
1202 .get_cd = slot_cn7_get_cd, 1150 .get_cd = slot_cn7_get_cd,
1203 .dma = &sh_mmcif_dma, 1151 .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
1152 .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
1204}; 1153};
1205 1154
1206static struct platform_device sh_mmcif_device = { 1155static struct platform_device sh_mmcif_device = {
@@ -1311,7 +1260,6 @@ static struct platform_device *mackerel_devices[] __initdata = {
1311 &nor_flash_device, 1260 &nor_flash_device,
1312 &smc911x_device, 1261 &smc911x_device,
1313 &lcdc_device, 1262 &lcdc_device,
1314 &usb1_host_device,
1315 &usbhs1_device, 1263 &usbhs1_device,
1316 &usbhs0_device, 1264 &usbhs0_device,
1317 &leds_device, 1265 &leds_device,
@@ -1387,25 +1335,13 @@ static struct i2c_board_info i2c1_devices[] = {
1387 }, 1335 },
1388}; 1336};
1389 1337
1390static struct map_desc mackerel_io_desc[] __initdata = {
1391 /* create a 1:1 entity map for 0xe6xxxxxx
1392 * used by CPGA, INTC and PFC.
1393 */
1394 {
1395 .virtual = 0xe6000000,
1396 .pfn = __phys_to_pfn(0xe6000000),
1397 .length = 256 << 20,
1398 .type = MT_DEVICE_NONSHARED
1399 },
1400};
1401
1402static void __init mackerel_map_io(void) 1338static void __init mackerel_map_io(void)
1403{ 1339{
1404 iotable_init(mackerel_io_desc, ARRAY_SIZE(mackerel_io_desc)); 1340 sh7372_map_io();
1405 1341 /* DMA memory at 0xff200000 - 0xffdfffff. The default 2MB size isn't
1406 /* setup early devices and console here as well */ 1342 * enough to allocate the frame buffer memory.
1407 sh7372_add_early_devices(); 1343 */
1408 shmobile_setup_console(); 1344 init_consistent_dma_size(12 << 20);
1409} 1345}
1410 1346
1411#define GPIO_PORT9CR 0xE6051009 1347#define GPIO_PORT9CR 0xE6051009
@@ -1420,6 +1356,9 @@ static void __init mackerel_init(void)
1420 struct clk *clk; 1356 struct clk *clk;
1421 int ret; 1357 int ret;
1422 1358
1359 /* External clock source */
1360 clk_set_rate(&sh7372_dv_clki_clk, 27000000);
1361
1423 sh7372_pinmux_init(); 1362 sh7372_pinmux_init();
1424 1363
1425 /* enable SCIFA0 */ 1364 /* enable SCIFA0 */
@@ -1473,9 +1412,6 @@ static void __init mackerel_init(void)
1473 gpio_pull_down(GPIO_PORT167CR); /* VBUS0_1 pull down */ 1412 gpio_pull_down(GPIO_PORT167CR); /* VBUS0_1 pull down */
1474 gpio_request(GPIO_FN_IDIN_1_113, NULL); 1413 gpio_request(GPIO_FN_IDIN_1_113, NULL);
1475 1414
1476 /* USB phy tweak to make the r8a66597_hcd host driver work */
1477 __raw_writew(0x8a0a, 0xe6058130); /* USBCR4 */
1478
1479 /* enable FSI2 port A (ak4643) */ 1415 /* enable FSI2 port A (ak4643) */
1480 gpio_request(GPIO_FN_FSIAIBT, NULL); 1416 gpio_request(GPIO_FN_FSIAIBT, NULL);
1481 gpio_request(GPIO_FN_FSIAILR, NULL); 1417 gpio_request(GPIO_FN_FSIAILR, NULL);
@@ -1626,23 +1562,11 @@ static void __init mackerel_init(void)
1626 pm_clk_add(&hdmi_lcdc_device.dev, "hdmi"); 1562 pm_clk_add(&hdmi_lcdc_device.dev, "hdmi");
1627} 1563}
1628 1564
1629static void __init mackerel_timer_init(void)
1630{
1631 sh7372_clock_init();
1632 shmobile_timer.init();
1633
1634 /* External clock source */
1635 clk_set_rate(&sh7372_dv_clki_clk, 27000000);
1636}
1637
1638static struct sys_timer mackerel_timer = {
1639 .init = mackerel_timer_init,
1640};
1641
1642MACHINE_START(MACKEREL, "mackerel") 1565MACHINE_START(MACKEREL, "mackerel")
1643 .map_io = mackerel_map_io, 1566 .map_io = mackerel_map_io,
1567 .init_early = sh7372_add_early_devices,
1644 .init_irq = sh7372_init_irq, 1568 .init_irq = sh7372_init_irq,
1645 .handle_irq = shmobile_handle_irq_intc, 1569 .handle_irq = shmobile_handle_irq_intc,
1646 .init_machine = mackerel_init, 1570 .init_machine = mackerel_init,
1647 .timer = &mackerel_timer, 1571 .timer = &shmobile_timer,
1648MACHINE_END 1572MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
index f0e02c0ce99f..cbd5e4cd06d2 100644
--- a/arch/arm/mach-shmobile/board-marzen.c
+++ b/arch/arm/mach-shmobile/board-marzen.c
@@ -33,8 +33,6 @@
33#include <mach/common.h> 33#include <mach/common.h>
34#include <asm/mach-types.h> 34#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
36#include <asm/mach/map.h>
37#include <asm/mach/time.h>
38#include <asm/hardware/gic.h> 36#include <asm/hardware/gic.h>
39#include <asm/traps.h> 37#include <asm/traps.h>
40 38
@@ -72,49 +70,6 @@ static struct platform_device *marzen_devices[] __initdata = {
72 &eth_device, 70 &eth_device,
73}; 71};
74 72
75static struct map_desc marzen_io_desc[] __initdata = {
76 /* 2M entity map for 0xf0000000 (MPCORE) */
77 {
78 .virtual = 0xf0000000,
79 .pfn = __phys_to_pfn(0xf0000000),
80 .length = SZ_2M,
81 .type = MT_DEVICE_NONSHARED
82 },
83 /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
84 {
85 .virtual = 0xfe000000,
86 .pfn = __phys_to_pfn(0xfe000000),
87 .length = SZ_16M,
88 .type = MT_DEVICE_NONSHARED
89 },
90};
91
92static void __init marzen_map_io(void)
93{
94 iotable_init(marzen_io_desc, ARRAY_SIZE(marzen_io_desc));
95}
96
97static void __init marzen_init_early(void)
98{
99 r8a7779_add_early_devices();
100
101 /* Early serial console setup is not included here due to
102 * memory map collisions. The SCIF serial ports in r8a7779
103 * are difficult to entity map 1:1 due to collision with the
104 * virtual memory range used by the coherent DMA code on ARM.
105 *
106 * Anyone wanting to debug early can remove UPF_IOREMAP from
107 * the sh-sci serial console platform data, adjust mapbase
108 * to a static M:N virt:phys mapping that needs to be added to
109 * the mappings passed with iotable_init() above.
110 *
111 * Then add a call to shmobile_setup_console() from this function.
112 *
113 * As a final step pass earlyprint=sh-sci.2,115200 on the kernel
114 * command line.
115 */
116}
117
118static void __init marzen_init(void) 73static void __init marzen_init(void)
119{ 74{
120 r8a7779_pinmux_init(); 75 r8a7779_pinmux_init();
@@ -135,23 +90,12 @@ static void __init marzen_init(void)
135 platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices)); 90 platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
136} 91}
137 92
138static void __init marzen_timer_init(void)
139{
140 r8a7779_clock_init();
141 shmobile_timer.init();
142 return;
143}
144
145struct sys_timer marzen_timer = {
146 .init = marzen_timer_init,
147};
148
149MACHINE_START(MARZEN, "marzen") 93MACHINE_START(MARZEN, "marzen")
150 .map_io = marzen_map_io, 94 .map_io = r8a7779_map_io,
151 .init_early = marzen_init_early, 95 .init_early = r8a7779_add_early_devices,
152 .nr_irqs = NR_IRQS_LEGACY, 96 .nr_irqs = NR_IRQS_LEGACY,
153 .init_irq = r8a7779_init_irq, 97 .init_irq = r8a7779_init_irq,
154 .handle_irq = gic_handle_irq, 98 .handle_irq = gic_handle_irq,
155 .init_machine = marzen_init, 99 .init_machine = marzen_init,
156 .timer = &marzen_timer, 100 .timer = &shmobile_timer,
157MACHINE_END 101MACHINE_END
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index 3b35b9afc001..99c4d743a99c 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -93,7 +93,7 @@ static unsigned long div_recalc(struct clk *clk)
93 return clk->parent->rate / (int)(clk->priv); 93 return clk->parent->rate / (int)(clk->priv);
94} 94}
95 95
96static struct clk_ops div_clk_ops = { 96static struct sh_clk_ops div_clk_ops = {
97 .recalc = div_recalc, 97 .recalc = div_recalc,
98}; 98};
99 99
@@ -125,7 +125,7 @@ static struct clk extal2_div2_clk = {
125 .parent = &extal2_clk, 125 .parent = &extal2_clk,
126}; 126};
127 127
128static struct clk_ops followparent_clk_ops = { 128static struct sh_clk_ops followparent_clk_ops = {
129 .recalc = followparent_recalc, 129 .recalc = followparent_recalc,
130}; 130};
131 131
@@ -156,7 +156,7 @@ static unsigned long pllc01_recalc(struct clk *clk)
156 return clk->parent->rate * mult; 156 return clk->parent->rate * mult;
157} 157}
158 158
159static struct clk_ops pllc01_clk_ops = { 159static struct sh_clk_ops pllc01_clk_ops = {
160 .recalc = pllc01_recalc, 160 .recalc = pllc01_recalc,
161}; 161};
162 162
@@ -376,7 +376,7 @@ void __init r8a7740_clock_init(u8 md_ck)
376 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 376 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
377 377
378 if (!ret) 378 if (!ret)
379 clk_init(); 379 shmobile_clk_init();
380 else 380 else
381 panic("failed to setup r8a7740 clocks\n"); 381 panic("failed to setup r8a7740 clocks\n");
382} 382}
diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
index b4b0e8cd096d..7d6e9fe47b56 100644
--- a/arch/arm/mach-shmobile/clock-r8a7779.c
+++ b/arch/arm/mach-shmobile/clock-r8a7779.c
@@ -107,7 +107,7 @@ static unsigned long mul4_recalc(struct clk *clk)
107 return clk->parent->rate * 4; 107 return clk->parent->rate * 4;
108} 108}
109 109
110static struct clk_ops mul4_clk_ops = { 110static struct sh_clk_ops mul4_clk_ops = {
111 .recalc = mul4_recalc, 111 .recalc = mul4_recalc,
112}; 112};
113 113
@@ -170,7 +170,7 @@ void __init r8a7779_clock_init(void)
170 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 170 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
171 171
172 if (!ret) 172 if (!ret)
173 clk_init(); 173 shmobile_clk_init();
174 else 174 else
175 panic("failed to setup r8a7779 clocks\n"); 175 panic("failed to setup r8a7779 clocks\n");
176} 176}
diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c
index 5218c34a9cc6..006e7b5d304c 100644
--- a/arch/arm/mach-shmobile/clock-sh7367.c
+++ b/arch/arm/mach-shmobile/clock-sh7367.c
@@ -74,7 +74,7 @@ static unsigned long div2_recalc(struct clk *clk)
74 return clk->parent->rate / 2; 74 return clk->parent->rate / 2;
75} 75}
76 76
77static struct clk_ops div2_clk_ops = { 77static struct sh_clk_ops div2_clk_ops = {
78 .recalc = div2_recalc, 78 .recalc = div2_recalc,
79}; 79};
80 80
@@ -101,7 +101,7 @@ static unsigned long pllc1_recalc(struct clk *clk)
101 return clk->parent->rate * mult; 101 return clk->parent->rate * mult;
102} 102}
103 103
104static struct clk_ops pllc1_clk_ops = { 104static struct sh_clk_ops pllc1_clk_ops = {
105 .recalc = pllc1_recalc, 105 .recalc = pllc1_recalc,
106}; 106};
107 107
@@ -128,7 +128,7 @@ static unsigned long pllc2_recalc(struct clk *clk)
128 return clk->parent->rate * mult; 128 return clk->parent->rate * mult;
129} 129}
130 130
131static struct clk_ops pllc2_clk_ops = { 131static struct sh_clk_ops pllc2_clk_ops = {
132 .recalc = pllc2_recalc, 132 .recalc = pllc2_recalc,
133}; 133};
134 134
@@ -349,7 +349,7 @@ void __init sh7367_clock_init(void)
349 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 349 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
350 350
351 if (!ret) 351 if (!ret)
352 clk_init(); 352 shmobile_clk_init();
353 else 353 else
354 panic("failed to setup sh7367 clocks\n"); 354 panic("failed to setup sh7367 clocks\n");
355} 355}
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 293456d8dcfd..de243e3c8392 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -89,7 +89,7 @@ static unsigned long div2_recalc(struct clk *clk)
89 return clk->parent->rate / 2; 89 return clk->parent->rate / 2;
90} 90}
91 91
92static struct clk_ops div2_clk_ops = { 92static struct sh_clk_ops div2_clk_ops = {
93 .recalc = div2_recalc, 93 .recalc = div2_recalc,
94}; 94};
95 95
@@ -128,7 +128,7 @@ static unsigned long pllc01_recalc(struct clk *clk)
128 return clk->parent->rate * mult; 128 return clk->parent->rate * mult;
129} 129}
130 130
131static struct clk_ops pllc01_clk_ops = { 131static struct sh_clk_ops pllc01_clk_ops = {
132 .recalc = pllc01_recalc, 132 .recalc = pllc01_recalc,
133}; 133};
134 134
@@ -276,7 +276,7 @@ static int pllc2_set_parent(struct clk *clk, struct clk *parent)
276 return 0; 276 return 0;
277} 277}
278 278
279static struct clk_ops pllc2_clk_ops = { 279static struct sh_clk_ops pllc2_clk_ops = {
280 .recalc = pllc2_recalc, 280 .recalc = pllc2_recalc,
281 .round_rate = pllc2_round_rate, 281 .round_rate = pllc2_round_rate,
282 .set_rate = pllc2_set_rate, 282 .set_rate = pllc2_set_rate,
@@ -468,7 +468,7 @@ static int fsidiv_set_rate(struct clk *clk, unsigned long rate)
468 return 0; 468 return 0;
469} 469}
470 470
471static struct clk_ops fsidiv_clk_ops = { 471static struct sh_clk_ops fsidiv_clk_ops = {
472 .recalc = fsidiv_recalc, 472 .recalc = fsidiv_recalc,
473 .round_rate = fsidiv_round_rate, 473 .round_rate = fsidiv_round_rate,
474 .set_rate = fsidiv_set_rate, 474 .set_rate = fsidiv_set_rate,
@@ -710,7 +710,7 @@ void __init sh7372_clock_init(void)
710 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 710 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
711 711
712 if (!ret) 712 if (!ret)
713 clk_init(); 713 shmobile_clk_init();
714 else 714 else
715 panic("failed to setup sh7372 clocks\n"); 715 panic("failed to setup sh7372 clocks\n");
716 716
diff --git a/arch/arm/mach-shmobile/clock-sh7377.c b/arch/arm/mach-shmobile/clock-sh7377.c
index 8cee7b151ae3..0798a15936c3 100644
--- a/arch/arm/mach-shmobile/clock-sh7377.c
+++ b/arch/arm/mach-shmobile/clock-sh7377.c
@@ -77,7 +77,7 @@ static unsigned long div2_recalc(struct clk *clk)
77 return clk->parent->rate / 2; 77 return clk->parent->rate / 2;
78} 78}
79 79
80static struct clk_ops div2_clk_ops = { 80static struct sh_clk_ops div2_clk_ops = {
81 .recalc = div2_recalc, 81 .recalc = div2_recalc,
82}; 82};
83 83
@@ -110,7 +110,7 @@ static unsigned long pllc1_recalc(struct clk *clk)
110 return clk->parent->rate * mult; 110 return clk->parent->rate * mult;
111} 111}
112 112
113static struct clk_ops pllc1_clk_ops = { 113static struct sh_clk_ops pllc1_clk_ops = {
114 .recalc = pllc1_recalc, 114 .recalc = pllc1_recalc,
115}; 115};
116 116
@@ -137,7 +137,7 @@ static unsigned long pllc2_recalc(struct clk *clk)
137 return clk->parent->rate * mult; 137 return clk->parent->rate * mult;
138} 138}
139 139
140static struct clk_ops pllc2_clk_ops = { 140static struct sh_clk_ops pllc2_clk_ops = {
141 .recalc = pllc2_recalc, 141 .recalc = pllc2_recalc,
142}; 142};
143 143
@@ -360,7 +360,7 @@ void __init sh7377_clock_init(void)
360 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 360 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
361 361
362 if (!ret) 362 if (!ret)
363 clk_init(); 363 shmobile_clk_init();
364 else 364 else
365 panic("failed to setup sh7377 clocks\n"); 365 panic("failed to setup sh7377 clocks\n");
366} 366}
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index afbead6a6e17..472d1f5361e5 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -88,7 +88,7 @@ static unsigned long div2_recalc(struct clk *clk)
88 return clk->parent->rate / 2; 88 return clk->parent->rate / 2;
89} 89}
90 90
91static struct clk_ops div2_clk_ops = { 91static struct sh_clk_ops div2_clk_ops = {
92 .recalc = div2_recalc, 92 .recalc = div2_recalc,
93}; 93};
94 94
@@ -97,7 +97,7 @@ static unsigned long div7_recalc(struct clk *clk)
97 return clk->parent->rate / 7; 97 return clk->parent->rate / 7;
98} 98}
99 99
100static struct clk_ops div7_clk_ops = { 100static struct sh_clk_ops div7_clk_ops = {
101 .recalc = div7_recalc, 101 .recalc = div7_recalc,
102}; 102};
103 103
@@ -106,7 +106,7 @@ static unsigned long div13_recalc(struct clk *clk)
106 return clk->parent->rate / 13; 106 return clk->parent->rate / 13;
107} 107}
108 108
109static struct clk_ops div13_clk_ops = { 109static struct sh_clk_ops div13_clk_ops = {
110 .recalc = div13_recalc, 110 .recalc = div13_recalc,
111}; 111};
112 112
@@ -122,7 +122,7 @@ static struct clk extal2_div2_clk = {
122 .parent = &sh73a0_extal2_clk, 122 .parent = &sh73a0_extal2_clk,
123}; 123};
124 124
125static struct clk_ops main_clk_ops = { 125static struct sh_clk_ops main_clk_ops = {
126 .recalc = followparent_recalc, 126 .recalc = followparent_recalc,
127}; 127};
128 128
@@ -156,7 +156,7 @@ static unsigned long pll_recalc(struct clk *clk)
156 return clk->parent->rate * mult; 156 return clk->parent->rate * mult;
157} 157}
158 158
159static struct clk_ops pll_clk_ops = { 159static struct sh_clk_ops pll_clk_ops = {
160 .recalc = pll_recalc, 160 .recalc = pll_recalc,
161}; 161};
162 162
@@ -365,6 +365,114 @@ static struct clk div6_clks[DIV6_NR] = {
365 dsi_parent, ARRAY_SIZE(dsi_parent), 12, 3), 365 dsi_parent, ARRAY_SIZE(dsi_parent), 12, 3),
366}; 366};
367 367
368/* DSI DIV */
369static unsigned long dsiphy_recalc(struct clk *clk)
370{
371 u32 value;
372
373 value = __raw_readl(clk->mapping->base);
374
375 /* FIXME */
376 if (!(value & 0x000B8000))
377 return clk->parent->rate;
378
379 value &= 0x3f;
380 value += 1;
381
382 if ((value < 12) ||
383 (value > 33)) {
384 pr_err("DSIPHY has wrong value (%d)", value);
385 return 0;
386 }
387
388 return clk->parent->rate / value;
389}
390
391static long dsiphy_round_rate(struct clk *clk, unsigned long rate)
392{
393 return clk_rate_mult_range_round(clk, 12, 33, rate);
394}
395
396static void dsiphy_disable(struct clk *clk)
397{
398 u32 value;
399
400 value = __raw_readl(clk->mapping->base);
401 value &= ~0x000B8000;
402
403 __raw_writel(value , clk->mapping->base);
404}
405
406static int dsiphy_enable(struct clk *clk)
407{
408 u32 value;
409 int multi;
410
411 value = __raw_readl(clk->mapping->base);
412 multi = (value & 0x3f) + 1;
413
414 if ((multi < 12) || (multi > 33))
415 return -EIO;
416
417 __raw_writel(value | 0x000B8000, clk->mapping->base);
418
419 return 0;
420}
421
422static int dsiphy_set_rate(struct clk *clk, unsigned long rate)
423{
424 u32 value;
425 int idx;
426
427 idx = rate / clk->parent->rate;
428 if ((idx < 12) || (idx > 33))
429 return -EINVAL;
430
431 idx += -1;
432
433 value = __raw_readl(clk->mapping->base);
434 value = (value & ~0x3f) + idx;
435
436 __raw_writel(value, clk->mapping->base);
437
438 return 0;
439}
440
441static struct sh_clk_ops dsiphy_clk_ops = {
442 .recalc = dsiphy_recalc,
443 .round_rate = dsiphy_round_rate,
444 .set_rate = dsiphy_set_rate,
445 .enable = dsiphy_enable,
446 .disable = dsiphy_disable,
447};
448
449static struct clk_mapping dsi0phy_clk_mapping = {
450 .phys = DSI0PHYCR,
451 .len = 4,
452};
453
454static struct clk_mapping dsi1phy_clk_mapping = {
455 .phys = DSI1PHYCR,
456 .len = 4,
457};
458
459static struct clk dsi0phy_clk = {
460 .ops = &dsiphy_clk_ops,
461 .parent = &div6_clks[DIV6_DSI0P], /* late install */
462 .mapping = &dsi0phy_clk_mapping,
463};
464
465static struct clk dsi1phy_clk = {
466 .ops = &dsiphy_clk_ops,
467 .parent = &div6_clks[DIV6_DSI1P], /* late install */
468 .mapping = &dsi1phy_clk_mapping,
469};
470
471static struct clk *late_main_clks[] = {
472 &dsi0phy_clk,
473 &dsi1phy_clk,
474};
475
368enum { MSTP001, 476enum { MSTP001,
369 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100, 477 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
370 MSTP219, 478 MSTP219,
@@ -429,6 +537,8 @@ static struct clk_lookup lookups[] = {
429 CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]), 537 CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
430 CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]), 538 CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
431 CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]), 539 CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
540 CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.0", &dsi0phy_clk),
541 CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.1", &dsi1phy_clk),
432 542
433 /* MSTP32 clocks */ 543 /* MSTP32 clocks */
434 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */ 544 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
@@ -504,10 +614,13 @@ void __init sh73a0_clock_init(void)
504 if (!ret) 614 if (!ret)
505 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 615 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
506 616
617 for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
618 ret = clk_register(late_main_clks[k]);
619
507 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 620 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
508 621
509 if (!ret) 622 if (!ret)
510 clk_init(); 623 shmobile_clk_init();
511 else 624 else
512 panic("failed to setup sh73a0 clocks\n"); 625 panic("failed to setup sh73a0 clocks\n");
513} 626}
diff --git a/arch/arm/mach-shmobile/clock.c b/arch/arm/mach-shmobile/clock.c
index 31654d78b96b..e816ca9bd213 100644
--- a/arch/arm/mach-shmobile/clock.c
+++ b/arch/arm/mach-shmobile/clock.c
@@ -24,7 +24,7 @@
24#include <linux/sh_clk.h> 24#include <linux/sh_clk.h>
25#include <linux/export.h> 25#include <linux/export.h>
26 26
27int __init clk_init(void) 27int __init shmobile_clk_init(void)
28{ 28{
29 /* Kick the child clocks.. */ 29 /* Kick the child clocks.. */
30 recalculate_root_clocks(); 30 recalculate_root_clocks();
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 9fde3eb686a6..83ad3fe0a75f 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -1,6 +1,7 @@
1#ifndef __ARCH_MACH_COMMON_H 1#ifndef __ARCH_MACH_COMMON_H
2#define __ARCH_MACH_COMMON_H 2#define __ARCH_MACH_COMMON_H
3 3
4extern void shmobile_earlytimer_init(void);
4extern struct sys_timer shmobile_timer; 5extern struct sys_timer shmobile_timer;
5struct twd_local_timer; 6struct twd_local_timer;
6void shmobile_twd_init(struct twd_local_timer *twd_local_timer); 7void shmobile_twd_init(struct twd_local_timer *twd_local_timer);
@@ -8,7 +9,7 @@ extern void shmobile_setup_console(void);
8extern void shmobile_secondary_vector(void); 9extern void shmobile_secondary_vector(void);
9extern int shmobile_platform_cpu_kill(unsigned int cpu); 10extern int shmobile_platform_cpu_kill(unsigned int cpu);
10struct clk; 11struct clk;
11extern int clk_init(void); 12extern int shmobile_clk_init(void);
12extern void shmobile_handle_irq_intc(struct pt_regs *); 13extern void shmobile_handle_irq_intc(struct pt_regs *);
13extern struct platform_suspend_ops shmobile_suspend_ops; 14extern struct platform_suspend_ops shmobile_suspend_ops;
14struct cpuidle_driver; 15struct cpuidle_driver;
@@ -16,6 +17,7 @@ extern void (*shmobile_cpuidle_modes[])(void);
16extern void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv); 17extern void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv);
17 18
18extern void sh7367_init_irq(void); 19extern void sh7367_init_irq(void);
20extern void sh7367_map_io(void);
19extern void sh7367_add_early_devices(void); 21extern void sh7367_add_early_devices(void);
20extern void sh7367_add_standard_devices(void); 22extern void sh7367_add_standard_devices(void);
21extern void sh7367_clock_init(void); 23extern void sh7367_clock_init(void);
@@ -24,6 +26,7 @@ extern struct clk sh7367_extalb1_clk;
24extern struct clk sh7367_extal2_clk; 26extern struct clk sh7367_extal2_clk;
25 27
26extern void sh7377_init_irq(void); 28extern void sh7377_init_irq(void);
29extern void sh7377_map_io(void);
27extern void sh7377_add_early_devices(void); 30extern void sh7377_add_early_devices(void);
28extern void sh7377_add_standard_devices(void); 31extern void sh7377_add_standard_devices(void);
29extern void sh7377_clock_init(void); 32extern void sh7377_clock_init(void);
@@ -32,6 +35,7 @@ extern struct clk sh7377_extalc1_clk;
32extern struct clk sh7377_extal2_clk; 35extern struct clk sh7377_extal2_clk;
33 36
34extern void sh7372_init_irq(void); 37extern void sh7372_init_irq(void);
38extern void sh7372_map_io(void);
35extern void sh7372_add_early_devices(void); 39extern void sh7372_add_early_devices(void);
36extern void sh7372_add_standard_devices(void); 40extern void sh7372_add_standard_devices(void);
37extern void sh7372_clock_init(void); 41extern void sh7372_clock_init(void);
@@ -43,6 +47,7 @@ extern struct clk sh7372_extal1_clk;
43extern struct clk sh7372_extal2_clk; 47extern struct clk sh7372_extal2_clk;
44 48
45extern void sh73a0_init_irq(void); 49extern void sh73a0_init_irq(void);
50extern void sh73a0_map_io(void);
46extern void sh73a0_add_early_devices(void); 51extern void sh73a0_add_early_devices(void);
47extern void sh73a0_add_standard_devices(void); 52extern void sh73a0_add_standard_devices(void);
48extern void sh73a0_clock_init(void); 53extern void sh73a0_clock_init(void);
@@ -58,12 +63,14 @@ extern int sh73a0_boot_secondary(unsigned int cpu);
58extern void sh73a0_smp_prepare_cpus(void); 63extern void sh73a0_smp_prepare_cpus(void);
59 64
60extern void r8a7740_init_irq(void); 65extern void r8a7740_init_irq(void);
66extern void r8a7740_map_io(void);
61extern void r8a7740_add_early_devices(void); 67extern void r8a7740_add_early_devices(void);
62extern void r8a7740_add_standard_devices(void); 68extern void r8a7740_add_standard_devices(void);
63extern void r8a7740_clock_init(u8 md_ck); 69extern void r8a7740_clock_init(u8 md_ck);
64extern void r8a7740_pinmux_init(void); 70extern void r8a7740_pinmux_init(void);
65 71
66extern void r8a7779_init_irq(void); 72extern void r8a7779_init_irq(void);
73extern void r8a7779_map_io(void);
67extern void r8a7779_add_early_devices(void); 74extern void r8a7779_add_early_devices(void);
68extern void r8a7779_add_standard_devices(void); 75extern void r8a7779_add_standard_devices(void);
69extern void r8a7779_clock_init(void); 76extern void r8a7779_clock_init(void);
diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobile/include/mach/sh73a0.h
index 881d515a9686..cad57578ceed 100644
--- a/arch/arm/mach-shmobile/include/mach/sh73a0.h
+++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h
@@ -515,8 +515,8 @@ enum {
515 SHDMA_SLAVE_MMCIF_RX, 515 SHDMA_SLAVE_MMCIF_RX,
516}; 516};
517 517
518/* PINT interrupts are located at Linux IRQ 768 and up */ 518/* PINT interrupts are located at Linux IRQ 800 and up */
519#define SH73A0_PINT0_IRQ(irq) ((irq) + 768) 519#define SH73A0_PINT0_IRQ(irq) ((irq) + 800)
520#define SH73A0_PINT1_IRQ(irq) ((irq) + 800) 520#define SH73A0_PINT1_IRQ(irq) ((irq) + 832)
521 521
522#endif /* __ASM_SH73A0_H__ */ 522#endif /* __ASM_SH73A0_H__ */
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index 1eda6b0b69e3..9857595eaa79 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -19,6 +19,7 @@
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/module.h>
22#include <linux/irq.h> 23#include <linux/irq.h>
23#include <linux/io.h> 24#include <linux/io.h>
24#include <linux/sh_intc.h> 25#include <linux/sh_intc.h>
@@ -445,6 +446,7 @@ void __init sh73a0_init_irq(void)
445 setup_irq(gic_spi(1 + k), &sh73a0_irq_pin_cascade[k]); 446 setup_irq(gic_spi(1 + k), &sh73a0_irq_pin_cascade[k]);
446 447
447 n = intcs_evt2irq(to_intc_vect(gic_spi(1 + k))); 448 n = intcs_evt2irq(to_intc_vect(gic_spi(1 + k)));
449 WARN_ON(irq_alloc_desc_at(n, numa_node_id()) != n);
448 irq_set_chip_and_handler_name(n, &intca_gic_irq_chip, 450 irq_set_chip_and_handler_name(n, &intca_gic_irq_chip,
449 handle_level_irq, "level"); 451 handle_level_irq, "level");
450 set_irq_flags(n, IRQF_VALID); /* yuck */ 452 set_irq_flags(n, IRQF_VALID); /* yuck */
diff --git a/arch/arm/mach-shmobile/pfc-r8a7779.c b/arch/arm/mach-shmobile/pfc-r8a7779.c
index 963532f2b2c4..d14c9b048077 100644
--- a/arch/arm/mach-shmobile/pfc-r8a7779.c
+++ b/arch/arm/mach-shmobile/pfc-r8a7779.c
@@ -2120,7 +2120,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
2120 FN_AUDATA3, 0, 0, 0 } 2120 FN_AUDATA3, 0, 0, 0 }
2121 }, 2121 },
2122 { PINMUX_CFG_REG_VAR("IPSR4", 0xfffc0030, 32, 2122 { PINMUX_CFG_REG_VAR("IPSR4", 0xfffc0030, 32,
2123 3, 1, 1, 1, 1, 1, 1, 3, 3, 1, 2123 3, 1, 1, 1, 1, 1, 1, 3, 3,
2124 1, 1, 1, 1, 1, 1, 3, 3, 3, 2) { 2124 1, 1, 1, 1, 1, 1, 3, 3, 3, 2) {
2125 /* IP4_31_29 [3] */ 2125 /* IP4_31_29 [3] */
2126 FN_DU1_DB0, FN_VI2_DATA4_VI2_B4, FN_SCL2_B, FN_SD3_DAT0, 2126 FN_DU1_DB0, FN_VI2_DATA4_VI2_B4, FN_SCL2_B, FN_SD3_DAT0,
diff --git a/arch/arm/mach-shmobile/pfc-sh7372.c b/arch/arm/mach-shmobile/pfc-sh7372.c
index 1bd6585a6acf..336093f9210a 100644
--- a/arch/arm/mach-shmobile/pfc-sh7372.c
+++ b/arch/arm/mach-shmobile/pfc-sh7372.c
@@ -23,6 +23,7 @@
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <mach/irqs.h>
26#include <mach/sh7372.h> 27#include <mach/sh7372.h>
27 28
28#define CPU_ALL_PORT(fn, pfx, sfx) \ 29#define CPU_ALL_PORT(fn, pfx, sfx) \
@@ -1594,6 +1595,43 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
1594 { }, 1595 { },
1595}; 1596};
1596 1597
1598#define EXT_IRQ16L(n) evt2irq(0x200 + ((n) << 5))
1599#define EXT_IRQ16H(n) evt2irq(0x3200 + (((n) - 16) << 5))
1600static struct pinmux_irq pinmux_irqs[] = {
1601 PINMUX_IRQ(EXT_IRQ16L(0), PORT6_FN0, PORT162_FN0),
1602 PINMUX_IRQ(EXT_IRQ16L(1), PORT12_FN0),
1603 PINMUX_IRQ(EXT_IRQ16L(2), PORT4_FN0, PORT5_FN0),
1604 PINMUX_IRQ(EXT_IRQ16L(3), PORT8_FN0, PORT16_FN0),
1605 PINMUX_IRQ(EXT_IRQ16L(4), PORT17_FN0, PORT163_FN0),
1606 PINMUX_IRQ(EXT_IRQ16L(5), PORT18_FN0),
1607 PINMUX_IRQ(EXT_IRQ16L(6), PORT39_FN0, PORT164_FN0),
1608 PINMUX_IRQ(EXT_IRQ16L(7), PORT40_FN0, PORT167_FN0),
1609 PINMUX_IRQ(EXT_IRQ16L(8), PORT41_FN0, PORT168_FN0),
1610 PINMUX_IRQ(EXT_IRQ16L(9), PORT42_FN0, PORT169_FN0),
1611 PINMUX_IRQ(EXT_IRQ16L(10), PORT65_FN0),
1612 PINMUX_IRQ(EXT_IRQ16L(11), PORT67_FN0),
1613 PINMUX_IRQ(EXT_IRQ16L(12), PORT80_FN0, PORT137_FN0),
1614 PINMUX_IRQ(EXT_IRQ16L(13), PORT81_FN0, PORT145_FN0),
1615 PINMUX_IRQ(EXT_IRQ16L(14), PORT82_FN0, PORT146_FN0),
1616 PINMUX_IRQ(EXT_IRQ16L(15), PORT83_FN0, PORT147_FN0),
1617 PINMUX_IRQ(EXT_IRQ16H(16), PORT84_FN0, PORT170_FN0),
1618 PINMUX_IRQ(EXT_IRQ16H(17), PORT85_FN0),
1619 PINMUX_IRQ(EXT_IRQ16H(18), PORT86_FN0),
1620 PINMUX_IRQ(EXT_IRQ16H(19), PORT87_FN0),
1621 PINMUX_IRQ(EXT_IRQ16H(20), PORT92_FN0),
1622 PINMUX_IRQ(EXT_IRQ16H(21), PORT93_FN0),
1623 PINMUX_IRQ(EXT_IRQ16H(22), PORT94_FN0),
1624 PINMUX_IRQ(EXT_IRQ16H(23), PORT95_FN0),
1625 PINMUX_IRQ(EXT_IRQ16H(24), PORT112_FN0),
1626 PINMUX_IRQ(EXT_IRQ16H(25), PORT119_FN0),
1627 PINMUX_IRQ(EXT_IRQ16H(26), PORT121_FN0, PORT172_FN0),
1628 PINMUX_IRQ(EXT_IRQ16H(27), PORT122_FN0, PORT180_FN0),
1629 PINMUX_IRQ(EXT_IRQ16H(28), PORT123_FN0, PORT181_FN0),
1630 PINMUX_IRQ(EXT_IRQ16H(29), PORT129_FN0, PORT182_FN0),
1631 PINMUX_IRQ(EXT_IRQ16H(30), PORT130_FN0, PORT183_FN0),
1632 PINMUX_IRQ(EXT_IRQ16H(31), PORT138_FN0, PORT184_FN0),
1633};
1634
1597static struct pinmux_info sh7372_pinmux_info = { 1635static struct pinmux_info sh7372_pinmux_info = {
1598 .name = "sh7372_pfc", 1636 .name = "sh7372_pfc",
1599 .reserved_id = PINMUX_RESERVED, 1637 .reserved_id = PINMUX_RESERVED,
@@ -1614,6 +1652,9 @@ static struct pinmux_info sh7372_pinmux_info = {
1614 1652
1615 .gpio_data = pinmux_data, 1653 .gpio_data = pinmux_data,
1616 .gpio_data_size = ARRAY_SIZE(pinmux_data), 1654 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1655
1656 .gpio_irq = pinmux_irqs,
1657 .gpio_irq_size = ARRAY_SIZE(pinmux_irqs),
1617}; 1658};
1618 1659
1619void sh7372_pinmux_init(void) 1660void sh7372_pinmux_init(void)
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 986dca6b3fad..74e52341dd1b 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -25,8 +25,41 @@
25#include <linux/serial_sci.h> 25#include <linux/serial_sci.h>
26#include <linux/sh_timer.h> 26#include <linux/sh_timer.h>
27#include <mach/r8a7740.h> 27#include <mach/r8a7740.h>
28#include <mach/common.h>
28#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/map.h>
29#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
32#include <asm/mach/time.h>
33
34static struct map_desc r8a7740_io_desc[] __initdata = {
35 /*
36 * for CPGA/INTC/PFC
37 * 0xe6000000-0xefffffff -> 0xe6000000-0xefffffff
38 */
39 {
40 .virtual = 0xe6000000,
41 .pfn = __phys_to_pfn(0xe6000000),
42 .length = 160 << 20,
43 .type = MT_DEVICE_NONSHARED
44 },
45#ifdef CONFIG_CACHE_L2X0
46 /*
47 * for l2x0_init()
48 * 0xf0100000-0xf0101000 -> 0xf0002000-0xf0003000
49 */
50 {
51 .virtual = 0xf0002000,
52 .pfn = __phys_to_pfn(0xf0100000),
53 .length = PAGE_SIZE,
54 .type = MT_DEVICE_NONSHARED
55 },
56#endif
57};
58
59void __init r8a7740_map_io(void)
60{
61 iotable_init(r8a7740_io_desc, ARRAY_SIZE(r8a7740_io_desc));
62}
30 63
31/* SCIFA0 */ 64/* SCIFA0 */
32static struct plat_sci_port scif0_platform_data = { 65static struct plat_sci_port scif0_platform_data = {
@@ -345,8 +378,20 @@ void __init r8a7740_add_standard_devices(void)
345 ARRAY_SIZE(r8a7740_late_devices)); 378 ARRAY_SIZE(r8a7740_late_devices));
346} 379}
347 380
381static void __init r8a7740_earlytimer_init(void)
382{
383 r8a7740_clock_init(0);
384 shmobile_earlytimer_init();
385}
386
348void __init r8a7740_add_early_devices(void) 387void __init r8a7740_add_early_devices(void)
349{ 388{
350 early_platform_add_devices(r8a7740_early_devices, 389 early_platform_add_devices(r8a7740_early_devices,
351 ARRAY_SIZE(r8a7740_early_devices)); 390 ARRAY_SIZE(r8a7740_early_devices));
391
392 /* setup early console here as well */
393 shmobile_setup_console();
394
395 /* override timer setup with soc-specific code */
396 shmobile_timer.init = r8a7740_earlytimer_init;
352} 397}
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index 4725663bd032..6820d785493d 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -33,6 +33,31 @@
33#include <mach/common.h> 33#include <mach/common.h>
34#include <asm/mach-types.h> 34#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
36#include <asm/mach/time.h>
37#include <asm/mach/map.h>
38#include <asm/hardware/cache-l2x0.h>
39
40static struct map_desc r8a7779_io_desc[] __initdata = {
41 /* 2M entity map for 0xf0000000 (MPCORE) */
42 {
43 .virtual = 0xf0000000,
44 .pfn = __phys_to_pfn(0xf0000000),
45 .length = SZ_2M,
46 .type = MT_DEVICE_NONSHARED
47 },
48 /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
49 {
50 .virtual = 0xfe000000,
51 .pfn = __phys_to_pfn(0xfe000000),
52 .length = SZ_16M,
53 .type = MT_DEVICE_NONSHARED
54 },
55};
56
57void __init r8a7779_map_io(void)
58{
59 iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
60}
36 61
37static struct plat_sci_port scif0_platform_data = { 62static struct plat_sci_port scif0_platform_data = {
38 .mapbase = 0xffe40000, 63 .mapbase = 0xffe40000,
@@ -219,6 +244,10 @@ static struct platform_device *r8a7779_late_devices[] __initdata = {
219 244
220void __init r8a7779_add_standard_devices(void) 245void __init r8a7779_add_standard_devices(void)
221{ 246{
247#ifdef CONFIG_CACHE_L2X0
248 /* Early BRESP enable, Shared attribute override enable, 64K*16way */
249 l2x0_init((void __iomem __force *)(0xf0100000), 0x40470000, 0x82000fff);
250#endif
222 r8a7779_pm_init(); 251 r8a7779_pm_init();
223 252
224 r8a7779_init_pm_domain(&r8a7779_sh4a); 253 r8a7779_init_pm_domain(&r8a7779_sh4a);
@@ -232,8 +261,33 @@ void __init r8a7779_add_standard_devices(void)
232 ARRAY_SIZE(r8a7779_late_devices)); 261 ARRAY_SIZE(r8a7779_late_devices));
233} 262}
234 263
264static void __init r8a7779_earlytimer_init(void)
265{
266 r8a7779_clock_init();
267 shmobile_earlytimer_init();
268}
269
235void __init r8a7779_add_early_devices(void) 270void __init r8a7779_add_early_devices(void)
236{ 271{
237 early_platform_add_devices(r8a7779_early_devices, 272 early_platform_add_devices(r8a7779_early_devices,
238 ARRAY_SIZE(r8a7779_early_devices)); 273 ARRAY_SIZE(r8a7779_early_devices));
274
275 /* Early serial console setup is not included here due to
276 * memory map collisions. The SCIF serial ports in r8a7779
277 * are difficult to entity map 1:1 due to collision with the
278 * virtual memory range used by the coherent DMA code on ARM.
279 *
280 * Anyone wanting to debug early can remove UPF_IOREMAP from
281 * the sh-sci serial console platform data, adjust mapbase
282 * to a static M:N virt:phys mapping that needs to be added to
283 * the mappings passed with iotable_init() above.
284 *
285 * Then add a call to shmobile_setup_console() from this function.
286 *
287 * As a final step pass earlyprint=sh-sci.2,115200 on the kernel
288 * command line in case of the marzen board.
289 */
290
291 /* override timer setup with soc-specific code */
292 shmobile_timer.init = r8a7779_earlytimer_init;
239} 293}
diff --git a/arch/arm/mach-shmobile/setup-sh7367.c b/arch/arm/mach-shmobile/setup-sh7367.c
index e546017f15de..a51e1a1e6996 100644
--- a/arch/arm/mach-shmobile/setup-sh7367.c
+++ b/arch/arm/mach-shmobile/setup-sh7367.c
@@ -29,8 +29,28 @@
29#include <linux/serial_sci.h> 29#include <linux/serial_sci.h>
30#include <linux/sh_timer.h> 30#include <linux/sh_timer.h>
31#include <mach/hardware.h> 31#include <mach/hardware.h>
32#include <mach/common.h>
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
35#include <asm/mach/map.h>
36#include <asm/mach/time.h>
37
38static struct map_desc sh7367_io_desc[] __initdata = {
39 /* create a 1:1 entity map for 0xe6xxxxxx
40 * used by CPGA, INTC and PFC.
41 */
42 {
43 .virtual = 0xe6000000,
44 .pfn = __phys_to_pfn(0xe6000000),
45 .length = 256 << 20,
46 .type = MT_DEVICE_NONSHARED
47 },
48};
49
50void __init sh7367_map_io(void)
51{
52 iotable_init(sh7367_io_desc, ARRAY_SIZE(sh7367_io_desc));
53}
34 54
35/* SCIFA0 */ 55/* SCIFA0 */
36static struct plat_sci_port scif0_platform_data = { 56static struct plat_sci_port scif0_platform_data = {
@@ -435,6 +455,12 @@ void __init sh7367_add_standard_devices(void)
435 ARRAY_SIZE(sh7367_devices)); 455 ARRAY_SIZE(sh7367_devices));
436} 456}
437 457
458static void __init sh7367_earlytimer_init(void)
459{
460 sh7367_clock_init();
461 shmobile_earlytimer_init();
462}
463
438#define SYMSTPCR2 0xe6158048 464#define SYMSTPCR2 0xe6158048
439#define SYMSTPCR2_CMT1 (1 << 29) 465#define SYMSTPCR2_CMT1 (1 << 29)
440 466
@@ -445,4 +471,10 @@ void __init sh7367_add_early_devices(void)
445 471
446 early_platform_add_devices(sh7367_early_devices, 472 early_platform_add_devices(sh7367_early_devices,
447 ARRAY_SIZE(sh7367_early_devices)); 473 ARRAY_SIZE(sh7367_early_devices));
474
475 /* setup early console here as well */
476 shmobile_setup_console();
477
478 /* override timer setup with soc-specific code */
479 shmobile_timer.init = sh7367_earlytimer_init;
448} 480}
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index a83cf51fc099..c14fb35de47c 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -33,8 +33,28 @@
33#include <linux/pm_domain.h> 33#include <linux/pm_domain.h>
34#include <mach/hardware.h> 34#include <mach/hardware.h>
35#include <mach/sh7372.h> 35#include <mach/sh7372.h>
36#include <mach/common.h>
37#include <asm/mach/map.h>
36#include <asm/mach-types.h> 38#include <asm/mach-types.h>
37#include <asm/mach/arch.h> 39#include <asm/mach/arch.h>
40#include <asm/mach/time.h>
41
42static struct map_desc sh7372_io_desc[] __initdata = {
43 /* create a 1:1 entity map for 0xe6xxxxxx
44 * used by CPGA, INTC and PFC.
45 */
46 {
47 .virtual = 0xe6000000,
48 .pfn = __phys_to_pfn(0xe6000000),
49 .length = 256 << 20,
50 .type = MT_DEVICE_NONSHARED
51 },
52};
53
54void __init sh7372_map_io(void)
55{
56 iotable_init(sh7372_io_desc, ARRAY_SIZE(sh7372_io_desc));
57}
38 58
39/* SCIFA0 */ 59/* SCIFA0 */
40static struct plat_sci_port scif0_platform_data = { 60static struct plat_sci_port scif0_platform_data = {
@@ -1045,8 +1065,20 @@ void __init sh7372_add_standard_devices(void)
1045 sh7372_add_device_to_domain(&sh7372_a4r, &jpu_device); 1065 sh7372_add_device_to_domain(&sh7372_a4r, &jpu_device);
1046} 1066}
1047 1067
1068static void __init sh7372_earlytimer_init(void)
1069{
1070 sh7372_clock_init();
1071 shmobile_earlytimer_init();
1072}
1073
1048void __init sh7372_add_early_devices(void) 1074void __init sh7372_add_early_devices(void)
1049{ 1075{
1050 early_platform_add_devices(sh7372_early_devices, 1076 early_platform_add_devices(sh7372_early_devices,
1051 ARRAY_SIZE(sh7372_early_devices)); 1077 ARRAY_SIZE(sh7372_early_devices));
1078
1079 /* setup early console here as well */
1080 shmobile_setup_console();
1081
1082 /* override timer setup with soc-specific code */
1083 shmobile_timer.init = sh7372_earlytimer_init;
1052} 1084}
diff --git a/arch/arm/mach-shmobile/setup-sh7377.c b/arch/arm/mach-shmobile/setup-sh7377.c
index bb405b8e459b..9f146095098b 100644
--- a/arch/arm/mach-shmobile/setup-sh7377.c
+++ b/arch/arm/mach-shmobile/setup-sh7377.c
@@ -30,8 +30,28 @@
30#include <linux/sh_intc.h> 30#include <linux/sh_intc.h>
31#include <linux/sh_timer.h> 31#include <linux/sh_timer.h>
32#include <mach/hardware.h> 32#include <mach/hardware.h>
33#include <mach/common.h>
34#include <asm/mach/map.h>
33#include <asm/mach-types.h> 35#include <asm/mach-types.h>
34#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
37#include <asm/mach/time.h>
38
39static struct map_desc sh7377_io_desc[] __initdata = {
40 /* create a 1:1 entity map for 0xe6xxxxxx
41 * used by CPGA, INTC and PFC.
42 */
43 {
44 .virtual = 0xe6000000,
45 .pfn = __phys_to_pfn(0xe6000000),
46 .length = 256 << 20,
47 .type = MT_DEVICE_NONSHARED
48 },
49};
50
51void __init sh7377_map_io(void)
52{
53 iotable_init(sh7377_io_desc, ARRAY_SIZE(sh7377_io_desc));
54}
35 55
36/* SCIFA0 */ 56/* SCIFA0 */
37static struct plat_sci_port scif0_platform_data = { 57static struct plat_sci_port scif0_platform_data = {
@@ -456,6 +476,12 @@ void __init sh7377_add_standard_devices(void)
456 ARRAY_SIZE(sh7377_devices)); 476 ARRAY_SIZE(sh7377_devices));
457} 477}
458 478
479static void __init sh7377_earlytimer_init(void)
480{
481 sh7377_clock_init();
482 shmobile_earlytimer_init();
483}
484
459#define SMSTPCR3 0xe615013c 485#define SMSTPCR3 0xe615013c
460#define SMSTPCR3_CMT1 (1 << 29) 486#define SMSTPCR3_CMT1 (1 << 29)
461 487
@@ -466,4 +492,10 @@ void __init sh7377_add_early_devices(void)
466 492
467 early_platform_add_devices(sh7377_early_devices, 493 early_platform_add_devices(sh7377_early_devices,
468 ARRAY_SIZE(sh7377_early_devices)); 494 ARRAY_SIZE(sh7377_early_devices));
495
496 /* setup early console here as well */
497 shmobile_setup_console();
498
499 /* override timer setup with soc-specific code */
500 shmobile_timer.init = sh7377_earlytimer_init;
469} 501}
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index 20e71e5cace4..b6a0734a738e 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -32,8 +32,28 @@
32#include <linux/sh_timer.h> 32#include <linux/sh_timer.h>
33#include <mach/hardware.h> 33#include <mach/hardware.h>
34#include <mach/sh73a0.h> 34#include <mach/sh73a0.h>
35#include <mach/common.h>
35#include <asm/mach-types.h> 36#include <asm/mach-types.h>
37#include <asm/mach/map.h>
36#include <asm/mach/arch.h> 38#include <asm/mach/arch.h>
39#include <asm/mach/time.h>
40
41static struct map_desc sh73a0_io_desc[] __initdata = {
42 /* create a 1:1 entity map for 0xe6xxxxxx
43 * used by CPGA, INTC and PFC.
44 */
45 {
46 .virtual = 0xe6000000,
47 .pfn = __phys_to_pfn(0xe6000000),
48 .length = 256 << 20,
49 .type = MT_DEVICE_NONSHARED
50 },
51};
52
53void __init sh73a0_map_io(void)
54{
55 iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc));
56}
37 57
38static struct plat_sci_port scif0_platform_data = { 58static struct plat_sci_port scif0_platform_data = {
39 .mapbase = 0xe6c40000, 59 .mapbase = 0xe6c40000,
@@ -667,8 +687,20 @@ void __init sh73a0_add_standard_devices(void)
667 ARRAY_SIZE(sh73a0_late_devices)); 687 ARRAY_SIZE(sh73a0_late_devices));
668} 688}
669 689
690static void __init sh73a0_earlytimer_init(void)
691{
692 sh73a0_clock_init();
693 shmobile_earlytimer_init();
694}
695
670void __init sh73a0_add_early_devices(void) 696void __init sh73a0_add_early_devices(void)
671{ 697{
672 early_platform_add_devices(sh73a0_early_devices, 698 early_platform_add_devices(sh73a0_early_devices,
673 ARRAY_SIZE(sh73a0_early_devices)); 699 ARRAY_SIZE(sh73a0_early_devices));
700
701 /* setup early console here as well */
702 shmobile_setup_console();
703
704 /* override timer setup with soc-specific code */
705 shmobile_timer.init = sh73a0_earlytimer_init;
674} 706}
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index 2e687932f83c..c0a9093ba3a8 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -78,7 +78,7 @@ int __cpuinit sh73a0_boot_secondary(unsigned int cpu)
78 /* enable cache coherency */ 78 /* enable cache coherency */
79 modify_scu_cpu_psr(0, 3 << (cpu * 8)); 79 modify_scu_cpu_psr(0, 3 << (cpu * 8));
80 80
81 if (((__raw_readw(__io(PSTR)) >> (4 * cpu)) & 3) == 3) 81 if (((__raw_readl(__io(PSTR)) >> (4 * cpu)) & 3) == 3)
82 __raw_writel(1 << cpu, __io(WUPCR)); /* wake up */ 82 __raw_writel(1 << cpu, __io(WUPCR)); /* wake up */
83 else 83 else
84 __raw_writel(1 << cpu, __io(SRESCR)); /* reset */ 84 __raw_writel(1 << cpu, __io(SRESCR)); /* reset */
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
index be16231e86fc..2fba5f3d1c8a 100644
--- a/arch/arm/mach-shmobile/timer.c
+++ b/arch/arm/mach-shmobile/timer.c
@@ -37,11 +37,15 @@ static void __init shmobile_late_time_init(void)
37 early_platform_driver_probe("earlytimer", 2, 0); 37 early_platform_driver_probe("earlytimer", 2, 0);
38} 38}
39 39
40static void __init shmobile_timer_init(void) 40void __init shmobile_earlytimer_init(void)
41{ 41{
42 late_time_init = shmobile_late_time_init; 42 late_time_init = shmobile_late_time_init;
43} 43}
44 44
45static void __init shmobile_timer_init(void)
46{
47}
48
45void __init shmobile_twd_init(struct twd_local_timer *twd_local_timer) 49void __init shmobile_twd_init(struct twd_local_timer *twd_local_timer)
46{ 50{
47#ifdef CONFIG_HAVE_ARM_TWD 51#ifdef CONFIG_HAVE_ARM_TWD
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 52af00446a63..c59e8b892d6b 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -5,7 +5,7 @@ config UX500_SOC_COMMON
5 default y 5 default y
6 select ARM_GIC 6 select ARM_GIC
7 select HAS_MTU 7 select HAS_MTU
8 select ARM_ERRATA_753970 8 select PL310_ERRATA_753970
9 select ARM_ERRATA_754322 9 select ARM_ERRATA_754322
10 select ARM_ERRATA_764369 10 select ARM_ERRATA_764369
11 11
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 9b3d0fbaee72..88c3ba151e87 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -7,7 +7,7 @@ config ARCH_VEXPRESS_CA9X4
7 select ARM_GIC 7 select ARM_GIC
8 select ARM_ERRATA_720789 8 select ARM_ERRATA_720789
9 select ARM_ERRATA_751472 9 select ARM_ERRATA_751472
10 select ARM_ERRATA_753970 10 select PL310_ERRATA_753970
11 select HAVE_SMP 11 select HAVE_SMP
12 select MIGHT_HAVE_CACHE_L2X0 12 select MIGHT_HAVE_CACHE_L2X0
13 13
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 1a3ca2488164..7edef9121632 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -631,7 +631,8 @@ comment "Processor Features"
631 631
632config ARM_LPAE 632config ARM_LPAE
633 bool "Support for the Large Physical Address Extension" 633 bool "Support for the Large Physical Address Extension"
634 depends on MMU && CPU_V7 634 depends on MMU && CPU_32v7 && !CPU_32v6 && !CPU_32v5 && \
635 !CPU_32v4 && !CPU_32v3
635 help 636 help
636 Say Y if you have an ARMv7 processor supporting the LPAE page 637 Say Y if you have an ARMv7 processor supporting the LPAE page
637 table format and you would like to access memory beyond the 638 table format and you would like to access memory beyond the
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 7a24d39661f0..a655d3da386d 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -55,7 +55,7 @@ loop1:
55 cmp r1, #2 @ see what cache we have at this level 55 cmp r1, #2 @ see what cache we have at this level
56 blt skip @ skip if no cache, or just i-cache 56 blt skip @ skip if no cache, or just i-cache
57#ifdef CONFIG_PREEMPT 57#ifdef CONFIG_PREEMPT
58 save_and_disable_irqs r9 @ make cssr&csidr read atomic 58 save_and_disable_irqs_notrace r9 @ make cssr&csidr read atomic
59#endif 59#endif
60 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr 60 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
61 isb @ isb to sych the new cssr&csidr 61 isb @ isb to sych the new cssr&csidr
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 0404ccbb8aa3..f1c8486f7501 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -230,9 +230,7 @@ __v7_setup:
230 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register 230 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
231#endif 231#endif
232#ifdef CONFIG_ARM_ERRATA_743622 232#ifdef CONFIG_ARM_ERRATA_743622
233 teq r6, #0x20 @ present in r2p0 233 teq r5, #0x00200000 @ only present in r2p*
234 teqne r6, #0x21 @ present in r2p1
235 teqne r6, #0x22 @ present in r2p2
236 mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register 234 mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register
237 orreq r10, r10, #1 << 6 @ set bit #6 235 orreq r10, r10, #1 << 6 @ set bit #6
238 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register 236 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 06383b51e655..4de7d1e79e73 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -69,6 +69,7 @@ void __init omap_reserve(void)
69 omap_vram_reserve_sdram_memblock(); 69 omap_vram_reserve_sdram_memblock();
70 omap_dsp_reserve_sdram_memblock(); 70 omap_dsp_reserve_sdram_memblock();
71 omap_secure_ram_reserve_memblock(); 71 omap_secure_ram_reserve_memblock();
72 omap_barrier_reserve_memblock();
72} 73}
73 74
74void __init omap_init_consistent_dma_size(void) 75void __init omap_init_consistent_dma_size(void)
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index 2efd6454bce0..37bbbbb981b2 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -428,8 +428,16 @@
428#define OMAP_GPMC_NR_IRQS 8 428#define OMAP_GPMC_NR_IRQS 8
429#define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS) 429#define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS)
430 430
431/* PRCM IRQ handler */
432#ifdef CONFIG_ARCH_OMAP2PLUS
433#define OMAP_PRCM_IRQ_BASE (OMAP_GPMC_IRQ_END)
434#define OMAP_PRCM_NR_IRQS 64
435#define OMAP_PRCM_IRQ_END (OMAP_PRCM_IRQ_BASE + OMAP_PRCM_NR_IRQS)
436#else
437#define OMAP_PRCM_IRQ_END OMAP_GPMC_IRQ_END
438#endif
431 439
432#define NR_IRQS OMAP_GPMC_IRQ_END 440#define NR_IRQS OMAP_PRCM_IRQ_END
433 441
434#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32)) 442#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32))
435 443
diff --git a/arch/arm/plat-omap/include/plat/omap-secure.h b/arch/arm/plat-omap/include/plat/omap-secure.h
index 3047ff923a63..8c7994ce9869 100644
--- a/arch/arm/plat-omap/include/plat/omap-secure.h
+++ b/arch/arm/plat-omap/include/plat/omap-secure.h
@@ -10,4 +10,10 @@ static inline void omap_secure_ram_reserve_memblock(void)
10{ } 10{ }
11#endif 11#endif
12 12
13#ifdef CONFIG_OMAP4_ERRATA_I688
14extern int omap_barrier_reserve_memblock(void);
15#else
16static inline void omap_barrier_reserve_memblock(void)
17{ }
18#endif
13#endif /* __OMAP_SECURE_H__ */ 19#endif /* __OMAP_SECURE_H__ */
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 9fe35348e03b..2bab4c99a234 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -1249,7 +1249,7 @@ static void s3c2410_dma_resume(void)
1249 struct s3c2410_dma_chan *cp = s3c2410_chans + dma_channels - 1; 1249 struct s3c2410_dma_chan *cp = s3c2410_chans + dma_channels - 1;
1250 int channel; 1250 int channel;
1251 1251
1252 for (channel = dma_channels - 1; channel >= 0; cp++, channel--) 1252 for (channel = dma_channels - 1; channel >= 0; cp--, channel--)
1253 s3c2410_dma_resume_chan(cp); 1253 s3c2410_dma_resume_chan(cp);
1254} 1254}
1255 1255
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index f10768e988d4..d21d744e4d99 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -1409,7 +1409,7 @@ void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1409 1409
1410#ifdef CONFIG_S3C_DEV_USB_HSOTG 1410#ifdef CONFIG_S3C_DEV_USB_HSOTG
1411static struct resource s3c_usb_hsotg_resources[] = { 1411static struct resource s3c_usb_hsotg_resources[] = {
1412 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_16K), 1412 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1413 [1] = DEFINE_RES_IRQ(IRQ_OTG), 1413 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1414}; 1414};
1415 1415
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c
index 0c77e4298675..abb5bdecd509 100644
--- a/arch/arm/plat-spear/time.c
+++ b/arch/arm/plat-spear/time.c
@@ -145,11 +145,13 @@ static void clockevent_set_mode(enum clock_event_mode mode,
145static int clockevent_next_event(unsigned long cycles, 145static int clockevent_next_event(unsigned long cycles,
146 struct clock_event_device *clk_event_dev) 146 struct clock_event_device *clk_event_dev)
147{ 147{
148 u16 val; 148 u16 val = readw(gpt_base + CR(CLKEVT));
149
150 if (val & CTRL_ENABLE)
151 writew(val & ~CTRL_ENABLE, gpt_base + CR(CLKEVT));
149 152
150 writew(cycles, gpt_base + LOAD(CLKEVT)); 153 writew(cycles, gpt_base + LOAD(CLKEVT));
151 154
152 val = readw(gpt_base + CR(CLKEVT));
153 val |= CTRL_ENABLE | CTRL_INT_ENABLE; 155 val |= CTRL_ENABLE | CTRL_INT_ENABLE;
154 writew(val, gpt_base + CR(CLKEVT)); 156 writew(val, gpt_base + CR(CLKEVT));
155 157