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authorJason Liu <jason.hui@linaro.org>2011-08-26 01:35:21 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2011-08-26 02:50:59 -0400
commitab116a86faf6aeafd0acf766c0c5d9475bf8493e (patch)
tree06d70594ebff86d1ea529308e08e7106ba46f0be /arch/arm
parent3f5492c51367ed7bf39eaf9f86ba5b4f8a27a111 (diff)
ARM: mx31: use generic function for displaying silicon revision
Update to use generic function for displaying silicon revision Tested on mx31pdk board as print the following information: CPU identified as i.MX31, silicon rev 2.0 Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-imx/clock-imx31.c4
-rw-r--r--arch/arm/mach-imx/cpu-imx31.c49
-rw-r--r--arch/arm/plat-mxc/include/mach/mx3x.h11
3 files changed, 31 insertions, 33 deletions
diff --git a/arch/arm/mach-imx/clock-imx31.c b/arch/arm/mach-imx/clock-imx31.c
index d973770b1f96..85b8885cf345 100644
--- a/arch/arm/mach-imx/clock-imx31.c
+++ b/arch/arm/mach-imx/clock-imx31.c
@@ -611,11 +611,11 @@ int __init mx31_clocks_init(unsigned long fref)
611 clk_enable(&gpt_clk); 611 clk_enable(&gpt_clk);
612 clk_enable(&emi_clk); 612 clk_enable(&emi_clk);
613 clk_enable(&iim_clk); 613 clk_enable(&iim_clk);
614 mx31_revision();
615 clk_disable(&iim_clk);
614 616
615 clk_enable(&serial_pll_clk); 617 clk_enable(&serial_pll_clk);
616 618
617 mx31_read_cpu_rev();
618
619 if (mx31_revision() >= IMX_CHIP_REVISION_2_0) { 619 if (mx31_revision() >= IMX_CHIP_REVISION_2_0) {
620 reg = __raw_readl(MXC_CCM_PMCR1); 620 reg = __raw_readl(MXC_CCM_PMCR1);
621 /* No PLL restart on DVFS switch; enable auto EMI handshake */ 621 /* No PLL restart on DVFS switch; enable auto EMI handshake */
diff --git a/arch/arm/mach-imx/cpu-imx31.c b/arch/arm/mach-imx/cpu-imx31.c
index a3780700a882..3f2345f0cdaf 100644
--- a/arch/arm/mach-imx/cpu-imx31.c
+++ b/arch/arm/mach-imx/cpu-imx31.c
@@ -13,45 +13,50 @@
13#include <linux/io.h> 13#include <linux/io.h>
14#include <mach/hardware.h> 14#include <mach/hardware.h>
15#include <mach/iim.h> 15#include <mach/iim.h>
16#include <mach/common.h>
16 17
17unsigned int mx31_cpu_rev; 18static int mx31_cpu_rev = -1;
18EXPORT_SYMBOL(mx31_cpu_rev);
19 19
20static struct { 20static struct {
21 u8 srev; 21 u8 srev;
22 const char *name; 22 const char *name;
23 const char *v;
24 unsigned int rev; 23 unsigned int rev;
25} mx31_cpu_type[] __initdata = { 24} mx31_cpu_type[] = {
26 { .srev = 0x00, .name = "i.MX31(L)", .v = "1.0", .rev = IMX_CHIP_REVISION_1_0 }, 25 { .srev = 0x00, .name = "i.MX31(L)", .rev = IMX_CHIP_REVISION_1_0 },
27 { .srev = 0x10, .name = "i.MX31", .v = "1.1", .rev = IMX_CHIP_REVISION_1_1 }, 26 { .srev = 0x10, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
28 { .srev = 0x11, .name = "i.MX31L", .v = "1.1", .rev = IMX_CHIP_REVISION_1_1 }, 27 { .srev = 0x11, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 },
29 { .srev = 0x12, .name = "i.MX31", .v = "1.15", .rev = IMX_CHIP_REVISION_1_1 }, 28 { .srev = 0x12, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
30 { .srev = 0x13, .name = "i.MX31L", .v = "1.15", .rev = IMX_CHIP_REVISION_1_1 }, 29 { .srev = 0x13, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 },
31 { .srev = 0x14, .name = "i.MX31", .v = "1.2", .rev = IMX_CHIP_REVISION_1_2 }, 30 { .srev = 0x14, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_2 },
32 { .srev = 0x15, .name = "i.MX31L", .v = "1.2", .rev = IMX_CHIP_REVISION_1_2 }, 31 { .srev = 0x15, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_2 },
33 { .srev = 0x28, .name = "i.MX31", .v = "2.0", .rev = IMX_CHIP_REVISION_2_0 }, 32 { .srev = 0x28, .name = "i.MX31", .rev = IMX_CHIP_REVISION_2_0 },
34 { .srev = 0x29, .name = "i.MX31L", .v = "2.0", .rev = IMX_CHIP_REVISION_2_0 }, 33 { .srev = 0x29, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_2_0 },
35}; 34};
36 35
37void __init mx31_read_cpu_rev(void) 36static int mx31_read_cpu_rev(void)
38{ 37{
39 u32 i, srev; 38 u32 i, srev;
40 39
41 /* read SREV register from IIM module */ 40 /* read SREV register from IIM module */
42 srev = __raw_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV)); 41 srev = __raw_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV));
42 srev &= 0xff;
43 43
44 for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++) 44 for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
45 if (srev == mx31_cpu_type[i].srev) { 45 if (srev == mx31_cpu_type[i].srev) {
46 printk(KERN_INFO 46 imx_print_silicon_rev(mx31_cpu_type[i].name,
47 "CPU identified as %s, silicon rev %s\n", 47 mx31_cpu_type[i].rev);
48 mx31_cpu_type[i].name, mx31_cpu_type[i].v); 48 return mx31_cpu_type[i].rev;
49
50 mx31_cpu_rev = mx31_cpu_type[i].rev;
51 return;
52 } 49 }
53 50
54 mx31_cpu_rev = IMX_CHIP_REVISION_UNKNOWN; 51 imx_print_silicon_rev("i.MX31", IMX_CHIP_REVISION_UNKNOWN);
52 return IMX_CHIP_REVISION_UNKNOWN;
53}
54
55int mx31_revision(void)
56{
57 if (mx31_cpu_rev == -1)
58 mx31_cpu_rev = mx31_read_cpu_rev();
55 59
56 printk(KERN_WARNING "Unknown CPU identifier. srev = %02x\n", srev); 60 return mx31_cpu_rev;
57} 61}
62EXPORT_SYMBOL(mx31_revision);
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h
index 388a407d72d6..e1850f417226 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/plat-mxc/include/mach/mx3x.h
@@ -187,15 +187,6 @@
187/* Mandatory defines used globally */ 187/* Mandatory defines used globally */
188 188
189#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) 189#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
190
191extern unsigned int mx31_cpu_rev;
192extern void mx31_read_cpu_rev(void);
193
194static inline int mx31_revision(void)
195{
196 return mx31_cpu_rev;
197}
198
199extern unsigned int mx35_cpu_rev; 190extern unsigned int mx35_cpu_rev;
200extern void mx35_read_cpu_rev(void); 191extern void mx35_read_cpu_rev(void);
201 192
@@ -203,6 +194,8 @@ static inline int mx35_revision(void)
203{ 194{
204 return mx35_cpu_rev; 195 return mx35_cpu_rev;
205} 196}
197
198extern int mx31_revision(void);
206#endif 199#endif
207 200
208#endif /* ifndef __MACH_MX3x_H__ */ 201#endif /* ifndef __MACH_MX3x_H__ */