Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal into eduardo-soc-thermal

author: Zhang Rui <rui.zhang@intel.com> 2014-12-08 22:37:35 -0500
committer: Zhang Rui <rui.zhang@intel.com> 2014-12-08 22:37:35 -0500
commit: 9c1e4550b5cbe17ff68ce631356190ef9a565386 (patch)
tree: 04cd872bd8afd2b2fe143e2c17a180a39d1a275c /arch/arm
parent: 009d0431c3914de64666bec0d350e54fdd59df6a (diff)
parent: 184a4bf623fa587067851d25435fcb2f41de445b (diff)
2 files changed, 91 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
index 51b373ff1065..4eb540be368f 100644
--- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts
+++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
@@ -1942,4 +1942,48 @@
                         <&tegra_car TEGRA124_CLK_EXTERN1>;
                clock-names = "pll_a", "pll_a_out0", "mclk";
        };
+        thermal-zones {
+                cpu {
+                        trips {
+                                trip@0 {
+                                        temperature = <101000>;
+                                        hysteresis = <0>;
+                                        type = "critical";
+                                };
+                        };
+                        cooling-maps {
+                                /* There are currently no cooling maps because there are no cooling devices */
+                        };
+                };
+                mem {
+                        trips {
+                                trip@0 {
+                                        temperature = <101000>;
+                                        hysteresis = <0>;
+                                        type = "critical";
+                                };
+                        };
+                        cooling-maps {
+                                /* There are currently no cooling maps because there are no cooling devices */
+                        };
+                };
+                gpu {
+                        trips {
+                                trip@0 {
+                                        temperature = <101000>;
+                                        hysteresis = <0>;
+                                        type = "critical";
+                                };
+                        };
+                        cooling-maps {
+                                /* There are currently no cooling maps because there are no cooling devices */
+                        };
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index df2b06b29985..b92ac360b5b0 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -3,6 +3,7 @@
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/thermal/tegra124-soctherm.h>
 #include "skeleton.dtsi"
@@ -640,6 +641,18 @@
                status = "disabled";
        };
+        soctherm: thermal-sensor@0,700e2000 {
+                compatible = "nvidia,tegra124-soctherm";
+                reg = <0x0 0x700e2000 0x0 0x1000>;
+                interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
+                        <&tegra_car TEGRA124_CLK_SOC_THERM>;
+                clock-names = "tsensor", "soctherm";
+                resets = <&tegra_car 78>;
+                reset-names = "soctherm";
+                #thermal-sensor-cells = <1>;
+        };
        ahub@0,70300000 {
                compatible = "nvidia,tegra124-ahub";
                reg = <0x0 0x70300000 0x0 0x200>,
@@ -881,6 +894,40 @@
                };
        };
+        thermal-zones {
+                cpu {
+                        polling-delay-passive = <1000>;
+                        polling-delay = <1000>;
+                        thermal-sensors =
+                                <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>;
+                };
+                mem {
+                        polling-delay-passive = <1000>;
+                        polling-delay = <1000>;
+                        thermal-sensors =
+                                <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>;
+                };
+                gpu {
+                        polling-delay-passive = <1000>;
+                        polling-delay = <1000>;
+                        thermal-sensors =
+                                <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>;
+                };
+                pllx {
+                        polling-delay-passive = <1000>;
+                        polling-delay = <1000>;
+                        thermal-sensors =
+                                <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>;
+                };
+        };
        timer {
                compatible = "arm,armv7-timer";
                interrupts = <GIC_PPI 13
author	Zhang Rui <rui.zhang@intel.com>	2014-12-08 22:37:35 -0500
committer	Zhang Rui <rui.zhang@intel.com>	2014-12-08 22:37:35 -0500
commit	9c1e4550b5cbe17ff68ce631356190ef9a565386 (patch)
tree	04cd872bd8afd2b2fe143e2c17a180a39d1a275c /arch/arm
parent	009d0431c3914de64666bec0d350e54fdd59df6a (diff)
parent	184a4bf623fa587067851d25435fcb2f41de445b (diff)

diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts index 51b373ff1065..4eb540be368f 100644 --- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts +++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
@@ -1942,4 +1942,48 @@
1942	<&tegra_car TEGRA124_CLK_EXTERN1>;	1942	<&tegra_car TEGRA124_CLK_EXTERN1>;
1943	clock-names = "pll_a", "pll_a_out0", "mclk";	1943	clock-names = "pll_a", "pll_a_out0", "mclk";
1944	};	1944	};
		1945
		1946	thermal-zones {
		1947	cpu {
		1948	trips {
		1949	trip@0 {
		1950	temperature = <101000>;
		1951	hysteresis = <0>;
		1952	type = "critical";
		1953	};
		1954	};
		1955
		1956	cooling-maps {
		1957	/* There are currently no cooling maps because there are no cooling devices */
		1958	};
		1959	};
		1960
		1961	mem {
		1962	trips {
		1963	trip@0 {
		1964	temperature = <101000>;
		1965	hysteresis = <0>;
		1966	type = "critical";
		1967	};
		1968	};
		1969
		1970	cooling-maps {
		1971	/* There are currently no cooling maps because there are no cooling devices */
		1972	};
		1973	};
		1974
		1975	gpu {
		1976	trips {
		1977	trip@0 {
		1978	temperature = <101000>;
		1979	hysteresis = <0>;
		1980	type = "critical";
		1981	};
		1982	};
		1983
		1984	cooling-maps {
		1985	/* There are currently no cooling maps because there are no cooling devices */
		1986	};
		1987	};
		1988	};
1945	};	1989	};


diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index df2b06b29985..b92ac360b5b0 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -3,6 +3,7 @@
3	#include <dt-bindings/pinctrl/pinctrl-tegra.h>	3	#include <dt-bindings/pinctrl/pinctrl-tegra.h>
4	#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>	4	#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
5	#include <dt-bindings/interrupt-controller/arm-gic.h>	5	#include <dt-bindings/interrupt-controller/arm-gic.h>
		6	#include <dt-bindings/thermal/tegra124-soctherm.h>
6		7
7	#include "skeleton.dtsi"	8	#include "skeleton.dtsi"
8		9
@@ -640,6 +641,18 @@
640	status = "disabled";	641	status = "disabled";
641	};	642	};
642		643
		644	soctherm: thermal-sensor@0,700e2000 {
		645	compatible = "nvidia,tegra124-soctherm";
		646	reg = <0x0 0x700e2000 0x0 0x1000>;
		647	interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
		648	clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
		649	<&tegra_car TEGRA124_CLK_SOC_THERM>;
		650	clock-names = "tsensor", "soctherm";
		651	resets = <&tegra_car 78>;
		652	reset-names = "soctherm";
		653	#thermal-sensor-cells = <1>;
		654	};
		655
643	ahub@0,70300000 {	656	ahub@0,70300000 {
644	compatible = "nvidia,tegra124-ahub";	657	compatible = "nvidia,tegra124-ahub";
645	reg = <0x0 0x70300000 0x0 0x200>,	658	reg = <0x0 0x70300000 0x0 0x200>,
@@ -881,6 +894,40 @@
881	};	894	};
882	};	895	};
883		896
		897	thermal-zones {
		898	cpu {
		899	polling-delay-passive = <1000>;
		900	polling-delay = <1000>;
		901
		902	thermal-sensors =
		903	<&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>;
		904	};
		905
		906	mem {
		907	polling-delay-passive = <1000>;
		908	polling-delay = <1000>;
		909
		910	thermal-sensors =
		911	<&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>;
		912	};
		913
		914	gpu {
		915	polling-delay-passive = <1000>;
		916	polling-delay = <1000>;
		917
		918	thermal-sensors =
		919	<&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>;
		920	};
		921
		922	pllx {
		923	polling-delay-passive = <1000>;
		924	polling-delay = <1000>;
		925
		926	thermal-sensors =
		927	<&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>;
		928	};
		929	};
		930
884	timer {	931	timer {
885	compatible = "arm,armv7-timer";	932	compatible = "arm,armv7-timer";
886	interrupts = <GIC_PPI 13	933	interrupts = <GIC_PPI 13