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authorPeter Ujfalusi <peter.ujfalusi@ti.com>2013-01-18 18:48:15 -0500
committerPaul Walmsley <paul@pwsan.com>2013-01-18 18:48:15 -0500
commit981827a2b7f896de1bdf6c2e185bed4fc1a5200f (patch)
tree10b67b5bc4c0bdbc9483fb9d817151489f569615 /arch/arm
parent7d1f9aeff1ee4a20b1aeb377dd0f579fe9647619 (diff)
ARM: OMAP4: clock data: Lock ABE DPLL on all revisions
To avoid issues with audio caused by non locked ABE DPLL we should make sure it is locked in all OMAP4 revisions. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Jon Hunter <jon-hunter@ti.com> [paul@pwsan.com: cleaned up patch description] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-omap2/cclock44xx_data.c13
1 files changed, 6 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/cclock44xx_data.c b/arch/arm/mach-omap2/cclock44xx_data.c
index 5789a5e25563..a2cc046b47f4 100644
--- a/arch/arm/mach-omap2/cclock44xx_data.c
+++ b/arch/arm/mach-omap2/cclock44xx_data.c
@@ -2026,14 +2026,13 @@ int __init omap4xxx_clk_init(void)
2026 * On OMAP4460 the ABE DPLL fails to turn on if in idle low-power 2026 * On OMAP4460 the ABE DPLL fails to turn on if in idle low-power
2027 * state when turning the ABE clock domain. Workaround this by 2027 * state when turning the ABE clock domain. Workaround this by
2028 * locking the ABE DPLL on boot. 2028 * locking the ABE DPLL on boot.
2029 * Lock the ABE DPLL in any case to avoid issues with audio.
2029 */ 2030 */
2030 if (cpu_is_omap446x()) { 2031 rc = clk_set_parent(&abe_dpll_refclk_mux_ck, &sys_32k_ck);
2031 rc = clk_set_parent(&abe_dpll_refclk_mux_ck, &sys_32k_ck); 2032 if (!rc)
2032 if (!rc) 2033 rc = clk_set_rate(&dpll_abe_ck, OMAP4_DPLL_ABE_DEFFREQ);
2033 rc = clk_set_rate(&dpll_abe_ck, OMAP4_DPLL_ABE_DEFFREQ); 2034 if (rc)
2034 if (rc) 2035 pr_err("%s: failed to configure ABE DPLL!\n", __func__);
2035 pr_err("%s: failed to configure ABE DPLL!\n", __func__);
2036 }
2037 2036
2038 return 0; 2037 return 0;
2039} 2038}