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author | Sam bobroff <sam.bobroff@au1.ibm.com> | 2014-06-05 02:19:22 -0400 |
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committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2014-06-11 03:02:56 -0400 |
commit | 96d016108640bc2b7fb0ee800737f80923847294 (patch) | |
tree | fb14f3cf31e266ff70d4585c9d2aa91b5df5dc45 /arch/arm | |
parent | fb5a515704d7e84c139140a83c5eff515adfc000 (diff) |
powerpc: Correct DSCR during TM context switch
Correct the DSCR SPR becoming temporarily corrupted if a task is
context switched during a transaction.
The problem occurs while suspending the task and is caused by saving
the DSCR to thread.dscr after it has already been set to the CPU's
default value:
__switch_to() calls __switch_to_tm()
which calls tm_reclaim_task()
which calls tm_reclaim_thread()
which calls tm_reclaim()
where the DSCR is set to the CPU's default
__switch_to() calls _switch()
where thread.dscr is set to the DSCR
When the task is resumed, it's transaction will be doomed (as usual)
and the DSCR SPR will be corrupted, although the checkpointed value
will be correct. Therefore the DSCR will be immediately corrected by
the transaction aborting, unless it has been suspended. In that case
the incorrect value can be seen by the task until it resumes the
transaction.
The fix is to treat the DSCR similarly to the TAR and save it early
in __switch_to().
A program exposing the problem is added to the kernel self tests as:
tools/testing/selftests/powerpc/tm/tm-resched-dscr.
Signed-off-by: Sam Bobroff <sam.bobroff@au1.ibm.com>
CC: <stable@vger.kernel.org> [v3.10+]
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/arm')
0 files changed, 0 insertions, 0 deletions