diff options
| author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2014-04-14 09:46:59 -0400 |
|---|---|---|
| committer | Jason Cooper <jason@lakedaemon.net> | 2014-04-24 01:00:35 -0400 |
| commit | 924d38f404936495b59ef7fa3ff232d978d64b18 (patch) | |
| tree | b9411a534c90db67fbe5d985eaddbe26491852f5 /arch/arm | |
| parent | 56a705a48eae9c474ba7f82af5c4ff5cf306f654 (diff) | |
ARM: mvebu: prepare coherency code to support more SOCs
The code that handles the coherency fabric of Armada 370 and Armada XP
in arch/arm/mach-mvebu/coherency.c made the assumption that there was
only one type of coherency fabric. Unfortunately, it turns out that
upcoming SoCs have a slightly different coherency unit.
In preparation to the introduction of the coherency support for more
SoCs, this commit:
* Introduces a data associated to the compatible string in the
compatible string match table, so that the code can differantiate
the variant of coherency unit being used.
* Separates the coherency unit initialization code into its own
function.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397483228-25625-2-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-mvebu/coherency.c | 47 |
1 files changed, 33 insertions, 14 deletions
diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c index 4e9d58148ca7..434cf5f90a80 100644 --- a/arch/arm/mach-mvebu/coherency.c +++ b/arch/arm/mach-mvebu/coherency.c | |||
| @@ -38,8 +38,13 @@ static void __iomem *coherency_cpu_base; | |||
| 38 | 38 | ||
| 39 | #define IO_SYNC_BARRIER_CTL_OFFSET 0x0 | 39 | #define IO_SYNC_BARRIER_CTL_OFFSET 0x0 |
| 40 | 40 | ||
| 41 | enum { | ||
| 42 | COHERENCY_FABRIC_TYPE_ARMADA_370_XP, | ||
| 43 | }; | ||
| 44 | |||
| 41 | static struct of_device_id of_coherency_table[] = { | 45 | static struct of_device_id of_coherency_table[] = { |
| 42 | {.compatible = "marvell,coherency-fabric"}, | 46 | {.compatible = "marvell,coherency-fabric", |
| 47 | .data = (void *) COHERENCY_FABRIC_TYPE_ARMADA_370_XP }, | ||
| 43 | { /* end of list */ }, | 48 | { /* end of list */ }, |
| 44 | }; | 49 | }; |
| 45 | 50 | ||
| @@ -121,26 +126,40 @@ static struct notifier_block mvebu_hwcc_platform_nb = { | |||
| 121 | .notifier_call = mvebu_hwcc_platform_notifier, | 126 | .notifier_call = mvebu_hwcc_platform_notifier, |
| 122 | }; | 127 | }; |
| 123 | 128 | ||
| 129 | static void __init armada_370_coherency_init(struct device_node *np) | ||
| 130 | { | ||
| 131 | struct resource res; | ||
| 132 | |||
| 133 | of_address_to_resource(np, 0, &res); | ||
| 134 | coherency_phys_base = res.start; | ||
| 135 | /* | ||
| 136 | * Ensure secondary CPUs will see the updated value, | ||
| 137 | * which they read before they join the coherency | ||
| 138 | * fabric, and therefore before they are coherent with | ||
| 139 | * the boot CPU cache. | ||
| 140 | */ | ||
| 141 | sync_cache_w(&coherency_phys_base); | ||
| 142 | coherency_base = of_iomap(np, 0); | ||
| 143 | coherency_cpu_base = of_iomap(np, 1); | ||
| 144 | set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0); | ||
| 145 | } | ||
| 146 | |||
| 124 | int __init coherency_init(void) | 147 | int __init coherency_init(void) |
| 125 | { | 148 | { |
| 126 | struct device_node *np; | 149 | struct device_node *np; |
| 127 | 150 | ||
| 128 | np = of_find_matching_node(NULL, of_coherency_table); | 151 | np = of_find_matching_node(NULL, of_coherency_table); |
| 129 | if (np) { | 152 | if (np) { |
| 130 | struct resource res; | 153 | const struct of_device_id *match = |
| 154 | of_match_node(of_coherency_table, np); | ||
| 155 | int type; | ||
| 156 | |||
| 157 | type = (int) match->data; | ||
| 131 | pr_info("Initializing Coherency fabric\n"); | 158 | pr_info("Initializing Coherency fabric\n"); |
| 132 | of_address_to_resource(np, 0, &res); | 159 | |
| 133 | coherency_phys_base = res.start; | 160 | if (type == COHERENCY_FABRIC_TYPE_ARMADA_370_XP) |
| 134 | /* | 161 | armada_370_coherency_init(np); |
| 135 | * Ensure secondary CPUs will see the updated value, | 162 | |
| 136 | * which they read before they join the coherency | ||
| 137 | * fabric, and therefore before they are coherent with | ||
| 138 | * the boot CPU cache. | ||
| 139 | */ | ||
| 140 | sync_cache_w(&coherency_phys_base); | ||
| 141 | coherency_base = of_iomap(np, 0); | ||
| 142 | coherency_cpu_base = of_iomap(np, 1); | ||
| 143 | set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0); | ||
| 144 | of_node_put(np); | 163 | of_node_put(np); |
| 145 | } | 164 | } |
| 146 | 165 | ||