ARM: 7615/1: cache-l2x0: aurora: Invalidate during clean operation with WT enable

This patch fixes a bug for Aurora L2 cache controller when the
write-through mode is enable. For the clean operation even if we don't
have to flush the lines we still need to invalidate them.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 14 insertions, 8 deletions

diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 05d577613b13..55ca637a4930 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -506,15 +506,21 @@ static void aurora_clean_range(unsigned long start, unsigned long end)
 
 static void aurora_flush_range(unsigned long start, unsigned long end)
 {
-        if (!l2_wt_override) {
-                start &= ~(CACHE_LINE_SIZE - 1);
-                end = ALIGN(end, CACHE_LINE_SIZE);
-                while (start != end) {
-                        unsigned long range_end = calc_range_end(start, end);
+        start &= ~(CACHE_LINE_SIZE - 1);
+        end = ALIGN(end, CACHE_LINE_SIZE);
+        while (start != end) {
+                unsigned long range_end = calc_range_end(start, end);
+                /*
+                 * If L2 is forced to WT, the L2 will always be clean and we
+                 * just need to invalidate.
+                 */
+                if (l2_wt_override)
                         aurora_pa_range(start, range_end - CACHE_LINE_SIZE,
-                                        AURORA_FLUSH_RANGE_REG);
-                        start = range_end;
-                }
+                                                        AURORA_INVAL_RANGE_REG);
+                else
+                        aurora_pa_range(start, range_end - CACHE_LINE_SIZE,
+                                                        AURORA_FLUSH_RANGE_REG);
+                start = range_end;
         }
 }