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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-11-06 13:04:23 -0500 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-11-06 13:04:23 -0500 |
| commit | 878708f290f6ed8b108d73fd6ab624cda6266a1e (patch) | |
| tree | 249f991f231ef8532c7f44b592bbfe78194f7e2e /arch/arm | |
| parent | b1cce6b1b2785fd61454b47ceacb461815407662 (diff) | |
| parent | c7cf72dcadbe39c2077b32460f86c9f8167be3be (diff) | |
Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/xscaleiop
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mm/cache-xsc3l2.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mm/cache-xsc3l2.c b/arch/arm/mm/cache-xsc3l2.c index 10b1bae1a258..464de893a988 100644 --- a/arch/arm/mm/cache-xsc3l2.c +++ b/arch/arm/mm/cache-xsc3l2.c | |||
| @@ -98,7 +98,7 @@ static void xsc3_l2_inv_range(unsigned long start, unsigned long end) | |||
| 98 | /* | 98 | /* |
| 99 | * Clean and invalidate partial last cache line. | 99 | * Clean and invalidate partial last cache line. |
| 100 | */ | 100 | */ |
| 101 | if (end & (CACHE_LINE_SIZE - 1)) { | 101 | if (start < end && (end & (CACHE_LINE_SIZE - 1))) { |
| 102 | xsc3_l2_clean_pa(end & ~(CACHE_LINE_SIZE - 1)); | 102 | xsc3_l2_clean_pa(end & ~(CACHE_LINE_SIZE - 1)); |
| 103 | xsc3_l2_inv_pa(end & ~(CACHE_LINE_SIZE - 1)); | 103 | xsc3_l2_inv_pa(end & ~(CACHE_LINE_SIZE - 1)); |
| 104 | end &= ~(CACHE_LINE_SIZE - 1); | 104 | end &= ~(CACHE_LINE_SIZE - 1); |
| @@ -107,7 +107,7 @@ static void xsc3_l2_inv_range(unsigned long start, unsigned long end) | |||
| 107 | /* | 107 | /* |
| 108 | * Invalidate all full cache lines between 'start' and 'end'. | 108 | * Invalidate all full cache lines between 'start' and 'end'. |
| 109 | */ | 109 | */ |
| 110 | while (start != end) { | 110 | while (start < end) { |
| 111 | xsc3_l2_inv_pa(start); | 111 | xsc3_l2_inv_pa(start); |
| 112 | start += CACHE_LINE_SIZE; | 112 | start += CACHE_LINE_SIZE; |
| 113 | } | 113 | } |