Merge git://www.linux-watchdog.org/linux-watchdog

Pull watchdog updates from Wim Van Sebroeck:
 - lots of devm_ conversions and cleanup
 - platform_set_drvdata cleanups
 - s3c2410: dev_err/dev_info + dev_pm_ops
 - watchdog_core: don't try to stop device if not running fix
 - wdrtas: use print_hex_dump
 - xilinx cleanups
 - orion_wdt fixes
 - softdog cleanup
 - hpwdt: check on UEFI bits
 - deletion of mpcore_wdt driver
 - addition of broadcom BCM2835 watchdog timer driver
 - addition of MEN A21 watcdog devices

* git://www.linux-watchdog.org/linux-watchdog: (38 commits)
  watchdog: hpwdt: Add check for UEFI bits
  watchdog: softdog: remove replaceable ping operation
  watchdog: New watchdog driver for MEN A21 watchdogs
  Watchdog: fix clearing of the watchdog interrupt
  Watchdog: allow orion_wdt to be built for Dove
  watchdog: Add Broadcom BCM2835 watchdog timer driver
  watchdog: delete mpcore_wdt driver
  watchdog: xilinx: Setup the origin compatible string
  watchdog: xilinx: Fix driver header
  watchdog: wdrtas: don't use custom version of print_hex_dump
  watchdog: core: don't try to stop device if not running
  watchdog: jz4740: Pass device to clk_get
  watchdog: twl4030: Remove redundant platform_set_drvdata()
  watchdog: mpcore: Remove redundant platform_set_drvdata()
  watchdog: da9055: use platform_{get,set}_drvdata()
  watchdog: da9052: use platform_{get,set}_drvdata()
  watchdog: cpwd: use platform_{get,set}_drvdata()
  watchdog: s3c2410_wdt: convert s3c2410wdt to dev_pm_ops
  watchdog: s3c2410_wdt: use dev_err()/dev_info() instead of pr_err()/pr_info()
  watchdog: wm831x: use platform_{get,set}_drvdata()
  ...

4 files changed, 1 insertions, 6 deletions

diff --git a/arch/arm/configs/spear13xx_defconfig b/arch/arm/configs/spear13xx_defconfig
index 1fdb82694ca2..82eaa552ed14 100644
--- a/arch/arm/configs/spear13xx_defconfig
+++ b/arch/arm/configs/spear13xx_defconfig
@@ -61,7 +61,6 @@ CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_PL061=y
 # CONFIG_HWMON is not set
 CONFIG_WATCHDOG=y
-CONFIG_MPCORE_WATCHDOG=y
 # CONFIG_HID_SUPPORT is not set
 CONFIG_USB=y
 # CONFIG_USB_DEVICE_CLASS is not set
diff --git a/arch/arm/mach-dove/include/mach/bridge-regs.h b/arch/arm/mach-dove/include/mach/bridge-regs.h
index 99f259e8cf33..5362df3df89f 100644
--- a/arch/arm/mach-dove/include/mach/bridge-regs.h
+++ b/arch/arm/mach-dove/include/mach/bridge-regs.h
@@ -26,6 +26,7 @@
 #define SYSTEM_SOFT_RESET       (BRIDGE_VIRT_BASE + 0x010c)
 #define  SOFT_RESET             0x00000001
 
+#define BRIDGE_CAUSE            (BRIDGE_VIRT_BASE + 0x0110)
 #define  BRIDGE_INT_TIMER1_CLR  (~0x0004)
 
 #define IRQ_VIRT_BASE           (BRIDGE_VIRT_BASE + 0x0200)
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
index d4cbe5e81bb4..91242c944d7a 100644
--- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
+++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
@@ -21,14 +21,12 @@
 #define CPU_RESET               0x00000002
 
 #define RSTOUTn_MASK            (BRIDGE_VIRT_BASE + 0x0108)
-#define WDT_RESET_OUT_EN        0x00000002
 #define SOFT_RESET_OUT_EN       0x00000004
 
 #define SYSTEM_SOFT_RESET       (BRIDGE_VIRT_BASE + 0x010c)
 #define SOFT_RESET              0x00000001
 
 #define BRIDGE_CAUSE            (BRIDGE_VIRT_BASE + 0x0110)
-#define WDT_INT_REQ             0x0008
 
 #define BRIDGE_INT_TIMER1_CLR   (~0x0004)
 
diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
index 461fd69a10ae..f727d03f1688 100644
--- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h
+++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
@@ -18,7 +18,6 @@
 #define CPU_CTRL                (ORION5X_BRIDGE_VIRT_BASE + 0x104)
 
 #define RSTOUTn_MASK            (ORION5X_BRIDGE_VIRT_BASE + 0x108)
-#define WDT_RESET_OUT_EN        0x0002
 
 #define CPU_SOFT_RESET          (ORION5X_BRIDGE_VIRT_BASE + 0x10c)
 
@@ -26,8 +25,6 @@
 
 #define POWER_MNG_CTRL_REG      (ORION5X_BRIDGE_VIRT_BASE + 0x11C)
 
-#define WDT_INT_REQ             0x0008
-
 #define BRIDGE_INT_TIMER1_CLR   (~0x0004)
 
 #define MAIN_IRQ_CAUSE          (ORION5X_BRIDGE_VIRT_BASE + 0x200)