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authorFabio Estevam <fabio.estevam@freescale.com>2015-01-14 08:11:03 -0500
committerShawn Guo <shawn.guo@linaro.org>2015-01-20 02:37:10 -0500
commit7ecd0bde5bfea524a843ad8fa8cb66ccbce68779 (patch)
tree23224835657656cc0bc902045941c8ec6e4e19a1 /arch/arm
parent7a9f0604bd56936b2b18f49824e0e392dc7878c3 (diff)
ARM: dts: imx25: Fix PWM "per" clocks
Currently PWM functionality is broken on mx25 due to the wrong assignment of the PWM "per" clock. According to Documentation/devicetree/bindings/clock/imx25-clock.txt: pwm_ipg_per 52 ,so update the pwm "per" to use 'pwm_ipg_per' instead of 'per10' clock. With this change PWM can work fine on mx25. Cc: <stable@vger.kernel.org> Reported-by: Carlos Soto <csotoalonso@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/imx25.dtsi8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
index d238676a9107..e4d3aecc4ed2 100644
--- a/arch/arm/boot/dts/imx25.dtsi
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -369,7 +369,7 @@
369 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 369 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
370 #pwm-cells = <2>; 370 #pwm-cells = <2>;
371 reg = <0x53fa0000 0x4000>; 371 reg = <0x53fa0000 0x4000>;
372 clocks = <&clks 106>, <&clks 36>; 372 clocks = <&clks 106>, <&clks 52>;
373 clock-names = "ipg", "per"; 373 clock-names = "ipg", "per";
374 interrupts = <36>; 374 interrupts = <36>;
375 }; 375 };
@@ -388,7 +388,7 @@
388 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 388 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
389 #pwm-cells = <2>; 389 #pwm-cells = <2>;
390 reg = <0x53fa8000 0x4000>; 390 reg = <0x53fa8000 0x4000>;
391 clocks = <&clks 107>, <&clks 36>; 391 clocks = <&clks 107>, <&clks 52>;
392 clock-names = "ipg", "per"; 392 clock-names = "ipg", "per";
393 interrupts = <41>; 393 interrupts = <41>;
394 }; 394 };
@@ -429,7 +429,7 @@
429 pwm4: pwm@53fc8000 { 429 pwm4: pwm@53fc8000 {
430 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 430 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
431 reg = <0x53fc8000 0x4000>; 431 reg = <0x53fc8000 0x4000>;
432 clocks = <&clks 108>, <&clks 36>; 432 clocks = <&clks 108>, <&clks 52>;
433 clock-names = "ipg", "per"; 433 clock-names = "ipg", "per";
434 interrupts = <42>; 434 interrupts = <42>;
435 }; 435 };
@@ -476,7 +476,7 @@
476 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 476 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
477 #pwm-cells = <2>; 477 #pwm-cells = <2>;
478 reg = <0x53fe0000 0x4000>; 478 reg = <0x53fe0000 0x4000>;
479 clocks = <&clks 105>, <&clks 36>; 479 clocks = <&clks 105>, <&clks 52>;
480 clock-names = "ipg", "per"; 480 clock-names = "ipg", "per";
481 interrupts = <26>; 481 interrupts = <26>;
482 }; 482 };