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authorTero Kristo <t-kristo@ti.com>2014-02-26 08:31:05 -0500
committerTero Kristo <t-kristo@ti.com>2014-07-04 10:02:16 -0400
commit6bdc4b44b3acc95655b061a88c951c6d9742d8e3 (patch)
tree025428926f739a7fcc448581706fb63d44ed8614 /arch/arm
parent7e28b465fdea3f0601a1c76e47c50d05c7c603e2 (diff)
ARM: OMAP24xx: PRM: add API for clearing wakeup status bits
This helps to isolate the PRM into its own driver. Signed-off-by: Tero Kristo <t-kristo@ti.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-omap2/pm24xx.c31
-rw-r--r--arch/arm/mach-omap2/prm2xxx.c18
-rw-r--r--arch/arm/mach-omap2/prm2xxx.h1
3 files changed, 32 insertions, 18 deletions
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index a5ea988ff340..d76694b7a591 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -75,9 +75,9 @@ static int omap2_enter_full_retention(void)
75 75
76 /* Clear old wake-up events */ 76 /* Clear old wake-up events */
77 /* REVISIT: These write to reserved bits? */ 77 /* REVISIT: These write to reserved bits? */
78 omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, PM_WKST1); 78 omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
79 omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2); 79 omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);
80 omap2_prm_write_mod_reg(0xffffffff, WKUP_MOD, PM_WKST); 80 omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0);
81 81
82 pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_RET); 82 pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_RET);
83 pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET); 83 pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET);
@@ -104,23 +104,18 @@ no_sleep:
104 clk_enable(osc_ck); 104 clk_enable(osc_ck);
105 105
106 /* clear CORE wake-up events */ 106 /* clear CORE wake-up events */
107 omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, PM_WKST1); 107 omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
108 omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2); 108 omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);
109 109
110 /* wakeup domain events - bit 1: GPT1, bit5 GPIO */ 110 /* wakeup domain events - bit 1: GPT1, bit5 GPIO */
111 omap2_prm_clear_mod_reg_bits(0x4 | 0x1, WKUP_MOD, PM_WKST); 111 omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, 0x4 | 0x1);
112 112
113 /* MPU domain wake events */ 113 /* MPU domain wake events */
114 l = omap2_prm_read_mod_reg(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET); 114 omap2xxx_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET,
115 if (l & 0x01) 115 0x1);
116 omap2_prm_write_mod_reg(0x01, OCP_MOD,
117 OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
118 if (l & 0x20)
119 omap2_prm_write_mod_reg(0x20, OCP_MOD,
120 OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
121 116
122 /* Mask future PRCM-to-MPU interrupts */ 117 omap2xxx_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET,
123 omap2_prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET); 118 0x20);
124 119
125 pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); 120 pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
126 pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_ON); 121 pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_ON);
@@ -148,9 +143,9 @@ static void omap2_enter_mpu_retention(void)
148 * it is in retention mode. */ 143 * it is in retention mode. */
149 if (omap2_allow_mpu_retention()) { 144 if (omap2_allow_mpu_retention()) {
150 /* REVISIT: These write to reserved bits? */ 145 /* REVISIT: These write to reserved bits? */
151 omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, PM_WKST1); 146 omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
152 omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2); 147 omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);
153 omap2_prm_write_mod_reg(0xffffffff, WKUP_MOD, PM_WKST); 148 omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0);
154 149
155 /* Try to enter MPU retention */ 150 /* Try to enter MPU retention */
156 pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET); 151 pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET);
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index a3a3cca2bcc4..86958050547a 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -114,6 +114,24 @@ void omap2xxx_prm_dpll_reset(void)
114 omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTCTRL); 114 omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTCTRL);
115} 115}
116 116
117/**
118 * omap2xxx_prm_clear_mod_irqs - clear wakeup status bits for a module
119 * @module: PRM module to clear wakeups from
120 * @regs: register offset to clear
121 * @wkst_mask: wakeup status mask to clear
122 *
123 * Clears wakeup status bits for a given module, so that the device can
124 * re-enter idle.
125 */
126void omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask)
127{
128 u32 wkst;
129
130 wkst = omap2_prm_read_mod_reg(module, regs);
131 wkst &= wkst_mask;
132 omap2_prm_write_mod_reg(wkst, module, regs);
133}
134
117int omap2xxx_clkdm_sleep(struct clockdomain *clkdm) 135int omap2xxx_clkdm_sleep(struct clockdomain *clkdm)
118{ 136{
119 omap2_prm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, 137 omap2_prm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
diff --git a/arch/arm/mach-omap2/prm2xxx.h b/arch/arm/mach-omap2/prm2xxx.h
index d2cb6365716f..d73414139292 100644
--- a/arch/arm/mach-omap2/prm2xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx.h
@@ -125,6 +125,7 @@ extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm);
125extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm); 125extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm);
126 126
127extern void omap2xxx_prm_dpll_reset(void); 127extern void omap2xxx_prm_dpll_reset(void);
128void omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask);
128 129
129extern int __init omap2xxx_prm_init(void); 130extern int __init omap2xxx_prm_init(void);
130 131