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authorOlof Johansson <olof@lixom.net>2012-10-09 17:06:10 -0400
committerOlof Johansson <olof@lixom.net>2012-10-09 18:00:58 -0400
commit6bd5dbda2adeabba69c969886511e501a65b6e3c (patch)
tree354ccf775d95796aa3b8b773475484e36d652973 /arch/arm
parent1e574e3a7dbef1c0365494687d7a0b6dca7eac93 (diff)
parent8bbacc55ba72368d7fdbad06b63d66bd763a428a (diff)
Merge tag 'omap-for-v3.7-rc1/fixes-asoc-regression-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
From Tony Lindgren: This branch contains regression fixes for omap4/5 ASoC audio that were caused by the fact that u-boot stopped muxing non essential pins. As omap audio and dmaengine development happens on these platforms, let's make sure they are usable. Of course this should have been fixed earlier and not during the -rc cycle. * tag 'omap-for-v3.7-rc1/fixes-asoc-regression-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM/dts: omap5-evm: pinmux configuration for audio ARM/dts: Add pinctrl driver entries for omap5 ARM/dts: omap4-panda: pinmux configuration for audio ARM/dts: omap4-sdp: pinmux configuration for audio ARM/dts: omap5-evm: Disable unused McBSP3 ARM/dts: omap4-sdp: Disable unused McBSP3 ARM/dts: omap4-panda: Disable unused audio IPs ARM: OMAP: board-omap4panda: Pin mux configuration for audio needs ARM: OMAP: board-4430-sdp: Pin mux configuration for audio needs
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/omap4-panda.dts47
-rw-r--r--arch/arm/boot/dts/omap4-sdp.dts57
-rw-r--r--arch/arm/boot/dts/omap5-evm.dts58
-rw-r--r--arch/arm/boot/dts/omap5.dtsi17
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c26
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c15
6 files changed, 220 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts
index 20b966ee1bb3..e8f927cbb376 100644
--- a/arch/arm/boot/dts/omap4-panda.dts
+++ b/arch/arm/boot/dts/omap4-panda.dts
@@ -59,6 +59,41 @@
59 }; 59 };
60}; 60};
61 61
62&omap4_pmx_core {
63 pinctrl-names = "default";
64 pinctrl-0 = <
65 &twl6040_pins
66 &mcpdm_pins
67 &mcbsp1_pins
68 >;
69
70 twl6040_pins: pinmux_twl6040_pins {
71 pinctrl-single,pins = <
72 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */
73 0x160 0x100 /* sys_nirq2.sys_nirq2 INPUT | MODE0 */
74 >;
75 };
76
77 mcpdm_pins: pinmux_mcpdm_pins {
78 pinctrl-single,pins = <
79 0xc6 0x108 /* abe_pdm_ul_data.abe_pdm_ul_data INPUT PULLDOWN | MODE0 */
80 0xc8 0x108 /* abe_pdm_dl_data.abe_pdm_dl_data INPUT PULLDOWN | MODE0 */
81 0xca 0x118 /* abe_pdm_frame.abe_pdm_frame INPUT PULLUP | MODE0 */
82 0xcc 0x108 /* abe_pdm_lb_clk.abe_pdm_lb_clk INPUT PULLDOWN | MODE0 */
83 0xce 0x108 /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */
84 >;
85 };
86
87 mcbsp1_pins: pinmux_mcbsp1_pins {
88 pinctrl-single,pins = <
89 0xbe 0x100 /* abe_mcbsp1_clkx.abe_mcbsp1_clkx INPUT | MODE0 */
90 0xc0 0x108 /* abe_mcbsp1_dr.abe_mcbsp1_dr INPUT PULLDOWN | MODE0 */
91 0xc2 0x8 /* abe_mcbsp1_dx.abe_mcbsp1_dx OUTPUT PULLDOWN | MODE0 */
92 0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */
93 >;
94 };
95};
96
62&i2c1 { 97&i2c1 {
63 clock-frequency = <400000>; 98 clock-frequency = <400000>;
64 99
@@ -137,3 +172,15 @@
137 cs1-used; 172 cs1-used;
138 device-handle = <&elpida_ECB240ABACN>; 173 device-handle = <&elpida_ECB240ABACN>;
139}; 174};
175
176&mcbsp2 {
177 status = "disabled";
178};
179
180&mcbsp3 {
181 status = "disabled";
182};
183
184&dmic {
185 status = "disabled";
186};
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index 94a23b39033d..5b7e04fbff50 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -117,6 +117,15 @@
117}; 117};
118 118
119&omap4_pmx_core { 119&omap4_pmx_core {
120 pinctrl-names = "default";
121 pinctrl-0 = <
122 &twl6040_pins
123 &mcpdm_pins
124 &dmic_pins
125 &mcbsp1_pins
126 &mcbsp2_pins
127 >;
128
120 uart2_pins: pinmux_uart2_pins { 129 uart2_pins: pinmux_uart2_pins {
121 pinctrl-single,pins = < 130 pinctrl-single,pins = <
122 0xd8 0x118 /* uart2_cts.uart2_cts INPUT_PULLUP | MODE0 */ 131 0xd8 0x118 /* uart2_cts.uart2_cts INPUT_PULLUP | MODE0 */
@@ -141,6 +150,50 @@
141 0x11e 0 /* uart4_tx.uart4_tx OUTPUT | MODE0 */ 150 0x11e 0 /* uart4_tx.uart4_tx OUTPUT | MODE0 */
142 >; 151 >;
143 }; 152 };
153
154 twl6040_pins: pinmux_twl6040_pins {
155 pinctrl-single,pins = <
156 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */
157 0x160 0x100 /* sys_nirq2.sys_nirq2 INPUT | MODE0 */
158 >;
159 };
160
161 mcpdm_pins: pinmux_mcpdm_pins {
162 pinctrl-single,pins = <
163 0xc6 0x108 /* abe_pdm_ul_data.abe_pdm_ul_data INPUT PULLDOWN | MODE0 */
164 0xc8 0x108 /* abe_pdm_dl_data.abe_pdm_dl_data INPUT PULLDOWN | MODE0 */
165 0xca 0x118 /* abe_pdm_frame.abe_pdm_frame INPUT PULLUP | MODE0 */
166 0xcc 0x108 /* abe_pdm_lb_clk.abe_pdm_lb_clk INPUT PULLDOWN | MODE0 */
167 0xce 0x108 /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */
168 >;
169 };
170
171 dmic_pins: pinmux_dmic_pins {
172 pinctrl-single,pins = <
173 0xd0 0 /* abe_dmic_clk1.abe_dmic_clk1 OUTPUT | MODE0 */
174 0xd2 0x100 /* abe_dmic_din1.abe_dmic_din1 INPUT | MODE0 */
175 0xd4 0x100 /* abe_dmic_din2.abe_dmic_din2 INPUT | MODE0 */
176 0xd6 0x100 /* abe_dmic_din3.abe_dmic_din3 INPUT | MODE0 */
177 >;
178 };
179
180 mcbsp1_pins: pinmux_mcbsp1_pins {
181 pinctrl-single,pins = <
182 0xbe 0x100 /* abe_mcbsp1_clkx.abe_mcbsp1_clkx INPUT | MODE0 */
183 0xc0 0x108 /* abe_mcbsp1_dr.abe_mcbsp1_dr INPUT PULLDOWN | MODE0 */
184 0xc2 0x8 /* abe_mcbsp1_dx.abe_mcbsp1_dx OUTPUT PULLDOWN | MODE0 */
185 0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */
186 >;
187 };
188
189 mcbsp2_pins: pinmux_mcbsp2_pins {
190 pinctrl-single,pins = <
191 0xb6 0x100 /* abe_mcbsp2_clkx.abe_mcbsp2_clkx INPUT | MODE0 */
192 0xb8 0x108 /* abe_mcbsp2_dr.abe_mcbsp2_dr INPUT PULLDOWN | MODE0 */
193 0xba 0x8 /* abe_mcbsp2_dx.abe_mcbsp2_dx OUTPUT PULLDOWN | MODE0 */
194 0xbc 0x100 /* abe_mcbsp2_fsx.abe_mcbsp2_fsx INPUT | MODE0 */
195 >;
196 };
144}; 197};
145 198
146&i2c1 { 199&i2c1 {
@@ -349,3 +402,7 @@
349 pinctrl-names = "default"; 402 pinctrl-names = "default";
350 pinctrl-0 = <&uart4_pins>; 403 pinctrl-0 = <&uart4_pins>;
351}; 404};
405
406&mcbsp3 {
407 status = "disabled";
408};
diff --git a/arch/arm/boot/dts/omap5-evm.dts b/arch/arm/boot/dts/omap5-evm.dts
index 9c41a3f311aa..c663eba73168 100644
--- a/arch/arm/boot/dts/omap5-evm.dts
+++ b/arch/arm/boot/dts/omap5-evm.dts
@@ -27,6 +27,60 @@
27 27
28}; 28};
29 29
30&omap5_pmx_core {
31 pinctrl-names = "default";
32 pinctrl-0 = <
33 &twl6040_pins
34 &mcpdm_pins
35 &dmic_pins
36 &mcbsp1_pins
37 &mcbsp2_pins
38 >;
39
40 twl6040_pins: pinmux_twl6040_pins {
41 pinctrl-single,pins = <
42 0x18a 0x6 /* perslimbus2_clock.gpio5_145 OUTPUT | MODE6 */
43 >;
44 };
45
46 mcpdm_pins: pinmux_mcpdm_pins {
47 pinctrl-single,pins = <
48 0x142 0x108 /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */
49 0x15c 0x108 /* abemcpdm_ul_data.abemcpdm_ul_data INPUT PULLDOWN | MODE0 */
50 0x15e 0x108 /* abemcpdm_dl_data.abemcpdm_dl_data INPUT PULLDOWN | MODE0 */
51 0x160 0x118 /* abemcpdm_frame.abemcpdm_frame INPUT PULLUP | MODE0 */
52 0x162 0x108 /* abemcpdm_lb_clk.abemcpdm_lb_clk INPUT PULLDOWN | MODE0 */
53 >;
54 };
55
56 dmic_pins: pinmux_dmic_pins {
57 pinctrl-single,pins = <
58 0x144 0x100 /* abedmic_din1.abedmic_din1 INPUT | MODE0 */
59 0x146 0x100 /* abedmic_din2.abedmic_din2 INPUT | MODE0 */
60 0x148 0x100 /* abedmic_din3.abedmic_din3 INPUT | MODE0 */
61 0x14a 0 /* abedmic_clk1.abedmic_clk1 OUTPUT | MODE0 */
62 >;
63 };
64
65 mcbsp1_pins: pinmux_mcbsp1_pins {
66 pinctrl-single,pins = <
67 0x14c 0x101 /* abedmic_clk2.abemcbsp1_fsx INPUT | MODE1 */
68 0x14e 0x9 /* abedmic_clk3.abemcbsp1_dx OUTPUT PULLDOWN | MODE1 */
69 0x150 0x101 /* abeslimbus1_clock.abemcbsp1_clkx INPUT | MODE0 */
70 0x152 0x109 /* abeslimbus1_data.abemcbsp1_dr INPUT PULLDOWN | MODE1 */
71 >;
72 };
73
74 mcbsp2_pins: pinmux_mcbsp2_pins {
75 pinctrl-single,pins = <
76 0x154 0x108 /* abemcbsp2_dr.abemcbsp2_dr INPUT PULLDOWN | MODE0 */
77 0x156 0x8 /* abemcbsp2_dx.abemcbsp2_dx OUTPUT PULLDOWN | MODE0 */
78 0x158 0x100 /* abemcbsp2_fsx.abemcbsp2_fsx INPUT | MODE0 */
79 0x15a 0x100 /* abemcbsp2_clkx.abemcbsp2_clkx INPUT | MODE0 */
80 >;
81 };
82};
83
30&mmc1 { 84&mmc1 {
31 vmmc-supply = <&vmmcsd_fixed>; 85 vmmc-supply = <&vmmcsd_fixed>;
32 bus-width = <4>; 86 bus-width = <4>;
@@ -82,3 +136,7 @@
82 0x020700d9>; /* SEARCH */ 136 0x020700d9>; /* SEARCH */
83 linux,input-no-autorepeat; 137 linux,input-no-autorepeat;
84}; 138};
139
140&mcbsp3 {
141 status = "disabled";
142};
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 5db33f481a33..42c78beb4fdc 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -77,6 +77,23 @@
77 ranges; 77 ranges;
78 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; 78 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
79 79
80 omap5_pmx_core: pinmux@4a002840 {
81 compatible = "ti,omap4-padconf", "pinctrl-single";
82 reg = <0x4a002840 0x01b6>;
83 #address-cells = <1>;
84 #size-cells = <0>;
85 pinctrl-single,register-width = <16>;
86 pinctrl-single,function-mask = <0x7fff>;
87 };
88 omap5_pmx_wkup: pinmux@4ae0c840 {
89 compatible = "ti,omap4-padconf", "pinctrl-single";
90 reg = <0x4ae0c840 0x0038>;
91 #address-cells = <1>;
92 #size-cells = <0>;
93 pinctrl-single,register-width = <16>;
94 pinctrl-single,function-mask = <0x7fff>;
95 };
96
80 gic: interrupt-controller@48211000 { 97 gic: interrupt-controller@48211000 {
81 compatible = "arm,cortex-a15-gic"; 98 compatible = "arm,cortex-a15-gic";
82 interrupt-controller; 99 interrupt-controller;
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index a88809a59ea9..5ff28afbefe7 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -830,6 +830,32 @@ static struct omap_board_mux board_mux[] __initdata = {
830 /* NIRQ2 for twl6040 */ 830 /* NIRQ2 for twl6040 */
831 OMAP4_MUX(SYS_NIRQ2, OMAP_MUX_MODE0 | 831 OMAP4_MUX(SYS_NIRQ2, OMAP_MUX_MODE0 |
832 OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE), 832 OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE),
833 /* GPIO_127 for twl6040 */
834 OMAP4_MUX(HDQ_SIO, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
835 /* McPDM */
836 OMAP4_MUX(ABE_PDM_UL_DATA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
837 OMAP4_MUX(ABE_PDM_DL_DATA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
838 OMAP4_MUX(ABE_PDM_FRAME, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
839 OMAP4_MUX(ABE_PDM_LB_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
840 OMAP4_MUX(ABE_CLKS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
841 /* DMIC */
842 OMAP4_MUX(ABE_DMIC_CLK1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
843 OMAP4_MUX(ABE_DMIC_DIN1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
844 OMAP4_MUX(ABE_DMIC_DIN2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
845 OMAP4_MUX(ABE_DMIC_DIN3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
846 /* McBSP1 */
847 OMAP4_MUX(ABE_MCBSP1_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
848 OMAP4_MUX(ABE_MCBSP1_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
849 OMAP4_MUX(ABE_MCBSP1_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT |
850 OMAP_PULL_ENA),
851 OMAP4_MUX(ABE_MCBSP1_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
852 /* McBSP2 */
853 OMAP4_MUX(ABE_MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
854 OMAP4_MUX(ABE_MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
855 OMAP4_MUX(ABE_MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT |
856 OMAP_PULL_ENA),
857 OMAP4_MUX(ABE_MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
858
833 { .reg_offset = OMAP_MUX_TERMINATOR }, 859 { .reg_offset = OMAP_MUX_TERMINATOR },
834}; 860};
835 861
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index c3832ddb07f9..f62b903f3ea1 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -387,6 +387,21 @@ static struct omap_board_mux board_mux[] __initdata = {
387 /* NIRQ2 for twl6040 */ 387 /* NIRQ2 for twl6040 */
388 OMAP4_MUX(SYS_NIRQ2, OMAP_MUX_MODE0 | 388 OMAP4_MUX(SYS_NIRQ2, OMAP_MUX_MODE0 |
389 OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE), 389 OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE),
390 /* GPIO_127 for twl6040 */
391 OMAP4_MUX(HDQ_SIO, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
392 /* McPDM */
393 OMAP4_MUX(ABE_PDM_UL_DATA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
394 OMAP4_MUX(ABE_PDM_DL_DATA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
395 OMAP4_MUX(ABE_PDM_FRAME, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
396 OMAP4_MUX(ABE_PDM_LB_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
397 OMAP4_MUX(ABE_CLKS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
398 /* McBSP1 */
399 OMAP4_MUX(ABE_MCBSP1_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
400 OMAP4_MUX(ABE_MCBSP1_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
401 OMAP4_MUX(ABE_MCBSP1_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT |
402 OMAP_PULL_ENA),
403 OMAP4_MUX(ABE_MCBSP1_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
404
390 { .reg_offset = OMAP_MUX_TERMINATOR }, 405 { .reg_offset = OMAP_MUX_TERMINATOR },
391}; 406};
392 407