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authorMark Brown <broonie@opensource.wolfsonmicro.com>2011-12-12 11:19:20 -0500
committerMark Brown <broonie@opensource.wolfsonmicro.com>2011-12-12 11:19:20 -0500
commit68556ca1e03d6a35be3b315eba58df2f8176e3a0 (patch)
tree36a390d29a0d03a59a90c0f223b0d98a80f0f6c3 /arch/arm
parent0604ca48f1689ad06144b81f5c08f297b6edd831 (diff)
parent8ab30691826fc05efa47c4ffba19b80496bb3a2c (diff)
Merge branch 'mfd/wm8994' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/misc into for-3.3
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/Makefile2
-rw-r--r--arch/arm/boot/dts/tegra-ventana.dts3
-rw-r--r--arch/arm/include/asm/hardware/cache-l2x0.h2
-rw-r--r--arch/arm/include/asm/mach/arch.h1
-rw-r--r--arch/arm/include/asm/unistd.h2
-rw-r--r--arch/arm/kernel/calls.S2
-rw-r--r--arch/arm/kernel/head.S2
-rw-r--r--arch/arm/kernel/machine_kexec.c35
-rw-r--r--arch/arm/kernel/setup.c6
-rw-r--r--arch/arm/mach-at91/at91cap9_devices.c7
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c5
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c5
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c5
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c5
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c7
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c7
-rw-r--r--arch/arm/mach-at91/board-yl-9200.c2
-rw-r--r--arch/arm/mach-at91/include/mach/vmalloc.h2
-rw-r--r--arch/arm/mach-bcmring/core.c2
-rw-r--r--arch/arm/mach-bcmring/dma.c1
-rw-r--r--arch/arm/mach-imx/Makefile.boot34
-rw-r--r--arch/arm/mach-imx/clock-imx6q.c17
-rw-r--r--arch/arm/mach-msm/Makefile2
-rw-r--r--arch/arm/mach-msm/board-msm7x30.c4
-rw-r--r--arch/arm/mach-msm/board-msm8960.c4
-rw-r--r--arch/arm/mach-msm/board-msm8x60.c4
-rw-r--r--arch/arm/mach-msm/scm.c3
-rw-r--r--arch/arm/mach-mx5/clock-mx51-mx53.c6
-rw-r--r--arch/arm/mach-mxs/mach-mx28evk.c4
-rw-r--r--arch/arm/mach-picoxcell/include/mach/debug-macro.S2
-rw-r--r--arch/arm/mach-shmobile/Makefile2
-rw-r--r--arch/arm/mach-shmobile/board-ag5evm.c16
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c2
-rw-r--r--arch/arm/mach-shmobile/board-kota2.c7
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c8
-rw-r--r--arch/arm/mach-shmobile/cpuidle.c52
-rw-r--r--arch/arm/mach-shmobile/include/mach/common.h4
-rw-r--r--arch/arm/mach-shmobile/include/mach/sh73a0.h8
-rw-r--r--arch/arm/mach-shmobile/pfc-sh7367.c122
-rw-r--r--arch/arm/mach-shmobile/pfc-sh7372.c262
-rw-r--r--arch/arm/mach-shmobile/pfc-sh7377.c159
-rw-r--r--arch/arm/mach-shmobile/pfc-sh73a0.c193
-rw-r--r--arch/arm/mach-shmobile/pm-sh7372.c47
-rw-r--r--arch/arm/mach-shmobile/pm_runtime.c67
-rw-r--r--arch/arm/mach-tegra/board-dt.c13
-rw-r--r--arch/arm/mach-tegra/board-harmony-pinmux.c6
-rw-r--r--arch/arm/mach-tegra/board-paz00-pinmux.c6
-rw-r--r--arch/arm/mach-tegra/board-seaboard-pinmux.c6
-rw-r--r--arch/arm/mach-tegra/board-trimslice-pinmux.c5
-rw-r--r--arch/arm/mach-w90x900/dev.c4
-rw-r--r--arch/arm/mach-w90x900/include/mach/mfp.h3
-rw-r--r--arch/arm/mach-w90x900/include/mach/nuc900_spi.h2
-rw-r--r--arch/arm/mach-w90x900/mfp.c48
-rw-r--r--arch/arm/plat-mxc/Kconfig4
-rw-r--r--arch/arm/plat-mxc/avic.c1
-rw-r--r--arch/arm/plat-mxc/gic.c11
-rw-r--r--arch/arm/plat-mxc/include/mach/entry-macro.S3
-rw-r--r--arch/arm/plat-mxc/tzic.c1
58 files changed, 537 insertions, 708 deletions
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
index 176062ac7f07..5df26a9976a2 100644
--- a/arch/arm/boot/Makefile
+++ b/arch/arm/boot/Makefile
@@ -65,6 +65,8 @@ $(obj)/%.dtb: $(src)/dts/%.dts
65 65
66$(obj)/dtbs: $(addprefix $(obj)/, $(dtb-y)) 66$(obj)/dtbs: $(addprefix $(obj)/, $(dtb-y))
67 67
68clean-files := *.dtb
69
68quiet_cmd_uimage = UIMAGE $@ 70quiet_cmd_uimage = UIMAGE $@
69 cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A arm -O linux -T kernel \ 71 cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A arm -O linux -T kernel \
70 -C none -a $(LOADADDR) -e $(STARTADDR) \ 72 -C none -a $(LOADADDR) -e $(STARTADDR) \
diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts
index 9b29a623aaf1..3f9abd6b6964 100644
--- a/arch/arm/boot/dts/tegra-ventana.dts
+++ b/arch/arm/boot/dts/tegra-ventana.dts
@@ -22,11 +22,10 @@
22 sdhci@c8000400 { 22 sdhci@c8000400 {
23 cd-gpios = <&gpio 69 0>; /* gpio PI5 */ 23 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
24 wp-gpios = <&gpio 57 0>; /* gpio PH1 */ 24 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
25 power-gpios = <&gpio 155 0>; /* gpio PT3 */ 25 power-gpios = <&gpio 70 0>; /* gpio PI6 */
26 }; 26 };
27 27
28 sdhci@c8000600 { 28 sdhci@c8000600 {
29 power-gpios = <&gpio 70 0>; /* gpio PI6 */
30 support-8bit; 29 support-8bit;
31 }; 30 };
32}; 31};
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index 1db1143a9483..7df239bcdf27 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -20,6 +20,8 @@
20#ifndef __ASM_ARM_HARDWARE_L2X0_H 20#ifndef __ASM_ARM_HARDWARE_L2X0_H
21#define __ASM_ARM_HARDWARE_L2X0_H 21#define __ASM_ARM_HARDWARE_L2X0_H
22 22
23#include <linux/errno.h>
24
23#define L2X0_CACHE_ID 0x000 25#define L2X0_CACHE_ID 0x000
24#define L2X0_CACHE_TYPE 0x004 26#define L2X0_CACHE_TYPE 0x004
25#define L2X0_CTRL 0x100 27#define L2X0_CTRL 0x100
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 7d19425dd496..2b0efc3104ac 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -13,6 +13,7 @@
13struct tag; 13struct tag;
14struct meminfo; 14struct meminfo;
15struct sys_timer; 15struct sys_timer;
16struct pt_regs;
16 17
17struct machine_desc { 18struct machine_desc {
18 unsigned int nr; /* architecture number */ 19 unsigned int nr; /* architecture number */
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index c60a2944f95b..4a1123783806 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -402,6 +402,8 @@
402#define __NR_syncfs (__NR_SYSCALL_BASE+373) 402#define __NR_syncfs (__NR_SYSCALL_BASE+373)
403#define __NR_sendmmsg (__NR_SYSCALL_BASE+374) 403#define __NR_sendmmsg (__NR_SYSCALL_BASE+374)
404#define __NR_setns (__NR_SYSCALL_BASE+375) 404#define __NR_setns (__NR_SYSCALL_BASE+375)
405#define __NR_process_vm_readv (__NR_SYSCALL_BASE+376)
406#define __NR_process_vm_writev (__NR_SYSCALL_BASE+377)
405 407
406/* 408/*
407 * The following SWIs are ARM private. 409 * The following SWIs are ARM private.
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 9943e9e74a1b..463ff4a0ec8a 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -385,6 +385,8 @@
385 CALL(sys_syncfs) 385 CALL(sys_syncfs)
386 CALL(sys_sendmmsg) 386 CALL(sys_sendmmsg)
387/* 375 */ CALL(sys_setns) 387/* 375 */ CALL(sys_setns)
388 CALL(sys_process_vm_readv)
389 CALL(sys_process_vm_writev)
388#ifndef syscalls_counted 390#ifndef syscalls_counted
389.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls 391.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
390#define syscalls_counted 392#define syscalls_counted
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 566c54c2a1fe..08c82fd844a8 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -360,7 +360,7 @@ __secondary_data:
360 * r13 = *virtual* address to jump to upon completion 360 * r13 = *virtual* address to jump to upon completion
361 */ 361 */
362__enable_mmu: 362__enable_mmu:
363#ifdef CONFIG_ALIGNMENT_TRAP 363#if defined(CONFIG_ALIGNMENT_TRAP) && __LINUX_ARM_ARCH__ < 6
364 orr r0, r0, #CR_A 364 orr r0, r0, #CR_A
365#else 365#else
366 bic r0, r0, #CR_A 366 bic r0, r0, #CR_A
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index c1b4463dcc83..e59bbd496c39 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -32,24 +32,6 @@ static atomic_t waiting_for_crash_ipi;
32 32
33int machine_kexec_prepare(struct kimage *image) 33int machine_kexec_prepare(struct kimage *image)
34{ 34{
35 unsigned long page_list;
36 void *reboot_code_buffer;
37 page_list = image->head & PAGE_MASK;
38
39 reboot_code_buffer = page_address(image->control_code_page);
40
41 /* Prepare parameters for reboot_code_buffer*/
42 kexec_start_address = image->start;
43 kexec_indirection_page = page_list;
44 kexec_mach_type = machine_arch_type;
45 kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
46
47 /* copy our kernel relocation code to the control code page */
48 memcpy(reboot_code_buffer,
49 relocate_new_kernel, relocate_new_kernel_size);
50
51 flush_icache_range((unsigned long) reboot_code_buffer,
52 (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
53 return 0; 35 return 0;
54} 36}
55 37
@@ -100,14 +82,31 @@ void (*kexec_reinit)(void);
100 82
101void machine_kexec(struct kimage *image) 83void machine_kexec(struct kimage *image)
102{ 84{
85 unsigned long page_list;
103 unsigned long reboot_code_buffer_phys; 86 unsigned long reboot_code_buffer_phys;
104 void *reboot_code_buffer; 87 void *reboot_code_buffer;
105 88
89
90 page_list = image->head & PAGE_MASK;
91
106 /* we need both effective and real address here */ 92 /* we need both effective and real address here */
107 reboot_code_buffer_phys = 93 reboot_code_buffer_phys =
108 page_to_pfn(image->control_code_page) << PAGE_SHIFT; 94 page_to_pfn(image->control_code_page) << PAGE_SHIFT;
109 reboot_code_buffer = page_address(image->control_code_page); 95 reboot_code_buffer = page_address(image->control_code_page);
110 96
97 /* Prepare parameters for reboot_code_buffer*/
98 kexec_start_address = image->start;
99 kexec_indirection_page = page_list;
100 kexec_mach_type = machine_arch_type;
101 kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
102
103 /* copy our kernel relocation code to the control code page */
104 memcpy(reboot_code_buffer,
105 relocate_new_kernel, relocate_new_kernel_size);
106
107
108 flush_icache_range((unsigned long) reboot_code_buffer,
109 (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
111 printk(KERN_INFO "Bye!\n"); 110 printk(KERN_INFO "Bye!\n");
112 111
113 if (kexec_reinit) 112 if (kexec_reinit)
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 7e7977ab994f..3448a3f9cc8c 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -461,8 +461,10 @@ static void __init setup_processor(void)
461 cpu_name, read_cpuid_id(), read_cpuid_id() & 15, 461 cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
462 proc_arch[cpu_architecture()], cr_alignment); 462 proc_arch[cpu_architecture()], cr_alignment);
463 463
464 sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS); 464 snprintf(init_utsname()->machine, __NEW_UTS_LEN + 1, "%s%c",
465 sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS); 465 list->arch_name, ENDIANNESS);
466 snprintf(elf_platform, ELF_PLATFORM_SIZE, "%s%c",
467 list->elf_name, ENDIANNESS);
466 elf_hwcap = list->elf_hwcap; 468 elf_hwcap = list->elf_hwcap;
467#ifndef CONFIG_ARM_THUMB 469#ifndef CONFIG_ARM_THUMB
468 elf_hwcap &= ~HWCAP_THUMB; 470 elf_hwcap &= ~HWCAP_THUMB;
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index a4401d6b5b07..adad70db70eb 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -98,7 +98,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
98 * USB HS Device (Gadget) 98 * USB HS Device (Gadget)
99 * -------------------------------------------------------------------- */ 99 * -------------------------------------------------------------------- */
100 100
101#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE) 101#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
102 102
103static struct resource usba_udc_resources[] = { 103static struct resource usba_udc_resources[] = {
104 [0] = { 104 [0] = {
@@ -1021,8 +1021,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1021#if defined(CONFIG_SERIAL_ATMEL) 1021#if defined(CONFIG_SERIAL_ATMEL)
1022static struct resource dbgu_resources[] = { 1022static struct resource dbgu_resources[] = {
1023 [0] = { 1023 [0] = {
1024 .start = AT91_VA_BASE_SYS + AT91_DBGU, 1024 .start = AT91_BASE_SYS + AT91_DBGU,
1025 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1025 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
1026 .flags = IORESOURCE_MEM, 1026 .flags = IORESOURCE_MEM,
1027 }, 1027 },
1028 [1] = { 1028 [1] = {
@@ -1035,7 +1035,6 @@ static struct resource dbgu_resources[] = {
1035static struct atmel_uart_data dbgu_data = { 1035static struct atmel_uart_data dbgu_data = {
1036 .use_dma_tx = 0, 1036 .use_dma_tx = 0,
1037 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 1037 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
1038 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
1039}; 1038};
1040 1039
1041static u64 dbgu_dmamask = DMA_BIT_MASK(32); 1040static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 01d8bbd1468b..66591fa53e05 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -877,8 +877,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
877#if defined(CONFIG_SERIAL_ATMEL) 877#if defined(CONFIG_SERIAL_ATMEL)
878static struct resource dbgu_resources[] = { 878static struct resource dbgu_resources[] = {
879 [0] = { 879 [0] = {
880 .start = AT91_VA_BASE_SYS + AT91_DBGU, 880 .start = AT91_BASE_SYS + AT91_DBGU,
881 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 881 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
882 .flags = IORESOURCE_MEM, 882 .flags = IORESOURCE_MEM,
883 }, 883 },
884 [1] = { 884 [1] = {
@@ -891,7 +891,6 @@ static struct resource dbgu_resources[] = {
891static struct atmel_uart_data dbgu_data = { 891static struct atmel_uart_data dbgu_data = {
892 .use_dma_tx = 0, 892 .use_dma_tx = 0,
893 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 893 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
894 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
895}; 894};
896 895
897static u64 dbgu_dmamask = DMA_BIT_MASK(32); 896static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 24b6f8c0440d..25e3464fb07f 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -837,8 +837,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
837#if defined(CONFIG_SERIAL_ATMEL) 837#if defined(CONFIG_SERIAL_ATMEL)
838static struct resource dbgu_resources[] = { 838static struct resource dbgu_resources[] = {
839 [0] = { 839 [0] = {
840 .start = AT91_VA_BASE_SYS + AT91_DBGU, 840 .start = AT91_BASE_SYS + AT91_DBGU,
841 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 841 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
842 .flags = IORESOURCE_MEM, 842 .flags = IORESOURCE_MEM,
843 }, 843 },
844 [1] = { 844 [1] = {
@@ -851,7 +851,6 @@ static struct resource dbgu_resources[] = {
851static struct atmel_uart_data dbgu_data = { 851static struct atmel_uart_data dbgu_data = {
852 .use_dma_tx = 0, 852 .use_dma_tx = 0,
853 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 853 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
854 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
855}; 854};
856 855
857static u64 dbgu_dmamask = DMA_BIT_MASK(32); 856static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 3b70b3897d95..ae78f4d03b73 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -816,8 +816,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
816#if defined(CONFIG_SERIAL_ATMEL) 816#if defined(CONFIG_SERIAL_ATMEL)
817static struct resource dbgu_resources[] = { 817static struct resource dbgu_resources[] = {
818 [0] = { 818 [0] = {
819 .start = AT91_VA_BASE_SYS + AT91_DBGU, 819 .start = AT91_BASE_SYS + AT91_DBGU,
820 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 820 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
821 .flags = IORESOURCE_MEM, 821 .flags = IORESOURCE_MEM,
822 }, 822 },
823 [1] = { 823 [1] = {
@@ -830,7 +830,6 @@ static struct resource dbgu_resources[] = {
830static struct atmel_uart_data dbgu_data = { 830static struct atmel_uart_data dbgu_data = {
831 .use_dma_tx = 0, 831 .use_dma_tx = 0,
832 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 832 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
833 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
834}; 833};
835 834
836static u64 dbgu_dmamask = DMA_BIT_MASK(32); 835static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 3faa1fde9ad9..ad017eb1f8df 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -1196,8 +1196,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1196 1196
1197static struct resource dbgu_resources[] = { 1197static struct resource dbgu_resources[] = {
1198 [0] = { 1198 [0] = {
1199 .start = AT91_VA_BASE_SYS + AT91_DBGU, 1199 .start = AT91_BASE_SYS + AT91_DBGU,
1200 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1200 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
1201 .flags = IORESOURCE_MEM, 1201 .flags = IORESOURCE_MEM,
1202 }, 1202 },
1203 [1] = { 1203 [1] = {
@@ -1210,7 +1210,6 @@ static struct resource dbgu_resources[] = {
1210static struct atmel_uart_data dbgu_data = { 1210static struct atmel_uart_data dbgu_data = {
1211 .use_dma_tx = 0, 1211 .use_dma_tx = 0,
1212 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 1212 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
1213 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
1214}; 1213};
1215 1214
1216static u64 dbgu_dmamask = DMA_BIT_MASK(32); 1215static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 000b5e1da965..09a16d6bd5cd 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -197,7 +197,7 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) {}
197 * USB HS Device (Gadget) 197 * USB HS Device (Gadget)
198 * -------------------------------------------------------------------- */ 198 * -------------------------------------------------------------------- */
199 199
200#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE) 200#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
201static struct resource usba_udc_resources[] = { 201static struct resource usba_udc_resources[] = {
202 [0] = { 202 [0] = {
203 .start = AT91SAM9G45_UDPHS_FIFO, 203 .start = AT91SAM9G45_UDPHS_FIFO,
@@ -1332,8 +1332,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1332#if defined(CONFIG_SERIAL_ATMEL) 1332#if defined(CONFIG_SERIAL_ATMEL)
1333static struct resource dbgu_resources[] = { 1333static struct resource dbgu_resources[] = {
1334 [0] = { 1334 [0] = {
1335 .start = AT91_VA_BASE_SYS + AT91_DBGU, 1335 .start = AT91_BASE_SYS + AT91_DBGU,
1336 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1336 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
1337 .flags = IORESOURCE_MEM, 1337 .flags = IORESOURCE_MEM,
1338 }, 1338 },
1339 [1] = { 1339 [1] = {
@@ -1346,7 +1346,6 @@ static struct resource dbgu_resources[] = {
1346static struct atmel_uart_data dbgu_data = { 1346static struct atmel_uart_data dbgu_data = {
1347 .use_dma_tx = 0, 1347 .use_dma_tx = 0,
1348 .use_dma_rx = 0, 1348 .use_dma_rx = 0,
1349 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
1350}; 1349};
1351 1350
1352static u64 dbgu_dmamask = DMA_BIT_MASK(32); 1351static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 305a851b5bff..628eb566d60c 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -75,7 +75,7 @@ void __init at91_add_device_hdmac(void) {}
75 * USB HS Device (Gadget) 75 * USB HS Device (Gadget)
76 * -------------------------------------------------------------------- */ 76 * -------------------------------------------------------------------- */
77 77
78#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE) 78#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
79 79
80static struct resource usba_udc_resources[] = { 80static struct resource usba_udc_resources[] = {
81 [0] = { 81 [0] = {
@@ -908,8 +908,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
908#if defined(CONFIG_SERIAL_ATMEL) 908#if defined(CONFIG_SERIAL_ATMEL)
909static struct resource dbgu_resources[] = { 909static struct resource dbgu_resources[] = {
910 [0] = { 910 [0] = {
911 .start = AT91_VA_BASE_SYS + AT91_DBGU, 911 .start = AT91_BASE_SYS + AT91_DBGU,
912 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 912 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
913 .flags = IORESOURCE_MEM, 913 .flags = IORESOURCE_MEM,
914 }, 914 },
915 [1] = { 915 [1] = {
@@ -922,7 +922,6 @@ static struct resource dbgu_resources[] = {
922static struct atmel_uart_data dbgu_data = { 922static struct atmel_uart_data dbgu_data = {
923 .use_dma_tx = 0, 923 .use_dma_tx = 0,
924 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 924 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
925 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
926}; 925};
927 926
928static u64 dbgu_dmamask = DMA_BIT_MASK(32); 927static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index 649b052231f5..12a3f955162b 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -384,7 +384,7 @@ static struct spi_board_info yl9200_spi_devices[] = {
384#include <video/s1d13xxxfb.h> 384#include <video/s1d13xxxfb.h>
385 385
386 386
387static void __init yl9200_init_video(void) 387static void yl9200_init_video(void)
388{ 388{
389 /* NWAIT Signal */ 389 /* NWAIT Signal */
390 at91_set_A_periph(AT91_PIN_PC6, 0); 390 at91_set_A_periph(AT91_PIN_PC6, 0);
diff --git a/arch/arm/mach-at91/include/mach/vmalloc.h b/arch/arm/mach-at91/include/mach/vmalloc.h
index 8eb459f3f5b7..8e4a1bd0ab1d 100644
--- a/arch/arm/mach-at91/include/mach/vmalloc.h
+++ b/arch/arm/mach-at91/include/mach/vmalloc.h
@@ -21,6 +21,8 @@
21#ifndef __ASM_ARCH_VMALLOC_H 21#ifndef __ASM_ARCH_VMALLOC_H
22#define __ASM_ARCH_VMALLOC_H 22#define __ASM_ARCH_VMALLOC_H
23 23
24#include <mach/hardware.h>
25
24#define VMALLOC_END (AT91_VIRT_BASE & PGDIR_MASK) 26#define VMALLOC_END (AT91_VIRT_BASE & PGDIR_MASK)
25 27
26#endif 28#endif
diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c
index 43eadbcc29ed..430da120a297 100644
--- a/arch/arm/mach-bcmring/core.c
+++ b/arch/arm/mach-bcmring/core.c
@@ -235,7 +235,7 @@ void __init bcmring_init_timer(void)
235 */ 235 */
236 bcmring_clocksource_init(); 236 bcmring_clocksource_init();
237 237
238 sp804_clockevents_register(TIMER0_VA_BASE, IRQ_TIMER0, "timer0"); 238 sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMER0, "timer0");
239} 239}
240 240
241struct sys_timer bcmring_timer = { 241struct sys_timer bcmring_timer = {
diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c
index b52b8de91bde..f4d4d6d174d0 100644
--- a/arch/arm/mach-bcmring/dma.c
+++ b/arch/arm/mach-bcmring/dma.c
@@ -36,6 +36,7 @@
36#include <linux/mm.h> 36#include <linux/mm.h>
37#include <linux/pfn.h> 37#include <linux/pfn.h>
38#include <linux/atomic.h> 38#include <linux/atomic.h>
39#include <linux/sched.h>
39#include <mach/dma.h> 40#include <mach/dma.h>
40 41
41/* I don't quite understand why dc4 fails when this is set to 1 and DMA is enabled */ 42/* I don't quite understand why dc4 fails when this is set to 1 and DMA is enabled */
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
index 22d85889f622..cfede5768aa0 100644
--- a/arch/arm/mach-imx/Makefile.boot
+++ b/arch/arm/mach-imx/Makefile.boot
@@ -1,22 +1,26 @@
1zreladdr-$(CONFIG_ARCH_MX1) += 0x08008000 1zreladdr-$(CONFIG_SOC_IMX1) += 0x08008000
2params_phys-$(CONFIG_ARCH_MX1) := 0x08000100 2params_phys-$(CONFIG_SOC_IMX1) := 0x08000100
3initrd_phys-$(CONFIG_ARCH_MX1) := 0x08800000 3initrd_phys-$(CONFIG_SOC_IMX1) := 0x08800000
4 4
5zreladdr-$(CONFIG_MACH_MX21) += 0xC0008000 5zreladdr-$(CONFIG_SOC_IMX21) += 0xC0008000
6params_phys-$(CONFIG_MACH_MX21) := 0xC0000100 6params_phys-$(CONFIG_SOC_IMX21) := 0xC0000100
7initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000 7initrd_phys-$(CONFIG_SOC_IMX21) := 0xC0800000
8 8
9zreladdr-$(CONFIG_ARCH_MX25) += 0x80008000 9zreladdr-$(CONFIG_SOC_IMX25) += 0x80008000
10params_phys-$(CONFIG_ARCH_MX25) := 0x80000100 10params_phys-$(CONFIG_SOC_IMX25) := 0x80000100
11initrd_phys-$(CONFIG_ARCH_MX25) := 0x80800000 11initrd_phys-$(CONFIG_SOC_IMX25) := 0x80800000
12 12
13zreladdr-$(CONFIG_MACH_MX27) += 0xA0008000 13zreladdr-$(CONFIG_SOC_IMX27) += 0xA0008000
14params_phys-$(CONFIG_MACH_MX27) := 0xA0000100 14params_phys-$(CONFIG_SOC_IMX27) := 0xA0000100
15initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000 15initrd_phys-$(CONFIG_SOC_IMX27) := 0xA0800000
16 16
17zreladdr-$(CONFIG_ARCH_MX3) += 0x80008000 17zreladdr-$(CONFIG_SOC_IMX31) += 0x80008000
18params_phys-$(CONFIG_ARCH_MX3) := 0x80000100 18params_phys-$(CONFIG_SOC_IMX31) := 0x80000100
19initrd_phys-$(CONFIG_ARCH_MX3) := 0x80800000 19initrd_phys-$(CONFIG_SOC_IMX31) := 0x80800000
20
21zreladdr-$(CONFIG_SOC_IMX35) += 0x80008000
22params_phys-$(CONFIG_SOC_IMX35) := 0x80000100
23initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000
20 24
21zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000 25zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000
22params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100 26params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c
index e0b926dfeced..613a1b993bff 100644
--- a/arch/arm/mach-imx/clock-imx6q.c
+++ b/arch/arm/mach-imx/clock-imx6q.c
@@ -1139,7 +1139,7 @@ static int _clk_set_rate(struct clk *clk, unsigned long rate)
1139 return -EINVAL; 1139 return -EINVAL;
1140 1140
1141 max_div = ((d->bm_pred >> d->bp_pred) + 1) * 1141 max_div = ((d->bm_pred >> d->bp_pred) + 1) *
1142 ((d->bm_pred >> d->bp_pred) + 1); 1142 ((d->bm_podf >> d->bp_podf) + 1);
1143 1143
1144 div = parent_rate / rate; 1144 div = parent_rate / rate;
1145 if (div == 0) 1145 if (div == 0)
@@ -2002,6 +2002,21 @@ int __init mx6q_clocks_init(void)
2002 clk_set_rate(&asrc_serial_clk, 1500000); 2002 clk_set_rate(&asrc_serial_clk, 1500000);
2003 clk_set_rate(&enfc_clk, 11000000); 2003 clk_set_rate(&enfc_clk, 11000000);
2004 2004
2005 /*
2006 * Before pinctrl API is available, we have to rely on the pad
2007 * configuration set up by bootloader. For usdhc example here,
2008 * u-boot sets up the pads for 49.5 MHz case, and we have to lower
2009 * the usdhc clock from 198 to 49.5 MHz to match the pad configuration.
2010 *
2011 * FIXME: This is should be removed after pinctrl API is available.
2012 * At that time, usdhc driver can call pinctrl API to change pad
2013 * configuration dynamically per different usdhc clock settings.
2014 */
2015 clk_set_rate(&usdhc1_clk, 49500000);
2016 clk_set_rate(&usdhc2_clk, 49500000);
2017 clk_set_rate(&usdhc3_clk, 49500000);
2018 clk_set_rate(&usdhc4_clk, 49500000);
2019
2005 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt"); 2020 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
2006 base = of_iomap(np, 0); 2021 base = of_iomap(np, 0);
2007 WARN_ON(!base); 2022 WARN_ON(!base);
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 4285dfd80b6f..4ad3969b9881 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -15,6 +15,8 @@ obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o
15obj-$(CONFIG_MSM_SMD) += last_radio_log.o 15obj-$(CONFIG_MSM_SMD) += last_radio_log.o
16obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o 16obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o
17 17
18CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1)
19
18obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 20obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
19obj-$(CONFIG_SMP) += headsmp.o platsmp.o 21obj-$(CONFIG_SMP) += headsmp.o platsmp.o
20 22
diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c
index 71de5062c71e..db81ed531031 100644
--- a/arch/arm/mach-msm/board-msm7x30.c
+++ b/arch/arm/mach-msm/board-msm7x30.c
@@ -42,8 +42,8 @@
42 42
43extern struct sys_timer msm_timer; 43extern struct sys_timer msm_timer;
44 44
45static void __init msm7x30_fixup(struct machine_desc *desc, struct tag *tag, 45static void __init msm7x30_fixup(struct tag *tag, char **cmdline,
46 char **cmdline, struct meminfo *mi) 46 struct meminfo *mi)
47{ 47{
48 for (; tag->hdr.size; tag = tag_next(tag)) 48 for (; tag->hdr.size; tag = tag_next(tag))
49 if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) { 49 if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) {
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index b04468e7d00e..6dc1cbd2a595 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -32,8 +32,8 @@
32 32
33#include "devices.h" 33#include "devices.h"
34 34
35static void __init msm8960_fixup(struct machine_desc *desc, struct tag *tag, 35static void __init msm8960_fixup(struct tag *tag, char **cmdline,
36 char **cmdline, struct meminfo *mi) 36 struct meminfo *mi)
37{ 37{
38 for (; tag->hdr.size; tag = tag_next(tag)) 38 for (; tag->hdr.size; tag = tag_next(tag))
39 if (tag->hdr.tag == ATAG_MEM && 39 if (tag->hdr.tag == ATAG_MEM &&
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index cf38e2284fa9..44bf71688373 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -28,8 +28,8 @@
28#include <mach/board.h> 28#include <mach/board.h>
29#include <mach/msm_iomap.h> 29#include <mach/msm_iomap.h>
30 30
31static void __init msm8x60_fixup(struct machine_desc *desc, struct tag *tag, 31static void __init msm8x60_fixup(struct tag *tag, char **cmdline,
32 char **cmdline, struct meminfo *mi) 32 struct meminfo *mi)
33{ 33{
34 for (; tag->hdr.size; tag = tag_next(tag)) 34 for (; tag->hdr.size; tag = tag_next(tag))
35 if (tag->hdr.tag == ATAG_MEM && 35 if (tag->hdr.tag == ATAG_MEM &&
diff --git a/arch/arm/mach-msm/scm.c b/arch/arm/mach-msm/scm.c
index 232f97a04504..bafabb502580 100644
--- a/arch/arm/mach-msm/scm.c
+++ b/arch/arm/mach-msm/scm.c
@@ -180,6 +180,9 @@ static u32 smc(u32 cmd_addr)
180 __asmeq("%1", "r0") 180 __asmeq("%1", "r0")
181 __asmeq("%2", "r1") 181 __asmeq("%2", "r1")
182 __asmeq("%3", "r2") 182 __asmeq("%3", "r2")
183#ifdef REQUIRES_SEC
184 ".arch_extension sec\n"
185#endif
183 "smc #0 @ switch to secure world\n" 186 "smc #0 @ switch to secure world\n"
184 : "=r" (r0) 187 : "=r" (r0)
185 : "r" (r0), "r" (r1), "r" (r2) 188 : "r" (r0), "r" (r1), "r" (r2)
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index 2aacf41c48e7..4cb276977190 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -1281,9 +1281,9 @@ DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET,
1281 NULL, NULL, &ipg_clk, &gpt_ipg_clk); 1281 NULL, NULL, &ipg_clk, &gpt_ipg_clk);
1282 1282
1283DEFINE_CLOCK(pwm1_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG6_OFFSET, 1283DEFINE_CLOCK(pwm1_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG6_OFFSET,
1284 NULL, NULL, &ipg_clk, NULL); 1284 NULL, NULL, &ipg_perclk, NULL);
1285DEFINE_CLOCK(pwm2_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG8_OFFSET, 1285DEFINE_CLOCK(pwm2_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG8_OFFSET,
1286 NULL, NULL, &ipg_clk, NULL); 1286 NULL, NULL, &ipg_perclk, NULL);
1287 1287
1288/* I2C */ 1288/* I2C */
1289DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET, 1289DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET,
@@ -1634,6 +1634,7 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
1634 return 0; 1634 return 0;
1635} 1635}
1636 1636
1637#ifdef CONFIG_OF
1637static void __init clk_get_freq_dt(unsigned long *ckil, unsigned long *osc, 1638static void __init clk_get_freq_dt(unsigned long *ckil, unsigned long *osc,
1638 unsigned long *ckih1, unsigned long *ckih2) 1639 unsigned long *ckih1, unsigned long *ckih2)
1639{ 1640{
@@ -1671,3 +1672,4 @@ int __init mx53_clocks_init_dt(void)
1671 clk_get_freq_dt(&ckil, &osc, &ckih1, &ckih2); 1672 clk_get_freq_dt(&ckil, &osc, &ckih1, &ckih2);
1672 return mx53_clocks_init(ckil, osc, ckih1, ckih2); 1673 return mx53_clocks_init(ckil, osc, ckih1, ckih2);
1673} 1674}
1675#endif
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
index ac2316d53d3c..064ec5abaa55 100644
--- a/arch/arm/mach-mxs/mach-mx28evk.c
+++ b/arch/arm/mach-mxs/mach-mx28evk.c
@@ -471,7 +471,8 @@ static void __init mx28evk_init(void)
471 "mmc0-slot-power"); 471 "mmc0-slot-power");
472 if (ret) 472 if (ret)
473 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret); 473 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);
474 mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]); 474 else
475 mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
475 476
476 ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW, 477 ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW,
477 "mmc1-slot-power"); 478 "mmc1-slot-power");
@@ -480,7 +481,6 @@ static void __init mx28evk_init(void)
480 else 481 else
481 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); 482 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
482 483
483 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
484 mx28_add_rtc_stmp3xxx(); 484 mx28_add_rtc_stmp3xxx();
485 485
486 gpio_led_register_device(0, &mx28evk_led_data); 486 gpio_led_register_device(0, &mx28evk_led_data);
diff --git a/arch/arm/mach-picoxcell/include/mach/debug-macro.S b/arch/arm/mach-picoxcell/include/mach/debug-macro.S
index 8f2c234ed9d9..58d4ee3ae949 100644
--- a/arch/arm/mach-picoxcell/include/mach/debug-macro.S
+++ b/arch/arm/mach-picoxcell/include/mach/debug-macro.S
@@ -14,7 +14,7 @@
14 14
15#define UART_SHIFT 2 15#define UART_SHIFT 2
16 16
17 .macro addruart, rp, rv 17 .macro addruart, rp, rv, tmp
18 ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE) 18 ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE)
19 ldr \rp, =PICOXCELL_UART1_BASE 19 ldr \rp, =PICOXCELL_UART1_BASE
20 .endm 20 .endm
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 2aec2f732515..737bdc631b0d 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5# Common objects 5# Common objects
6obj-y := timer.o console.o clock.o pm_runtime.o 6obj-y := timer.o console.o clock.o
7 7
8# CPU objects 8# CPU objects
9obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o 9obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index 83624e26b884..b862e9f81e3e 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -515,14 +515,14 @@ static void __init ag5evm_init(void)
515 /* enable MMCIF */ 515 /* enable MMCIF */
516 gpio_request(GPIO_FN_MMCCLK0, NULL); 516 gpio_request(GPIO_FN_MMCCLK0, NULL);
517 gpio_request(GPIO_FN_MMCCMD0_PU, NULL); 517 gpio_request(GPIO_FN_MMCCMD0_PU, NULL);
518 gpio_request(GPIO_FN_MMCD0_0, NULL); 518 gpio_request(GPIO_FN_MMCD0_0_PU, NULL);
519 gpio_request(GPIO_FN_MMCD0_1, NULL); 519 gpio_request(GPIO_FN_MMCD0_1_PU, NULL);
520 gpio_request(GPIO_FN_MMCD0_2, NULL); 520 gpio_request(GPIO_FN_MMCD0_2_PU, NULL);
521 gpio_request(GPIO_FN_MMCD0_3, NULL); 521 gpio_request(GPIO_FN_MMCD0_3_PU, NULL);
522 gpio_request(GPIO_FN_MMCD0_4, NULL); 522 gpio_request(GPIO_FN_MMCD0_4_PU, NULL);
523 gpio_request(GPIO_FN_MMCD0_5, NULL); 523 gpio_request(GPIO_FN_MMCD0_5_PU, NULL);
524 gpio_request(GPIO_FN_MMCD0_6, NULL); 524 gpio_request(GPIO_FN_MMCD0_6_PU, NULL);
525 gpio_request(GPIO_FN_MMCD0_7, NULL); 525 gpio_request(GPIO_FN_MMCD0_7_PU, NULL);
526 gpio_request(GPIO_PORT208, NULL); /* Reset */ 526 gpio_request(GPIO_PORT208, NULL); /* Reset */
527 gpio_direction_output(GPIO_PORT208, 1); 527 gpio_direction_output(GPIO_PORT208, 1);
528 528
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index ade98c2d9e81..bb08d2d25dcf 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -201,7 +201,7 @@ static struct physmap_flash_data nor_flash_data = {
201static struct resource nor_flash_resources[] = { 201static struct resource nor_flash_resources[] = {
202 [0] = { 202 [0] = {
203 .start = 0x20000000, /* CS0 shadow instead of regular CS0 */ 203 .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
204 .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */ 204 .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
205 .flags = IORESOURCE_MEM, 205 .flags = IORESOURCE_MEM,
206 } 206 }
207}; 207};
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index adc73122bf20..bd9a78424d6b 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -48,6 +48,7 @@
48#include <asm/hardware/cache-l2x0.h> 48#include <asm/hardware/cache-l2x0.h>
49#include <asm/traps.h> 49#include <asm/traps.h>
50 50
51/* SMSC 9220 */
51static struct resource smsc9220_resources[] = { 52static struct resource smsc9220_resources[] = {
52 [0] = { 53 [0] = {
53 .start = 0x14000000, /* CS5A */ 54 .start = 0x14000000, /* CS5A */
@@ -77,6 +78,7 @@ static struct platform_device eth_device = {
77 .num_resources = ARRAY_SIZE(smsc9220_resources), 78 .num_resources = ARRAY_SIZE(smsc9220_resources),
78}; 79};
79 80
81/* KEYSC */
80static struct sh_keysc_info keysc_platdata = { 82static struct sh_keysc_info keysc_platdata = {
81 .mode = SH_KEYSC_MODE_6, 83 .mode = SH_KEYSC_MODE_6,
82 .scan_timing = 3, 84 .scan_timing = 3,
@@ -120,6 +122,7 @@ static struct platform_device keysc_device = {
120 }, 122 },
121}; 123};
122 124
125/* GPIO KEY */
123#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 } 126#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }
124 127
125static struct gpio_keys_button gpio_buttons[] = { 128static struct gpio_keys_button gpio_buttons[] = {
@@ -150,6 +153,7 @@ static struct platform_device gpio_keys_device = {
150 }, 153 },
151}; 154};
152 155
156/* GPIO LED */
153#define GPIO_LED(n, g) { .name = n, .gpio = g } 157#define GPIO_LED(n, g) { .name = n, .gpio = g }
154 158
155static struct gpio_led gpio_leds[] = { 159static struct gpio_led gpio_leds[] = {
@@ -175,6 +179,7 @@ static struct platform_device gpio_leds_device = {
175 }, 179 },
176}; 180};
177 181
182/* MMCIF */
178static struct resource mmcif_resources[] = { 183static struct resource mmcif_resources[] = {
179 [0] = { 184 [0] = {
180 .name = "MMCIF", 185 .name = "MMCIF",
@@ -207,6 +212,7 @@ static struct platform_device mmcif_device = {
207 .resource = mmcif_resources, 212 .resource = mmcif_resources,
208}; 213};
209 214
215/* SDHI0 */
210static struct sh_mobile_sdhi_info sdhi0_info = { 216static struct sh_mobile_sdhi_info sdhi0_info = {
211 .tmio_caps = MMC_CAP_SD_HIGHSPEED, 217 .tmio_caps = MMC_CAP_SD_HIGHSPEED,
212 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT, 218 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
@@ -243,6 +249,7 @@ static struct platform_device sdhi0_device = {
243 }, 249 },
244}; 250};
245 251
252/* SDHI1 */
246static struct sh_mobile_sdhi_info sdhi1_info = { 253static struct sh_mobile_sdhi_info sdhi1_info = {
247 .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ, 254 .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ,
248 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT, 255 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 66975921e646..995a9c3aec8f 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -476,7 +476,7 @@ static struct clk_ops fsidiv_clk_ops = {
476 .disable = fsidiv_disable, 476 .disable = fsidiv_disable,
477}; 477};
478 478
479static struct clk_mapping sh7372_fsidiva_clk_mapping = { 479static struct clk_mapping fsidiva_clk_mapping = {
480 .phys = FSIDIVA, 480 .phys = FSIDIVA,
481 .len = 8, 481 .len = 8,
482}; 482};
@@ -484,10 +484,10 @@ static struct clk_mapping sh7372_fsidiva_clk_mapping = {
484struct clk sh7372_fsidiva_clk = { 484struct clk sh7372_fsidiva_clk = {
485 .ops = &fsidiv_clk_ops, 485 .ops = &fsidiv_clk_ops,
486 .parent = &div6_reparent_clks[DIV6_FSIA], /* late install */ 486 .parent = &div6_reparent_clks[DIV6_FSIA], /* late install */
487 .mapping = &sh7372_fsidiva_clk_mapping, 487 .mapping = &fsidiva_clk_mapping,
488}; 488};
489 489
490static struct clk_mapping sh7372_fsidivb_clk_mapping = { 490static struct clk_mapping fsidivb_clk_mapping = {
491 .phys = FSIDIVB, 491 .phys = FSIDIVB,
492 .len = 8, 492 .len = 8,
493}; 493};
@@ -495,7 +495,7 @@ static struct clk_mapping sh7372_fsidivb_clk_mapping = {
495struct clk sh7372_fsidivb_clk = { 495struct clk sh7372_fsidivb_clk = {
496 .ops = &fsidiv_clk_ops, 496 .ops = &fsidiv_clk_ops,
497 .parent = &div6_reparent_clks[DIV6_FSIB], /* late install */ 497 .parent = &div6_reparent_clks[DIV6_FSIB], /* late install */
498 .mapping = &sh7372_fsidivb_clk_mapping, 498 .mapping = &fsidivb_clk_mapping,
499}; 499};
500 500
501static struct clk *late_main_clks[] = { 501static struct clk *late_main_clks[] = {
diff --git a/arch/arm/mach-shmobile/cpuidle.c b/arch/arm/mach-shmobile/cpuidle.c
index 2e44f11f592e..1b2334277e85 100644
--- a/arch/arm/mach-shmobile/cpuidle.c
+++ b/arch/arm/mach-shmobile/cpuidle.c
@@ -26,65 +26,59 @@ void (*shmobile_cpuidle_modes[CPUIDLE_STATE_MAX])(void) = {
26}; 26};
27 27
28static int shmobile_cpuidle_enter(struct cpuidle_device *dev, 28static int shmobile_cpuidle_enter(struct cpuidle_device *dev,
29 struct cpuidle_state *state) 29 struct cpuidle_driver *drv,
30 int index)
30{ 31{
31 ktime_t before, after; 32 ktime_t before, after;
32 int requested_state = state - &dev->states[0];
33 33
34 dev->last_state = &dev->states[requested_state];
35 before = ktime_get(); 34 before = ktime_get();
36 35
37 local_irq_disable(); 36 local_irq_disable();
38 local_fiq_disable(); 37 local_fiq_disable();
39 38
40 shmobile_cpuidle_modes[requested_state](); 39 shmobile_cpuidle_modes[index]();
41 40
42 local_irq_enable(); 41 local_irq_enable();
43 local_fiq_enable(); 42 local_fiq_enable();
44 43
45 after = ktime_get(); 44 after = ktime_get();
46 return ktime_to_ns(ktime_sub(after, before)) >> 10; 45 dev->last_residency = ktime_to_ns(ktime_sub(after, before)) >> 10;
46
47 return index;
47} 48}
48 49
49static struct cpuidle_device shmobile_cpuidle_dev; 50static struct cpuidle_device shmobile_cpuidle_dev;
50static struct cpuidle_driver shmobile_cpuidle_driver = { 51static struct cpuidle_driver shmobile_cpuidle_driver = {
51 .name = "shmobile_cpuidle", 52 .name = "shmobile_cpuidle",
52 .owner = THIS_MODULE, 53 .owner = THIS_MODULE,
54 .states[0] = {
55 .name = "C1",
56 .desc = "WFI",
57 .exit_latency = 1,
58 .target_residency = 1 * 2,
59 .flags = CPUIDLE_FLAG_TIME_VALID,
60 },
61 .safe_state_index = 0, /* C1 */
62 .state_count = 1,
53}; 63};
54 64
55void (*shmobile_cpuidle_setup)(struct cpuidle_device *dev); 65void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv);
56 66
57static int shmobile_cpuidle_init(void) 67static int shmobile_cpuidle_init(void)
58{ 68{
59 struct cpuidle_device *dev = &shmobile_cpuidle_dev; 69 struct cpuidle_device *dev = &shmobile_cpuidle_dev;
60 struct cpuidle_state *state; 70 struct cpuidle_driver *drv = &shmobile_cpuidle_driver;
61 int i; 71 int i;
62 72
63 cpuidle_register_driver(&shmobile_cpuidle_driver); 73 for (i = 0; i < CPUIDLE_STATE_MAX; i++)
64 74 drv->states[i].enter = shmobile_cpuidle_enter;
65 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
66 dev->states[i].name[0] = '\0';
67 dev->states[i].desc[0] = '\0';
68 dev->states[i].enter = shmobile_cpuidle_enter;
69 }
70
71 i = CPUIDLE_DRIVER_STATE_START;
72
73 state = &dev->states[i++];
74 snprintf(state->name, CPUIDLE_NAME_LEN, "C1");
75 strncpy(state->desc, "WFI", CPUIDLE_DESC_LEN);
76 state->exit_latency = 1;
77 state->target_residency = 1 * 2;
78 state->power_usage = 3;
79 state->flags = 0;
80 state->flags |= CPUIDLE_FLAG_TIME_VALID;
81
82 dev->safe_state = state;
83 dev->state_count = i;
84 75
85 if (shmobile_cpuidle_setup) 76 if (shmobile_cpuidle_setup)
86 shmobile_cpuidle_setup(dev); 77 shmobile_cpuidle_setup(drv);
78
79 cpuidle_register_driver(drv);
87 80
81 dev->state_count = drv->state_count;
88 cpuidle_register_device(dev); 82 cpuidle_register_device(dev);
89 83
90 return 0; 84 return 0;
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index c0cdbf997c91..834bd6cd508f 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -9,9 +9,9 @@ extern int clk_init(void);
9extern void shmobile_handle_irq_intc(struct pt_regs *); 9extern void shmobile_handle_irq_intc(struct pt_regs *);
10extern void shmobile_handle_irq_gic(struct pt_regs *); 10extern void shmobile_handle_irq_gic(struct pt_regs *);
11extern struct platform_suspend_ops shmobile_suspend_ops; 11extern struct platform_suspend_ops shmobile_suspend_ops;
12struct cpuidle_device; 12struct cpuidle_driver;
13extern void (*shmobile_cpuidle_modes[])(void); 13extern void (*shmobile_cpuidle_modes[])(void);
14extern void (*shmobile_cpuidle_setup)(struct cpuidle_device *dev); 14extern void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv);
15 15
16extern void sh7367_init_irq(void); 16extern void sh7367_init_irq(void);
17extern void sh7367_add_early_devices(void); 17extern void sh7367_add_early_devices(void);
diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobile/include/mach/sh73a0.h
index 18ae6a990bc2..881d515a9686 100644
--- a/arch/arm/mach-shmobile/include/mach/sh73a0.h
+++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h
@@ -470,6 +470,14 @@ enum {
470 GPIO_FN_SDHICMD2_PU, 470 GPIO_FN_SDHICMD2_PU,
471 GPIO_FN_MMCCMD0_PU, 471 GPIO_FN_MMCCMD0_PU,
472 GPIO_FN_MMCCMD1_PU, 472 GPIO_FN_MMCCMD1_PU,
473 GPIO_FN_MMCD0_0_PU,
474 GPIO_FN_MMCD0_1_PU,
475 GPIO_FN_MMCD0_2_PU,
476 GPIO_FN_MMCD0_3_PU,
477 GPIO_FN_MMCD0_4_PU,
478 GPIO_FN_MMCD0_5_PU,
479 GPIO_FN_MMCD0_6_PU,
480 GPIO_FN_MMCD0_7_PU,
473 GPIO_FN_FSIACK_PU, 481 GPIO_FN_FSIACK_PU,
474 GPIO_FN_FSIAILR_PU, 482 GPIO_FN_FSIAILR_PU,
475 GPIO_FN_FSIAIBT_PU, 483 GPIO_FN_FSIAIBT_PU,
diff --git a/arch/arm/mach-shmobile/pfc-sh7367.c b/arch/arm/mach-shmobile/pfc-sh7367.c
index 128555e76e43..e6e524654e67 100644
--- a/arch/arm/mach-shmobile/pfc-sh7367.c
+++ b/arch/arm/mach-shmobile/pfc-sh7367.c
@@ -21,68 +21,49 @@
21#include <linux/gpio.h> 21#include <linux/gpio.h>
22#include <mach/sh7367.h> 22#include <mach/sh7367.h>
23 23
24#define _1(fn, pfx, sfx) fn(pfx, sfx) 24#define CPU_ALL_PORT(fn, pfx, sfx) \
25 25 PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
26#define _10(fn, pfx, sfx) \ 26 PORT_10(fn, pfx##10, sfx), PORT_90(fn, pfx##1, sfx), \
27 _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \ 27 PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \
28 _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \ 28 PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \
29 _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \ 29 PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \
30 _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \ 30 PORT_10(fn, pfx##26, sfx), PORT_1(fn, pfx##270, sfx), \
31 _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx) 31 PORT_1(fn, pfx##271, sfx), PORT_1(fn, pfx##272, sfx)
32
33#define _90(fn, pfx, sfx) \
34 _10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx), \
35 _10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx), \
36 _10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx), \
37 _10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx), \
38 _10(fn, pfx##9, sfx)
39
40#define _273(fn, pfx, sfx) \
41 _10(fn, pfx, sfx), _90(fn, pfx, sfx), \
42 _10(fn, pfx##10, sfx), _90(fn, pfx##1, sfx), \
43 _10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx), \
44 _10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx), \
45 _10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx), \
46 _10(fn, pfx##26, sfx), _1(fn, pfx##270, sfx), \
47 _1(fn, pfx##271, sfx), _1(fn, pfx##272, sfx)
48
49#define _PORT(pfx, sfx) pfx##_##sfx
50#define PORT_273(str) _273(_PORT, PORT, str)
51 32
52enum { 33enum {
53 PINMUX_RESERVED = 0, 34 PINMUX_RESERVED = 0,
54 35
55 PINMUX_DATA_BEGIN, 36 PINMUX_DATA_BEGIN,
56 PORT_273(DATA), /* PORT0_DATA -> PORT272_DATA */ 37 PORT_ALL(DATA), /* PORT0_DATA -> PORT272_DATA */
57 PINMUX_DATA_END, 38 PINMUX_DATA_END,
58 39
59 PINMUX_INPUT_BEGIN, 40 PINMUX_INPUT_BEGIN,
60 PORT_273(IN), /* PORT0_IN -> PORT272_IN */ 41 PORT_ALL(IN), /* PORT0_IN -> PORT272_IN */
61 PINMUX_INPUT_END, 42 PINMUX_INPUT_END,
62 43
63 PINMUX_INPUT_PULLUP_BEGIN, 44 PINMUX_INPUT_PULLUP_BEGIN,
64 PORT_273(IN_PU), /* PORT0_IN_PU -> PORT272_IN_PU */ 45 PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT272_IN_PU */
65 PINMUX_INPUT_PULLUP_END, 46 PINMUX_INPUT_PULLUP_END,
66 47
67 PINMUX_INPUT_PULLDOWN_BEGIN, 48 PINMUX_INPUT_PULLDOWN_BEGIN,
68 PORT_273(IN_PD), /* PORT0_IN_PD -> PORT272_IN_PD */ 49 PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT272_IN_PD */
69 PINMUX_INPUT_PULLDOWN_END, 50 PINMUX_INPUT_PULLDOWN_END,
70 51
71 PINMUX_OUTPUT_BEGIN, 52 PINMUX_OUTPUT_BEGIN,
72 PORT_273(OUT), /* PORT0_OUT -> PORT272_OUT */ 53 PORT_ALL(OUT), /* PORT0_OUT -> PORT272_OUT */
73 PINMUX_OUTPUT_END, 54 PINMUX_OUTPUT_END,
74 55
75 PINMUX_FUNCTION_BEGIN, 56 PINMUX_FUNCTION_BEGIN,
76 PORT_273(FN_IN), /* PORT0_FN_IN -> PORT272_FN_IN */ 57 PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT272_FN_IN */
77 PORT_273(FN_OUT), /* PORT0_FN_OUT -> PORT272_FN_OUT */ 58 PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT272_FN_OUT */
78 PORT_273(FN0), /* PORT0_FN0 -> PORT272_FN0 */ 59 PORT_ALL(FN0), /* PORT0_FN0 -> PORT272_FN0 */
79 PORT_273(FN1), /* PORT0_FN1 -> PORT272_FN1 */ 60 PORT_ALL(FN1), /* PORT0_FN1 -> PORT272_FN1 */
80 PORT_273(FN2), /* PORT0_FN2 -> PORT272_FN2 */ 61 PORT_ALL(FN2), /* PORT0_FN2 -> PORT272_FN2 */
81 PORT_273(FN3), /* PORT0_FN3 -> PORT272_FN3 */ 62 PORT_ALL(FN3), /* PORT0_FN3 -> PORT272_FN3 */
82 PORT_273(FN4), /* PORT0_FN4 -> PORT272_FN4 */ 63 PORT_ALL(FN4), /* PORT0_FN4 -> PORT272_FN4 */
83 PORT_273(FN5), /* PORT0_FN5 -> PORT272_FN5 */ 64 PORT_ALL(FN5), /* PORT0_FN5 -> PORT272_FN5 */
84 PORT_273(FN6), /* PORT0_FN6 -> PORT272_FN6 */ 65 PORT_ALL(FN6), /* PORT0_FN6 -> PORT272_FN6 */
85 PORT_273(FN7), /* PORT0_FN7 -> PORT272_FN7 */ 66 PORT_ALL(FN7), /* PORT0_FN7 -> PORT272_FN7 */
86 67
87 MSELBCR_MSEL2_1, MSELBCR_MSEL2_0, 68 MSELBCR_MSEL2_1, MSELBCR_MSEL2_0,
88 PINMUX_FUNCTION_END, 69 PINMUX_FUNCTION_END,
@@ -327,41 +308,6 @@ enum {
327 PINMUX_MARK_END, 308 PINMUX_MARK_END,
328}; 309};
329 310
330#define PORT_DATA_I(nr) \
331 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
332
333#define PORT_DATA_I_PD(nr) \
334 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
335 PORT##nr##_IN, PORT##nr##_IN_PD)
336
337#define PORT_DATA_I_PU(nr) \
338 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
339 PORT##nr##_IN, PORT##nr##_IN_PU)
340
341#define PORT_DATA_I_PU_PD(nr) \
342 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
343 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
344
345#define PORT_DATA_O(nr) \
346 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
347
348#define PORT_DATA_IO(nr) \
349 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
350 PORT##nr##_IN)
351
352#define PORT_DATA_IO_PD(nr) \
353 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
354 PORT##nr##_IN, PORT##nr##_IN_PD)
355
356#define PORT_DATA_IO_PU(nr) \
357 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
358 PORT##nr##_IN, PORT##nr##_IN_PU)
359
360#define PORT_DATA_IO_PU_PD(nr) \
361 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
362 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
363
364
365static pinmux_enum_t pinmux_data[] = { 311static pinmux_enum_t pinmux_data[] = {
366 312
367 /* specify valid pin states for each pin in GPIO mode */ 313 /* specify valid pin states for each pin in GPIO mode */
@@ -1098,13 +1044,9 @@ static pinmux_enum_t pinmux_data[] = {
1098 PINMUX_DATA(DIVLOCK_MARK, PORT272_FN1), 1044 PINMUX_DATA(DIVLOCK_MARK, PORT272_FN1),
1099}; 1045};
1100 1046
1101#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
1102#define GPIO_PORT_273() _273(_GPIO_PORT, , unused)
1103#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
1104
1105static struct pinmux_gpio pinmux_gpios[] = { 1047static struct pinmux_gpio pinmux_gpios[] = {
1106 /* 49-1 -> 49-6 (GPIO) */ 1048 /* 49-1 -> 49-6 (GPIO) */
1107 GPIO_PORT_273(), 1049 GPIO_PORT_ALL(),
1108 1050
1109 /* Special Pull-up / Pull-down Functions */ 1051 /* Special Pull-up / Pull-down Functions */
1110 GPIO_FN(PORT48_KEYIN0_PU), GPIO_FN(PORT49_KEYIN1_PU), 1052 GPIO_FN(PORT48_KEYIN0_PU), GPIO_FN(PORT49_KEYIN1_PU),
@@ -1345,22 +1287,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
1345 GPIO_FN(DIVLOCK), 1287 GPIO_FN(DIVLOCK),
1346}; 1288};
1347 1289
1348/* helper for top 4 bits in PORTnCR */
1349#define PCRH(in, in_pd, in_pu, out) \
1350 0, (out), (in), 0, \
1351 0, 0, 0, 0, \
1352 0, 0, (in_pd), 0, \
1353 0, 0, (in_pu), 0
1354
1355#define PORTCR(nr, reg) \
1356 { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
1357 PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
1358 PORT##nr##_IN_PU, PORT##nr##_OUT), \
1359 PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
1360 PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
1361 PORT##nr##_FN6, PORT##nr##_FN7 } \
1362 }
1363
1364static struct pinmux_cfg_reg pinmux_config_regs[] = { 1290static struct pinmux_cfg_reg pinmux_config_regs[] = {
1365 PORTCR(0, 0xe6050000), /* PORT0CR */ 1291 PORTCR(0, 0xe6050000), /* PORT0CR */
1366 PORTCR(1, 0xe6050001), /* PORT1CR */ 1292 PORTCR(1, 0xe6050001), /* PORT1CR */
diff --git a/arch/arm/mach-shmobile/pfc-sh7372.c b/arch/arm/mach-shmobile/pfc-sh7372.c
index 9c265dae138a..1bd6585a6acf 100644
--- a/arch/arm/mach-shmobile/pfc-sh7372.c
+++ b/arch/arm/mach-shmobile/pfc-sh7372.c
@@ -25,27 +25,13 @@
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <mach/sh7372.h> 26#include <mach/sh7372.h>
27 27
28#define _1(fn, pfx, sfx) fn(pfx, sfx) 28#define CPU_ALL_PORT(fn, pfx, sfx) \
29 29 PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
30#define _10(fn, pfx, sfx) \ 30 PORT_10(fn, pfx##10, sfx), PORT_10(fn, pfx##11, sfx), \
31 _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \ 31 PORT_10(fn, pfx##12, sfx), PORT_10(fn, pfx##13, sfx), \
32 _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \ 32 PORT_10(fn, pfx##14, sfx), PORT_10(fn, pfx##15, sfx), \
33 _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \ 33 PORT_10(fn, pfx##16, sfx), PORT_10(fn, pfx##17, sfx), \
34 _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \ 34 PORT_10(fn, pfx##18, sfx), PORT_1(fn, pfx##190, sfx)
35 _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
36
37#define _80(fn, pfx, sfx) \
38 _10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx), \
39 _10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx), \
40 _10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx), \
41 _10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx)
42
43#define _190(fn, pfx, sfx) \
44 _10(fn, pfx, sfx), _80(fn, pfx, sfx), _10(fn, pfx##9, sfx), \
45 _10(fn, pfx##10, sfx), _80(fn, pfx##1, sfx), _1(fn, pfx##190, sfx)
46
47#define _PORT(pfx, sfx) pfx##_##sfx
48#define PORT_ALL(str) _190(_PORT, PORT, str)
49 35
50enum { 36enum {
51 PINMUX_RESERVED = 0, 37 PINMUX_RESERVED = 0,
@@ -381,108 +367,124 @@ enum {
381 PINMUX_MARK_END, 367 PINMUX_MARK_END,
382}; 368};
383 369
384/* PORT_DATA_I_PD(nr) */
385#define _I___D(nr) \
386 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
387 PORT##nr##_IN, PORT##nr##_IN_PD)
388
389/* PORT_DATA_I_PU(nr) */
390#define _I__U_(nr) \
391 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
392 PORT##nr##_IN, PORT##nr##_IN_PU)
393
394/* PORT_DATA_I_PU_PD(nr) */
395#define _I__UD(nr) \
396 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
397 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
398
399/* PORT_DATA_O(nr) */
400#define __O___(nr) \
401 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
402
403/* PORT_DATA_IO(nr) */
404#define _IO___(nr) \
405 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
406 PORT##nr##_IN)
407
408/* PORT_DATA_IO_PD(nr) */
409#define _IO__D(nr) \
410 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
411 PORT##nr##_IN, PORT##nr##_IN_PD)
412
413/* PORT_DATA_IO_PU(nr) */
414#define _IO_U_(nr) \
415 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
416 PORT##nr##_IN, PORT##nr##_IN_PU)
417
418/* PORT_DATA_IO_PU_PD(nr) */
419#define _IO_UD(nr) \
420 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
421 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
422
423
424static pinmux_enum_t pinmux_data[] = { 370static pinmux_enum_t pinmux_data[] = {
425 371
426 /* specify valid pin states for each pin in GPIO mode */ 372 /* specify valid pin states for each pin in GPIO mode */
427 373 PORT_DATA_IO_PD(0), PORT_DATA_IO_PD(1),
428 _IO__D(0), _IO__D(1), __O___(2), _I___D(3), _I___D(4), 374 PORT_DATA_O(2), PORT_DATA_I_PD(3),
429 _I___D(5), _IO_UD(6), _I___D(7), _IO__D(8), __O___(9), 375 PORT_DATA_I_PD(4), PORT_DATA_I_PD(5),
430 376 PORT_DATA_IO_PU_PD(6), PORT_DATA_I_PD(7),
431 __O___(10), __O___(11), _IO_UD(12), _IO__D(13), _IO__D(14), 377 PORT_DATA_IO_PD(8), PORT_DATA_O(9),
432 __O___(15), _IO__D(16), _IO__D(17), _I___D(18), _IO___(19), 378
433 379 PORT_DATA_O(10), PORT_DATA_O(11),
434 _IO___(20), _IO___(21), _IO___(22), _IO___(23), _IO___(24), 380 PORT_DATA_IO_PU_PD(12), PORT_DATA_IO_PD(13),
435 _IO___(25), _IO___(26), _IO___(27), _IO___(28), _IO___(29), 381 PORT_DATA_IO_PD(14), PORT_DATA_O(15),
436 382 PORT_DATA_IO_PD(16), PORT_DATA_IO_PD(17),
437 _IO___(30), _IO___(31), _IO___(32), _IO___(33), _IO___(34), 383 PORT_DATA_I_PD(18), PORT_DATA_IO(19),
438 _IO___(35), _IO___(36), _IO___(37), _IO___(38), _IO___(39), 384
439 385 PORT_DATA_IO(20), PORT_DATA_IO(21),
440 _IO___(40), _IO___(41), _IO___(42), _IO___(43), _IO___(44), 386 PORT_DATA_IO(22), PORT_DATA_IO(23),
441 _IO___(45), _IO_U_(46), _IO_U_(47), _IO_U_(48), _IO_U_(49), 387 PORT_DATA_IO(24), PORT_DATA_IO(25),
442 388 PORT_DATA_IO(26), PORT_DATA_IO(27),
443 _IO_U_(50), _IO_U_(51), _IO_U_(52), _IO_U_(53), _IO_U_(54), 389 PORT_DATA_IO(28), PORT_DATA_IO(29),
444 _IO_U_(55), _IO_U_(56), _IO_U_(57), _IO_U_(58), _IO_U_(59), 390
445 391 PORT_DATA_IO(30), PORT_DATA_IO(31),
446 _IO_U_(60), _IO_U_(61), _IO___(62), __O___(63), __O___(64), 392 PORT_DATA_IO(32), PORT_DATA_IO(33),
447 _IO_U_(65), __O___(66), _IO_U_(67), __O___(68), _IO___(69), /*66?*/ 393 PORT_DATA_IO(34), PORT_DATA_IO(35),
448 394 PORT_DATA_IO(36), PORT_DATA_IO(37),
449 _IO___(70), _IO___(71), __O___(72), _I__U_(73), _I__UD(74), 395 PORT_DATA_IO(38), PORT_DATA_IO(39),
450 _IO_UD(75), _IO_UD(76), _IO_UD(77), _IO_UD(78), _IO_UD(79), 396
451 397 PORT_DATA_IO(40), PORT_DATA_IO(41),
452 _IO_UD(80), _IO_UD(81), _IO_UD(82), _IO_UD(83), _IO_UD(84), 398 PORT_DATA_IO(42), PORT_DATA_IO(43),
453 _IO_UD(85), _IO_UD(86), _IO_UD(87), _IO_UD(88), _IO_UD(89), 399 PORT_DATA_IO(44), PORT_DATA_IO(45),
454 400 PORT_DATA_IO_PU(46), PORT_DATA_IO_PU(47),
455 _IO_UD(90), _IO_UD(91), _IO_UD(92), _IO_UD(93), _IO_UD(94), 401 PORT_DATA_IO_PU(48), PORT_DATA_IO_PU(49),
456 _IO_UD(95), _IO_U_(96), _IO_UD(97), _IO_UD(98), __O___(99), /*99?*/ 402
457 403 PORT_DATA_IO_PU(50), PORT_DATA_IO_PU(51),
458 _IO__D(100), _IO__D(101), _IO__D(102), _IO__D(103), _IO__D(104), 404 PORT_DATA_IO_PU(52), PORT_DATA_IO_PU(53),
459 _IO__D(105), _IO_U_(106), _IO_U_(107), _IO_U_(108), _IO_U_(109), 405 PORT_DATA_IO_PU(54), PORT_DATA_IO_PU(55),
460 406 PORT_DATA_IO_PU(56), PORT_DATA_IO_PU(57),
461 _IO_U_(110), _IO_U_(111), _IO__D(112), _IO__D(113), _IO_U_(114), 407 PORT_DATA_IO_PU(58), PORT_DATA_IO_PU(59),
462 _IO_U_(115), _IO_U_(116), _IO_U_(117), _IO_U_(118), _IO_U_(119), 408
463 409 PORT_DATA_IO_PU(60), PORT_DATA_IO_PU(61),
464 _IO_U_(120), _IO__D(121), _IO__D(122), _IO__D(123), _IO__D(124), 410 PORT_DATA_IO(62), PORT_DATA_O(63),
465 _IO__D(125), _IO__D(126), _IO__D(127), _IO__D(128), _IO_UD(129), 411 PORT_DATA_O(64), PORT_DATA_IO_PU(65),
466 412 PORT_DATA_O(66), PORT_DATA_IO_PU(67), /*66?*/
467 _IO_UD(130), _IO_UD(131), _IO_UD(132), _IO_UD(133), _IO_UD(134), 413 PORT_DATA_O(68), PORT_DATA_IO(69),
468 _IO_UD(135), _IO__D(136), _IO__D(137), _IO__D(138), _IO__D(139), 414
469 415 PORT_DATA_IO(70), PORT_DATA_IO(71),
470 _IO__D(140), _IO__D(141), _IO__D(142), _IO_UD(143), _IO__D(144), 416 PORT_DATA_O(72), PORT_DATA_I_PU(73),
471 _IO__D(145), _IO__D(146), _IO__D(147), _IO__D(148), _IO__D(149), 417 PORT_DATA_I_PU_PD(74), PORT_DATA_IO_PU_PD(75),
472 418 PORT_DATA_IO_PU_PD(76), PORT_DATA_IO_PU_PD(77),
473 _IO__D(150), _IO__D(151), _IO_UD(152), _I___D(153), _IO_UD(154), 419 PORT_DATA_IO_PU_PD(78), PORT_DATA_IO_PU_PD(79),
474 _I___D(155), _IO__D(156), _IO__D(157), _I___D(158), _IO__D(159), 420
475 421 PORT_DATA_IO_PU_PD(80), PORT_DATA_IO_PU_PD(81),
476 __O___(160), _IO__D(161), _IO__D(162), _IO__D(163), _I___D(164), 422 PORT_DATA_IO_PU_PD(82), PORT_DATA_IO_PU_PD(83),
477 _IO__D(165), _I___D(166), _I___D(167), _I___D(168), _I___D(169), 423 PORT_DATA_IO_PU_PD(84), PORT_DATA_IO_PU_PD(85),
478 424 PORT_DATA_IO_PU_PD(86), PORT_DATA_IO_PU_PD(87),
479 _I___D(170), __O___(171), _IO_UD(172), _IO_UD(173), _IO_UD(174), 425 PORT_DATA_IO_PU_PD(88), PORT_DATA_IO_PU_PD(89),
480 _IO_UD(175), _IO_UD(176), _IO_UD(177), _IO_UD(178), __O___(179), 426
481 427 PORT_DATA_IO_PU_PD(90), PORT_DATA_IO_PU_PD(91),
482 _IO_UD(180), _IO_UD(181), _IO_UD(182), _IO_UD(183), _IO_UD(184), 428 PORT_DATA_IO_PU_PD(92), PORT_DATA_IO_PU_PD(93),
483 __O___(185), _IO_UD(186), _IO_UD(187), _IO_UD(188), _IO_UD(189), 429 PORT_DATA_IO_PU_PD(94), PORT_DATA_IO_PU_PD(95),
484 430 PORT_DATA_IO_PU(96), PORT_DATA_IO_PU_PD(97),
485 _IO_UD(190), 431 PORT_DATA_IO_PU_PD(98), PORT_DATA_O(99), /*99?*/
432
433 PORT_DATA_IO_PD(100), PORT_DATA_IO_PD(101),
434 PORT_DATA_IO_PD(102), PORT_DATA_IO_PD(103),
435 PORT_DATA_IO_PD(104), PORT_DATA_IO_PD(105),
436 PORT_DATA_IO_PU(106), PORT_DATA_IO_PU(107),
437 PORT_DATA_IO_PU(108), PORT_DATA_IO_PU(109),
438
439 PORT_DATA_IO_PU(110), PORT_DATA_IO_PU(111),
440 PORT_DATA_IO_PD(112), PORT_DATA_IO_PD(113),
441 PORT_DATA_IO_PU(114), PORT_DATA_IO_PU(115),
442 PORT_DATA_IO_PU(116), PORT_DATA_IO_PU(117),
443 PORT_DATA_IO_PU(118), PORT_DATA_IO_PU(119),
444
445 PORT_DATA_IO_PU(120), PORT_DATA_IO_PD(121),
446 PORT_DATA_IO_PD(122), PORT_DATA_IO_PD(123),
447 PORT_DATA_IO_PD(124), PORT_DATA_IO_PD(125),
448 PORT_DATA_IO_PD(126), PORT_DATA_IO_PD(127),
449 PORT_DATA_IO_PD(128), PORT_DATA_IO_PU_PD(129),
450
451 PORT_DATA_IO_PU_PD(130), PORT_DATA_IO_PU_PD(131),
452 PORT_DATA_IO_PU_PD(132), PORT_DATA_IO_PU_PD(133),
453 PORT_DATA_IO_PU_PD(134), PORT_DATA_IO_PU_PD(135),
454 PORT_DATA_IO_PD(136), PORT_DATA_IO_PD(137),
455 PORT_DATA_IO_PD(138), PORT_DATA_IO_PD(139),
456
457 PORT_DATA_IO_PD(140), PORT_DATA_IO_PD(141),
458 PORT_DATA_IO_PD(142), PORT_DATA_IO_PU_PD(143),
459 PORT_DATA_IO_PD(144), PORT_DATA_IO_PD(145),
460 PORT_DATA_IO_PD(146), PORT_DATA_IO_PD(147),
461 PORT_DATA_IO_PD(148), PORT_DATA_IO_PD(149),
462
463 PORT_DATA_IO_PD(150), PORT_DATA_IO_PD(151),
464 PORT_DATA_IO_PU_PD(152), PORT_DATA_I_PD(153),
465 PORT_DATA_IO_PU_PD(154), PORT_DATA_I_PD(155),
466 PORT_DATA_IO_PD(156), PORT_DATA_IO_PD(157),
467 PORT_DATA_I_PD(158), PORT_DATA_IO_PD(159),
468
469 PORT_DATA_O(160), PORT_DATA_IO_PD(161),
470 PORT_DATA_IO_PD(162), PORT_DATA_IO_PD(163),
471 PORT_DATA_I_PD(164), PORT_DATA_IO_PD(165),
472 PORT_DATA_I_PD(166), PORT_DATA_I_PD(167),
473 PORT_DATA_I_PD(168), PORT_DATA_I_PD(169),
474
475 PORT_DATA_I_PD(170), PORT_DATA_O(171),
476 PORT_DATA_IO_PU_PD(172), PORT_DATA_IO_PU_PD(173),
477 PORT_DATA_IO_PU_PD(174), PORT_DATA_IO_PU_PD(175),
478 PORT_DATA_IO_PU_PD(176), PORT_DATA_IO_PU_PD(177),
479 PORT_DATA_IO_PU_PD(178), PORT_DATA_O(179),
480
481 PORT_DATA_IO_PU_PD(180), PORT_DATA_IO_PU_PD(181),
482 PORT_DATA_IO_PU_PD(182), PORT_DATA_IO_PU_PD(183),
483 PORT_DATA_IO_PU_PD(184), PORT_DATA_O(185),
484 PORT_DATA_IO_PU_PD(186), PORT_DATA_IO_PU_PD(187),
485 PORT_DATA_IO_PU_PD(188), PORT_DATA_IO_PU_PD(189),
486
487 PORT_DATA_IO_PU_PD(190),
486 488
487 /* IRQ */ 489 /* IRQ */
488 PINMUX_DATA(IRQ0_6_MARK, PORT6_FN0, MSEL1CR_0_0), 490 PINMUX_DATA(IRQ0_6_MARK, PORT6_FN0, MSEL1CR_0_0),
@@ -926,10 +928,6 @@ static pinmux_enum_t pinmux_data[] = {
926 PINMUX_DATA(MFIv4_MARK, MSEL4CR_6_1), 928 PINMUX_DATA(MFIv4_MARK, MSEL4CR_6_1),
927}; 929};
928 930
929#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
930#define GPIO_PORT_ALL() _190(_GPIO_PORT, , unused)
931#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
932
933static struct pinmux_gpio pinmux_gpios[] = { 931static struct pinmux_gpio pinmux_gpios[] = {
934 932
935 /* PORT */ 933 /* PORT */
@@ -1201,22 +1199,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
1201 GPIO_FN(SDENC_DV_CLKI), 1199 GPIO_FN(SDENC_DV_CLKI),
1202}; 1200};
1203 1201
1204/* helper for top 4 bits in PORTnCR */
1205#define PCRH(in, in_pd, in_pu, out) \
1206 0, (out), (in), 0, \
1207 0, 0, 0, 0, \
1208 0, 0, (in_pd), 0, \
1209 0, 0, (in_pu), 0
1210
1211#define PORTCR(nr, reg) \
1212 { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
1213 PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
1214 PORT##nr##_IN_PU, PORT##nr##_OUT), \
1215 PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
1216 PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
1217 PORT##nr##_FN6, PORT##nr##_FN7 } \
1218 }
1219
1220static struct pinmux_cfg_reg pinmux_config_regs[] = { 1202static struct pinmux_cfg_reg pinmux_config_regs[] = {
1221 PORTCR(0, 0xE6051000), /* PORT0CR */ 1203 PORTCR(0, 0xE6051000), /* PORT0CR */
1222 PORTCR(1, 0xE6051001), /* PORT1CR */ 1204 PORTCR(1, 0xE6051001), /* PORT1CR */
diff --git a/arch/arm/mach-shmobile/pfc-sh7377.c b/arch/arm/mach-shmobile/pfc-sh7377.c
index 613e6842ad05..2f10511946ad 100644
--- a/arch/arm/mach-shmobile/pfc-sh7377.c
+++ b/arch/arm/mach-shmobile/pfc-sh7377.c
@@ -22,84 +22,65 @@
22#include <linux/gpio.h> 22#include <linux/gpio.h>
23#include <mach/sh7377.h> 23#include <mach/sh7377.h>
24 24
25#define _1(fn, pfx, sfx) fn(pfx, sfx) 25#define CPU_ALL_PORT(fn, pfx, sfx) \
26 26 PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
27#define _10(fn, pfx, sfx) \ 27 PORT_10(fn, pfx##10, sfx), \
28 _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \ 28 PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx), \
29 _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \ 29 PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx), \
30 _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \ 30 PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx), \
31 _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \ 31 PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx), \
32 _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx) 32 PORT_1(fn, pfx##118, sfx), \
33 33 PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx), \
34#define _90(fn, pfx, sfx) \ 34 PORT_10(fn, pfx##13, sfx), PORT_10(fn, pfx##14, sfx), \
35 _10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx), \ 35 PORT_10(fn, pfx##15, sfx), \
36 _10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx), \ 36 PORT_1(fn, pfx##160, sfx), PORT_1(fn, pfx##161, sfx), \
37 _10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx), \ 37 PORT_1(fn, pfx##162, sfx), PORT_1(fn, pfx##163, sfx), \
38 _10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx), \ 38 PORT_1(fn, pfx##164, sfx), \
39 _10(fn, pfx##9, sfx) 39 PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx), \
40 40 PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx), \
41#define _265(fn, pfx, sfx) \ 41 PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx), \
42 _10(fn, pfx, sfx), _90(fn, pfx, sfx), \ 42 PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx), \
43 _10(fn, pfx##10, sfx), \ 43 PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \
44 _1(fn, pfx##110, sfx), _1(fn, pfx##111, sfx), \ 44 PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \
45 _1(fn, pfx##112, sfx), _1(fn, pfx##113, sfx), \ 45 PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \
46 _1(fn, pfx##114, sfx), _1(fn, pfx##115, sfx), \ 46 PORT_1(fn, pfx##260, sfx), PORT_1(fn, pfx##261, sfx), \
47 _1(fn, pfx##116, sfx), _1(fn, pfx##117, sfx), \ 47 PORT_1(fn, pfx##262, sfx), PORT_1(fn, pfx##263, sfx), \
48 _1(fn, pfx##118, sfx), \ 48 PORT_1(fn, pfx##264, sfx)
49 _1(fn, pfx##128, sfx), _1(fn, pfx##129, sfx), \
50 _10(fn, pfx##13, sfx), _10(fn, pfx##14, sfx), \
51 _10(fn, pfx##15, sfx), \
52 _1(fn, pfx##160, sfx), _1(fn, pfx##161, sfx), \
53 _1(fn, pfx##162, sfx), _1(fn, pfx##163, sfx), \
54 _1(fn, pfx##164, sfx), \
55 _1(fn, pfx##192, sfx), _1(fn, pfx##193, sfx), \
56 _1(fn, pfx##194, sfx), _1(fn, pfx##195, sfx), \
57 _1(fn, pfx##196, sfx), _1(fn, pfx##197, sfx), \
58 _1(fn, pfx##198, sfx), _1(fn, pfx##199, sfx), \
59 _10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx), \
60 _10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx), \
61 _10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx), \
62 _1(fn, pfx##260, sfx), _1(fn, pfx##261, sfx), \
63 _1(fn, pfx##262, sfx), _1(fn, pfx##263, sfx), \
64 _1(fn, pfx##264, sfx)
65
66#define _PORT(pfx, sfx) pfx##_##sfx
67#define PORT_265(str) _265(_PORT, PORT, str)
68 49
69enum { 50enum {
70 PINMUX_RESERVED = 0, 51 PINMUX_RESERVED = 0,
71 52
72 PINMUX_DATA_BEGIN, 53 PINMUX_DATA_BEGIN,
73 PORT_265(DATA), /* PORT0_DATA -> PORT264_DATA */ 54 PORT_ALL(DATA), /* PORT0_DATA -> PORT264_DATA */
74 PINMUX_DATA_END, 55 PINMUX_DATA_END,
75 56
76 PINMUX_INPUT_BEGIN, 57 PINMUX_INPUT_BEGIN,
77 PORT_265(IN), /* PORT0_IN -> PORT264_IN */ 58 PORT_ALL(IN), /* PORT0_IN -> PORT264_IN */
78 PINMUX_INPUT_END, 59 PINMUX_INPUT_END,
79 60
80 PINMUX_INPUT_PULLUP_BEGIN, 61 PINMUX_INPUT_PULLUP_BEGIN,
81 PORT_265(IN_PU), /* PORT0_IN_PU -> PORT264_IN_PU */ 62 PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT264_IN_PU */
82 PINMUX_INPUT_PULLUP_END, 63 PINMUX_INPUT_PULLUP_END,
83 64
84 PINMUX_INPUT_PULLDOWN_BEGIN, 65 PINMUX_INPUT_PULLDOWN_BEGIN,
85 PORT_265(IN_PD), /* PORT0_IN_PD -> PORT264_IN_PD */ 66 PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT264_IN_PD */
86 PINMUX_INPUT_PULLDOWN_END, 67 PINMUX_INPUT_PULLDOWN_END,
87 68
88 PINMUX_OUTPUT_BEGIN, 69 PINMUX_OUTPUT_BEGIN,
89 PORT_265(OUT), /* PORT0_OUT -> PORT264_OUT */ 70 PORT_ALL(OUT), /* PORT0_OUT -> PORT264_OUT */
90 PINMUX_OUTPUT_END, 71 PINMUX_OUTPUT_END,
91 72
92 PINMUX_FUNCTION_BEGIN, 73 PINMUX_FUNCTION_BEGIN,
93 PORT_265(FN_IN), /* PORT0_FN_IN -> PORT264_FN_IN */ 74 PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT264_FN_IN */
94 PORT_265(FN_OUT), /* PORT0_FN_OUT -> PORT264_FN_OUT */ 75 PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT264_FN_OUT */
95 PORT_265(FN0), /* PORT0_FN0 -> PORT264_FN0 */ 76 PORT_ALL(FN0), /* PORT0_FN0 -> PORT264_FN0 */
96 PORT_265(FN1), /* PORT0_FN1 -> PORT264_FN1 */ 77 PORT_ALL(FN1), /* PORT0_FN1 -> PORT264_FN1 */
97 PORT_265(FN2), /* PORT0_FN2 -> PORT264_FN2 */ 78 PORT_ALL(FN2), /* PORT0_FN2 -> PORT264_FN2 */
98 PORT_265(FN3), /* PORT0_FN3 -> PORT264_FN3 */ 79 PORT_ALL(FN3), /* PORT0_FN3 -> PORT264_FN3 */
99 PORT_265(FN4), /* PORT0_FN4 -> PORT264_FN4 */ 80 PORT_ALL(FN4), /* PORT0_FN4 -> PORT264_FN4 */
100 PORT_265(FN5), /* PORT0_FN5 -> PORT264_FN5 */ 81 PORT_ALL(FN5), /* PORT0_FN5 -> PORT264_FN5 */
101 PORT_265(FN6), /* PORT0_FN6 -> PORT264_FN6 */ 82 PORT_ALL(FN6), /* PORT0_FN6 -> PORT264_FN6 */
102 PORT_265(FN7), /* PORT0_FN7 -> PORT264_FN7 */ 83 PORT_ALL(FN7), /* PORT0_FN7 -> PORT264_FN7 */
103 84
104 MSELBCR_MSEL17_1, MSELBCR_MSEL17_0, 85 MSELBCR_MSEL17_1, MSELBCR_MSEL17_0,
105 MSELBCR_MSEL16_1, MSELBCR_MSEL16_0, 86 MSELBCR_MSEL16_1, MSELBCR_MSEL16_0,
@@ -360,45 +341,6 @@ enum {
360 PINMUX_MARK_END, 341 PINMUX_MARK_END,
361}; 342};
362 343
363#define PORT_DATA_I(nr) \
364 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
365
366#define PORT_DATA_I_PD(nr) \
367 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
368 PORT##nr##_IN, PORT##nr##_IN_PD)
369
370#define PORT_DATA_I_PU(nr) \
371 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
372 PORT##nr##_IN, PORT##nr##_IN_PU)
373
374#define PORT_DATA_I_PU_PD(nr) \
375 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
376 PORT##nr##_IN, PORT##nr##_IN_PD, \
377 PORT##nr##_IN_PU)
378
379#define PORT_DATA_O(nr) \
380 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
381 PORT##nr##_OUT)
382
383#define PORT_DATA_IO(nr) \
384 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
385 PORT##nr##_OUT, PORT##nr##_IN)
386
387#define PORT_DATA_IO_PD(nr) \
388 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
389 PORT##nr##_OUT, PORT##nr##_IN, \
390 PORT##nr##_IN_PD)
391
392#define PORT_DATA_IO_PU(nr) \
393 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
394 PORT##nr##_OUT, PORT##nr##_IN, \
395 PORT##nr##_IN_PU)
396
397#define PORT_DATA_IO_PU_PD(nr) \
398 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
399 PORT##nr##_OUT, PORT##nr##_IN, \
400 PORT##nr##_IN_PD, PORT##nr##_IN_PU)
401
402static pinmux_enum_t pinmux_data[] = { 344static pinmux_enum_t pinmux_data[] = {
403 /* specify valid pin states for each pin in GPIO mode */ 345 /* specify valid pin states for each pin in GPIO mode */
404 /* 55-1 (GPIO) */ 346 /* 55-1 (GPIO) */
@@ -1078,13 +1020,9 @@ static pinmux_enum_t pinmux_data[] = {
1078 PINMUX_DATA(RESETOUTS_MARK, PORT264_FN1), 1020 PINMUX_DATA(RESETOUTS_MARK, PORT264_FN1),
1079}; 1021};
1080 1022
1081#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
1082#define GPIO_PORT_265() _265(_GPIO_PORT, , unused)
1083#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
1084
1085static struct pinmux_gpio pinmux_gpios[] = { 1023static struct pinmux_gpio pinmux_gpios[] = {
1086 /* 55-1 -> 55-5 (GPIO) */ 1024 /* 55-1 -> 55-5 (GPIO) */
1087 GPIO_PORT_265(), 1025 GPIO_PORT_ALL(),
1088 1026
1089 /* Special Pull-up / Pull-down Functions */ 1027 /* Special Pull-up / Pull-down Functions */
1090 GPIO_FN(PORT66_KEYIN0_PU), GPIO_FN(PORT67_KEYIN1_PU), 1028 GPIO_FN(PORT66_KEYIN0_PU), GPIO_FN(PORT67_KEYIN1_PU),
@@ -1362,23 +1300,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
1362 GPIO_FN(RESETOUTS), 1300 GPIO_FN(RESETOUTS),
1363}; 1301};
1364 1302
1365/* helper for top 4 bits in PORTnCR */
1366#define PCRH(in, in_pd, in_pu, out) \
1367 0, (out), (in), 0, \
1368 0, 0, 0, 0, \
1369 0, 0, (in_pd), 0, \
1370 0, 0, (in_pu), 0
1371
1372#define PORTCR(nr, reg) \
1373 { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
1374 PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
1375 PORT##nr##_IN_PU, PORT##nr##_OUT), \
1376 PORT##nr##_FN0, PORT##nr##_FN1, \
1377 PORT##nr##_FN2, PORT##nr##_FN3, \
1378 PORT##nr##_FN4, PORT##nr##_FN5, \
1379 PORT##nr##_FN6, PORT##nr##_FN7 } \
1380 }
1381
1382static struct pinmux_cfg_reg pinmux_config_regs[] = { 1303static struct pinmux_cfg_reg pinmux_config_regs[] = {
1383 PORTCR(0, 0xe6050000), /* PORT0CR */ 1304 PORTCR(0, 0xe6050000), /* PORT0CR */
1384 PORTCR(1, 0xe6050001), /* PORT1CR */ 1305 PORTCR(1, 0xe6050001), /* PORT1CR */
diff --git a/arch/arm/mach-shmobile/pfc-sh73a0.c b/arch/arm/mach-shmobile/pfc-sh73a0.c
index 5abe02fbd6b9..e05634ce2e0d 100644
--- a/arch/arm/mach-shmobile/pfc-sh73a0.c
+++ b/arch/arm/mach-shmobile/pfc-sh73a0.c
@@ -24,83 +24,71 @@
24#include <mach/sh73a0.h> 24#include <mach/sh73a0.h>
25#include <mach/irqs.h> 25#include <mach/irqs.h>
26 26
27#define _1(fn, pfx, sfx) fn(pfx, sfx) 27#define CPU_ALL_PORT(fn, pfx, sfx) \
28 28 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
29#define _10(fn, pfx, sfx) \ 29 PORT_10(fn, pfx##2, sfx), PORT_10(fn, pfx##3, sfx), \
30 _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \ 30 PORT_10(fn, pfx##4, sfx), PORT_10(fn, pfx##5, sfx), \
31 _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \ 31 PORT_10(fn, pfx##6, sfx), PORT_10(fn, pfx##7, sfx), \
32 _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \ 32 PORT_10(fn, pfx##8, sfx), PORT_10(fn, pfx##9, sfx), \
33 _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \ 33 PORT_10(fn, pfx##10, sfx), \
34 _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx) 34 PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx), \
35 35 PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx), \
36#define _310(fn, pfx, sfx) \ 36 PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx), \
37 _10(fn, pfx, sfx), _10(fn, pfx##1, sfx), \ 37 PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx), \
38 _10(fn, pfx##2, sfx), _10(fn, pfx##3, sfx), \ 38 PORT_1(fn, pfx##118, sfx), \
39 _10(fn, pfx##4, sfx), _10(fn, pfx##5, sfx), \ 39 PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx), \
40 _10(fn, pfx##6, sfx), _10(fn, pfx##7, sfx), \ 40 PORT_10(fn, pfx##13, sfx), PORT_10(fn, pfx##14, sfx), \
41 _10(fn, pfx##8, sfx), _10(fn, pfx##9, sfx), \ 41 PORT_10(fn, pfx##15, sfx), \
42 _10(fn, pfx##10, sfx), \ 42 PORT_1(fn, pfx##160, sfx), PORT_1(fn, pfx##161, sfx), \
43 _1(fn, pfx##110, sfx), _1(fn, pfx##111, sfx), \ 43 PORT_1(fn, pfx##162, sfx), PORT_1(fn, pfx##163, sfx), \
44 _1(fn, pfx##112, sfx), _1(fn, pfx##113, sfx), \ 44 PORT_1(fn, pfx##164, sfx), \
45 _1(fn, pfx##114, sfx), _1(fn, pfx##115, sfx), \ 45 PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx), \
46 _1(fn, pfx##116, sfx), _1(fn, pfx##117, sfx), \ 46 PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx), \
47 _1(fn, pfx##118, sfx), \ 47 PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx), \
48 _1(fn, pfx##128, sfx), _1(fn, pfx##129, sfx), \ 48 PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx), \
49 _10(fn, pfx##13, sfx), _10(fn, pfx##14, sfx), \ 49 PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \
50 _10(fn, pfx##15, sfx), \ 50 PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \
51 _1(fn, pfx##160, sfx), _1(fn, pfx##161, sfx), \ 51 PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \
52 _1(fn, pfx##162, sfx), _1(fn, pfx##163, sfx), \ 52 PORT_10(fn, pfx##26, sfx), PORT_10(fn, pfx##27, sfx), \
53 _1(fn, pfx##164, sfx), \ 53 PORT_1(fn, pfx##280, sfx), PORT_1(fn, pfx##281, sfx), \
54 _1(fn, pfx##192, sfx), _1(fn, pfx##193, sfx), \ 54 PORT_1(fn, pfx##282, sfx), \
55 _1(fn, pfx##194, sfx), _1(fn, pfx##195, sfx), \ 55 PORT_1(fn, pfx##288, sfx), PORT_1(fn, pfx##289, sfx), \
56 _1(fn, pfx##196, sfx), _1(fn, pfx##197, sfx), \ 56 PORT_10(fn, pfx##29, sfx), PORT_10(fn, pfx##30, sfx)
57 _1(fn, pfx##198, sfx), _1(fn, pfx##199, sfx), \
58 _10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx), \
59 _10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx), \
60 _10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx), \
61 _10(fn, pfx##26, sfx), _10(fn, pfx##27, sfx), \
62 _1(fn, pfx##280, sfx), _1(fn, pfx##281, sfx), \
63 _1(fn, pfx##282, sfx), \
64 _1(fn, pfx##288, sfx), _1(fn, pfx##289, sfx), \
65 _10(fn, pfx##29, sfx), _10(fn, pfx##30, sfx)
66
67#define _PORT(pfx, sfx) pfx##_##sfx
68#define PORT_310(str) _310(_PORT, PORT, str)
69 57
70enum { 58enum {
71 PINMUX_RESERVED = 0, 59 PINMUX_RESERVED = 0,
72 60
73 PINMUX_DATA_BEGIN, 61 PINMUX_DATA_BEGIN,
74 PORT_310(DATA), /* PORT0_DATA -> PORT309_DATA */ 62 PORT_ALL(DATA), /* PORT0_DATA -> PORT309_DATA */
75 PINMUX_DATA_END, 63 PINMUX_DATA_END,
76 64
77 PINMUX_INPUT_BEGIN, 65 PINMUX_INPUT_BEGIN,
78 PORT_310(IN), /* PORT0_IN -> PORT309_IN */ 66 PORT_ALL(IN), /* PORT0_IN -> PORT309_IN */
79 PINMUX_INPUT_END, 67 PINMUX_INPUT_END,
80 68
81 PINMUX_INPUT_PULLUP_BEGIN, 69 PINMUX_INPUT_PULLUP_BEGIN,
82 PORT_310(IN_PU), /* PORT0_IN_PU -> PORT309_IN_PU */ 70 PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT309_IN_PU */
83 PINMUX_INPUT_PULLUP_END, 71 PINMUX_INPUT_PULLUP_END,
84 72
85 PINMUX_INPUT_PULLDOWN_BEGIN, 73 PINMUX_INPUT_PULLDOWN_BEGIN,
86 PORT_310(IN_PD), /* PORT0_IN_PD -> PORT309_IN_PD */ 74 PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT309_IN_PD */
87 PINMUX_INPUT_PULLDOWN_END, 75 PINMUX_INPUT_PULLDOWN_END,
88 76
89 PINMUX_OUTPUT_BEGIN, 77 PINMUX_OUTPUT_BEGIN,
90 PORT_310(OUT), /* PORT0_OUT -> PORT309_OUT */ 78 PORT_ALL(OUT), /* PORT0_OUT -> PORT309_OUT */
91 PINMUX_OUTPUT_END, 79 PINMUX_OUTPUT_END,
92 80
93 PINMUX_FUNCTION_BEGIN, 81 PINMUX_FUNCTION_BEGIN,
94 PORT_310(FN_IN), /* PORT0_FN_IN -> PORT309_FN_IN */ 82 PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT309_FN_IN */
95 PORT_310(FN_OUT), /* PORT0_FN_OUT -> PORT309_FN_OUT */ 83 PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT309_FN_OUT */
96 PORT_310(FN0), /* PORT0_FN0 -> PORT309_FN0 */ 84 PORT_ALL(FN0), /* PORT0_FN0 -> PORT309_FN0 */
97 PORT_310(FN1), /* PORT0_FN1 -> PORT309_FN1 */ 85 PORT_ALL(FN1), /* PORT0_FN1 -> PORT309_FN1 */
98 PORT_310(FN2), /* PORT0_FN2 -> PORT309_FN2 */ 86 PORT_ALL(FN2), /* PORT0_FN2 -> PORT309_FN2 */
99 PORT_310(FN3), /* PORT0_FN3 -> PORT309_FN3 */ 87 PORT_ALL(FN3), /* PORT0_FN3 -> PORT309_FN3 */
100 PORT_310(FN4), /* PORT0_FN4 -> PORT309_FN4 */ 88 PORT_ALL(FN4), /* PORT0_FN4 -> PORT309_FN4 */
101 PORT_310(FN5), /* PORT0_FN5 -> PORT309_FN5 */ 89 PORT_ALL(FN5), /* PORT0_FN5 -> PORT309_FN5 */
102 PORT_310(FN6), /* PORT0_FN6 -> PORT309_FN6 */ 90 PORT_ALL(FN6), /* PORT0_FN6 -> PORT309_FN6 */
103 PORT_310(FN7), /* PORT0_FN7 -> PORT309_FN7 */ 91 PORT_ALL(FN7), /* PORT0_FN7 -> PORT309_FN7 */
104 92
105 MSEL2CR_MSEL19_0, MSEL2CR_MSEL19_1, 93 MSEL2CR_MSEL19_0, MSEL2CR_MSEL19_1,
106 MSEL2CR_MSEL18_0, MSEL2CR_MSEL18_1, 94 MSEL2CR_MSEL18_0, MSEL2CR_MSEL18_1,
@@ -508,6 +496,14 @@ enum {
508 SDHICMD2_PU_MARK, 496 SDHICMD2_PU_MARK,
509 MMCCMD0_PU_MARK, 497 MMCCMD0_PU_MARK,
510 MMCCMD1_PU_MARK, 498 MMCCMD1_PU_MARK,
499 MMCD0_0_PU_MARK,
500 MMCD0_1_PU_MARK,
501 MMCD0_2_PU_MARK,
502 MMCD0_3_PU_MARK,
503 MMCD0_4_PU_MARK,
504 MMCD0_5_PU_MARK,
505 MMCD0_6_PU_MARK,
506 MMCD0_7_PU_MARK,
511 FSIBISLD_PU_MARK, 507 FSIBISLD_PU_MARK,
512 FSIACK_PU_MARK, 508 FSIACK_PU_MARK,
513 FSIAILR_PU_MARK, 509 FSIAILR_PU_MARK,
@@ -517,45 +513,6 @@ enum {
517 PINMUX_MARK_END, 513 PINMUX_MARK_END,
518}; 514};
519 515
520#define PORT_DATA_I(nr) \
521 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
522
523#define PORT_DATA_I_PD(nr) \
524 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
525 PORT##nr##_IN, PORT##nr##_IN_PD)
526
527#define PORT_DATA_I_PU(nr) \
528 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
529 PORT##nr##_IN, PORT##nr##_IN_PU)
530
531#define PORT_DATA_I_PU_PD(nr) \
532 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
533 PORT##nr##_IN, PORT##nr##_IN_PD, \
534 PORT##nr##_IN_PU)
535
536#define PORT_DATA_O(nr) \
537 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
538 PORT##nr##_OUT)
539
540#define PORT_DATA_IO(nr) \
541 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
542 PORT##nr##_OUT, PORT##nr##_IN)
543
544#define PORT_DATA_IO_PD(nr) \
545 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
546 PORT##nr##_OUT, PORT##nr##_IN, \
547 PORT##nr##_IN_PD)
548
549#define PORT_DATA_IO_PU(nr) \
550 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
551 PORT##nr##_OUT, PORT##nr##_IN, \
552 PORT##nr##_IN_PU)
553
554#define PORT_DATA_IO_PU_PD(nr) \
555 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
556 PORT##nr##_OUT, PORT##nr##_IN, \
557 PORT##nr##_IN_PD, PORT##nr##_IN_PU)
558
559static pinmux_enum_t pinmux_data[] = { 516static pinmux_enum_t pinmux_data[] = {
560 /* specify valid pin states for each pin in GPIO mode */ 517 /* specify valid pin states for each pin in GPIO mode */
561 518
@@ -1561,6 +1518,24 @@ static pinmux_enum_t pinmux_data[] = {
1561 MSEL4CR_MSEL15_0), 1518 MSEL4CR_MSEL15_0),
1562 PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT297_IN_PU, 1519 PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT297_IN_PU,
1563 MSEL4CR_MSEL15_1), 1520 MSEL4CR_MSEL15_1),
1521
1522 PINMUX_DATA(MMCD0_0_PU_MARK,
1523 PORT271_FN1, PORT271_IN_PU, MSEL4CR_MSEL15_0),
1524 PINMUX_DATA(MMCD0_1_PU_MARK,
1525 PORT272_FN1, PORT272_IN_PU, MSEL4CR_MSEL15_0),
1526 PINMUX_DATA(MMCD0_2_PU_MARK,
1527 PORT273_FN1, PORT273_IN_PU, MSEL4CR_MSEL15_0),
1528 PINMUX_DATA(MMCD0_3_PU_MARK,
1529 PORT274_FN1, PORT274_IN_PU, MSEL4CR_MSEL15_0),
1530 PINMUX_DATA(MMCD0_4_PU_MARK,
1531 PORT275_FN1, PORT275_IN_PU, MSEL4CR_MSEL15_0),
1532 PINMUX_DATA(MMCD0_5_PU_MARK,
1533 PORT276_FN1, PORT276_IN_PU, MSEL4CR_MSEL15_0),
1534 PINMUX_DATA(MMCD0_6_PU_MARK,
1535 PORT277_FN1, PORT277_IN_PU, MSEL4CR_MSEL15_0),
1536 PINMUX_DATA(MMCD0_7_PU_MARK,
1537 PORT278_FN1, PORT278_IN_PU, MSEL4CR_MSEL15_0),
1538
1564 PINMUX_DATA(FSIBISLD_PU_MARK, PORT39_FN1, PORT39_IN_PU), 1539 PINMUX_DATA(FSIBISLD_PU_MARK, PORT39_FN1, PORT39_IN_PU),
1565 PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU), 1540 PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU),
1566 PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU), 1541 PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU),
@@ -1568,12 +1543,8 @@ static pinmux_enum_t pinmux_data[] = {
1568 PINMUX_DATA(FSIAISLD_PU_MARK, PORT55_FN1, PORT55_IN_PU), 1543 PINMUX_DATA(FSIAISLD_PU_MARK, PORT55_FN1, PORT55_IN_PU),
1569}; 1544};
1570 1545
1571#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
1572#define GPIO_PORT_310() _310(_GPIO_PORT, , unused)
1573#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
1574
1575static struct pinmux_gpio pinmux_gpios[] = { 1546static struct pinmux_gpio pinmux_gpios[] = {
1576 GPIO_PORT_310(), 1547 GPIO_PORT_ALL(),
1577 1548
1578 /* Table 25-1 (Functions 0-7) */ 1549 /* Table 25-1 (Functions 0-7) */
1579 GPIO_FN(VBUS_0), 1550 GPIO_FN(VBUS_0),
@@ -2236,24 +2207,20 @@ static struct pinmux_gpio pinmux_gpios[] = {
2236 GPIO_FN(SDHICMD2_PU), 2207 GPIO_FN(SDHICMD2_PU),
2237 GPIO_FN(MMCCMD0_PU), 2208 GPIO_FN(MMCCMD0_PU),
2238 GPIO_FN(MMCCMD1_PU), 2209 GPIO_FN(MMCCMD1_PU),
2210 GPIO_FN(MMCD0_0_PU),
2211 GPIO_FN(MMCD0_1_PU),
2212 GPIO_FN(MMCD0_2_PU),
2213 GPIO_FN(MMCD0_3_PU),
2214 GPIO_FN(MMCD0_4_PU),
2215 GPIO_FN(MMCD0_5_PU),
2216 GPIO_FN(MMCD0_6_PU),
2217 GPIO_FN(MMCD0_7_PU),
2239 GPIO_FN(FSIACK_PU), 2218 GPIO_FN(FSIACK_PU),
2240 GPIO_FN(FSIAILR_PU), 2219 GPIO_FN(FSIAILR_PU),
2241 GPIO_FN(FSIAIBT_PU), 2220 GPIO_FN(FSIAIBT_PU),
2242 GPIO_FN(FSIAISLD_PU), 2221 GPIO_FN(FSIAISLD_PU),
2243}; 2222};
2244 2223
2245#define PORTCR(nr, reg) \
2246 { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
2247 0, \
2248 /*0001*/ PORT##nr##_OUT , \
2249 /*0010*/ PORT##nr##_IN , 0, 0, 0, 0, 0, 0, 0, \
2250 /*1010*/ PORT##nr##_IN_PD, 0, 0, 0, \
2251 /*1110*/ PORT##nr##_IN_PU, 0, \
2252 PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
2253 PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
2254 PORT##nr##_FN6, PORT##nr##_FN7, 0, 0, 0, 0, 0, 0, 0, 0 } \
2255 }
2256
2257static struct pinmux_cfg_reg pinmux_config_regs[] = { 2224static struct pinmux_cfg_reg pinmux_config_regs[] = {
2258 PORTCR(0, 0xe6050000), /* PORT0CR */ 2225 PORTCR(0, 0xe6050000), /* PORT0CR */
2259 PORTCR(1, 0xe6050001), /* PORT1CR */ 2226 PORTCR(1, 0xe6050001), /* PORT1CR */
diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c
index 79612737c5b2..34bbcbfb1706 100644
--- a/arch/arm/mach-shmobile/pm-sh7372.c
+++ b/arch/arm/mach-shmobile/pm-sh7372.c
@@ -20,6 +20,7 @@
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/irq.h> 21#include <linux/irq.h>
22#include <linux/bitrev.h> 22#include <linux/bitrev.h>
23#include <linux/console.h>
23#include <asm/system.h> 24#include <asm/system.h>
24#include <asm/io.h> 25#include <asm/io.h>
25#include <asm/tlbflush.h> 26#include <asm/tlbflush.h>
@@ -106,9 +107,8 @@ static int pd_power_down(struct generic_pm_domain *genpd)
106 return 0; 107 return 0;
107} 108}
108 109
109static int pd_power_up(struct generic_pm_domain *genpd) 110static int __pd_power_up(struct sh7372_pm_domain *sh7372_pd, bool do_resume)
110{ 111{
111 struct sh7372_pm_domain *sh7372_pd = to_sh7372_pd(genpd);
112 unsigned int mask = 1 << sh7372_pd->bit_shift; 112 unsigned int mask = 1 << sh7372_pd->bit_shift;
113 unsigned int retry_count; 113 unsigned int retry_count;
114 int ret = 0; 114 int ret = 0;
@@ -123,13 +123,13 @@ static int pd_power_up(struct generic_pm_domain *genpd)
123 123
124 for (retry_count = 2 * PSTR_RETRIES; retry_count; retry_count--) { 124 for (retry_count = 2 * PSTR_RETRIES; retry_count; retry_count--) {
125 if (!(__raw_readl(SWUCR) & mask)) 125 if (!(__raw_readl(SWUCR) & mask))
126 goto out; 126 break;
127 if (retry_count > PSTR_RETRIES) 127 if (retry_count > PSTR_RETRIES)
128 udelay(PSTR_DELAY_US); 128 udelay(PSTR_DELAY_US);
129 else 129 else
130 cpu_relax(); 130 cpu_relax();
131 } 131 }
132 if (__raw_readl(SWUCR) & mask) 132 if (!retry_count)
133 ret = -EIO; 133 ret = -EIO;
134 134
135 if (!sh7372_pd->no_debug) 135 if (!sh7372_pd->no_debug)
@@ -137,12 +137,17 @@ static int pd_power_up(struct generic_pm_domain *genpd)
137 mask, __raw_readl(PSTR)); 137 mask, __raw_readl(PSTR));
138 138
139 out: 139 out:
140 if (ret == 0 && sh7372_pd->resume) 140 if (ret == 0 && sh7372_pd->resume && do_resume)
141 sh7372_pd->resume(); 141 sh7372_pd->resume();
142 142
143 return ret; 143 return ret;
144} 144}
145 145
146static int pd_power_up(struct generic_pm_domain *genpd)
147{
148 return __pd_power_up(to_sh7372_pd(genpd), true);
149}
150
146static void sh7372_a4r_suspend(void) 151static void sh7372_a4r_suspend(void)
147{ 152{
148 sh7372_intcs_suspend(); 153 sh7372_intcs_suspend();
@@ -174,7 +179,7 @@ void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd)
174 genpd->active_wakeup = pd_active_wakeup; 179 genpd->active_wakeup = pd_active_wakeup;
175 genpd->power_off = pd_power_down; 180 genpd->power_off = pd_power_down;
176 genpd->power_on = pd_power_up; 181 genpd->power_on = pd_power_up;
177 genpd->power_on(&sh7372_pd->genpd); 182 __pd_power_up(sh7372_pd, false);
178} 183}
179 184
180void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd, 185void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd,
@@ -227,11 +232,23 @@ struct sh7372_pm_domain sh7372_a3sp = {
227 .no_debug = true, 232 .no_debug = true,
228}; 233};
229 234
235static void sh7372_a3sp_init(void)
236{
237 /* serial consoles make use of SCIF hardware located in A3SP,
238 * keep such power domain on if "no_console_suspend" is set.
239 */
240 sh7372_a3sp.stay_on = !console_suspend_enabled;
241}
242
230struct sh7372_pm_domain sh7372_a3sg = { 243struct sh7372_pm_domain sh7372_a3sg = {
231 .bit_shift = 13, 244 .bit_shift = 13,
232}; 245};
233 246
234#endif /* CONFIG_PM */ 247#else /* !CONFIG_PM */
248
249static inline void sh7372_a3sp_init(void) {}
250
251#endif /* !CONFIG_PM */
235 252
236#if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE) 253#if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE)
237static int sh7372_do_idle_core_standby(unsigned long unused) 254static int sh7372_do_idle_core_standby(unsigned long unused)
@@ -402,22 +419,18 @@ static void sh7372_setup_a3sm(unsigned long msk, unsigned long msk2)
402 419
403#ifdef CONFIG_CPU_IDLE 420#ifdef CONFIG_CPU_IDLE
404 421
405static void sh7372_cpuidle_setup(struct cpuidle_device *dev) 422static void sh7372_cpuidle_setup(struct cpuidle_driver *drv)
406{ 423{
407 struct cpuidle_state *state; 424 struct cpuidle_state *state = &drv->states[drv->state_count];
408 int i = dev->state_count;
409 425
410 state = &dev->states[i];
411 snprintf(state->name, CPUIDLE_NAME_LEN, "C2"); 426 snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
412 strncpy(state->desc, "Core Standby Mode", CPUIDLE_DESC_LEN); 427 strncpy(state->desc, "Core Standby Mode", CPUIDLE_DESC_LEN);
413 state->exit_latency = 10; 428 state->exit_latency = 10;
414 state->target_residency = 20 + 10; 429 state->target_residency = 20 + 10;
415 state->power_usage = 1; /* perhaps not */ 430 state->flags = CPUIDLE_FLAG_TIME_VALID;
416 state->flags = 0; 431 shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_core_standby;
417 state->flags |= CPUIDLE_FLAG_TIME_VALID;
418 shmobile_cpuidle_modes[i] = sh7372_enter_core_standby;
419 432
420 dev->state_count = i + 1; 433 drv->state_count++;
421} 434}
422 435
423static void sh7372_cpuidle_init(void) 436static void sh7372_cpuidle_init(void)
@@ -469,6 +482,8 @@ void __init sh7372_pm_init(void)
469 /* do not convert A3SM, A3SP, A3SG, A4R power down into A4S */ 482 /* do not convert A3SM, A3SP, A3SG, A4R power down into A4S */
470 __raw_writel(0, PDNSEL); 483 __raw_writel(0, PDNSEL);
471 484
485 sh7372_a3sp_init();
486
472 sh7372_suspend_init(); 487 sh7372_suspend_init();
473 sh7372_cpuidle_init(); 488 sh7372_cpuidle_init();
474} 489}
diff --git a/arch/arm/mach-shmobile/pm_runtime.c b/arch/arm/mach-shmobile/pm_runtime.c
deleted file mode 100644
index bd5c6a3b8c55..000000000000
--- a/arch/arm/mach-shmobile/pm_runtime.c
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * arch/arm/mach-shmobile/pm_runtime.c
3 *
4 * Runtime PM support code for SuperH Mobile ARM
5 *
6 * Copyright (C) 2009-2010 Magnus Damm
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/io.h>
16#include <linux/pm_runtime.h>
17#include <linux/pm_domain.h>
18#include <linux/pm_clock.h>
19#include <linux/platform_device.h>
20#include <linux/clk.h>
21#include <linux/sh_clk.h>
22#include <linux/bitmap.h>
23#include <linux/slab.h>
24
25#ifdef CONFIG_PM_RUNTIME
26
27static int default_platform_runtime_idle(struct device *dev)
28{
29 /* suspend synchronously to disable clocks immediately */
30 return pm_runtime_suspend(dev);
31}
32
33static struct dev_pm_domain default_pm_domain = {
34 .ops = {
35 .runtime_suspend = pm_clk_suspend,
36 .runtime_resume = pm_clk_resume,
37 .runtime_idle = default_platform_runtime_idle,
38 USE_PLATFORM_PM_SLEEP_OPS
39 },
40};
41
42#define DEFAULT_PM_DOMAIN_PTR (&default_pm_domain)
43
44#else
45
46#define DEFAULT_PM_DOMAIN_PTR NULL
47
48#endif /* CONFIG_PM_RUNTIME */
49
50static struct pm_clk_notifier_block platform_bus_notifier = {
51 .pm_domain = DEFAULT_PM_DOMAIN_PTR,
52 .con_ids = { NULL, },
53};
54
55static int __init sh_pm_runtime_init(void)
56{
57 pm_clk_add_notifier(&platform_bus_type, &platform_bus_notifier);
58 return 0;
59}
60core_initcall(sh_pm_runtime_init);
61
62static int __init sh_pm_runtime_late_init(void)
63{
64 pm_genpd_poweroff_unused();
65 return 0;
66}
67late_initcall(sh_pm_runtime_late_init);
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
index d368f8dafcfd..74743ad3d2d3 100644
--- a/arch/arm/mach-tegra/board-dt.c
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -101,6 +101,13 @@ static void __init tegra_dt_init(void)
101 101
102 tegra_clk_init_from_table(tegra_dt_clk_init_table); 102 tegra_clk_init_from_table(tegra_dt_clk_init_table);
103 103
104 /*
105 * Finished with the static registrations now; fill in the missing
106 * devices
107 */
108 of_platform_populate(NULL, tegra_dt_match_table,
109 tegra20_auxdata_lookup, NULL);
110
104 for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) { 111 for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) {
105 if (of_machine_is_compatible(pinmux_configs[i].machine)) { 112 if (of_machine_is_compatible(pinmux_configs[i].machine)) {
106 pinmux_configs[i].init(); 113 pinmux_configs[i].init();
@@ -110,12 +117,6 @@ static void __init tegra_dt_init(void)
110 117
111 WARN(i == ARRAY_SIZE(pinmux_configs), 118 WARN(i == ARRAY_SIZE(pinmux_configs),
112 "Unknown platform! Pinmuxing not initialized\n"); 119 "Unknown platform! Pinmuxing not initialized\n");
113
114 /*
115 * Finished with the static registrations now; fill in the missing
116 * devices
117 */
118 of_platform_populate(NULL, tegra_dt_match_table, tegra20_auxdata_lookup, NULL);
119} 120}
120 121
121static const char * tegra_dt_board_compat[] = { 122static const char * tegra_dt_board_compat[] = {
diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index e99b45618cd0..7a4a26d5174c 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -16,6 +16,8 @@
16 16
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/of.h>
20
19#include <mach/pinmux.h> 21#include <mach/pinmux.h>
20 22
21#include "gpio-names.h" 23#include "gpio-names.h"
@@ -161,7 +163,9 @@ static struct tegra_gpio_table gpio_table[] = {
161 163
162void harmony_pinmux_init(void) 164void harmony_pinmux_init(void)
163{ 165{
164 platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); 166 if (!of_machine_is_compatible("nvidia,tegra20"))
167 platform_add_devices(pinmux_devices,
168 ARRAY_SIZE(pinmux_devices));
165 169
166 tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux)); 170 tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux));
167 171
diff --git a/arch/arm/mach-tegra/board-paz00-pinmux.c b/arch/arm/mach-tegra/board-paz00-pinmux.c
index fb20894862b0..be30e215f4b7 100644
--- a/arch/arm/mach-tegra/board-paz00-pinmux.c
+++ b/arch/arm/mach-tegra/board-paz00-pinmux.c
@@ -16,6 +16,8 @@
16 16
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/of.h>
20
19#include <mach/pinmux.h> 21#include <mach/pinmux.h>
20 22
21#include "gpio-names.h" 23#include "gpio-names.h"
@@ -158,7 +160,9 @@ static struct tegra_gpio_table gpio_table[] = {
158 160
159void paz00_pinmux_init(void) 161void paz00_pinmux_init(void)
160{ 162{
161 platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); 163 if (!of_machine_is_compatible("nvidia,tegra20"))
164 platform_add_devices(pinmux_devices,
165 ARRAY_SIZE(pinmux_devices));
162 166
163 tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux)); 167 tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux));
164 168
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
index fbce31daa3c9..b1c2972f62fe 100644
--- a/arch/arm/mach-tegra/board-seaboard-pinmux.c
+++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c
@@ -16,6 +16,7 @@
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/of.h>
19 20
20#include <mach/pinmux.h> 21#include <mach/pinmux.h>
21#include <mach/pinmux-t2.h> 22#include <mach/pinmux-t2.h>
@@ -191,6 +192,7 @@ static struct tegra_gpio_table common_gpio_table[] = {
191 { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true }, 192 { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true },
192 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true }, 193 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true },
193 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true }, 194 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true },
195 { .gpio = TEGRA_GPIO_HP_DET, .enable = true },
194 { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true }, 196 { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true },
195 { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true }, 197 { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
196 { .gpio = TEGRA_GPIO_USB1, .enable = true }, 198 { .gpio = TEGRA_GPIO_USB1, .enable = true },
@@ -218,7 +220,9 @@ static void __init update_pinmux(struct tegra_pingroup_config *newtbl, int size)
218 220
219void __init seaboard_common_pinmux_init(void) 221void __init seaboard_common_pinmux_init(void)
220{ 222{
221 platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); 223 if (!of_machine_is_compatible("nvidia,tegra20"))
224 platform_add_devices(pinmux_devices,
225 ARRAY_SIZE(pinmux_devices));
222 226
223 tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux)); 227 tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux));
224 228
diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c
index 4969dd28a04c..7ab719d46da0 100644
--- a/arch/arm/mach-tegra/board-trimslice-pinmux.c
+++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c
@@ -16,6 +16,7 @@
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/of.h>
19 20
20#include <mach/pinmux.h> 21#include <mach/pinmux.h>
21 22
@@ -157,7 +158,9 @@ static struct tegra_gpio_table gpio_table[] = {
157 158
158void __init trimslice_pinmux_init(void) 159void __init trimslice_pinmux_init(void)
159{ 160{
160 platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); 161 if (!of_machine_is_compatible("nvidia,tegra20"))
162 platform_add_devices(pinmux_devices,
163 ARRAY_SIZE(pinmux_devices));
161 tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux)); 164 tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
162 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); 165 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
163} 166}
diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c
index 7a1fa6adb7c3..5b0c38abacc1 100644
--- a/arch/arm/mach-w90x900/dev.c
+++ b/arch/arm/mach-w90x900/dev.c
@@ -422,7 +422,7 @@ struct platform_device nuc900_device_kpi = {
422 422
423/* LCD controller*/ 423/* LCD controller*/
424 424
425static struct nuc900fb_display __initdata nuc900_lcd_info[] = { 425static struct nuc900fb_display nuc900_lcd_info[] = {
426 /* Giantplus Technology GPM1040A0 320x240 Color TFT LCD */ 426 /* Giantplus Technology GPM1040A0 320x240 Color TFT LCD */
427 [0] = { 427 [0] = {
428 .type = LCM_DCCS_VA_SRC_RGB565, 428 .type = LCM_DCCS_VA_SRC_RGB565,
@@ -445,7 +445,7 @@ static struct nuc900fb_display __initdata nuc900_lcd_info[] = {
445 }, 445 },
446}; 446};
447 447
448static struct nuc900fb_mach_info nuc900_fb_info __initdata = { 448static struct nuc900fb_mach_info nuc900_fb_info = {
449#if defined(CONFIG_GPM1040A0_320X240) 449#if defined(CONFIG_GPM1040A0_320X240)
450 .displays = &nuc900_lcd_info[0], 450 .displays = &nuc900_lcd_info[0],
451#else 451#else
diff --git a/arch/arm/mach-w90x900/include/mach/mfp.h b/arch/arm/mach-w90x900/include/mach/mfp.h
index 94c0e71617c6..23ef1f573abd 100644
--- a/arch/arm/mach-w90x900/include/mach/mfp.h
+++ b/arch/arm/mach-w90x900/include/mach/mfp.h
@@ -19,6 +19,7 @@
19extern void mfp_set_groupf(struct device *dev); 19extern void mfp_set_groupf(struct device *dev);
20extern void mfp_set_groupc(struct device *dev); 20extern void mfp_set_groupc(struct device *dev);
21extern void mfp_set_groupi(struct device *dev); 21extern void mfp_set_groupi(struct device *dev);
22extern void mfp_set_groupg(struct device *dev); 22extern void mfp_set_groupg(struct device *dev, const char *subname);
23extern void mfp_set_groupd(struct device *dev, const char *subname);
23 24
24#endif /* __ASM_ARCH_MFP_H */ 25#endif /* __ASM_ARCH_MFP_H */
diff --git a/arch/arm/mach-w90x900/include/mach/nuc900_spi.h b/arch/arm/mach-w90x900/include/mach/nuc900_spi.h
index bd94819e314f..2c4e0c128501 100644
--- a/arch/arm/mach-w90x900/include/mach/nuc900_spi.h
+++ b/arch/arm/mach-w90x900/include/mach/nuc900_spi.h
@@ -14,7 +14,7 @@
14#ifndef __ASM_ARCH_SPI_H 14#ifndef __ASM_ARCH_SPI_H
15#define __ASM_ARCH_SPI_H 15#define __ASM_ARCH_SPI_H
16 16
17extern void mfp_set_groupg(struct device *dev); 17extern void mfp_set_groupg(struct device *dev, const char *subname);
18 18
19struct nuc900_spi_info { 19struct nuc900_spi_info {
20 unsigned int num_cs; 20 unsigned int num_cs;
diff --git a/arch/arm/mach-w90x900/mfp.c b/arch/arm/mach-w90x900/mfp.c
index fb7fb627b1a5..9dd74612bb87 100644
--- a/arch/arm/mach-w90x900/mfp.c
+++ b/arch/arm/mach-w90x900/mfp.c
@@ -26,10 +26,8 @@
26#define REG_MFSEL (W90X900_VA_GCR + 0xC) 26#define REG_MFSEL (W90X900_VA_GCR + 0xC)
27 27
28#define GPSELF (0x01 << 1) 28#define GPSELF (0x01 << 1)
29
30#define GPSELC (0x03 << 2) 29#define GPSELC (0x03 << 2)
31#define ENKPI (0x02 << 2) 30#define GPSELD (0x0f << 4)
32#define ENNAND (0x01 << 2)
33 31
34#define GPSELEI0 (0x01 << 26) 32#define GPSELEI0 (0x01 << 26)
35#define GPSELEI1 (0x01 << 27) 33#define GPSELEI1 (0x01 << 27)
@@ -37,11 +35,16 @@
37#define GPIOG0TO1 (0x03 << 14) 35#define GPIOG0TO1 (0x03 << 14)
38#define GPIOG2TO3 (0x03 << 16) 36#define GPIOG2TO3 (0x03 << 16)
39#define GPIOG22TO23 (0x03 << 22) 37#define GPIOG22TO23 (0x03 << 22)
38#define GPIOG18TO20 (0x07 << 18)
40 39
41#define ENSPI (0x0a << 14) 40#define ENSPI (0x0a << 14)
42#define ENI2C0 (0x01 << 14) 41#define ENI2C0 (0x01 << 14)
43#define ENI2C1 (0x01 << 16) 42#define ENI2C1 (0x01 << 16)
44#define ENAC97 (0x02 << 22) 43#define ENAC97 (0x02 << 22)
44#define ENSD1 (0x02 << 18)
45#define ENSD0 (0x0a << 4)
46#define ENKPI (0x02 << 2)
47#define ENNAND (0x01 << 2)
45 48
46static DEFINE_MUTEX(mfp_mutex); 49static DEFINE_MUTEX(mfp_mutex);
47 50
@@ -127,16 +130,19 @@ void mfp_set_groupi(struct device *dev)
127} 130}
128EXPORT_SYMBOL(mfp_set_groupi); 131EXPORT_SYMBOL(mfp_set_groupi);
129 132
130void mfp_set_groupg(struct device *dev) 133void mfp_set_groupg(struct device *dev, const char *subname)
131{ 134{
132 unsigned long mfpen; 135 unsigned long mfpen;
133 const char *dev_id; 136 const char *dev_id;
134 137
135 BUG_ON(!dev); 138 BUG_ON((!dev) && (!subname));
136 139
137 mutex_lock(&mfp_mutex); 140 mutex_lock(&mfp_mutex);
138 141
139 dev_id = dev_name(dev); 142 if (subname != NULL)
143 dev_id = subname;
144 else
145 dev_id = dev_name(dev);
140 146
141 mfpen = __raw_readl(REG_MFSEL); 147 mfpen = __raw_readl(REG_MFSEL);
142 148
@@ -152,6 +158,9 @@ void mfp_set_groupg(struct device *dev)
152 } else if (strcmp(dev_id, "nuc900-audio") == 0) { 158 } else if (strcmp(dev_id, "nuc900-audio") == 0) {
153 mfpen &= ~(GPIOG22TO23); 159 mfpen &= ~(GPIOG22TO23);
154 mfpen |= ENAC97;/*enable AC97*/ 160 mfpen |= ENAC97;/*enable AC97*/
161 } else if (strcmp(dev_id, "nuc900-mmc-port1") == 0) {
162 mfpen &= ~(GPIOG18TO20);
163 mfpen |= (ENSD1 | 0x01);/*enable sd1*/
155 } else { 164 } else {
156 mfpen &= ~(GPIOG0TO1 | GPIOG2TO3);/*GPIOG[3:0]*/ 165 mfpen &= ~(GPIOG0TO1 | GPIOG2TO3);/*GPIOG[3:0]*/
157 } 166 }
@@ -162,3 +171,30 @@ void mfp_set_groupg(struct device *dev)
162} 171}
163EXPORT_SYMBOL(mfp_set_groupg); 172EXPORT_SYMBOL(mfp_set_groupg);
164 173
174void mfp_set_groupd(struct device *dev, const char *subname)
175{
176 unsigned long mfpen;
177 const char *dev_id;
178
179 BUG_ON((!dev) && (!subname));
180
181 mutex_lock(&mfp_mutex);
182
183 if (subname != NULL)
184 dev_id = subname;
185 else
186 dev_id = dev_name(dev);
187
188 mfpen = __raw_readl(REG_MFSEL);
189
190 if (strcmp(dev_id, "nuc900-mmc-port0") == 0) {
191 mfpen &= ~GPSELD;/*enable sd0*/
192 mfpen |= ENSD0;
193 } else
194 mfpen &= (~GPSELD);
195
196 __raw_writel(mfpen, REG_MFSEL);
197
198 mutex_unlock(&mfp_mutex);
199}
200EXPORT_SYMBOL(mfp_set_groupd);
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index a08a95107a63..b3a1f2b3ada3 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -10,7 +10,7 @@ choice
10 10
11config ARCH_IMX_V4_V5 11config ARCH_IMX_V4_V5
12 bool "i.MX1, i.MX21, i.MX25, i.MX27" 12 bool "i.MX1, i.MX21, i.MX25, i.MX27"
13 select AUTO_ZRELADDR 13 select AUTO_ZRELADDR if !ZBOOT_ROM
14 select ARM_PATCH_PHYS_VIRT 14 select ARM_PATCH_PHYS_VIRT
15 help 15 help
16 This enables support for systems based on the Freescale i.MX ARMv4 16 This enables support for systems based on the Freescale i.MX ARMv4
@@ -26,7 +26,7 @@ config ARCH_IMX_V6_V7
26 26
27config ARCH_MX5 27config ARCH_MX5
28 bool "i.MX50, i.MX51, i.MX53" 28 bool "i.MX50, i.MX51, i.MX53"
29 select AUTO_ZRELADDR 29 select AUTO_ZRELADDR if !ZBOOT_ROM
30 select ARM_PATCH_PHYS_VIRT 30 select ARM_PATCH_PHYS_VIRT
31 help 31 help
32 This enables support for machines using Freescale's i.MX50 and i.MX53 32 This enables support for machines using Freescale's i.MX50 and i.MX53
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c
index 8875fb415f68..55f15699a383 100644
--- a/arch/arm/plat-mxc/avic.c
+++ b/arch/arm/plat-mxc/avic.c
@@ -22,6 +22,7 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <mach/common.h> 23#include <mach/common.h>
24#include <asm/mach/irq.h> 24#include <asm/mach/irq.h>
25#include <asm/exception.h>
25#include <mach/hardware.h> 26#include <mach/hardware.h>
26 27
27#include "irq-common.h" 28#include "irq-common.h"
diff --git a/arch/arm/plat-mxc/gic.c b/arch/arm/plat-mxc/gic.c
index b3b8eed263b8..12f8f8109010 100644
--- a/arch/arm/plat-mxc/gic.c
+++ b/arch/arm/plat-mxc/gic.c
@@ -28,21 +28,14 @@ asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
28 if (irqnr == 1023) 28 if (irqnr == 1023)
29 break; 29 break;
30 30
31 if (irqnr > 29 && irqnr < 1021) 31 if (irqnr > 15 && irqnr < 1021)
32 handle_IRQ(irqnr, regs); 32 handle_IRQ(irqnr, regs);
33#ifdef CONFIG_SMP 33#ifdef CONFIG_SMP
34 else if (irqnr < 16) { 34 else {
35 writel_relaxed(irqstat, gic_cpu_base_addr + 35 writel_relaxed(irqstat, gic_cpu_base_addr +
36 GIC_CPU_EOI); 36 GIC_CPU_EOI);
37 handle_IPI(irqnr, regs); 37 handle_IPI(irqnr, regs);
38 } 38 }
39#endif 39#endif
40#ifdef CONFIG_LOCAL_TIMERS
41 else if (irqnr == 29) {
42 writel_relaxed(irqstat, gic_cpu_base_addr +
43 GIC_CPU_EOI);
44 handle_local_timer(regs);
45 }
46#endif
47 } while (1); 40 } while (1);
48} 41}
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
index 9fe0dfcf4e7e..ca5cf26a04b1 100644
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ b/arch/arm/plat-mxc/include/mach/entry-macro.S
@@ -25,6 +25,3 @@
25 25
26 .macro test_for_ipi, irqnr, irqstat, base, tmp 26 .macro test_for_ipi, irqnr, irqstat, base, tmp
27 .endm 27 .endm
28
29 .macro test_for_ltirq, irqnr, irqstat, base, tmp
30 .endm
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
index e993a184189a..a3c164c7ba82 100644
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/plat-mxc/tzic.c
@@ -17,6 +17,7 @@
17#include <linux/io.h> 17#include <linux/io.h>
18 18
19#include <asm/mach/irq.h> 19#include <asm/mach/irq.h>
20#include <asm/exception.h>
20 21
21#include <mach/hardware.h> 22#include <mach/hardware.h>
22#include <mach/common.h> 23#include <mach/common.h>
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-21 13:14:24 -0500