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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-03-28 13:52:44 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-03-28 13:52:44 -0400
commit5f183860d5007ec76ea36bfa6c36d66e37f0dbcf (patch)
treef3f593fa2d1e01c2a6a4d9da9786ad1e12dfc2a0 /arch/arm
parent938c0ace3ffb8cc2073a6d2e68fa7a6ab7cb471e (diff)
parenta10aabd5e313ec6481569be20d120191692b4ca6 (diff)
Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6 into devel-stable
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/mach-imx/Kconfig1
-rw-r--r--arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c8
-rw-r--r--arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c14
-rw-r--r--arch/arm/mach-mx3/mach-pcm043.c12
-rw-r--r--arch/arm/mach-mx5/Kconfig1
-rw-r--r--arch/arm/mach-mx5/Makefile2
-rw-r--r--arch/arm/mach-mx5/board-mx51_babbage.c5
-rw-r--r--arch/arm/mach-mx5/board-mx53_evk.c9
-rw-r--r--arch/arm/mach-mx5/board-mx53_loco.c25
-rw-r--r--arch/arm/mach-mx5/clock-mx51-mx53.c9
-rw-r--r--arch/arm/mach-mx5/cpu.c59
-rw-r--r--arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c4
-rw-r--r--arch/arm/mach-mx5/mx51_efika.c7
-rw-r--r--arch/arm/mach-mx5/system.c84
-rw-r--r--arch/arm/mach-mxs/Kconfig2
-rw-r--r--arch/arm/mach-mxs/clock-mx23.c15
-rw-r--r--arch/arm/mach-mxs/clock-mx28.c18
-rw-r--r--arch/arm/mach-mxs/devices-mx23.h4
-rw-r--r--arch/arm/mach-mxs/devices-mx28.h4
-rw-r--r--arch/arm/mach-mxs/devices/Kconfig3
-rw-r--r--arch/arm/mach-mxs/devices/Makefile1
-rw-r--r--arch/arm/mach-mxs/devices/platform-mxs-mmc.c73
-rw-r--r--arch/arm/mach-mxs/include/mach/devices-common.h13
-rw-r--r--arch/arm/mach-mxs/mach-mx23evk.c44
-rw-r--r--arch/arm/mach-mxs/mach-mx28evk.c89
-rw-r--r--arch/arm/mach-mxs/module-tx28.c41
-rw-r--r--arch/arm/mach-mxs/module-tx28.h1
-rw-r--r--arch/arm/plat-mxc/devices/platform-fec.c2
-rw-r--r--arch/arm/plat-mxc/devices/platform-imxdi_rtc.c2
-rw-r--r--arch/arm/plat-mxc/include/mach/audmux.h10
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx2x.h12
-rw-r--r--arch/arm/plat-mxc/include/mach/mx50.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/mx51.h1
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc.h23
-rw-r--r--arch/arm/plat-mxc/include/mach/system.h6
-rw-r--r--arch/arm/plat-mxc/time.c25
37 files changed, 600 insertions, 34 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 93d595a7477a..4f8f3a4e4e0d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -365,6 +365,7 @@ config ARCH_MXC
365 select GENERIC_CLOCKEVENTS 365 select GENERIC_CLOCKEVENTS
366 select ARCH_REQUIRE_GPIOLIB 366 select ARCH_REQUIRE_GPIOLIB
367 select CLKDEV_LOOKUP 367 select CLKDEV_LOOKUP
368 select HAVE_SCHED_CLOCK
368 help 369 help
369 Support for Freescale MXC/iMX-based family of processors 370 Support for Freescale MXC/iMX-based family of processors
370 371
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5eec099e0c72..56b930a13443 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -255,6 +255,7 @@ config MACH_IMX27_VISSTRIM_M10
255 bool "Vista Silicon i.MX27 Visstrim_m10" 255 bool "Vista Silicon i.MX27 Visstrim_m10"
256 select SOC_IMX27 256 select SOC_IMX27
257 select IMX_HAVE_PLATFORM_IMX_I2C 257 select IMX_HAVE_PLATFORM_IMX_I2C
258 select IMX_HAVE_PLATFORM_IMX_SSI
258 select IMX_HAVE_PLATFORM_IMX_UART 259 select IMX_HAVE_PLATFORM_IMX_UART
259 select IMX_HAVE_PLATFORM_MXC_MMC 260 select IMX_HAVE_PLATFORM_MXC_MMC
260 select IMX_HAVE_PLATFORM_MXC_EHCI 261 select IMX_HAVE_PLATFORM_MXC_EHCI
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
index cb705c28de02..6269053505f7 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
@@ -34,6 +34,7 @@
34#include <mach/mx25.h> 34#include <mach/mx25.h>
35#include <mach/imx-uart.h> 35#include <mach/imx-uart.h>
36#include <mach/audmux.h> 36#include <mach/audmux.h>
37#include <mach/esdhc.h>
37 38
38#include "devices-imx25.h" 39#include "devices-imx25.h"
39 40
@@ -242,6 +243,11 @@ struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = {
242 .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE, 243 .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,
243}; 244};
244 245
246static struct esdhc_platform_data sd1_pdata = {
247 .cd_gpio = GPIO_SD1CD,
248 .wp_gpio = -EINVAL,
249};
250
245/* 251/*
246 * system init for baseboard usage. Will be called by cpuimx25 init. 252 * system init for baseboard usage. Will be called by cpuimx25 init.
247 * 253 *
@@ -275,7 +281,7 @@ void __init eukrea_mbimxsd25_baseboard_init(void)
275 imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata); 281 imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
276 282
277 imx25_add_flexcan1(NULL); 283 imx25_add_flexcan1(NULL);
278 imx25_add_sdhci_esdhc_imx(0, NULL); 284 imx25_add_sdhci_esdhc_imx(0, &sd1_pdata);
279 285
280 gpio_request(GPIO_LED1, "LED1"); 286 gpio_request(GPIO_LED1, "LED1");
281 gpio_direction_output(GPIO_LED1, 1); 287 gpio_direction_output(GPIO_LED1, 1);
diff --git a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
index 80761474c0f8..2e288b38b4ad 100644
--- a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
@@ -43,6 +43,7 @@
43#include <mach/ipu.h> 43#include <mach/ipu.h>
44#include <mach/mx3fb.h> 44#include <mach/mx3fb.h>
45#include <mach/audmux.h> 45#include <mach/audmux.h>
46#include <mach/esdhc.h>
46 47
47#include "devices-imx35.h" 48#include "devices-imx35.h"
48#include "devices.h" 49#include "devices.h"
@@ -163,11 +164,14 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
163 MX35_PAD_SD1_DATA1__ESDHC1_DAT1, 164 MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
164 MX35_PAD_SD1_DATA2__ESDHC1_DAT2, 165 MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
165 MX35_PAD_SD1_DATA3__ESDHC1_DAT3, 166 MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
167 /* SD1 CD */
168 MX35_PAD_LD18__GPIO3_24,
166}; 169};
167 170
168#define GPIO_LED1 IMX_GPIO_NR(3, 29) 171#define GPIO_LED1 IMX_GPIO_NR(3, 29)
169#define GPIO_SWITCH1 IMX_GPIO_NR(3, 25) 172#define GPIO_SWITCH1 IMX_GPIO_NR(3, 25)
170#define GPIO_LCDPWR (4) 173#define GPIO_LCDPWR IMX_GPIO_NR(1, 4)
174#define GPIO_SD1CD IMX_GPIO_NR(3, 24)
171 175
172static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd, 176static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd,
173 unsigned int power) 177 unsigned int power)
@@ -254,6 +258,11 @@ struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = {
254 .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE, 258 .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,
255}; 259};
256 260
261static struct esdhc_platform_data sd1_pdata = {
262 .cd_gpio = GPIO_SD1CD,
263 .wp_gpio = -EINVAL,
264};
265
257/* 266/*
258 * system init for baseboard usage. Will be called by cpuimx35 init. 267 * system init for baseboard usage. Will be called by cpuimx35 init.
259 * 268 *
@@ -289,7 +298,7 @@ void __init eukrea_mbimxsd35_baseboard_init(void)
289 imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata); 298 imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
290 299
291 imx35_add_flexcan1(NULL); 300 imx35_add_flexcan1(NULL);
292 imx35_add_sdhci_esdhc_imx(0, NULL); 301 imx35_add_sdhci_esdhc_imx(0, &sd1_pdata);
293 302
294 gpio_request(GPIO_LED1, "LED1"); 303 gpio_request(GPIO_LED1, "LED1");
295 gpio_direction_output(GPIO_LED1, 1); 304 gpio_direction_output(GPIO_LED1, 1);
@@ -301,7 +310,6 @@ void __init eukrea_mbimxsd35_baseboard_init(void)
301 310
302 gpio_request(GPIO_LCDPWR, "LCDPWR"); 311 gpio_request(GPIO_LCDPWR, "LCDPWR");
303 gpio_direction_output(GPIO_LCDPWR, 1); 312 gpio_direction_output(GPIO_LCDPWR, 1);
304 gpio_free(GPIO_LCDPWR);
305 313
306 i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices, 314 i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
307 ARRAY_SIZE(eukrea_mbimxsd_i2c_devices)); 315 ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
diff --git a/arch/arm/mach-mx3/mach-pcm043.c b/arch/arm/mach-mx3/mach-pcm043.c
index b3ecfb22d241..036ba1a4704b 100644
--- a/arch/arm/mach-mx3/mach-pcm043.c
+++ b/arch/arm/mach-mx3/mach-pcm043.c
@@ -40,6 +40,7 @@
40#include <mach/mx3fb.h> 40#include <mach/mx3fb.h>
41#include <mach/ulpi.h> 41#include <mach/ulpi.h>
42#include <mach/audmux.h> 42#include <mach/audmux.h>
43#include <mach/esdhc.h>
43 44
44#include "devices-imx35.h" 45#include "devices-imx35.h"
45#include "devices.h" 46#include "devices.h"
@@ -217,11 +218,15 @@ static iomux_v3_cfg_t pcm043_pads[] = {
217 MX35_PAD_SD1_DATA1__ESDHC1_DAT1, 218 MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
218 MX35_PAD_SD1_DATA2__ESDHC1_DAT2, 219 MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
219 MX35_PAD_SD1_DATA3__ESDHC1_DAT3, 220 MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
221 MX35_PAD_ATA_DATA10__GPIO2_23, /* WriteProtect */
222 MX35_PAD_ATA_DATA11__GPIO2_24, /* CardDetect */
220}; 223};
221 224
222#define AC97_GPIO_TXFS IMX_GPIO_NR(2, 31) 225#define AC97_GPIO_TXFS IMX_GPIO_NR(2, 31)
223#define AC97_GPIO_TXD IMX_GPIO_NR(2, 28) 226#define AC97_GPIO_TXD IMX_GPIO_NR(2, 28)
224#define AC97_GPIO_RESET IMX_GPIO_NR(2, 0) 227#define AC97_GPIO_RESET IMX_GPIO_NR(2, 0)
228#define SD1_GPIO_WP IMX_GPIO_NR(2, 23)
229#define SD1_GPIO_CD IMX_GPIO_NR(2, 24)
225 230
226static void pcm043_ac97_warm_reset(struct snd_ac97 *ac97) 231static void pcm043_ac97_warm_reset(struct snd_ac97 *ac97)
227{ 232{
@@ -346,6 +351,11 @@ static int __init pcm043_otg_mode(char *options)
346} 351}
347__setup("otg_mode=", pcm043_otg_mode); 352__setup("otg_mode=", pcm043_otg_mode);
348 353
354static struct esdhc_platform_data sd1_pdata = {
355 .wp_gpio = SD1_GPIO_WP,
356 .cd_gpio = SD1_GPIO_CD,
357};
358
349/* 359/*
350 * Board specific initialization. 360 * Board specific initialization.
351 */ 361 */
@@ -395,7 +405,7 @@ static void __init pcm043_init(void)
395 imx35_add_fsl_usb2_udc(&otg_device_pdata); 405 imx35_add_fsl_usb2_udc(&otg_device_pdata);
396 406
397 imx35_add_flexcan1(NULL); 407 imx35_add_flexcan1(NULL);
398 imx35_add_sdhci_esdhc_imx(0, NULL); 408 imx35_add_sdhci_esdhc_imx(0, &sd1_pdata);
399} 409}
400 410
401static void __init pcm043_timer_init(void) 411static void __init pcm043_timer_init(void)
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index 83ee08847d4d..159340da9191 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -165,6 +165,7 @@ config MACH_MX53_LOCO
165 select IMX_HAVE_PLATFORM_IMX_I2C 165 select IMX_HAVE_PLATFORM_IMX_I2C
166 select IMX_HAVE_PLATFORM_IMX_UART 166 select IMX_HAVE_PLATFORM_IMX_UART
167 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX 167 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
168 select IMX_HAVE_PLATFORM_GPIO_KEYS
168 help 169 help
169 Include support for MX53 LOCO platform. This includes specific 170 Include support for MX53 LOCO platform. This includes specific
170 configurations for the board and its peripherals. 171 configurations for the board and its peripherals.
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index 4f63048be3ca..0b9338cec516 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5# Object file lists. 5# Object file lists.
6obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o 6obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o system.o
7obj-$(CONFIG_SOC_IMX50) += mm-mx50.o 7obj-$(CONFIG_SOC_IMX50) += mm-mx50.o
8 8
9obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o 9obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index b2ecd194e76d..bea4e4135f9d 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -228,13 +228,12 @@ static inline void babbage_fec_reset(void)
228 int ret; 228 int ret;
229 229
230 /* reset FEC PHY */ 230 /* reset FEC PHY */
231 ret = gpio_request(BABBAGE_FEC_PHY_RESET, "fec-phy-reset"); 231 ret = gpio_request_one(BABBAGE_FEC_PHY_RESET,
232 GPIOF_OUT_INIT_LOW, "fec-phy-reset");
232 if (ret) { 233 if (ret) {
233 printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret); 234 printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret);
234 return; 235 return;
235 } 236 }
236 gpio_direction_output(BABBAGE_FEC_PHY_RESET, 0);
237 gpio_set_value(BABBAGE_FEC_PHY_RESET, 0);
238 msleep(1); 237 msleep(1);
239 gpio_set_value(BABBAGE_FEC_PHY_RESET, 1); 238 gpio_set_value(BABBAGE_FEC_PHY_RESET, 1);
240} 239}
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c
index 7b5735c5ea59..2af3f43f74db 100644
--- a/arch/arm/mach-mx5/board-mx53_evk.c
+++ b/arch/arm/mach-mx5/board-mx53_evk.c
@@ -34,7 +34,7 @@
34#include <mach/imx-uart.h> 34#include <mach/imx-uart.h>
35#include <mach/iomux-mx53.h> 35#include <mach/iomux-mx53.h>
36 36
37#define SMD_FEC_PHY_RST IMX_GPIO_NR(7, 6) 37#define MX53_EVK_FEC_PHY_RST IMX_GPIO_NR(7, 6)
38#define EVK_ECSPI1_CS0 IMX_GPIO_NR(2, 30) 38#define EVK_ECSPI1_CS0 IMX_GPIO_NR(2, 30)
39#define EVK_ECSPI1_CS1 IMX_GPIO_NR(3, 19) 39#define EVK_ECSPI1_CS1 IMX_GPIO_NR(3, 19)
40 40
@@ -82,15 +82,14 @@ static inline void mx53_evk_fec_reset(void)
82 int ret; 82 int ret;
83 83
84 /* reset FEC PHY */ 84 /* reset FEC PHY */
85 ret = gpio_request(SMD_FEC_PHY_RST, "fec-phy-reset"); 85 ret = gpio_request_one(MX53_EVK_FEC_PHY_RST, GPIOF_OUT_INIT_LOW,
86 "fec-phy-reset");
86 if (ret) { 87 if (ret) {
87 printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret); 88 printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret);
88 return; 89 return;
89 } 90 }
90 gpio_direction_output(SMD_FEC_PHY_RST, 0);
91 gpio_set_value(SMD_FEC_PHY_RST, 0);
92 msleep(1); 91 msleep(1);
93 gpio_set_value(SMD_FEC_PHY_RST, 1); 92 gpio_set_value(MX53_EVK_FEC_PHY_RST, 1);
94} 93}
95 94
96static struct fec_platform_data mx53_evk_fec_pdata = { 95static struct fec_platform_data mx53_evk_fec_pdata = {
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c
index 0a18f8d23eb0..10a1bea10548 100644
--- a/arch/arm/mach-mx5/board-mx53_loco.c
+++ b/arch/arm/mach-mx5/board-mx53_loco.c
@@ -36,6 +36,9 @@
36#include "crm_regs.h" 36#include "crm_regs.h"
37#include "devices-imx53.h" 37#include "devices-imx53.h"
38 38
39#define MX53_LOCO_POWER IMX_GPIO_NR(1, 8)
40#define MX53_LOCO_UI1 IMX_GPIO_NR(2, 14)
41#define MX53_LOCO_UI2 IMX_GPIO_NR(2, 15)
39#define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6) 42#define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6)
40 43
41static iomux_v3_cfg_t mx53_loco_pads[] = { 44static iomux_v3_cfg_t mx53_loco_pads[] = {
@@ -180,6 +183,27 @@ static iomux_v3_cfg_t mx53_loco_pads[] = {
180 MX53_PAD_GPIO_8__GPIO1_8, 183 MX53_PAD_GPIO_8__GPIO1_8,
181}; 184};
182 185
186#define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake) \
187{ \
188 .gpio = gpio_num, \
189 .type = EV_KEY, \
190 .code = ev_code, \
191 .active_low = act_low, \
192 .desc = "btn " descr, \
193 .wakeup = wake, \
194}
195
196static const struct gpio_keys_button loco_buttons[] __initconst = {
197 GPIO_BUTTON(MX53_LOCO_POWER, KEY_POWER, 1, "power", 0),
198 GPIO_BUTTON(MX53_LOCO_UI1, KEY_VOLUMEUP, 1, "volume-up", 0),
199 GPIO_BUTTON(MX53_LOCO_UI2, KEY_VOLUMEDOWN, 1, "volume-down", 0),
200};
201
202static const struct gpio_keys_platform_data loco_button_data __initconst = {
203 .buttons = loco_buttons,
204 .nbuttons = ARRAY_SIZE(loco_buttons),
205};
206
183static inline void mx53_loco_fec_reset(void) 207static inline void mx53_loco_fec_reset(void)
184{ 208{
185 int ret; 209 int ret;
@@ -215,6 +239,7 @@ static void __init mx53_loco_board_init(void)
215 imx53_add_imx_i2c(1, &mx53_loco_i2c_data); 239 imx53_add_imx_i2c(1, &mx53_loco_i2c_data);
216 imx53_add_sdhci_esdhc_imx(0, NULL); 240 imx53_add_sdhci_esdhc_imx(0, NULL);
217 imx53_add_sdhci_esdhc_imx(2, NULL); 241 imx53_add_sdhci_esdhc_imx(2, NULL);
242 imx_add_gpio_keys(&loco_button_data);
218} 243}
219 244
220static void __init mx53_loco_timer_init(void) 245static void __init mx53_loco_timer_init(void)
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index 652ace413825..fdbc05ed5513 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -865,6 +865,13 @@ static struct clk aips_tz2_clk = {
865 .disable = _clk_ccgr_disable_inwait, 865 .disable = _clk_ccgr_disable_inwait,
866}; 866};
867 867
868static struct clk gpc_dvfs_clk = {
869 .enable_reg = MXC_CCM_CCGR5,
870 .enable_shift = MXC_CCM_CCGRx_CG12_OFFSET,
871 .enable = _clk_ccgr_enable,
872 .disable = _clk_ccgr_disable,
873};
874
868static struct clk gpt_32k_clk = { 875static struct clk gpt_32k_clk = {
869 .id = 0, 876 .id = 0,
870 .parent = &ckil_clk, 877 .parent = &ckil_clk,
@@ -1448,6 +1455,7 @@ static struct clk_lookup mx51_lookups[] = {
1448 _REGISTER_CLOCK("imx-ipuv3", NULL, ipu_clk) 1455 _REGISTER_CLOCK("imx-ipuv3", NULL, ipu_clk)
1449 _REGISTER_CLOCK("imx-ipuv3", "di0", ipu_di0_clk) 1456 _REGISTER_CLOCK("imx-ipuv3", "di0", ipu_di0_clk)
1450 _REGISTER_CLOCK("imx-ipuv3", "di1", ipu_di1_clk) 1457 _REGISTER_CLOCK("imx-ipuv3", "di1", ipu_di1_clk)
1458 _REGISTER_CLOCK(NULL, "gpc_dvfs", gpc_dvfs_clk)
1451}; 1459};
1452 1460
1453static struct clk_lookup mx53_lookups[] = { 1461static struct clk_lookup mx53_lookups[] = {
@@ -1511,6 +1519,7 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,
1511 clk_enable(&iim_clk); 1519 clk_enable(&iim_clk);
1512 mx51_revision(); 1520 mx51_revision();
1513 clk_disable(&iim_clk); 1521 clk_disable(&iim_clk);
1522 mx51_display_revision();
1514 1523
1515 /* move usb_phy_clk to 24MHz */ 1524 /* move usb_phy_clk to 24MHz */
1516 clk_set_parent(&usb_phy1_clk, &osc_clk); 1525 clk_set_parent(&usb_phy1_clk, &osc_clk);
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
index df46b5e60857..472bdfab2e55 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-mx5/cpu.c
@@ -21,6 +21,7 @@
21static int cpu_silicon_rev = -1; 21static int cpu_silicon_rev = -1;
22 22
23#define IIM_SREV 0x24 23#define IIM_SREV 0x24
24#define MX50_HW_ADADIG_DIGPROG 0xB0
24 25
25static int get_mx51_srev(void) 26static int get_mx51_srev(void)
26{ 27{
@@ -51,6 +52,26 @@ int mx51_revision(void)
51} 52}
52EXPORT_SYMBOL(mx51_revision); 53EXPORT_SYMBOL(mx51_revision);
53 54
55void mx51_display_revision(void)
56{
57 int rev;
58 char *srev;
59 rev = mx51_revision();
60
61 switch (rev) {
62 case IMX_CHIP_REVISION_2_0:
63 srev = IMX_CHIP_REVISION_2_0_STRING;
64 break;
65 case IMX_CHIP_REVISION_3_0:
66 srev = IMX_CHIP_REVISION_3_0_STRING;
67 break;
68 default:
69 srev = IMX_CHIP_REVISION_UNKNOWN_STRING;
70 }
71 printk(KERN_INFO "CPU identified as i.MX51, silicon rev %s\n", srev);
72}
73EXPORT_SYMBOL(mx51_display_revision);
74
54#ifdef CONFIG_NEON 75#ifdef CONFIG_NEON
55 76
56/* 77/*
@@ -107,6 +128,44 @@ int mx53_revision(void)
107} 128}
108EXPORT_SYMBOL(mx53_revision); 129EXPORT_SYMBOL(mx53_revision);
109 130
131static int get_mx50_srev(void)
132{
133 void __iomem *anatop = ioremap(MX50_ANATOP_BASE_ADDR, SZ_8K);
134 u32 rev;
135
136 if (!anatop) {
137 cpu_silicon_rev = -EINVAL;
138 return 0;
139 }
140
141 rev = readl(anatop + MX50_HW_ADADIG_DIGPROG);
142 rev &= 0xff;
143
144 iounmap(anatop);
145 if (rev == 0x0)
146 return IMX_CHIP_REVISION_1_0;
147 else if (rev == 0x1)
148 return IMX_CHIP_REVISION_1_1;
149 return 0;
150}
151
152/*
153 * Returns:
154 * the silicon revision of the cpu
155 * -EINVAL - not a mx50
156 */
157int mx50_revision(void)
158{
159 if (!cpu_is_mx50())
160 return -EINVAL;
161
162 if (cpu_silicon_rev == -1)
163 cpu_silicon_rev = get_mx50_srev();
164
165 return cpu_silicon_rev;
166}
167EXPORT_SYMBOL(mx50_revision);
168
110static int __init post_cpu_init(void) 169static int __init post_cpu_init(void)
111{ 170{
112 unsigned int reg; 171 unsigned int reg;
diff --git a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
index c372a4373691..e6c1119c20ae 100644
--- a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
@@ -67,6 +67,10 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
67 MX51_PAD_SD1_DATA1__SD1_DATA1, 67 MX51_PAD_SD1_DATA1__SD1_DATA1,
68 MX51_PAD_SD1_DATA2__SD1_DATA2, 68 MX51_PAD_SD1_DATA2__SD1_DATA2,
69 MX51_PAD_SD1_DATA3__SD1_DATA3, 69 MX51_PAD_SD1_DATA3__SD1_DATA3,
70 /* SD1 CD */
71 _MX51_PAD_GPIO1_0__SD1_CD | MUX_PAD_CTRL(PAD_CTL_PUS_22K_UP |
72 PAD_CTL_PKE | PAD_CTL_SRE_FAST |
73 PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
70}; 74};
71 75
72#define GPIO_LED1 IMX_GPIO_NR(3, 30) 76#define GPIO_LED1 IMX_GPIO_NR(3, 30)
diff --git a/arch/arm/mach-mx5/mx51_efika.c b/arch/arm/mach-mx5/mx51_efika.c
index 51a67fc7f0ef..d0c7075937cf 100644
--- a/arch/arm/mach-mx5/mx51_efika.c
+++ b/arch/arm/mach-mx5/mx51_efika.c
@@ -42,7 +42,6 @@
42#include <asm/mach-types.h> 42#include <asm/mach-types.h>
43#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
44#include <asm/mach/time.h> 44#include <asm/mach/time.h>
45#include <asm/mach-types.h>
46 45
47#include "devices-imx51.h" 46#include "devices-imx51.h"
48#include "devices.h" 47#include "devices.h"
@@ -572,8 +571,10 @@ static struct mc13xxx_regulator_init_data mx51_efika_regulators[] = {
572 571
573static struct mc13xxx_platform_data mx51_efika_mc13892_data = { 572static struct mc13xxx_platform_data mx51_efika_mc13892_data = {
574 .flags = MC13XXX_USE_RTC | MC13XXX_USE_REGULATOR, 573 .flags = MC13XXX_USE_RTC | MC13XXX_USE_REGULATOR,
575 .num_regulators = ARRAY_SIZE(mx51_efika_regulators), 574 .regulators = {
576 .regulators = mx51_efika_regulators, 575 .num_regulators = ARRAY_SIZE(mx51_efika_regulators),
576 .regulators = mx51_efika_regulators,
577 },
577}; 578};
578 579
579static struct spi_board_info mx51_efika_spi_board_info[] __initdata = { 580static struct spi_board_info mx51_efika_spi_board_info[] __initdata = {
diff --git a/arch/arm/mach-mx5/system.c b/arch/arm/mach-mx5/system.c
new file mode 100644
index 000000000000..76ae8dc33e00
--- /dev/null
+++ b/arch/arm/mach-mx5/system.c
@@ -0,0 +1,84 @@
1/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13#include <linux/platform_device.h>
14#include <linux/io.h>
15#include <mach/hardware.h>
16#include "crm_regs.h"
17
18/* set cpu low power mode before WFI instruction. This function is called
19 * mx5 because it can be used for mx50, mx51, and mx53.*/
20void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode)
21{
22 u32 plat_lpc, arm_srpgcr, ccm_clpcr;
23 u32 empgc0, empgc1;
24 int stop_mode = 0;
25
26 /* always allow platform to issue a deep sleep mode request */
27 plat_lpc = __raw_readl(MXC_CORTEXA8_PLAT_LPC) &
28 ~(MXC_CORTEXA8_PLAT_LPC_DSM);
29 ccm_clpcr = __raw_readl(MXC_CCM_CLPCR) & ~(MXC_CCM_CLPCR_LPM_MASK);
30 arm_srpgcr = __raw_readl(MXC_SRPG_ARM_SRPGCR) & ~(MXC_SRPGCR_PCR);
31 empgc0 = __raw_readl(MXC_SRPG_EMPGC0_SRPGCR) & ~(MXC_SRPGCR_PCR);
32 empgc1 = __raw_readl(MXC_SRPG_EMPGC1_SRPGCR) & ~(MXC_SRPGCR_PCR);
33
34 switch (mode) {
35 case WAIT_CLOCKED:
36 break;
37 case WAIT_UNCLOCKED:
38 ccm_clpcr |= 0x1 << MXC_CCM_CLPCR_LPM_OFFSET;
39 break;
40 case WAIT_UNCLOCKED_POWER_OFF:
41 case STOP_POWER_OFF:
42 plat_lpc |= MXC_CORTEXA8_PLAT_LPC_DSM
43 | MXC_CORTEXA8_PLAT_LPC_DBG_DSM;
44 if (mode == WAIT_UNCLOCKED_POWER_OFF) {
45 ccm_clpcr |= 0x1 << MXC_CCM_CLPCR_LPM_OFFSET;
46 ccm_clpcr &= ~MXC_CCM_CLPCR_VSTBY;
47 ccm_clpcr &= ~MXC_CCM_CLPCR_SBYOS;
48 stop_mode = 0;
49 } else {
50 ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET;
51 ccm_clpcr |= 0x3 << MXC_CCM_CLPCR_STBY_COUNT_OFFSET;
52 ccm_clpcr |= MXC_CCM_CLPCR_VSTBY;
53 ccm_clpcr |= MXC_CCM_CLPCR_SBYOS;
54 stop_mode = 1;
55 }
56 arm_srpgcr |= MXC_SRPGCR_PCR;
57
58 if (tzic_enable_wake(1) != 0)
59 return;
60 break;
61 case STOP_POWER_ON:
62 ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET;
63 break;
64 default:
65 printk(KERN_WARNING "UNKNOWN cpu power mode: %d\n", mode);
66 return;
67 }
68
69 __raw_writel(plat_lpc, MXC_CORTEXA8_PLAT_LPC);
70 __raw_writel(ccm_clpcr, MXC_CCM_CLPCR);
71 __raw_writel(arm_srpgcr, MXC_SRPG_ARM_SRPGCR);
72
73 /* Enable NEON SRPG for all but MX50TO1.0. */
74 if (mx50_revision() != IMX_CHIP_REVISION_1_0)
75 __raw_writel(arm_srpgcr, MXC_SRPG_NEON_SRPGCR);
76
77 if (stop_mode) {
78 empgc0 |= MXC_SRPGCR_PCR;
79 empgc1 |= MXC_SRPGCR_PCR;
80
81 __raw_writel(empgc0, MXC_SRPG_EMPGC0_SRPGCR);
82 __raw_writel(empgc1, MXC_SRPG_EMPGC1_SRPGCR);
83 }
84}
diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig
index 4f6f174af6c8..4522fbb235d5 100644
--- a/arch/arm/mach-mxs/Kconfig
+++ b/arch/arm/mach-mxs/Kconfig
@@ -22,6 +22,7 @@ config MACH_MX23EVK
22 select SOC_IMX23 22 select SOC_IMX23
23 select MXS_HAVE_AMBA_DUART 23 select MXS_HAVE_AMBA_DUART
24 select MXS_HAVE_PLATFORM_AUART 24 select MXS_HAVE_PLATFORM_AUART
25 select MXS_HAVE_PLATFORM_MXS_MMC
25 select MXS_HAVE_PLATFORM_MXSFB 26 select MXS_HAVE_PLATFORM_MXSFB
26 default y 27 default y
27 help 28 help
@@ -35,6 +36,7 @@ config MACH_MX28EVK
35 select MXS_HAVE_PLATFORM_AUART 36 select MXS_HAVE_PLATFORM_AUART
36 select MXS_HAVE_PLATFORM_FEC 37 select MXS_HAVE_PLATFORM_FEC
37 select MXS_HAVE_PLATFORM_FLEXCAN 38 select MXS_HAVE_PLATFORM_FLEXCAN
39 select MXS_HAVE_PLATFORM_MXS_MMC
38 select MXS_HAVE_PLATFORM_MXSFB 40 select MXS_HAVE_PLATFORM_MXSFB
39 select MXS_OCOTP 41 select MXS_OCOTP
40 default y 42 default y
diff --git a/arch/arm/mach-mxs/clock-mx23.c b/arch/arm/mach-mxs/clock-mx23.c
index d133c7f30940..c3577ea789ac 100644
--- a/arch/arm/mach-mxs/clock-mx23.c
+++ b/arch/arm/mach-mxs/clock-mx23.c
@@ -521,6 +521,15 @@ static int clk_misc_init(void)
521 __raw_writel(BM_CLKCTRL_CPU_INTERRUPT_WAIT, 521 __raw_writel(BM_CLKCTRL_CPU_INTERRUPT_WAIT,
522 CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU_SET); 522 CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU_SET);
523 523
524 /*
525 * 480 MHz seems too high to be ssp clock source directly,
526 * so set frac to get a 288 MHz ref_io.
527 */
528 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC);
529 reg &= ~BM_CLKCTRL_FRAC_IOFRAC;
530 reg |= 30 << BP_CLKCTRL_FRAC_IOFRAC;
531 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC);
532
524 return 0; 533 return 0;
525} 534}
526 535
@@ -528,6 +537,12 @@ int __init mx23_clocks_init(void)
528{ 537{
529 clk_misc_init(); 538 clk_misc_init();
530 539
540 /*
541 * source ssp clock from ref_io than ref_xtal,
542 * as ref_xtal only provides 24 MHz as maximum.
543 */
544 clk_set_parent(&ssp_clk, &ref_io_clk);
545
531 clk_enable(&cpu_clk); 546 clk_enable(&cpu_clk);
532 clk_enable(&hbus_clk); 547 clk_enable(&hbus_clk);
533 clk_enable(&xbus_clk); 548 clk_enable(&xbus_clk);
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index 5e489a2b2023..1ad97fed1e94 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -618,6 +618,8 @@ static struct clk_lookup lookups[] = {
618 _REGISTER_CLOCK("pll2", NULL, pll2_clk) 618 _REGISTER_CLOCK("pll2", NULL, pll2_clk)
619 _REGISTER_CLOCK("mxs-dma-apbh", NULL, hbus_clk) 619 _REGISTER_CLOCK("mxs-dma-apbh", NULL, hbus_clk)
620 _REGISTER_CLOCK("mxs-dma-apbx", NULL, xbus_clk) 620 _REGISTER_CLOCK("mxs-dma-apbx", NULL, xbus_clk)
621 _REGISTER_CLOCK("mxs-mmc.0", NULL, ssp0_clk)
622 _REGISTER_CLOCK("mxs-mmc.1", NULL, ssp1_clk)
621 _REGISTER_CLOCK("flexcan.0", NULL, can0_clk) 623 _REGISTER_CLOCK("flexcan.0", NULL, can0_clk)
622 _REGISTER_CLOCK("flexcan.1", NULL, can1_clk) 624 _REGISTER_CLOCK("flexcan.1", NULL, can1_clk)
623 _REGISTER_CLOCK(NULL, "usb0", usb0_clk) 625 _REGISTER_CLOCK(NULL, "usb0", usb0_clk)
@@ -737,6 +739,15 @@ static int clk_misc_init(void)
737 reg |= BM_CLKCTRL_ENET_CLK_OUT_EN; 739 reg |= BM_CLKCTRL_ENET_CLK_OUT_EN;
738 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET); 740 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET);
739 741
742 /*
743 * 480 MHz seems too high to be ssp clock source directly,
744 * so set frac0 to get a 288 MHz ref_io0.
745 */
746 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC0);
747 reg &= ~BM_CLKCTRL_FRAC0_IO0FRAC;
748 reg |= 30 << BP_CLKCTRL_FRAC0_IO0FRAC;
749 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC0);
750
740 return 0; 751 return 0;
741} 752}
742 753
@@ -744,6 +755,13 @@ int __init mx28_clocks_init(void)
744{ 755{
745 clk_misc_init(); 756 clk_misc_init();
746 757
758 /*
759 * source ssp clock from ref_io0 than ref_xtal,
760 * as ref_xtal only provides 24 MHz as maximum.
761 */
762 clk_set_parent(&ssp0_clk, &ref_io0_clk);
763 clk_set_parent(&ssp1_clk, &ref_io0_clk);
764
747 clk_enable(&cpu_clk); 765 clk_enable(&cpu_clk);
748 clk_enable(&hbus_clk); 766 clk_enable(&hbus_clk);
749 clk_enable(&xbus_clk); 767 clk_enable(&xbus_clk);
diff --git a/arch/arm/mach-mxs/devices-mx23.h b/arch/arm/mach-mxs/devices-mx23.h
index c7e14f4e3669..c6f345febd39 100644
--- a/arch/arm/mach-mxs/devices-mx23.h
+++ b/arch/arm/mach-mxs/devices-mx23.h
@@ -21,6 +21,10 @@ extern const struct mxs_auart_data mx23_auart_data[] __initconst;
21#define mx23_add_auart0() mx23_add_auart(0) 21#define mx23_add_auart0() mx23_add_auart(0)
22#define mx23_add_auart1() mx23_add_auart(1) 22#define mx23_add_auart1() mx23_add_auart(1)
23 23
24extern const struct mxs_mxs_mmc_data mx23_mxs_mmc_data[] __initconst;
25#define mx23_add_mxs_mmc(id, pdata) \
26 mxs_add_mxs_mmc(&mx23_mxs_mmc_data[id], pdata)
27
24#define mx23_add_mxs_pwm(id) mxs_add_mxs_pwm(MX23_PWM_BASE_ADDR, id) 28#define mx23_add_mxs_pwm(id) mxs_add_mxs_pwm(MX23_PWM_BASE_ADDR, id)
25 29
26struct platform_device *__init mx23_add_mxsfb( 30struct platform_device *__init mx23_add_mxsfb(
diff --git a/arch/arm/mach-mxs/devices-mx28.h b/arch/arm/mach-mxs/devices-mx28.h
index 9d08555c4cf0..c473eddce8cf 100644
--- a/arch/arm/mach-mxs/devices-mx28.h
+++ b/arch/arm/mach-mxs/devices-mx28.h
@@ -37,6 +37,10 @@ extern const struct mxs_flexcan_data mx28_flexcan_data[] __initconst;
37extern const struct mxs_i2c_data mx28_mxs_i2c_data[] __initconst; 37extern const struct mxs_i2c_data mx28_mxs_i2c_data[] __initconst;
38#define mx28_add_mxs_i2c(id) mxs_add_mxs_i2c(&mx28_mxs_i2c_data[id]) 38#define mx28_add_mxs_i2c(id) mxs_add_mxs_i2c(&mx28_mxs_i2c_data[id])
39 39
40extern const struct mxs_mxs_mmc_data mx28_mxs_mmc_data[] __initconst;
41#define mx28_add_mxs_mmc(id, pdata) \
42 mxs_add_mxs_mmc(&mx28_mxs_mmc_data[id], pdata)
43
40#define mx28_add_mxs_pwm(id) mxs_add_mxs_pwm(MX28_PWM_BASE_ADDR, id) 44#define mx28_add_mxs_pwm(id) mxs_add_mxs_pwm(MX28_PWM_BASE_ADDR, id)
41 45
42struct platform_device *__init mx28_add_mxsfb( 46struct platform_device *__init mx28_add_mxsfb(
diff --git a/arch/arm/mach-mxs/devices/Kconfig b/arch/arm/mach-mxs/devices/Kconfig
index 1451ad060d82..acf9eea124c0 100644
--- a/arch/arm/mach-mxs/devices/Kconfig
+++ b/arch/arm/mach-mxs/devices/Kconfig
@@ -15,6 +15,9 @@ config MXS_HAVE_PLATFORM_FLEXCAN
15config MXS_HAVE_PLATFORM_MXS_I2C 15config MXS_HAVE_PLATFORM_MXS_I2C
16 bool 16 bool
17 17
18config MXS_HAVE_PLATFORM_MXS_MMC
19 bool
20
18config MXS_HAVE_PLATFORM_MXS_PWM 21config MXS_HAVE_PLATFORM_MXS_PWM
19 bool 22 bool
20 23
diff --git a/arch/arm/mach-mxs/devices/Makefile b/arch/arm/mach-mxs/devices/Makefile
index 0d9bea30b0a2..324f2824d38d 100644
--- a/arch/arm/mach-mxs/devices/Makefile
+++ b/arch/arm/mach-mxs/devices/Makefile
@@ -4,5 +4,6 @@ obj-y += platform-dma.o
4obj-$(CONFIG_MXS_HAVE_PLATFORM_FEC) += platform-fec.o 4obj-$(CONFIG_MXS_HAVE_PLATFORM_FEC) += platform-fec.o
5obj-$(CONFIG_MXS_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o 5obj-$(CONFIG_MXS_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o
6obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_I2C) += platform-mxs-i2c.o 6obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_I2C) += platform-mxs-i2c.o
7obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_MMC) += platform-mxs-mmc.o
7obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_PWM) += platform-mxs-pwm.o 8obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_PWM) += platform-mxs-pwm.o
8obj-$(CONFIG_MXS_HAVE_PLATFORM_MXSFB) += platform-mxsfb.o 9obj-$(CONFIG_MXS_HAVE_PLATFORM_MXSFB) += platform-mxsfb.o
diff --git a/arch/arm/mach-mxs/devices/platform-mxs-mmc.c b/arch/arm/mach-mxs/devices/platform-mxs-mmc.c
new file mode 100644
index 000000000000..382dacbeca21
--- /dev/null
+++ b/arch/arm/mach-mxs/devices/platform-mxs-mmc.c
@@ -0,0 +1,73 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it under
8 * the terms of the GNU General Public License version 2 as published by the
9 * Free Software Foundation.
10 */
11
12#include <linux/compiler.h>
13#include <linux/err.h>
14#include <linux/init.h>
15
16#include <mach/mx23.h>
17#include <mach/mx28.h>
18#include <mach/devices-common.h>
19
20#define mxs_mxs_mmc_data_entry_single(soc, _id, hwid) \
21 { \
22 .id = _id, \
23 .iobase = soc ## _SSP ## hwid ## _BASE_ADDR, \
24 .dma = soc ## _DMA_SSP ## hwid, \
25 .irq_err = soc ## _INT_SSP ## hwid ## _ERROR, \
26 .irq_dma = soc ## _INT_SSP ## hwid ## _DMA, \
27 }
28
29#define mxs_mxs_mmc_data_entry(soc, _id, hwid) \
30 [_id] = mxs_mxs_mmc_data_entry_single(soc, _id, hwid)
31
32
33#ifdef CONFIG_SOC_IMX23
34const struct mxs_mxs_mmc_data mx23_mxs_mmc_data[] __initconst = {
35 mxs_mxs_mmc_data_entry(MX23, 0, 1),
36 mxs_mxs_mmc_data_entry(MX23, 1, 2),
37};
38#endif
39
40#ifdef CONFIG_SOC_IMX28
41const struct mxs_mxs_mmc_data mx28_mxs_mmc_data[] __initconst = {
42 mxs_mxs_mmc_data_entry(MX28, 0, 0),
43 mxs_mxs_mmc_data_entry(MX28, 1, 1),
44};
45#endif
46
47struct platform_device *__init mxs_add_mxs_mmc(
48 const struct mxs_mxs_mmc_data *data,
49 const struct mxs_mmc_platform_data *pdata)
50{
51 struct resource res[] = {
52 {
53 .start = data->iobase,
54 .end = data->iobase + SZ_8K - 1,
55 .flags = IORESOURCE_MEM,
56 }, {
57 .start = data->dma,
58 .end = data->dma,
59 .flags = IORESOURCE_DMA,
60 }, {
61 .start = data->irq_err,
62 .end = data->irq_err,
63 .flags = IORESOURCE_IRQ,
64 }, {
65 .start = data->irq_dma,
66 .end = data->irq_dma,
67 .flags = IORESOURCE_IRQ,
68 },
69 };
70
71 return mxs_add_platform_device("mxs-mmc", data->id,
72 res, ARRAY_SIZE(res), pdata, sizeof(*pdata));
73}
diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h
index 71f24484b044..c5137f14c364 100644
--- a/arch/arm/mach-mxs/include/mach/devices-common.h
+++ b/arch/arm/mach-mxs/include/mach/devices-common.h
@@ -73,6 +73,19 @@ struct mxs_i2c_data {
73}; 73};
74struct platform_device * __init mxs_add_mxs_i2c(const struct mxs_i2c_data *data); 74struct platform_device * __init mxs_add_mxs_i2c(const struct mxs_i2c_data *data);
75 75
76/* mmc */
77#include <mach/mmc.h>
78struct mxs_mxs_mmc_data {
79 int id;
80 resource_size_t iobase;
81 resource_size_t dma;
82 resource_size_t irq_err;
83 resource_size_t irq_dma;
84};
85struct platform_device *__init mxs_add_mxs_mmc(
86 const struct mxs_mxs_mmc_data *data,
87 const struct mxs_mmc_platform_data *pdata);
88
76/* pwm */ 89/* pwm */
77struct platform_device *__init mxs_add_mxs_pwm( 90struct platform_device *__init mxs_add_mxs_pwm(
78 resource_size_t iobase, int id); 91 resource_size_t iobase, int id);
diff --git a/arch/arm/mach-mxs/mach-mx23evk.c b/arch/arm/mach-mxs/mach-mx23evk.c
index a66994f0518f..214e5b641bbc 100644
--- a/arch/arm/mach-mxs/mach-mx23evk.c
+++ b/arch/arm/mach-mxs/mach-mx23evk.c
@@ -28,6 +28,8 @@
28 28
29#define MX23EVK_LCD_ENABLE MXS_GPIO_NR(1, 18) 29#define MX23EVK_LCD_ENABLE MXS_GPIO_NR(1, 18)
30#define MX23EVK_BL_ENABLE MXS_GPIO_NR(1, 28) 30#define MX23EVK_BL_ENABLE MXS_GPIO_NR(1, 28)
31#define MX23EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(1, 30)
32#define MX23EVK_MMC0_SLOT_POWER MXS_GPIO_NR(1, 29)
31 33
32static const iomux_cfg_t mx23evk_pads[] __initconst = { 34static const iomux_cfg_t mx23evk_pads[] __initconst = {
33 /* duart */ 35 /* duart */
@@ -73,6 +75,36 @@ static const iomux_cfg_t mx23evk_pads[] __initconst = {
73 MX23_PAD_LCD_RESET__GPIO_1_18 | MXS_PAD_CTRL, 75 MX23_PAD_LCD_RESET__GPIO_1_18 | MXS_PAD_CTRL,
74 /* backlight control */ 76 /* backlight control */
75 MX23_PAD_PWM2__GPIO_1_28 | MXS_PAD_CTRL, 77 MX23_PAD_PWM2__GPIO_1_28 | MXS_PAD_CTRL,
78
79 /* mmc */
80 MX23_PAD_SSP1_DATA0__SSP1_DATA0 |
81 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
82 MX23_PAD_SSP1_DATA1__SSP1_DATA1 |
83 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
84 MX23_PAD_SSP1_DATA2__SSP1_DATA2 |
85 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
86 MX23_PAD_SSP1_DATA3__SSP1_DATA3 |
87 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
88 MX23_PAD_GPMI_D08__SSP1_DATA4 |
89 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
90 MX23_PAD_GPMI_D09__SSP1_DATA5 |
91 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
92 MX23_PAD_GPMI_D10__SSP1_DATA6 |
93 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
94 MX23_PAD_GPMI_D11__SSP1_DATA7 |
95 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
96 MX23_PAD_SSP1_CMD__SSP1_CMD |
97 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
98 MX23_PAD_SSP1_DETECT__SSP1_DETECT |
99 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
100 MX23_PAD_SSP1_SCK__SSP1_SCK |
101 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
102 /* write protect */
103 MX23_PAD_PWM4__GPIO_1_30 |
104 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
105 /* slot power enable */
106 MX23_PAD_PWM3__GPIO_1_29 |
107 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
76}; 108};
77 109
78/* mxsfb (lcdif) */ 110/* mxsfb (lcdif) */
@@ -101,6 +133,11 @@ static const struct mxsfb_platform_data mx23evk_mxsfb_pdata __initconst = {
101 .ld_intf_width = STMLCDIF_24BIT, 133 .ld_intf_width = STMLCDIF_24BIT,
102}; 134};
103 135
136static struct mxs_mmc_platform_data mx23evk_mmc_pdata __initdata = {
137 .wp_gpio = MX23EVK_MMC0_WRITE_PROTECT,
138 .flags = SLOTF_8_BIT_CAPABLE,
139};
140
104static void __init mx23evk_init(void) 141static void __init mx23evk_init(void)
105{ 142{
106 int ret; 143 int ret;
@@ -110,6 +147,13 @@ static void __init mx23evk_init(void)
110 mx23_add_duart(); 147 mx23_add_duart();
111 mx23_add_auart0(); 148 mx23_add_auart0();
112 149
150 /* power on mmc slot by writing 0 to the gpio */
151 ret = gpio_request_one(MX23EVK_MMC0_SLOT_POWER, GPIOF_DIR_OUT,
152 "mmc0-slot-power");
153 if (ret)
154 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);
155 mx23_add_mxs_mmc(0, &mx23evk_mmc_pdata);
156
113 ret = gpio_request_one(MX23EVK_LCD_ENABLE, GPIOF_DIR_OUT, "lcd-enable"); 157 ret = gpio_request_one(MX23EVK_LCD_ENABLE, GPIOF_DIR_OUT, "lcd-enable");
114 if (ret) 158 if (ret)
115 pr_warn("failed to request gpio lcd-enable: %d\n", ret); 159 pr_warn("failed to request gpio lcd-enable: %d\n", ret);
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
index 08002d02267a..bb329b9a2608 100644
--- a/arch/arm/mach-mxs/mach-mx28evk.c
+++ b/arch/arm/mach-mxs/mach-mx28evk.c
@@ -34,6 +34,11 @@
34#define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30) 34#define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30)
35#define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13) 35#define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13)
36 36
37#define MX28EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(2, 12)
38#define MX28EVK_MMC1_WRITE_PROTECT MXS_GPIO_NR(0, 28)
39#define MX28EVK_MMC0_SLOT_POWER MXS_GPIO_NR(3, 28)
40#define MX28EVK_MMC1_SLOT_POWER MXS_GPIO_NR(3, 29)
41
37static const iomux_cfg_t mx28evk_pads[] __initconst = { 42static const iomux_cfg_t mx28evk_pads[] __initconst = {
38 /* duart */ 43 /* duart */
39 MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL, 44 MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL,
@@ -115,6 +120,65 @@ static const iomux_cfg_t mx28evk_pads[] __initconst = {
115 MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL, 120 MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
116 /* backlight control */ 121 /* backlight control */
117 MX28_PAD_PWM2__GPIO_3_18 | MXS_PAD_CTRL, 122 MX28_PAD_PWM2__GPIO_3_18 | MXS_PAD_CTRL,
123 /* mmc0 */
124 MX28_PAD_SSP0_DATA0__SSP0_D0 |
125 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
126 MX28_PAD_SSP0_DATA1__SSP0_D1 |
127 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
128 MX28_PAD_SSP0_DATA2__SSP0_D2 |
129 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
130 MX28_PAD_SSP0_DATA3__SSP0_D3 |
131 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
132 MX28_PAD_SSP0_DATA4__SSP0_D4 |
133 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
134 MX28_PAD_SSP0_DATA5__SSP0_D5 |
135 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
136 MX28_PAD_SSP0_DATA6__SSP0_D6 |
137 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
138 MX28_PAD_SSP0_DATA7__SSP0_D7 |
139 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
140 MX28_PAD_SSP0_CMD__SSP0_CMD |
141 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
142 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
143 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
144 MX28_PAD_SSP0_SCK__SSP0_SCK |
145 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
146 /* write protect */
147 MX28_PAD_SSP1_SCK__GPIO_2_12 |
148 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
149 /* slot power enable */
150 MX28_PAD_PWM3__GPIO_3_28 |
151 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
152
153 /* mmc1 */
154 MX28_PAD_GPMI_D00__SSP1_D0 |
155 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
156 MX28_PAD_GPMI_D01__SSP1_D1 |
157 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
158 MX28_PAD_GPMI_D02__SSP1_D2 |
159 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
160 MX28_PAD_GPMI_D03__SSP1_D3 |
161 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
162 MX28_PAD_GPMI_D04__SSP1_D4 |
163 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
164 MX28_PAD_GPMI_D05__SSP1_D5 |
165 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
166 MX28_PAD_GPMI_D06__SSP1_D6 |
167 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
168 MX28_PAD_GPMI_D07__SSP1_D7 |
169 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
170 MX28_PAD_GPMI_RDY1__SSP1_CMD |
171 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
172 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT |
173 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
174 MX28_PAD_GPMI_WRN__SSP1_SCK |
175 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
176 /* write protect */
177 MX28_PAD_GPMI_RESETN__GPIO_0_28 |
178 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
179 /* slot power enable */
180 MX28_PAD_PWM4__GPIO_3_29 |
181 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
118}; 182};
119 183
120/* fec */ 184/* fec */
@@ -258,6 +322,18 @@ static const struct mxsfb_platform_data mx28evk_mxsfb_pdata __initconst = {
258 .ld_intf_width = STMLCDIF_24BIT, 322 .ld_intf_width = STMLCDIF_24BIT,
259}; 323};
260 324
325static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = {
326 {
327 /* mmc0 */
328 .wp_gpio = MX28EVK_MMC0_WRITE_PROTECT,
329 .flags = SLOTF_8_BIT_CAPABLE,
330 }, {
331 /* mmc1 */
332 .wp_gpio = MX28EVK_MMC1_WRITE_PROTECT,
333 .flags = SLOTF_8_BIT_CAPABLE,
334 },
335};
336
261static void __init mx28evk_init(void) 337static void __init mx28evk_init(void)
262{ 338{
263 int ret; 339 int ret;
@@ -297,6 +373,19 @@ static void __init mx28evk_init(void)
297 gpio_set_value(MX28EVK_BL_ENABLE, 1); 373 gpio_set_value(MX28EVK_BL_ENABLE, 1);
298 374
299 mx28_add_mxsfb(&mx28evk_mxsfb_pdata); 375 mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
376
377 /* power on mmc slot by writing 0 to the gpio */
378 ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_DIR_OUT,
379 "mmc0-slot-power");
380 if (ret)
381 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);
382 mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
383
384 ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_DIR_OUT,
385 "mmc1-slot-power");
386 if (ret)
387 pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret);
388 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
300} 389}
301 390
302static void __init mx28evk_timer_init(void) 391static void __init mx28evk_timer_init(void)
diff --git a/arch/arm/mach-mxs/module-tx28.c b/arch/arm/mach-mxs/module-tx28.c
index fa0b154da67b..0fcff47009cf 100644
--- a/arch/arm/mach-mxs/module-tx28.c
+++ b/arch/arm/mach-mxs/module-tx28.c
@@ -45,7 +45,7 @@ static const iomux_cfg_t tx28_fec_gpio_pads[] __initconst = {
45}; 45};
46 46
47#define FEC_MODE (MXS_PAD_8MA | MXS_PAD_PULLUP | MXS_PAD_3V3) 47#define FEC_MODE (MXS_PAD_8MA | MXS_PAD_PULLUP | MXS_PAD_3V3)
48static const iomux_cfg_t tx28_fec_pads[] __initconst = { 48static const iomux_cfg_t tx28_fec0_pads[] __initconst = {
49 MX28_PAD_ENET0_MDC__ENET0_MDC | FEC_MODE, 49 MX28_PAD_ENET0_MDC__ENET0_MDC | FEC_MODE,
50 MX28_PAD_ENET0_MDIO__ENET0_MDIO | FEC_MODE, 50 MX28_PAD_ENET0_MDIO__ENET0_MDIO | FEC_MODE,
51 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | FEC_MODE, 51 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | FEC_MODE,
@@ -57,7 +57,20 @@ static const iomux_cfg_t tx28_fec_pads[] __initconst = {
57 MX28_PAD_ENET_CLK__CLKCTRL_ENET | FEC_MODE, 57 MX28_PAD_ENET_CLK__CLKCTRL_ENET | FEC_MODE,
58}; 58};
59 59
60static const struct fec_platform_data tx28_fec_data __initconst = { 60static const iomux_cfg_t tx28_fec1_pads[] __initconst = {
61 MX28_PAD_ENET0_RXD2__ENET1_RXD0,
62 MX28_PAD_ENET0_RXD3__ENET1_RXD1,
63 MX28_PAD_ENET0_TXD2__ENET1_TXD0,
64 MX28_PAD_ENET0_TXD3__ENET1_TXD1,
65 MX28_PAD_ENET0_COL__ENET1_TX_EN,
66 MX28_PAD_ENET0_CRS__ENET1_RX_EN,
67};
68
69static struct fec_platform_data tx28_fec0_data = {
70 .phy = PHY_INTERFACE_MODE_RMII,
71};
72
73static struct fec_platform_data tx28_fec1_data = {
61 .phy = PHY_INTERFACE_MODE_RMII, 74 .phy = PHY_INTERFACE_MODE_RMII,
62}; 75};
63 76
@@ -108,15 +121,15 @@ int __init tx28_add_fec0(void)
108 pr_debug("%s: Deasserting FEC PHY RESET\n", __func__); 121 pr_debug("%s: Deasserting FEC PHY RESET\n", __func__);
109 gpio_set_value(TX28_FEC_PHY_RESET, 1); 122 gpio_set_value(TX28_FEC_PHY_RESET, 1);
110 123
111 ret = mxs_iomux_setup_multiple_pads(tx28_fec_pads, 124 ret = mxs_iomux_setup_multiple_pads(tx28_fec0_pads,
112 ARRAY_SIZE(tx28_fec_pads)); 125 ARRAY_SIZE(tx28_fec0_pads));
113 if (ret) { 126 if (ret) {
114 pr_debug("%s: mxs_iomux_setup_multiple_pads() failed with rc: %d\n", 127 pr_debug("%s: mxs_iomux_setup_multiple_pads() failed with rc: %d\n",
115 __func__, ret); 128 __func__, ret);
116 goto free_gpios; 129 goto free_gpios;
117 } 130 }
118 pr_debug("%s: Registering FEC device\n", __func__); 131 pr_debug("%s: Registering FEC0 device\n", __func__);
119 mx28_add_fec(0, &tx28_fec_data); 132 mx28_add_fec(0, &tx28_fec0_data);
120 return 0; 133 return 0;
121 134
122free_gpios: 135free_gpios:
@@ -129,3 +142,19 @@ free_gpios:
129 142
130 return ret; 143 return ret;
131} 144}
145
146int __init tx28_add_fec1(void)
147{
148 int ret;
149
150 ret = mxs_iomux_setup_multiple_pads(tx28_fec1_pads,
151 ARRAY_SIZE(tx28_fec1_pads));
152 if (ret) {
153 pr_debug("%s: mxs_iomux_setup_multiple_pads() failed with rc: %d\n",
154 __func__, ret);
155 return ret;
156 }
157 pr_debug("%s: Registering FEC1 device\n", __func__);
158 mx28_add_fec(1, &tx28_fec1_data);
159 return 0;
160}
diff --git a/arch/arm/mach-mxs/module-tx28.h b/arch/arm/mach-mxs/module-tx28.h
index df9e1b6e81bf..8ed425457d30 100644
--- a/arch/arm/mach-mxs/module-tx28.h
+++ b/arch/arm/mach-mxs/module-tx28.h
@@ -7,3 +7,4 @@
7 * Free Software Foundation. 7 * Free Software Foundation.
8 */ 8 */
9int __init tx28_add_fec0(void); 9int __init tx28_add_fec0(void);
10int __init tx28_add_fec1(void);
diff --git a/arch/arm/plat-mxc/devices/platform-fec.c b/arch/arm/plat-mxc/devices/platform-fec.c
index 6561c9df5f0d..ccc789e21daa 100644
--- a/arch/arm/plat-mxc/devices/platform-fec.c
+++ b/arch/arm/plat-mxc/devices/platform-fec.c
@@ -53,7 +53,7 @@ struct platform_device *__init imx_add_fec(
53 struct resource res[] = { 53 struct resource res[] = {
54 { 54 {
55 .start = data->iobase, 55 .start = data->iobase,
56 .end = data->iobase + SZ_4K, 56 .end = data->iobase + SZ_4K - 1,
57 .flags = IORESOURCE_MEM, 57 .flags = IORESOURCE_MEM,
58 }, { 58 }, {
59 .start = data->irq, 59 .start = data->irq,
diff --git a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c b/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c
index 10653cc8d1fa..805336fdc252 100644
--- a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c
+++ b/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c
@@ -27,7 +27,7 @@ struct platform_device *__init imx_add_imxdi_rtc(
27 struct resource res[] = { 27 struct resource res[] = {
28 { 28 {
29 .start = data->iobase, 29 .start = data->iobase,
30 .end = data->iobase + SZ_16K, 30 .end = data->iobase + SZ_16K - 1,
31 .flags = IORESOURCE_MEM, 31 .flags = IORESOURCE_MEM,
32 }, { 32 }, {
33 .start = data->irq, 33 .start = data->irq,
diff --git a/arch/arm/plat-mxc/include/mach/audmux.h b/arch/arm/plat-mxc/include/mach/audmux.h
index 5cd6466964af..6fda788ed0e9 100644
--- a/arch/arm/plat-mxc/include/mach/audmux.h
+++ b/arch/arm/plat-mxc/include/mach/audmux.h
@@ -15,6 +15,14 @@
15#define MX31_AUDMUX_PORT5_SSI_PINS_5 4 15#define MX31_AUDMUX_PORT5_SSI_PINS_5 4
16#define MX31_AUDMUX_PORT6_SSI_PINS_6 5 16#define MX31_AUDMUX_PORT6_SSI_PINS_6 5
17 17
18#define MX51_AUDMUX_PORT1_SSI0 0
19#define MX51_AUDMUX_PORT2_SSI1 1
20#define MX51_AUDMUX_PORT3 2
21#define MX51_AUDMUX_PORT4 3
22#define MX51_AUDMUX_PORT5 4
23#define MX51_AUDMUX_PORT6 5
24#define MX51_AUDMUX_PORT7 6
25
18/* Register definitions for the i.MX21/27 Digital Audio Multiplexer */ 26/* Register definitions for the i.MX21/27 Digital Audio Multiplexer */
19#define MXC_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) 27#define MXC_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff)
20#define MXC_AUDMUX_V1_PCR_INMEN (1 << 8) 28#define MXC_AUDMUX_V1_PCR_INMEN (1 << 8)
@@ -28,7 +36,7 @@
28#define MXC_AUDMUX_V1_PCR_TCLKDIR (1 << 30) 36#define MXC_AUDMUX_V1_PCR_TCLKDIR (1 << 30)
29#define MXC_AUDMUX_V1_PCR_TFSDIR (1 << 31) 37#define MXC_AUDMUX_V1_PCR_TFSDIR (1 << 31)
30 38
31/* Register definitions for the i.MX25/31/35 Digital Audio Multiplexer */ 39/* Register definitions for the i.MX25/31/35/51 Digital Audio Multiplexer */
32#define MXC_AUDMUX_V2_PTCR_TFSDIR (1 << 31) 40#define MXC_AUDMUX_V2_PTCR_TFSDIR (1 << 31)
33#define MXC_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) 41#define MXC_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27)
34#define MXC_AUDMUX_V2_PTCR_TCLKDIR (1 << 26) 42#define MXC_AUDMUX_V2_PTCR_TCLKDIR (1 << 26)
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
index c4f116d214f2..7a9b20abda09 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
@@ -90,12 +90,12 @@
90#define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 31) 90#define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 31)
91#define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17) 91#define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17)
92#define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18) 92#define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18)
93#define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | 19) 93#define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 19)
94#define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | 20) 94#define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 20)
95#define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | 21) 95#define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 21)
96#define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | 22) 96#define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 22)
97#define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | 23) 97#define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | GPIO_IN | 23)
98#define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | 24) 98#define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | GPIO_OUT | 24)
99#define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25) 99#define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25)
100#define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26) 100#define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26)
101#define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27) 101#define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27)
diff --git a/arch/arm/plat-mxc/include/mach/mx50.h b/arch/arm/plat-mxc/include/mach/mx50.h
index aaec2a6e7b3a..5f2da75a47f4 100644
--- a/arch/arm/plat-mxc/include/mach/mx50.h
+++ b/arch/arm/plat-mxc/include/mach/mx50.h
@@ -282,4 +282,8 @@
282#define MX50_INT_APBHDMA_CHAN6 116 282#define MX50_INT_APBHDMA_CHAN6 116
283#define MX50_INT_APBHDMA_CHAN7 117 283#define MX50_INT_APBHDMA_CHAN7 117
284 284
285#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
286extern int mx50_revision(void);
287#endif
288
285#endif /* ifndef __MACH_MX50_H__ */ 289#endif /* ifndef __MACH_MX50_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
index 1eb339e6c857..dede19a766ff 100644
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -347,6 +347,7 @@
347 347
348#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) 348#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
349extern int mx51_revision(void); 349extern int mx51_revision(void);
350extern void mx51_display_revision(void);
350#endif 351#endif
351 352
352/* tape-out 1 defines */ 353/* tape-out 1 defines */
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 7e072637eefa..1aea818d9d31 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -51,6 +51,20 @@
51#define IMX_CHIP_REVISION_3_3 0x33 51#define IMX_CHIP_REVISION_3_3 0x33
52#define IMX_CHIP_REVISION_UNKNOWN 0xff 52#define IMX_CHIP_REVISION_UNKNOWN 0xff
53 53
54#define IMX_CHIP_REVISION_1_0_STRING "1.0"
55#define IMX_CHIP_REVISION_1_1_STRING "1.1"
56#define IMX_CHIP_REVISION_1_2_STRING "1.2"
57#define IMX_CHIP_REVISION_1_3_STRING "1.3"
58#define IMX_CHIP_REVISION_2_0_STRING "2.0"
59#define IMX_CHIP_REVISION_2_1_STRING "2.1"
60#define IMX_CHIP_REVISION_2_2_STRING "2.2"
61#define IMX_CHIP_REVISION_2_3_STRING "2.3"
62#define IMX_CHIP_REVISION_3_0_STRING "3.0"
63#define IMX_CHIP_REVISION_3_1_STRING "3.1"
64#define IMX_CHIP_REVISION_3_2_STRING "3.2"
65#define IMX_CHIP_REVISION_3_3_STRING "3.3"
66#define IMX_CHIP_REVISION_UNKNOWN_STRING "unknown"
67
54#ifndef __ASSEMBLY__ 68#ifndef __ASSEMBLY__
55extern unsigned int __mxc_cpu_type; 69extern unsigned int __mxc_cpu_type;
56#endif 70#endif
@@ -181,6 +195,15 @@ struct cpu_op {
181 u32 cpu_rate; 195 u32 cpu_rate;
182}; 196};
183 197
198int tzic_enable_wake(int is_idle);
199enum mxc_cpu_pwr_mode {
200 WAIT_CLOCKED, /* wfi only */
201 WAIT_UNCLOCKED, /* WAIT */
202 WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
203 STOP_POWER_ON, /* just STOP */
204 STOP_POWER_OFF, /* STOP + SRPG */
205};
206
184extern struct cpu_op *(*get_cpu_op)(int *op); 207extern struct cpu_op *(*get_cpu_op)(int *op);
185#endif 208#endif
186 209
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
index 95be51bfe9a9..0417da9f710d 100644
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ b/arch/arm/plat-mxc/include/mach/system.h
@@ -20,6 +20,8 @@
20#include <mach/hardware.h> 20#include <mach/hardware.h>
21#include <mach/common.h> 21#include <mach/common.h>
22 22
23extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
24
23static inline void arch_idle(void) 25static inline void arch_idle(void)
24{ 26{
25#ifdef CONFIG_ARCH_MXC91231 27#ifdef CONFIG_ARCH_MXC91231
@@ -54,7 +56,9 @@ static inline void arch_idle(void)
54 "orr %0, %0, #0x00000004\n" 56 "orr %0, %0, #0x00000004\n"
55 "mcr p15, 0, %0, c1, c0, 0\n" 57 "mcr p15, 0, %0, c1, c0, 0\n"
56 : "=r" (reg)); 58 : "=r" (reg));
57 } else 59 } else if (cpu_is_mx51())
60 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
61 else
58 cpu_do_idle(); 62 cpu_do_idle();
59} 63}
60 64
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
index 9f0c2610595e..2237ff8b434f 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/plat-mxc/time.c
@@ -27,6 +27,7 @@
27#include <linux/clk.h> 27#include <linux/clk.h>
28 28
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <asm/sched_clock.h>
30#include <asm/mach/time.h> 31#include <asm/mach/time.h>
31#include <mach/common.h> 32#include <mach/common.h>
32 33
@@ -105,6 +106,11 @@ static void gpt_irq_acknowledge(void)
105 __raw_writel(V2_TSTAT_OF1, timer_base + V2_TSTAT); 106 __raw_writel(V2_TSTAT_OF1, timer_base + V2_TSTAT);
106} 107}
107 108
109static cycle_t dummy_get_cycles(struct clocksource *cs)
110{
111 return 0;
112}
113
108static cycle_t mx1_2_get_cycles(struct clocksource *cs) 114static cycle_t mx1_2_get_cycles(struct clocksource *cs)
109{ 115{
110 return __raw_readl(timer_base + MX1_2_TCN); 116 return __raw_readl(timer_base + MX1_2_TCN);
@@ -118,18 +124,35 @@ static cycle_t v2_get_cycles(struct clocksource *cs)
118static struct clocksource clocksource_mxc = { 124static struct clocksource clocksource_mxc = {
119 .name = "mxc_timer1", 125 .name = "mxc_timer1",
120 .rating = 200, 126 .rating = 200,
121 .read = mx1_2_get_cycles, 127 .read = dummy_get_cycles,
122 .mask = CLOCKSOURCE_MASK(32), 128 .mask = CLOCKSOURCE_MASK(32),
123 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 129 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
124}; 130};
125 131
132static DEFINE_CLOCK_DATA(cd);
133unsigned long long notrace sched_clock(void)
134{
135 cycle_t cyc = clocksource_mxc.read(&clocksource_mxc);
136
137 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
138}
139
140static void notrace mxc_update_sched_clock(void)
141{
142 cycle_t cyc = clocksource_mxc.read(&clocksource_mxc);
143 update_sched_clock(&cd, cyc, (u32)~0);
144}
145
126static int __init mxc_clocksource_init(struct clk *timer_clk) 146static int __init mxc_clocksource_init(struct clk *timer_clk)
127{ 147{
128 unsigned int c = clk_get_rate(timer_clk); 148 unsigned int c = clk_get_rate(timer_clk);
129 149
130 if (timer_is_v2()) 150 if (timer_is_v2())
131 clocksource_mxc.read = v2_get_cycles; 151 clocksource_mxc.read = v2_get_cycles;
152 else
153 clocksource_mxc.read = mx1_2_get_cycles;
132 154
155 init_sched_clock(&cd, mxc_update_sched_clock, 32, c);
133 clocksource_register_hz(&clocksource_mxc, c); 156 clocksource_register_hz(&clocksource_mxc, c);
134 157
135 return 0; 158 return 0;