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authorOlof Johansson <olof@lixom.net>2013-02-05 00:49:03 -0500
committerOlof Johansson <olof@lixom.net>2013-02-05 00:49:29 -0500
commit5b399db0b7255561e560c7c965703336eeab8b83 (patch)
treedb6513f0e853c6c55dfc2c3ab0924d7d09980df2 /arch/arm
parente1d7ef1cc472de30995a50ecb9c7aa3361f985f9 (diff)
parent3a71c5c375e29fc9c1493b5ead1cf36572139c3e (diff)
Merge branch 'next/cleanup-header' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
From Kukjin Kim: AS I commented, this makes <mach/*.h> local so that they could be removed. * 'next/cleanup-header' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (26 commits) ARM: S3C64XX: Fix missing header error with CONFIG_CPU_IDLE enabled ARM: S3C64XX: make regs-syscon-power.h local ARM: S3C64XX: make regs-sys.h local ARM: S3C64XX: make regs-srom.h local ARM: S3C64XX: make regs-modem.h local ARM: S3C64XX: make regs-gpio-memport.h local ARM: S3C64XX: make crag6410.h local ARM: S3C24XX: remove dsc.c and make regs-dsc.h local ARM: S3C24XX: remove idle.h ARM: S3C2412: cleanup regs-s3c2412.h ARM: S3C2416: remove regs-s3c2416-mem.h and regs-s3c2416.h ARM: S3C24XX: make vr1000-cpld.h, vr1000-irq.h and vr1000-map.h local ARM: S3C24XX: make otom-map.h local ARM: S3C24XX: make osiris-cpld.h and osiris-map.h local ARM: S3C24XX: make h1940.h and h1940-latch.h local ARM: S3C24XX: make gta02.h local ARM: S3C24XX: make bast-cpld.h, bast-irq.h and bast-map.h local ARM: S3C24XX: make anubis-cpld, anubis-irq and anubis-map local ARM: SAMSUNG: cleanup mach/gpio-fns.h gpio-track.h and gpio-nrs.h ARM: SAMSUNG: cleanup mach/regs-audss.h file ... Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-exynos/common.c1
-rw-r--r--arch/arm/mach-exynos/common.h20
-rw-r--r--arch/arm/mach-exynos/cpuidle.c3
-rw-r--r--arch/arm/mach-exynos/dev-audio.c3
-rw-r--r--arch/arm/mach-exynos/include/mach/cpufreq.h36
-rw-r--r--arch/arm/mach-exynos/include/mach/pmu.h34
-rw-r--r--arch/arm/mach-exynos/include/mach/regs-audss.h18
-rw-r--r--arch/arm/mach-exynos/pm.c3
-rw-r--r--arch/arm/mach-exynos/pmu.c3
-rw-r--r--arch/arm/mach-s3c2440/Makefile2
-rw-r--r--arch/arm/mach-s3c2440/dsc.c54
-rw-r--r--arch/arm/mach-s3c24xx/anubis.h53
-rw-r--r--arch/arm/mach-s3c24xx/bast-ide.c18
-rw-r--r--arch/arm/mach-s3c24xx/bast-irq.c19
-rw-r--r--arch/arm/mach-s3c24xx/bast.h197
-rw-r--r--arch/arm/mach-s3c24xx/gta02.h (renamed from arch/arm/mach-s3c24xx/include/mach/gta02.h)14
-rw-r--r--arch/arm/mach-s3c24xx/h1940-bluetooth.c6
-rw-r--r--arch/arm/mach-s3c24xx/h1940.h (renamed from arch/arm/mach-s3c24xx/include/mach/h1940-latch.h)22
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/anubis-cpld.h25
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/anubis-irq.h21
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/anubis-map.h38
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/bast-cpld.h53
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/bast-irq.h29
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/bast-map.h146
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/gpio-fns.h1
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h97
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/gpio-track.h33
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/gpio.h87
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/h1940.h24
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/idle.h24
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h30
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/regs-gpio.h2
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/regs-s3c2412.h23
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/regs-s3c2416-mem.h30
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/regs-s3c2416.h24
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/vr1000-cpld.h18
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/vr1000-irq.h26
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/vr1000-map.h110
-rw-r--r--arch/arm/mach-s3c24xx/mach-anubis.c13
-rw-r--r--arch/arm/mach-s3c24xx/mach-at2440evb.c1
-rw-r--r--arch/arm/mach-s3c24xx/mach-bast.c52
-rw-r--r--arch/arm/mach-s3c24xx/mach-gta02.c59
-rw-r--r--arch/arm/mach-s3c24xx/mach-h1940.c37
-rw-r--r--arch/arm/mach-s3c24xx/mach-osiris.c27
-rw-r--r--arch/arm/mach-s3c24xx/mach-otom.c20
-rw-r--r--arch/arm/mach-s3c24xx/mach-rx1950.c31
-rw-r--r--arch/arm/mach-s3c24xx/mach-rx3715.c16
-rw-r--r--arch/arm/mach-s3c24xx/mach-smdk2413.c1
-rw-r--r--arch/arm/mach-s3c24xx/mach-smdk2416.c1
-rw-r--r--arch/arm/mach-s3c24xx/mach-smdk2440.c1
-rw-r--r--arch/arm/mach-s3c24xx/mach-smdk2443.c1
-rw-r--r--arch/arm/mach-s3c24xx/mach-vr1000.c37
-rw-r--r--arch/arm/mach-s3c24xx/mach-vstms.c1
-rw-r--r--arch/arm/mach-s3c24xx/osiris.h (renamed from arch/arm/mach-s3c24xx/include/mach/osiris-map.h)23
-rw-r--r--arch/arm/mach-s3c24xx/otom.h (renamed from arch/arm/mach-s3c24xx/include/mach/otom-map.h)20
-rw-r--r--arch/arm/mach-s3c24xx/pm-s3c2410.c6
-rw-r--r--arch/arm/mach-s3c24xx/pm-s3c2412.c8
-rw-r--r--arch/arm/mach-s3c24xx/regs-dsc.h (renamed from arch/arm/mach-s3c24xx/include/mach/regs-dsc.h)0
-rw-r--r--arch/arm/mach-s3c24xx/s3c2412.c29
-rw-r--r--arch/arm/mach-s3c24xx/s3c244x.c3
-rw-r--r--arch/arm/mach-s3c24xx/simtec-audio.c5
-rw-r--r--arch/arm/mach-s3c24xx/simtec-nor.c3
-rw-r--r--arch/arm/mach-s3c24xx/simtec-usb.c8
-rw-r--r--arch/arm/mach-s3c24xx/vr1000.h118
-rw-r--r--arch/arm/mach-s3c64xx/clock.c3
-rw-r--r--arch/arm/mach-s3c64xx/cpuidle.c4
-rw-r--r--arch/arm/mach-s3c64xx/crag6410.h (renamed from arch/arm/mach-s3c64xx/include/mach/crag6410.h)0
-rw-r--r--arch/arm/mach-s3c64xx/dma.c4
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-sys.h31
-rw-r--r--arch/arm/mach-s3c64xx/mach-anw6410.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410-module.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410.c9
-rw-r--r--arch/arm/mach-s3c64xx/mach-mini6410.c4
-rw-r--r--arch/arm/mach-s3c64xx/mach-real6410.c4
-rw-r--r--arch/arm/mach-s3c64xx/mach-smartq.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6410.c6
-rw-r--r--arch/arm/mach-s3c64xx/pm.c9
-rw-r--r--arch/arm/mach-s3c64xx/regs-gpio-memport.h (renamed from arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h)9
-rw-r--r--arch/arm/mach-s3c64xx/regs-modem.h (renamed from arch/arm/mach-s3c64xx/include/mach/regs-modem.h)11
-rw-r--r--arch/arm/mach-s3c64xx/regs-srom.h (renamed from arch/arm/mach-s3c64xx/include/mach/regs-srom.h)11
-rw-r--r--arch/arm/mach-s3c64xx/regs-sys.h30
-rw-r--r--arch/arm/mach-s3c64xx/regs-syscon-power.h (renamed from arch/arm/mach-s3c64xx/include/mach/regs-syscon-power.h)9
-rw-r--r--arch/arm/mach-s3c64xx/setup-usb-phy.c3
-rw-r--r--arch/arm/mach-s5p64x0/clock-s5p6440.c2
-rw-r--r--arch/arm/mach-s5p64x0/clock-s5p6450.c2
-rw-r--r--arch/arm/mach-s5p64x0/clock.h (renamed from arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h)9
-rw-r--r--arch/arm/mach-s5p64x0/gpiolib.c508
-rw-r--r--arch/arm/mach-s5p64x0/i2c.h (renamed from arch/arm/mach-s5p64x0/include/mach/i2c.h)3
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6440.c2
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6450.c2
-rw-r--r--arch/arm/mach-s5p64x0/setup-i2c0.c2
-rw-r--r--arch/arm/mach-s5p64x0/setup-i2c1.c2
-rw-r--r--arch/arm/mach-s5pv210/dev-audio.c3
-rw-r--r--arch/arm/mach-s5pv210/include/mach/regs-audss.h18
-rw-r--r--arch/arm/mach-s5pv210/include/mach/regs-sys.h15
-rw-r--r--arch/arm/mach-s5pv210/setup-usb-phy.c7
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-core.h13
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-fns.h1
98 files changed, 817 insertions, 1793 deletions
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 4ea80bc4ef9b..9ce3e54a77c4 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -36,7 +36,6 @@
36#include <mach/regs-irq.h> 36#include <mach/regs-irq.h>
37#include <mach/regs-pmu.h> 37#include <mach/regs-pmu.h>
38#include <mach/regs-gpio.h> 38#include <mach/regs-gpio.h>
39#include <mach/pmu.h>
40 39
41#include <plat/cpu.h> 40#include <plat/cpu.h>
42#include <plat/clock.h> 41#include <plat/clock.h>
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 12f2f1117e99..feefc86293c2 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -64,4 +64,24 @@ extern struct smp_operations exynos_smp_ops;
64 64
65extern void exynos_cpu_die(unsigned int cpu); 65extern void exynos_cpu_die(unsigned int cpu);
66 66
67/* PMU(Power Management Unit) support */
68
69#define PMU_TABLE_END NULL
70
71enum sys_powerdown {
72 SYS_AFTR,
73 SYS_LPA,
74 SYS_SLEEP,
75 NUM_SYS_POWERDOWN,
76};
77
78extern unsigned long l2x0_regs_phys;
79struct exynos_pmu_conf {
80 void __iomem *reg;
81 unsigned int val[NUM_SYS_POWERDOWN];
82};
83
84extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
85extern void s3c_cpu_resume(void);
86
67#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */ 87#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index 050924152776..fcfe0251aa3e 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -23,10 +23,11 @@
23#include <asm/cpuidle.h> 23#include <asm/cpuidle.h>
24#include <mach/regs-clock.h> 24#include <mach/regs-clock.h>
25#include <mach/regs-pmu.h> 25#include <mach/regs-pmu.h>
26#include <mach/pmu.h>
27 26
28#include <plat/cpu.h> 27#include <plat/cpu.h>
29 28
29#include "common.h"
30
30#define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \ 31#define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
31 S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \ 32 S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
32 (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0)) 33 (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0))
diff --git a/arch/arm/mach-exynos/dev-audio.c b/arch/arm/mach-exynos/dev-audio.c
index 9d1a60951d7b..c662c89794b2 100644
--- a/arch/arm/mach-exynos/dev-audio.c
+++ b/arch/arm/mach-exynos/dev-audio.c
@@ -21,7 +21,8 @@
21#include <mach/map.h> 21#include <mach/map.h>
22#include <mach/dma.h> 22#include <mach/dma.h>
23#include <mach/irqs.h> 23#include <mach/irqs.h>
24#include <mach/regs-audss.h> 24
25#define EXYNOS4_AUDSS_INT_MEM (0x03000000)
25 26
26static int exynos4_cfg_i2s(struct platform_device *pdev) 27static int exynos4_cfg_i2s(struct platform_device *pdev)
27{ 28{
diff --git a/arch/arm/mach-exynos/include/mach/cpufreq.h b/arch/arm/mach-exynos/include/mach/cpufreq.h
deleted file mode 100644
index 7517c3f417af..000000000000
--- a/arch/arm/mach-exynos/include/mach/cpufreq.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/* linux/arch/arm/mach-exynos/include/mach/cpufreq.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * EXYNOS - CPUFreq support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13enum cpufreq_level_index {
14 L0, L1, L2, L3, L4,
15 L5, L6, L7, L8, L9,
16 L10, L11, L12, L13, L14,
17 L15, L16, L17, L18, L19,
18 L20,
19};
20
21struct exynos_dvfs_info {
22 unsigned long mpll_freq_khz;
23 unsigned int pll_safe_idx;
24 unsigned int pm_lock_idx;
25 unsigned int max_support_idx;
26 unsigned int min_support_idx;
27 struct clk *cpu_clk;
28 unsigned int *volt_table;
29 struct cpufreq_frequency_table *freq_table;
30 void (*set_freq)(unsigned int, unsigned int);
31 bool (*need_apll_change)(unsigned int, unsigned int);
32};
33
34extern int exynos4210_cpufreq_init(struct exynos_dvfs_info *);
35extern int exynos4x12_cpufreq_init(struct exynos_dvfs_info *);
36extern int exynos5250_cpufreq_init(struct exynos_dvfs_info *);
diff --git a/arch/arm/mach-exynos/include/mach/pmu.h b/arch/arm/mach-exynos/include/mach/pmu.h
deleted file mode 100644
index 7c27c2d4bf44..000000000000
--- a/arch/arm/mach-exynos/include/mach/pmu.h
+++ /dev/null
@@ -1,34 +0,0 @@
1/* linux/arch/arm/mach-exynos4/include/mach/pmu.h
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * EXYNOS4210 - PMU(Power Management Unit) support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_PMU_H
14#define __ASM_ARCH_PMU_H __FILE__
15
16#define PMU_TABLE_END NULL
17
18enum sys_powerdown {
19 SYS_AFTR,
20 SYS_LPA,
21 SYS_SLEEP,
22 NUM_SYS_POWERDOWN,
23};
24
25extern unsigned long l2x0_regs_phys;
26struct exynos_pmu_conf {
27 void __iomem *reg;
28 unsigned int val[NUM_SYS_POWERDOWN];
29};
30
31extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
32extern void s3c_cpu_resume(void);
33
34#endif /* __ASM_ARCH_PMU_H */
diff --git a/arch/arm/mach-exynos/include/mach/regs-audss.h b/arch/arm/mach-exynos/include/mach/regs-audss.h
deleted file mode 100644
index ca5a8b64218a..000000000000
--- a/arch/arm/mach-exynos/include/mach/regs-audss.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/* arch/arm/mach-exynos4/include/mach/regs-audss.h
2 *
3 * Copyright (c) 2011 Samsung Electronics
4 * http://www.samsung.com
5 *
6 * Exynos4 Audio SubSystem clock register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __PLAT_REGS_AUDSS_H
14#define __PLAT_REGS_AUDSS_H __FILE__
15
16#define EXYNOS4_AUDSS_INT_MEM (0x03000000)
17
18#endif /* _PLAT_REGS_AUDSS_H */
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index b9b539cac81e..f459afda822a 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -34,7 +34,8 @@
34#include <mach/regs-clock.h> 34#include <mach/regs-clock.h>
35#include <mach/regs-pmu.h> 35#include <mach/regs-pmu.h>
36#include <mach/pm-core.h> 36#include <mach/pm-core.h>
37#include <mach/pmu.h> 37
38#include "common.h"
38 39
39static struct sleep_save exynos4_set_clksrc[] = { 40static struct sleep_save exynos4_set_clksrc[] = {
40 { .reg = EXYNOS4_CLKSRC_MASK_TOP , .val = 0x00000001, }, 41 { .reg = EXYNOS4_CLKSRC_MASK_TOP , .val = 0x00000001, },
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 3a48c852be6c..daebc1abc966 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -14,7 +14,8 @@
14#include <linux/bug.h> 14#include <linux/bug.h>
15 15
16#include <mach/regs-clock.h> 16#include <mach/regs-clock.h>
17#include <mach/pmu.h> 17
18#include "common.h"
18 19
19static struct exynos_pmu_conf *exynos_pmu_config; 20static struct exynos_pmu_conf *exynos_pmu_config;
20 21
diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile
index c46092439814..0ddd17fa067e 100644
--- a/arch/arm/mach-s3c2440/Makefile
+++ b/arch/arm/mach-s3c2440/Makefile
@@ -9,8 +9,6 @@ obj-m :=
9obj-n := 9obj-n :=
10obj- := 10obj- :=
11 11
12obj-$(CONFIG_CPU_S3C2440) += dsc.o
13
14obj-$(CONFIG_S3C2440_CPUFREQ) += s3c2440-cpufreq.o 12obj-$(CONFIG_S3C2440_CPUFREQ) += s3c2440-cpufreq.o
15 13
16obj-$(CONFIG_S3C2440_PLL_12000000) += s3c2440-pll-12000000.o 14obj-$(CONFIG_S3C2440_PLL_12000000) += s3c2440-pll-12000000.o
diff --git a/arch/arm/mach-s3c2440/dsc.c b/arch/arm/mach-s3c2440/dsc.c
deleted file mode 100644
index 9ea66e31f626..000000000000
--- a/arch/arm/mach-s3c2440/dsc.c
+++ /dev/null
@@ -1,54 +0,0 @@
1/* linux/arch/arm/mach-s3c2440/dsc.c
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Samsung S3C2440 Drive Strength Control support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/init.h>
17#include <linux/module.h>
18#include <linux/io.h>
19
20#include <asm/mach/arch.h>
21#include <asm/mach/map.h>
22#include <asm/mach/irq.h>
23
24#include <mach/hardware.h>
25#include <asm/irq.h>
26
27#include <mach/regs-gpio.h>
28#include <mach/regs-dsc.h>
29
30#include <plat/cpu.h>
31#include <plat/s3c244x.h>
32
33int s3c2440_set_dsc(unsigned int pin, unsigned int value)
34{
35 void __iomem *base;
36 unsigned long val;
37 unsigned long flags;
38 unsigned long mask;
39
40 base = (pin & S3C2440_SELECT_DSC1) ? S3C2440_DSC1 : S3C2440_DSC0;
41 mask = 3 << S3C2440_DSC_GETSHIFT(pin);
42
43 local_irq_save(flags);
44
45 val = __raw_readl(base);
46 val &= ~mask;
47 val |= value & mask;
48 __raw_writel(val, base);
49
50 local_irq_restore(flags);
51 return 0;
52}
53
54EXPORT_SYMBOL(s3c2440_set_dsc);
diff --git a/arch/arm/mach-s3c24xx/anubis.h b/arch/arm/mach-s3c24xx/anubis.h
new file mode 100644
index 000000000000..2691665f27d9
--- /dev/null
+++ b/arch/arm/mach-s3c24xx/anubis.h
@@ -0,0 +1,53 @@
1/*
2 * Copyright (c) 2005 Simtec Electronics
3 * http://www.simtec.co.uk/products/
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * ANUBIS - CPLD control constants
7 * ANUBIS - IRQ Number definitions
8 * ANUBIS - Memory map definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __MACH_S3C24XX_ANUBIS_H
16#define __MACH_S3C24XX_ANUBIS_H __FILE__
17
18/* CTRL2 - NAND WP control, IDE Reset assert/check */
19
20#define ANUBIS_CTRL1_NANDSEL (0x3)
21
22/* IDREG - revision */
23
24#define ANUBIS_IDREG_REVMASK (0x7)
25
26/* irq */
27
28#define ANUBIS_IRQ_IDE0 IRQ_EINT2
29#define ANUBIS_IRQ_IDE1 IRQ_EINT3
30#define ANUBIS_IRQ_ASIX IRQ_EINT1
31
32/* map */
33
34/* start peripherals off after the S3C2410 */
35
36#define ANUBIS_IOADDR(x) (S3C2410_ADDR((x) + 0x01800000))
37
38#define ANUBIS_PA_CPLD (S3C2410_CS1 | (1<<26))
39
40/* we put the CPLD registers next, to get them out of the way */
41
42#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000)
43#define ANUBIS_PA_CTRL1 ANUBIS_PA_CPLD
44
45#define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000)
46#define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3 << 23))
47
48#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000)
49#define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000)
50#define ANUBIS_IDESEC ANUBIS_IOADDR(0x01200000)
51#define ANUBIS_IDESECAUX ANUBIS_IOADDR(0x01300000)
52
53#endif /* __MACH_S3C24XX_ANUBIS_H */
diff --git a/arch/arm/mach-s3c24xx/bast-ide.c b/arch/arm/mach-s3c24xx/bast-ide.c
index ba02cf8d80a2..3f0288f2f542 100644
--- a/arch/arm/mach-s3c24xx/bast-ide.c
+++ b/arch/arm/mach-s3c24xx/bast-ide.c
@@ -25,8 +25,8 @@
25#include <asm/mach/irq.h> 25#include <asm/mach/irq.h>
26 26
27#include <mach/map.h> 27#include <mach/map.h>
28#include <mach/bast-map.h> 28
29#include <mach/bast-irq.h> 29#include "bast.h"
30 30
31/* IDE ports */ 31/* IDE ports */
32 32
@@ -34,12 +34,10 @@ static struct pata_platform_info bast_ide_platdata = {
34 .ioport_shift = 5, 34 .ioport_shift = 5,
35}; 35};
36 36
37#define IDE_CS S3C2410_CS5
38
39static struct resource bast_ide0_resource[] = { 37static struct resource bast_ide0_resource[] = {
40 [0] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDEPRI, 8 * 0x20), 38 [0] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDEPRI, 8 * 0x20),
41 [1] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDEPRIAUX + (6 * 0x20), 0x20), 39 [1] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDEPRIAUX + (6 * 0x20), 0x20),
42 [2] = DEFINE_RES_IRQ(IRQ_IDE0), 40 [2] = DEFINE_RES_IRQ(BAST_IRQ_IDE0),
43}; 41};
44 42
45static struct platform_device bast_device_ide0 = { 43static struct platform_device bast_device_ide0 = {
@@ -55,9 +53,9 @@ static struct platform_device bast_device_ide0 = {
55}; 53};
56 54
57static struct resource bast_ide1_resource[] = { 55static struct resource bast_ide1_resource[] = {
58 [0] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDESEC, 8 * 0x20), 56 [0] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDESEC, 8 * 0x20),
59 [1] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDESECAUX + (6 * 0x20), 0x20), 57 [1] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDESECAUX + (6 * 0x20), 0x20),
60 [2] = DEFINE_RES_IRQ(IRQ_IDE1), 58 [2] = DEFINE_RES_IRQ(BAST_IRQ_IDE1),
61}; 59};
62 60
63static struct platform_device bast_device_ide1 = { 61static struct platform_device bast_device_ide1 = {
diff --git a/arch/arm/mach-s3c24xx/bast-irq.c b/arch/arm/mach-s3c24xx/bast-irq.c
index ac7b2ad5c405..c0daa9590b4c 100644
--- a/arch/arm/mach-s3c24xx/bast-irq.c
+++ b/arch/arm/mach-s3c24xx/bast-irq.c
@@ -27,27 +27,20 @@
27#include <linux/device.h> 27#include <linux/device.h>
28#include <linux/io.h> 28#include <linux/io.h>
29 29
30#include <asm/mach-types.h>
31
32#include <mach/hardware.h>
33#include <asm/irq.h> 30#include <asm/irq.h>
34 31#include <asm/mach-types.h>
35#include <asm/mach/irq.h> 32#include <asm/mach/irq.h>
36 33
34#include <mach/hardware.h>
37#include <mach/regs-irq.h> 35#include <mach/regs-irq.h>
38#include <mach/bast-map.h>
39#include <mach/bast-irq.h>
40 36
41#include <plat/irq.h> 37#include <plat/irq.h>
42 38
43#if 0 39#include "bast.h"
44#include <asm/debug-ll.h>
45#endif
46 40
47#define irqdbf(x...) 41#define irqdbf(x...)
48#define irqdbf2(x...) 42#define irqdbf2(x...)
49 43
50
51/* handle PC104 ISA interrupts from the system CPLD */ 44/* handle PC104 ISA interrupts from the system CPLD */
52 45
53/* table of ISA irq nos to the relevant mask... zero means 46/* table of ISA irq nos to the relevant mask... zero means
@@ -87,7 +80,7 @@ bast_pc104_mask(struct irq_data *data)
87static void 80static void
88bast_pc104_maskack(struct irq_data *data) 81bast_pc104_maskack(struct irq_data *data)
89{ 82{
90 struct irq_desc *desc = irq_desc + IRQ_ISA; 83 struct irq_desc *desc = irq_desc + BAST_IRQ_ISA;
91 84
92 bast_pc104_mask(data); 85 bast_pc104_mask(data);
93 desc->irq_data.chip->irq_ack(&desc->irq_data); 86 desc->irq_data.chip->irq_ack(&desc->irq_data);
@@ -122,7 +115,7 @@ bast_irq_pc104_demux(unsigned int irq,
122 if (unlikely(stat == 0)) { 115 if (unlikely(stat == 0)) {
123 /* ack if we get an irq with nothing (ie, startup) */ 116 /* ack if we get an irq with nothing (ie, startup) */
124 117
125 desc = irq_desc + IRQ_ISA; 118 desc = irq_desc + BAST_IRQ_ISA;
126 desc->irq_data.chip->irq_ack(&desc->irq_data); 119 desc->irq_data.chip->irq_ack(&desc->irq_data);
127 } else { 120 } else {
128 /* handle the IRQ */ 121 /* handle the IRQ */
@@ -147,7 +140,7 @@ static __init int bast_irq_init(void)
147 140
148 __raw_writeb(0x0, BAST_VA_PC104_IRQMASK); 141 __raw_writeb(0x0, BAST_VA_PC104_IRQMASK);
149 142
150 irq_set_chained_handler(IRQ_ISA, bast_irq_pc104_demux); 143 irq_set_chained_handler(BAST_IRQ_ISA, bast_irq_pc104_demux);
151 144
152 /* register our IRQs */ 145 /* register our IRQs */
153 146
diff --git a/arch/arm/mach-s3c24xx/bast.h b/arch/arm/mach-s3c24xx/bast.h
new file mode 100644
index 000000000000..5c7534bae92d
--- /dev/null
+++ b/arch/arm/mach-s3c24xx/bast.h
@@ -0,0 +1,197 @@
1/*
2 * Copyright (c) 2003-2004 Simtec Electronics
3 * Ben Dooks <ben@simtec.co.uk>
4 *
5 * BAST - CPLD control constants
6 * BAST - IRQ Number definitions
7 * BAST - Memory map definitions
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#ifndef __MACH_S3C24XX_BAST_H
15#define __MACH_S3C24XX_BAST_H __FILE__
16
17/* CTRL1 - Audio LR routing */
18
19#define BAST_CPLD_CTRL1_LRCOFF (0x00)
20#define BAST_CPLD_CTRL1_LRCADC (0x01)
21#define BAST_CPLD_CTRL1_LRCDAC (0x02)
22#define BAST_CPLD_CTRL1_LRCARM (0x03)
23#define BAST_CPLD_CTRL1_LRMASK (0x03)
24
25/* CTRL2 - NAND WP control, IDE Reset assert/check */
26
27#define BAST_CPLD_CTRL2_WNAND (0x04)
28#define BAST_CPLD_CTLR2_IDERST (0x08)
29
30/* CTRL3 - rom write control, CPLD identity */
31
32#define BAST_CPLD_CTRL3_IDMASK (0x0e)
33#define BAST_CPLD_CTRL3_ROMWEN (0x01)
34
35/* CTRL4 - 8bit LCD interface control/status */
36
37#define BAST_CPLD_CTRL4_LLAT (0x01)
38#define BAST_CPLD_CTRL4_LCDRW (0x02)
39#define BAST_CPLD_CTRL4_LCDCMD (0x04)
40#define BAST_CPLD_CTRL4_LCDE2 (0x01)
41
42/* CTRL5 - DMA routing */
43
44#define BAST_CPLD_DMA0_PRIIDE (0)
45#define BAST_CPLD_DMA0_SECIDE (1)
46#define BAST_CPLD_DMA0_ISA15 (2)
47#define BAST_CPLD_DMA0_ISA36 (3)
48
49#define BAST_CPLD_DMA1_PRIIDE (0 << 2)
50#define BAST_CPLD_DMA1_SECIDE (1 << 2)
51#define BAST_CPLD_DMA1_ISA15 (2 << 2)
52#define BAST_CPLD_DMA1_ISA36 (3 << 2)
53
54/* irq numbers to onboard peripherals */
55
56#define BAST_IRQ_USBOC IRQ_EINT18
57#define BAST_IRQ_IDE0 IRQ_EINT16
58#define BAST_IRQ_IDE1 IRQ_EINT17
59#define BAST_IRQ_PCSERIAL1 IRQ_EINT15
60#define BAST_IRQ_PCSERIAL2 IRQ_EINT14
61#define BAST_IRQ_PCPARALLEL IRQ_EINT13
62#define BAST_IRQ_ASIX IRQ_EINT11
63#define BAST_IRQ_DM9000 IRQ_EINT10
64#define BAST_IRQ_ISA IRQ_EINT9
65#define BAST_IRQ_SMALERT IRQ_EINT8
66
67/* map */
68
69/*
70 * ok, we've used up to 0x13000000, now we need to find space for the
71 * peripherals that live in the nGCS[x] areas, which are quite numerous
72 * in their space. We also have the board's CPLD to find register space
73 * for.
74 */
75
76#define BAST_IOADDR(x) (S3C2410_ADDR((x) + 0x01300000))
77
78/* we put the CPLD registers next, to get them out of the way */
79
80#define BAST_VA_CTRL1 BAST_IOADDR(0x00000000)
81#define BAST_PA_CTRL1 (S3C2410_CS5 | 0x7800000)
82
83#define BAST_VA_CTRL2 BAST_IOADDR(0x00100000)
84#define BAST_PA_CTRL2 (S3C2410_CS1 | 0x6000000)
85
86#define BAST_VA_CTRL3 BAST_IOADDR(0x00200000)
87#define BAST_PA_CTRL3 (S3C2410_CS1 | 0x6800000)
88
89#define BAST_VA_CTRL4 BAST_IOADDR(0x00300000)
90#define BAST_PA_CTRL4 (S3C2410_CS1 | 0x7000000)
91
92/* next, we have the PC104 ISA interrupt registers */
93
94#define BAST_PA_PC104_IRQREQ (S3C2410_CS5 | 0x6000000)
95#define BAST_VA_PC104_IRQREQ BAST_IOADDR(0x00400000)
96
97#define BAST_PA_PC104_IRQRAW (S3C2410_CS5 | 0x6800000)
98#define BAST_VA_PC104_IRQRAW BAST_IOADDR(0x00500000)
99
100#define BAST_PA_PC104_IRQMASK (S3C2410_CS5 | 0x7000000)
101#define BAST_VA_PC104_IRQMASK BAST_IOADDR(0x00600000)
102
103#define BAST_PA_LCD_RCMD1 (0x8800000)
104#define BAST_VA_LCD_RCMD1 BAST_IOADDR(0x00700000)
105
106#define BAST_PA_LCD_WCMD1 (0x8000000)
107#define BAST_VA_LCD_WCMD1 BAST_IOADDR(0x00800000)
108
109#define BAST_PA_LCD_RDATA1 (0x9800000)
110#define BAST_VA_LCD_RDATA1 BAST_IOADDR(0x00900000)
111
112#define BAST_PA_LCD_WDATA1 (0x9000000)
113#define BAST_VA_LCD_WDATA1 BAST_IOADDR(0x00A00000)
114
115#define BAST_PA_LCD_RCMD2 (0xA800000)
116#define BAST_VA_LCD_RCMD2 BAST_IOADDR(0x00B00000)
117
118#define BAST_PA_LCD_WCMD2 (0xA000000)
119#define BAST_VA_LCD_WCMD2 BAST_IOADDR(0x00C00000)
120
121#define BAST_PA_LCD_RDATA2 (0xB800000)
122#define BAST_VA_LCD_RDATA2 BAST_IOADDR(0x00D00000)
123
124#define BAST_PA_LCD_WDATA2 (0xB000000)
125#define BAST_VA_LCD_WDATA2 BAST_IOADDR(0x00E00000)
126
127
128/*
129 * 0xE0000000 contains the IO space that is split by speed and
130 * whether the access is for 8 or 16bit IO... this ensures that
131 * the correct access is made
132 *
133 * 0x10000000 of space, partitioned as so:
134 *
135 * 0x00000000 to 0x04000000 8bit, slow
136 * 0x04000000 to 0x08000000 16bit, slow
137 * 0x08000000 to 0x0C000000 16bit, net
138 * 0x0C000000 to 0x10000000 16bit, fast
139 *
140 * each of these spaces has the following in:
141 *
142 * 0x00000000 to 0x01000000 16MB ISA IO space
143 * 0x01000000 to 0x02000000 16MB ISA memory space
144 * 0x02000000 to 0x02100000 1MB IDE primary channel
145 * 0x02100000 to 0x02200000 1MB IDE primary channel aux
146 * 0x02200000 to 0x02400000 1MB IDE secondary channel
147 * 0x02300000 to 0x02400000 1MB IDE secondary channel aux
148 * 0x02400000 to 0x02500000 1MB ASIX ethernet controller
149 * 0x02500000 to 0x02600000 1MB Davicom DM9000 ethernet controller
150 * 0x02600000 to 0x02700000 1MB PC SuperIO controller
151 *
152 * the phyiscal layout of the zones are:
153 * nGCS2 - 8bit, slow
154 * nGCS3 - 16bit, slow
155 * nGCS4 - 16bit, net
156 * nGCS5 - 16bit, fast
157 */
158
159#define BAST_VA_MULTISPACE (0xE0000000)
160
161#define BAST_VA_ISAIO (BAST_VA_MULTISPACE + 0x00000000)
162#define BAST_VA_ISAMEM (BAST_VA_MULTISPACE + 0x01000000)
163#define BAST_VA_IDEPRI (BAST_VA_MULTISPACE + 0x02000000)
164#define BAST_VA_IDEPRIAUX (BAST_VA_MULTISPACE + 0x02100000)
165#define BAST_VA_IDESEC (BAST_VA_MULTISPACE + 0x02200000)
166#define BAST_VA_IDESECAUX (BAST_VA_MULTISPACE + 0x02300000)
167#define BAST_VA_ASIXNET (BAST_VA_MULTISPACE + 0x02400000)
168#define BAST_VA_DM9000 (BAST_VA_MULTISPACE + 0x02500000)
169#define BAST_VA_SUPERIO (BAST_VA_MULTISPACE + 0x02600000)
170
171#define BAST_VAM_CS2 (0x00000000)
172#define BAST_VAM_CS3 (0x04000000)
173#define BAST_VAM_CS4 (0x08000000)
174#define BAST_VAM_CS5 (0x0C000000)
175
176/* physical offset addresses for the peripherals */
177
178#define BAST_PA_ISAIO (0x00000000)
179#define BAST_PA_ASIXNET (0x01000000)
180#define BAST_PA_SUPERIO (0x01800000)
181#define BAST_PA_IDEPRI (0x02000000)
182#define BAST_PA_IDEPRIAUX (0x02800000)
183#define BAST_PA_IDESEC (0x03000000)
184#define BAST_PA_IDESECAUX (0x03800000)
185#define BAST_PA_ISAMEM (0x04000000)
186#define BAST_PA_DM9000 (0x05000000)
187
188/* some configurations for the peripherals */
189
190#define BAST_PCSIO (BAST_VA_SUPERIO + BAST_VAM_CS2)
191
192#define BAST_ASIXNET_CS BAST_VAM_CS5
193#define BAST_DM9000_CS BAST_VAM_CS4
194
195#define BAST_IDE_CS S3C2410_CS5
196
197#endif /* __MACH_S3C24XX_BAST_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/gta02.h b/arch/arm/mach-s3c24xx/gta02.h
index 217393482153..9430a71e9184 100644
--- a/arch/arm/mach-s3c24xx/include/mach/gta02.h
+++ b/arch/arm/mach-s3c24xx/gta02.h
@@ -1,5 +1,13 @@
1#ifndef _GTA02_H 1/*
2#define _GTA02_H 2 * GTA02 header
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7*/
8
9#ifndef __MACH_S3C24XX_GTA02_H
10#define __MACH_S3C24XX_GTA02_H __FILE__
3 11
4#include <mach/regs-gpio.h> 12#include <mach/regs-gpio.h>
5 13
@@ -12,4 +20,4 @@
12 20
13#define GTA02_IRQ_PCF50633 IRQ_EINT9 21#define GTA02_IRQ_PCF50633 IRQ_EINT9
14 22
15#endif /* _GTA02_H */ 23#endif /* __MACH_S3C24XX_GTA02_H */
diff --git a/arch/arm/mach-s3c24xx/h1940-bluetooth.c b/arch/arm/mach-s3c24xx/h1940-bluetooth.c
index 3f40c61b6e02..5b98bfd1df43 100644
--- a/arch/arm/mach-s3c24xx/h1940-bluetooth.c
+++ b/arch/arm/mach-s3c24xx/h1940-bluetooth.c
@@ -19,10 +19,10 @@
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/rfkill.h> 20#include <linux/rfkill.h>
21 21
22#include <mach/regs-gpio.h>
23#include <mach/hardware.h> 22#include <mach/hardware.h>
24#include <mach/h1940-latch.h> 23#include <mach/regs-gpio.h>
25#include <mach/h1940.h> 24
25#include "h1940.h"
26 26
27#define DRV_NAME "h1940-bt" 27#define DRV_NAME "h1940-bt"
28 28
diff --git a/arch/arm/mach-s3c24xx/include/mach/h1940-latch.h b/arch/arm/mach-s3c24xx/h1940.h
index fc897d3a056c..2950cc466840 100644
--- a/arch/arm/mach-s3c24xx/include/mach/h1940-latch.h
+++ b/arch/arm/mach-s3c24xx/h1940.h
@@ -1,20 +1,30 @@
1/* arch/arm/mach-s3c2410/include/mach/h1940-latch.h 1/*
2 * Copyright 2006 Ben Dooks <ben-linux@fluff.org>
2 * 3 *
3 * Copyright (c) 2005 Simtec Electronics 4 * Copyright (c) 2005 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 5 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk> 6 * Ben Dooks <ben@simtec.co.uk>
6 * 7 *
7 * iPAQ H1940 series - latch definitions 8 * iPAQ H1940 series definitions
8 * 9 *
9 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
12*/ 13*/
13 14
14#ifndef __ASM_ARCH_H1940_LATCH_H 15#ifndef __MACH_S3C24XX_H1940_H
15#define __ASM_ARCH_H1940_LATCH_H 16#define __MACH_S3C24XX_H1940_H __FILE__
16 17
17#include <asm/gpio.h> 18#define H1940_SUSPEND_CHECKSUM (0x30003ff8)
19#define H1940_SUSPEND_RESUMEAT (0x30081000)
20#define H1940_SUSPEND_CHECK (0x30080000)
21
22extern void h1940_pm_return(void);
23extern int h1940_led_blink_set(unsigned gpio, int state,
24 unsigned long *delay_on,
25 unsigned long *delay_off);
26
27#include <linux/gpio.h>
18 28
19#define H1940_LATCH_GPIO(x) (S3C_GPIO_END + (x)) 29#define H1940_LATCH_GPIO(x) (S3C_GPIO_END + (x))
20 30
@@ -40,4 +50,4 @@
40#define H1940_LATCH_LED_GREEN H1940_LATCH_GPIO(14) 50#define H1940_LATCH_LED_GREEN H1940_LATCH_GPIO(14)
41#define H1940_LATCH_LED_FLASH H1940_LATCH_GPIO(15) 51#define H1940_LATCH_LED_FLASH H1940_LATCH_GPIO(15)
42 52
43#endif /* __ASM_ARCH_H1940_LATCH_H */ 53#endif /* __MACH_S3C24XX_H1940_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/anubis-cpld.h b/arch/arm/mach-s3c24xx/include/mach/anubis-cpld.h
deleted file mode 100644
index 1b614d5a81f3..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/anubis-cpld.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/anubis-cpld.h
2 *
3 * Copyright (c) 2005 Simtec Electronics
4 * http://www.simtec.co.uk/products/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * ANUBIS - CPLD control constants
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#ifndef __ASM_ARCH_ANUBISCPLD_H
15#define __ASM_ARCH_ANUBISCPLD_H
16
17/* CTRL2 - NAND WP control, IDE Reset assert/check */
18
19#define ANUBIS_CTRL1_NANDSEL (0x3)
20
21/* IDREG - revision */
22
23#define ANUBIS_IDREG_REVMASK (0x7)
24
25#endif /* __ASM_ARCH_ANUBISCPLD_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/anubis-irq.h b/arch/arm/mach-s3c24xx/include/mach/anubis-irq.h
deleted file mode 100644
index a2a328134e34..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/anubis-irq.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/anubis-irq.h
2 *
3 * Copyright (c) 2005 Simtec Electronics
4 * http://www.simtec.co.uk/products/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * ANUBIS - IRQ Number definitions
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#ifndef __ASM_ARCH_ANUBISIRQ_H
15#define __ASM_ARCH_ANUBISIRQ_H
16
17#define IRQ_IDE0 IRQ_EINT2
18#define IRQ_IDE1 IRQ_EINT3
19#define IRQ_ASIX IRQ_EINT1
20
21#endif /* __ASM_ARCH_ANUBISIRQ_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/anubis-map.h b/arch/arm/mach-s3c24xx/include/mach/anubis-map.h
deleted file mode 100644
index c9deb3a5b2c3..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/anubis-map.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/anubis-map.h
2 *
3 * Copyright (c) 2005 Simtec Electronics
4 * http://www.simtec.co.uk/products/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * ANUBIS - Memory map definitions
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14/* needs arch/map.h including with this */
15
16#ifndef __ASM_ARCH_ANUBISMAP_H
17#define __ASM_ARCH_ANUBISMAP_H
18
19/* start peripherals off after the S3C2410 */
20
21#define ANUBIS_IOADDR(x) (S3C2410_ADDR((x) + 0x01800000))
22
23#define ANUBIS_PA_CPLD (S3C2410_CS1 | (1<<26))
24
25/* we put the CPLD registers next, to get them out of the way */
26
27#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */
28#define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD)
29
30#define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */
31#define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3<<23))
32
33#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000)
34#define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000)
35#define ANUBIS_IDESEC ANUBIS_IOADDR(0x01200000)
36#define ANUBIS_IDESECAUX ANUBIS_IOADDR(0x01300000)
37
38#endif /* __ASM_ARCH_ANUBISMAP_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/bast-cpld.h b/arch/arm/mach-s3c24xx/include/mach/bast-cpld.h
deleted file mode 100644
index bee2a7a932a0..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/bast-cpld.h
+++ /dev/null
@@ -1,53 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/bast-cpld.h
2 *
3 * Copyright (c) 2003-2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * BAST - CPLD control constants
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_BASTCPLD_H
14#define __ASM_ARCH_BASTCPLD_H
15
16/* CTRL1 - Audio LR routing */
17
18#define BAST_CPLD_CTRL1_LRCOFF (0x00)
19#define BAST_CPLD_CTRL1_LRCADC (0x01)
20#define BAST_CPLD_CTRL1_LRCDAC (0x02)
21#define BAST_CPLD_CTRL1_LRCARM (0x03)
22#define BAST_CPLD_CTRL1_LRMASK (0x03)
23
24/* CTRL2 - NAND WP control, IDE Reset assert/check */
25
26#define BAST_CPLD_CTRL2_WNAND (0x04)
27#define BAST_CPLD_CTLR2_IDERST (0x08)
28
29/* CTRL3 - rom write control, CPLD identity */
30
31#define BAST_CPLD_CTRL3_IDMASK (0x0e)
32#define BAST_CPLD_CTRL3_ROMWEN (0x01)
33
34/* CTRL4 - 8bit LCD interface control/status */
35
36#define BAST_CPLD_CTRL4_LLAT (0x01)
37#define BAST_CPLD_CTRL4_LCDRW (0x02)
38#define BAST_CPLD_CTRL4_LCDCMD (0x04)
39#define BAST_CPLD_CTRL4_LCDE2 (0x01)
40
41/* CTRL5 - DMA routing */
42
43#define BAST_CPLD_DMA0_PRIIDE (0<<0)
44#define BAST_CPLD_DMA0_SECIDE (1<<0)
45#define BAST_CPLD_DMA0_ISA15 (2<<0)
46#define BAST_CPLD_DMA0_ISA36 (3<<0)
47
48#define BAST_CPLD_DMA1_PRIIDE (0<<2)
49#define BAST_CPLD_DMA1_SECIDE (1<<2)
50#define BAST_CPLD_DMA1_ISA15 (2<<2)
51#define BAST_CPLD_DMA1_ISA36 (3<<2)
52
53#endif /* __ASM_ARCH_BASTCPLD_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/bast-irq.h b/arch/arm/mach-s3c24xx/include/mach/bast-irq.h
deleted file mode 100644
index cac428c42e7f..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/bast-irq.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/bast-irq.h
2 *
3 * Copyright (c) 2003-2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Machine BAST - IRQ Number definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_BASTIRQ_H
14#define __ASM_ARCH_BASTIRQ_H
15
16/* irq numbers to onboard peripherals */
17
18#define IRQ_USBOC IRQ_EINT18
19#define IRQ_IDE0 IRQ_EINT16
20#define IRQ_IDE1 IRQ_EINT17
21#define IRQ_PCSERIAL1 IRQ_EINT15
22#define IRQ_PCSERIAL2 IRQ_EINT14
23#define IRQ_PCPARALLEL IRQ_EINT13
24#define IRQ_ASIX IRQ_EINT11
25#define IRQ_DM9000 IRQ_EINT10
26#define IRQ_ISA IRQ_EINT9
27#define IRQ_SMALERT IRQ_EINT8
28
29#endif /* __ASM_ARCH_BASTIRQ_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/bast-map.h b/arch/arm/mach-s3c24xx/include/mach/bast-map.h
deleted file mode 100644
index eecea2a50f8f..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/bast-map.h
+++ /dev/null
@@ -1,146 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/bast-map.h
2 *
3 * Copyright (c) 2003-2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Machine BAST - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* needs arch/map.h including with this */
14
15/* ok, we've used up to 0x13000000, now we need to find space for the
16 * peripherals that live in the nGCS[x] areas, which are quite numerous
17 * in their space. We also have the board's CPLD to find register space
18 * for.
19 */
20
21#ifndef __ASM_ARCH_BASTMAP_H
22#define __ASM_ARCH_BASTMAP_H
23
24#define BAST_IOADDR(x) (S3C2410_ADDR((x) + 0x01300000))
25
26/* we put the CPLD registers next, to get them out of the way */
27
28#define BAST_VA_CTRL1 BAST_IOADDR(0x00000000) /* 0x01300000 */
29#define BAST_PA_CTRL1 (S3C2410_CS5 | 0x7800000)
30
31#define BAST_VA_CTRL2 BAST_IOADDR(0x00100000) /* 0x01400000 */
32#define BAST_PA_CTRL2 (S3C2410_CS1 | 0x6000000)
33
34#define BAST_VA_CTRL3 BAST_IOADDR(0x00200000) /* 0x01500000 */
35#define BAST_PA_CTRL3 (S3C2410_CS1 | 0x6800000)
36
37#define BAST_VA_CTRL4 BAST_IOADDR(0x00300000) /* 0x01600000 */
38#define BAST_PA_CTRL4 (S3C2410_CS1 | 0x7000000)
39
40/* next, we have the PC104 ISA interrupt registers */
41
42#define BAST_PA_PC104_IRQREQ (S3C2410_CS5 | 0x6000000) /* 0x01700000 */
43#define BAST_VA_PC104_IRQREQ BAST_IOADDR(0x00400000)
44
45#define BAST_PA_PC104_IRQRAW (S3C2410_CS5 | 0x6800000) /* 0x01800000 */
46#define BAST_VA_PC104_IRQRAW BAST_IOADDR(0x00500000)
47
48#define BAST_PA_PC104_IRQMASK (S3C2410_CS5 | 0x7000000) /* 0x01900000 */
49#define BAST_VA_PC104_IRQMASK BAST_IOADDR(0x00600000)
50
51#define BAST_PA_LCD_RCMD1 (0x8800000)
52#define BAST_VA_LCD_RCMD1 BAST_IOADDR(0x00700000)
53
54#define BAST_PA_LCD_WCMD1 (0x8000000)
55#define BAST_VA_LCD_WCMD1 BAST_IOADDR(0x00800000)
56
57#define BAST_PA_LCD_RDATA1 (0x9800000)
58#define BAST_VA_LCD_RDATA1 BAST_IOADDR(0x00900000)
59
60#define BAST_PA_LCD_WDATA1 (0x9000000)
61#define BAST_VA_LCD_WDATA1 BAST_IOADDR(0x00A00000)
62
63#define BAST_PA_LCD_RCMD2 (0xA800000)
64#define BAST_VA_LCD_RCMD2 BAST_IOADDR(0x00B00000)
65
66#define BAST_PA_LCD_WCMD2 (0xA000000)
67#define BAST_VA_LCD_WCMD2 BAST_IOADDR(0x00C00000)
68
69#define BAST_PA_LCD_RDATA2 (0xB800000)
70#define BAST_VA_LCD_RDATA2 BAST_IOADDR(0x00D00000)
71
72#define BAST_PA_LCD_WDATA2 (0xB000000)
73#define BAST_VA_LCD_WDATA2 BAST_IOADDR(0x00E00000)
74
75
76/* 0xE0000000 contains the IO space that is split by speed and
77 * whether the access is for 8 or 16bit IO... this ensures that
78 * the correct access is made
79 *
80 * 0x10000000 of space, partitioned as so:
81 *
82 * 0x00000000 to 0x04000000 8bit, slow
83 * 0x04000000 to 0x08000000 16bit, slow
84 * 0x08000000 to 0x0C000000 16bit, net
85 * 0x0C000000 to 0x10000000 16bit, fast
86 *
87 * each of these spaces has the following in:
88 *
89 * 0x00000000 to 0x01000000 16MB ISA IO space
90 * 0x01000000 to 0x02000000 16MB ISA memory space
91 * 0x02000000 to 0x02100000 1MB IDE primary channel
92 * 0x02100000 to 0x02200000 1MB IDE primary channel aux
93 * 0x02200000 to 0x02400000 1MB IDE secondary channel
94 * 0x02300000 to 0x02400000 1MB IDE secondary channel aux
95 * 0x02400000 to 0x02500000 1MB ASIX ethernet controller
96 * 0x02500000 to 0x02600000 1MB Davicom DM9000 ethernet controller
97 * 0x02600000 to 0x02700000 1MB PC SuperIO controller
98 *
99 * the phyiscal layout of the zones are:
100 * nGCS2 - 8bit, slow
101 * nGCS3 - 16bit, slow
102 * nGCS4 - 16bit, net
103 * nGCS5 - 16bit, fast
104 */
105
106#define BAST_VA_MULTISPACE (0xE0000000)
107
108#define BAST_VA_ISAIO (BAST_VA_MULTISPACE + 0x00000000)
109#define BAST_VA_ISAMEM (BAST_VA_MULTISPACE + 0x01000000)
110#define BAST_VA_IDEPRI (BAST_VA_MULTISPACE + 0x02000000)
111#define BAST_VA_IDEPRIAUX (BAST_VA_MULTISPACE + 0x02100000)
112#define BAST_VA_IDESEC (BAST_VA_MULTISPACE + 0x02200000)
113#define BAST_VA_IDESECAUX (BAST_VA_MULTISPACE + 0x02300000)
114#define BAST_VA_ASIXNET (BAST_VA_MULTISPACE + 0x02400000)
115#define BAST_VA_DM9000 (BAST_VA_MULTISPACE + 0x02500000)
116#define BAST_VA_SUPERIO (BAST_VA_MULTISPACE + 0x02600000)
117
118#define BAST_VA_MULTISPACE (0xE0000000)
119
120#define BAST_VAM_CS2 (0x00000000)
121#define BAST_VAM_CS3 (0x04000000)
122#define BAST_VAM_CS4 (0x08000000)
123#define BAST_VAM_CS5 (0x0C000000)
124
125/* physical offset addresses for the peripherals */
126
127#define BAST_PA_ISAIO (0x00000000)
128#define BAST_PA_ASIXNET (0x01000000)
129#define BAST_PA_SUPERIO (0x01800000)
130#define BAST_PA_IDEPRI (0x02000000)
131#define BAST_PA_IDEPRIAUX (0x02800000)
132#define BAST_PA_IDESEC (0x03000000)
133#define BAST_PA_IDESECAUX (0x03800000)
134#define BAST_PA_ISAMEM (0x04000000)
135#define BAST_PA_DM9000 (0x05000000)
136
137/* some configurations for the peripherals */
138
139#define BAST_PCSIO (BAST_VA_SUPERIO + BAST_VAM_CS2)
140/* */
141
142#define BAST_ASIXNET_CS BAST_VAM_CS5
143#define BAST_IDE_CS BAST_VAM_CS5
144#define BAST_DM9000_CS BAST_VAM_CS4
145
146#endif /* __ASM_ARCH_BASTMAP_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/gpio-fns.h b/arch/arm/mach-s3c24xx/include/mach/gpio-fns.h
deleted file mode 100644
index c53ad34c6579..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/gpio-fns.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <plat/gpio-fns.h>
diff --git a/arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h b/arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h
deleted file mode 100644
index 3890a05948fb..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h
+++ /dev/null
@@ -1,97 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/gpio-nrs.h
2 *
3 * Copyright (c) 2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C2410 - GPIO bank numbering
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#ifndef __MACH_GPIONRS_H
15#define __MACH_GPIONRS_H
16
17#define S3C2410_GPIONO(bank,offset) ((bank) + (offset))
18
19#define S3C2410_GPIO_BANKG (32*6)
20#define S3C2410_GPIO_BANKH (32*7)
21
22/* GPIO sizes for various SoCs:
23 *
24 * 2442
25 * 2410 2412 2440 2443 2416
26 * ---- ---- ---- ---- ----
27 * A 23 22 25 16 25
28 * B 11 11 11 11 9
29 * C 16 15 16 16 16
30 * D 16 16 16 16 16
31 * E 16 16 16 16 16
32 * F 8 8 8 8 8
33 * G 16 16 16 16 8
34 * H 11 11 9 15 15
35 * J -- -- 13 16 --
36 * K -- -- -- -- 16
37 * L -- -- -- 15 7
38 * M -- -- -- 2 2
39 */
40
41/* GPIO bank sizes */
42#define S3C2410_GPIO_A_NR (32)
43#define S3C2410_GPIO_B_NR (32)
44#define S3C2410_GPIO_C_NR (32)
45#define S3C2410_GPIO_D_NR (32)
46#define S3C2410_GPIO_E_NR (32)
47#define S3C2410_GPIO_F_NR (32)
48#define S3C2410_GPIO_G_NR (32)
49#define S3C2410_GPIO_H_NR (32)
50#define S3C2410_GPIO_J_NR (32) /* technically 16. */
51#define S3C2410_GPIO_K_NR (32) /* technically 16. */
52#define S3C2410_GPIO_L_NR (32) /* technically 15. */
53#define S3C2410_GPIO_M_NR (32) /* technically 2. */
54
55#if CONFIG_S3C_GPIO_SPACE != 0
56#error CONFIG_S3C_GPIO_SPACE cannot be nonzero at the moment
57#endif
58
59#define S3C2410_GPIO_NEXT(__gpio) \
60 ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 0)
61
62#ifndef __ASSEMBLY__
63
64enum s3c_gpio_number {
65 S3C2410_GPIO_A_START = 0,
66 S3C2410_GPIO_B_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_A),
67 S3C2410_GPIO_C_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_B),
68 S3C2410_GPIO_D_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_C),
69 S3C2410_GPIO_E_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_D),
70 S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E),
71 S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F),
72 S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G),
73 S3C2410_GPIO_J_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_H),
74 S3C2410_GPIO_K_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_J),
75 S3C2410_GPIO_L_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_K),
76 S3C2410_GPIO_M_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_L),
77};
78
79#endif /* __ASSEMBLY__ */
80
81/* S3C2410 GPIO number definitions. */
82
83#define S3C2410_GPA(_nr) (S3C2410_GPIO_A_START + (_nr))
84#define S3C2410_GPB(_nr) (S3C2410_GPIO_B_START + (_nr))
85#define S3C2410_GPC(_nr) (S3C2410_GPIO_C_START + (_nr))
86#define S3C2410_GPD(_nr) (S3C2410_GPIO_D_START + (_nr))
87#define S3C2410_GPE(_nr) (S3C2410_GPIO_E_START + (_nr))
88#define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr))
89#define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr))
90#define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr))
91#define S3C2410_GPJ(_nr) (S3C2410_GPIO_J_START + (_nr))
92#define S3C2410_GPK(_nr) (S3C2410_GPIO_K_START + (_nr))
93#define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr))
94#define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr))
95
96#endif /* __MACH_GPIONRS_H */
97
diff --git a/arch/arm/mach-s3c24xx/include/mach/gpio-track.h b/arch/arm/mach-s3c24xx/include/mach/gpio-track.h
deleted file mode 100644
index c410a078622c..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/gpio-track.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/* arch/arm/mach-s3c24100/include/mach/gpio-core.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C2410 - GPIO core support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_GPIO_CORE_H
16#define __ASM_ARCH_GPIO_CORE_H __FILE__
17
18#include <mach/regs-gpio.h>
19
20extern struct samsung_gpio_chip s3c24xx_gpios[];
21
22static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int pin)
23{
24 struct samsung_gpio_chip *chip;
25
26 if (pin > S3C_GPIO_END)
27 return NULL;
28
29 chip = &s3c24xx_gpios[pin/32];
30 return ((pin - chip->chip.base) < chip->chip.ngpio) ? chip : NULL;
31}
32
33#endif /* __ASM_ARCH_GPIO_CORE_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/gpio.h b/arch/arm/mach-s3c24xx/include/mach/gpio.h
index 6fac70f3484e..14591563ca70 100644
--- a/arch/arm/mach-s3c24xx/include/mach/gpio.h
+++ b/arch/arm/mach-s3c24xx/include/mach/gpio.h
@@ -1,5 +1,4 @@
1/* arch/arm/mach-s3c2410/include/mach/gpio.h 1/*
2 *
3 * Copyright (c) 2008 Simtec Electronics 2 * Copyright (c) 2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 3 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
@@ -15,6 +14,9 @@
15 * devices that need GPIO. 14 * devices that need GPIO.
16 */ 15 */
17 16
17#ifndef __MACH_GPIO_H
18#define __MACH_GPIO_H __FILE__
19
18#ifdef CONFIG_CPU_S3C244X 20#ifdef CONFIG_CPU_S3C244X
19#define ARCH_NR_GPIOS (32 * 9 + CONFIG_S3C24XX_GPIO_EXTRA) 21#define ARCH_NR_GPIOS (32 * 9 + CONFIG_S3C24XX_GPIO_EXTRA)
20#elif defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416) 22#elif defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416)
@@ -23,8 +25,83 @@
23#define ARCH_NR_GPIOS (256 + CONFIG_S3C24XX_GPIO_EXTRA) 25#define ARCH_NR_GPIOS (256 + CONFIG_S3C24XX_GPIO_EXTRA)
24#endif 26#endif
25 27
26#include <mach/gpio-nrs.h> 28/*
27#include <mach/gpio-fns.h> 29 * GPIO sizes for various SoCs:
30 *
31 * 2410 2412 2440 2443 2416
32 * 2442
33 * ---- ---- ---- ---- ----
34 * A 23 22 25 16 25
35 * B 11 11 11 11 9
36 * C 16 15 16 16 16
37 * D 16 16 16 16 16
38 * E 16 16 16 16 16
39 * F 8 8 8 8 8
40 * G 16 16 16 16 8
41 * H 11 11 9 15 15
42 * J -- -- 13 16 --
43 * K -- -- -- -- 16
44 * L -- -- -- 15 7
45 * M -- -- -- 2 2
46 */
47
48/* GPIO bank sizes */
49
50#define S3C2410_GPIO_A_NR (32)
51#define S3C2410_GPIO_B_NR (32)
52#define S3C2410_GPIO_C_NR (32)
53#define S3C2410_GPIO_D_NR (32)
54#define S3C2410_GPIO_E_NR (32)
55#define S3C2410_GPIO_F_NR (32)
56#define S3C2410_GPIO_G_NR (32)
57#define S3C2410_GPIO_H_NR (32)
58#define S3C2410_GPIO_J_NR (32) /* technically 16. */
59#define S3C2410_GPIO_K_NR (32) /* technically 16. */
60#define S3C2410_GPIO_L_NR (32) /* technically 15. */
61#define S3C2410_GPIO_M_NR (32) /* technically 2. */
62
63#if CONFIG_S3C_GPIO_SPACE != 0
64#error CONFIG_S3C_GPIO_SPACE cannot be nonzero at the moment
65#endif
66
67#define S3C2410_GPIO_NEXT(__gpio) \
68 ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 0)
69
70#ifndef __ASSEMBLY__
71
72enum s3c_gpio_number {
73 S3C2410_GPIO_A_START = 0,
74 S3C2410_GPIO_B_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_A),
75 S3C2410_GPIO_C_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_B),
76 S3C2410_GPIO_D_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_C),
77 S3C2410_GPIO_E_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_D),
78 S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E),
79 S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F),
80 S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G),
81 S3C2410_GPIO_J_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_H),
82 S3C2410_GPIO_K_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_J),
83 S3C2410_GPIO_L_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_K),
84 S3C2410_GPIO_M_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_L),
85};
86
87#endif /* __ASSEMBLY__ */
88
89/* S3C2410 GPIO number definitions. */
90
91#define S3C2410_GPA(_nr) (S3C2410_GPIO_A_START + (_nr))
92#define S3C2410_GPB(_nr) (S3C2410_GPIO_B_START + (_nr))
93#define S3C2410_GPC(_nr) (S3C2410_GPIO_C_START + (_nr))
94#define S3C2410_GPD(_nr) (S3C2410_GPIO_D_START + (_nr))
95#define S3C2410_GPE(_nr) (S3C2410_GPIO_E_START + (_nr))
96#define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr))
97#define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr))
98#define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr))
99#define S3C2410_GPJ(_nr) (S3C2410_GPIO_J_START + (_nr))
100#define S3C2410_GPK(_nr) (S3C2410_GPIO_K_START + (_nr))
101#define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr))
102#define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr))
103
104#include <plat/gpio-cfg.h>
28 105
29#ifdef CONFIG_CPU_S3C244X 106#ifdef CONFIG_CPU_S3C244X
30#define S3C_GPIO_END (S3C2410_GPJ(0) + 32) 107#define S3C_GPIO_END (S3C2410_GPJ(0) + 32)
@@ -33,3 +110,5 @@
33#else 110#else
34#define S3C_GPIO_END (S3C2410_GPH(0) + 32) 111#define S3C_GPIO_END (S3C2410_GPH(0) + 32)
35#endif 112#endif
113
114#endif /* __MACH_GPIO_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/h1940.h b/arch/arm/mach-s3c24xx/include/mach/h1940.h
deleted file mode 100644
index 2aa683c8d3d6..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/h1940.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/h1940.h
2 *
3 * Copyright 2006 Ben Dooks <ben-linux@fluff.org>
4 *
5 * H1940 definitions
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#ifndef __ASM_ARCH_H1940_H
13#define __ASM_ARCH_H1940_H
14
15#define H1940_SUSPEND_CHECKSUM (0x30003ff8)
16#define H1940_SUSPEND_RESUMEAT (0x30081000)
17#define H1940_SUSPEND_CHECK (0x30080000)
18
19extern void h1940_pm_return(void);
20extern int h1940_led_blink_set(unsigned gpio, int state,
21 unsigned long *delay_on, unsigned long *delay_off);
22
23
24#endif /* __ASM_ARCH_H1940_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/idle.h b/arch/arm/mach-s3c24xx/include/mach/idle.h
deleted file mode 100644
index e9ddd706b16e..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/idle.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/idle.h
2 *
3 * Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk>
4 * http://www.simtec.co.uk/products/SWLINUX/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * S3C2410 CPU Idle controls
11*/
12
13#ifndef __ASM_ARCH_IDLE_H
14#define __ASM_ARCH_IDLE_H __FILE__
15
16/* This allows the over-ride of the default idle code, in case there
17 * is any other things to be done over idle (like DVS)
18*/
19
20extern void (*s3c24xx_idle)(void);
21
22extern void s3c24xx_default_idle(void);
23
24#endif /* __ASM_ARCH_IDLE_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h b/arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h
deleted file mode 100644
index e9e36b0abbac..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/osiris-cpld.h
2 *
3 * Copyright 2005 Simtec Electronics
4 * http://www.simtec.co.uk/products/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * OSIRIS - CPLD control constants
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#ifndef __ASM_ARCH_OSIRISCPLD_H
15#define __ASM_ARCH_OSIRISCPLD_H
16
17/* CTRL0 - NAND WP control */
18
19#define OSIRIS_CTRL0_NANDSEL (0x3)
20#define OSIRIS_CTRL0_BOOT_INT (1<<3)
21#define OSIRIS_CTRL0_PCMCIA (1<<4)
22#define OSIRIS_CTRL0_FIX8 (1<<5)
23#define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6)
24#define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7)
25
26#define OSIRIS_CTRL1_FIX8 (1<<0)
27
28#define OSIRIS_ID_REVMASK (0x7)
29
30#endif /* __ASM_ARCH_OSIRISCPLD_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h b/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h
index a11a638bd599..c2ef016032ab 100644
--- a/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h
@@ -14,8 +14,6 @@
14#ifndef __ASM_ARCH_REGS_GPIO_H 14#ifndef __ASM_ARCH_REGS_GPIO_H
15#define __ASM_ARCH_REGS_GPIO_H 15#define __ASM_ARCH_REGS_GPIO_H
16 16
17#include <mach/gpio-nrs.h>
18
19#define S3C24XX_MISCCR S3C24XX_GPIOREG2(0x80) 17#define S3C24XX_MISCCR S3C24XX_GPIOREG2(0x80)
20 18
21/* general configuration options */ 19/* general configuration options */
diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2412.h b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2412.h
deleted file mode 100644
index aa69dc79bc38..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2412.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/regs-s3c2412.h
2 *
3 * Copyright 2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * S3C2412 specific register definitions
12*/
13
14#ifndef __ASM_ARCH_REGS_S3C2412_H
15#define __ASM_ARCH_REGS_S3C2412_H "s3c2412"
16
17#define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30)
18#define S3C2412_SWRST_RESET (0x533C2412)
19
20/* see regs-power.h for the other registers in the power block. */
21
22#endif /* __ASM_ARCH_REGS_S3C2412_H */
23
diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416-mem.h b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416-mem.h
deleted file mode 100644
index 2f31b74974af..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416-mem.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/regs-s3c2416-mem.h
2 *
3 * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
4 * as part of OpenInkpot project
5 * Copyright (c) 2009 Promwad Innovation Company
6 * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * S3C2416 memory register definitions
13*/
14
15#ifndef __ASM_ARM_REGS_S3C2416_MEM
16#define __ASM_ARM_REGS_S3C2416_MEM
17
18#ifndef S3C2416_MEMREG
19#define S3C2416_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x))
20#endif
21
22#define S3C2416_BANKCFG S3C2416_MEMREG(0x00)
23#define S3C2416_BANKCON1 S3C2416_MEMREG(0x04)
24#define S3C2416_BANKCON2 S3C2416_MEMREG(0x08)
25#define S3C2416_BANKCON3 S3C2416_MEMREG(0x0C)
26
27#define S3C2416_REFRESH S3C2416_MEMREG(0x10)
28#define S3C2416_TIMEOUT S3C2416_MEMREG(0x14)
29
30#endif /* __ASM_ARM_REGS_S3C2416_MEM */
diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416.h b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416.h
deleted file mode 100644
index e443167efb87..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/regs-s3c2416.h
2 *
3 * Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>,
4 * as part of OpenInkpot project
5 * Copyright (c) 2009 Promwad Innovation Company
6 * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * S3C2416 specific register definitions
13*/
14
15#ifndef __ASM_ARCH_REGS_S3C2416_H
16#define __ASM_ARCH_REGS_S3C2416_H "s3c2416"
17
18#define S3C2416_SWRST (S3C24XX_VA_CLKPWR + 0x44)
19#define S3C2416_SWRST_RESET (0x533C2416)
20
21/* see regs-power.h for the other registers in the power block. */
22
23#endif /* __ASM_ARCH_REGS_S3C2416_H */
24
diff --git a/arch/arm/mach-s3c24xx/include/mach/vr1000-cpld.h b/arch/arm/mach-s3c24xx/include/mach/vr1000-cpld.h
deleted file mode 100644
index e4119913d7c5..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/vr1000-cpld.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/vr1000-cpld.h
2 *
3 * Copyright (c) 2003 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * VR1000 - CPLD control constants
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_VR1000CPLD_H
14#define __ASM_ARCH_VR1000CPLD_H
15
16#define VR1000_CPLD_CTRL2_RAMWEN (0x04) /* SRAM Write Enable */
17
18#endif /* __ASM_ARCH_VR1000CPLD_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/vr1000-irq.h b/arch/arm/mach-s3c24xx/include/mach/vr1000-irq.h
deleted file mode 100644
index 47add133b8ee..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/vr1000-irq.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/vr1000-irq.h
2 *
3 * Copyright (c) 2003-2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Machine VR1000 - IRQ Number definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_VR1000IRQ_H
14#define __ASM_ARCH_VR1000IRQ_H
15
16/* irq numbers to onboard peripherals */
17
18#define IRQ_USBOC IRQ_EINT19
19#define IRQ_IDE0 IRQ_EINT16
20#define IRQ_IDE1 IRQ_EINT17
21#define IRQ_VR1000_SERIAL IRQ_EINT12
22#define IRQ_VR1000_DM9000A IRQ_EINT10
23#define IRQ_VR1000_DM9000N IRQ_EINT9
24#define IRQ_SMALERT IRQ_EINT8
25
26#endif /* __ASM_ARCH_VR1000IRQ_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/vr1000-map.h b/arch/arm/mach-s3c24xx/include/mach/vr1000-map.h
deleted file mode 100644
index 28376e56dd3b..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/vr1000-map.h
+++ /dev/null
@@ -1,110 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/vr1000-map.h
2 *
3 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Machine VR1000 - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* needs arch/map.h including with this */
14
15/* ok, we've used up to 0x13000000, now we need to find space for the
16 * peripherals that live in the nGCS[x] areas, which are quite numerous
17 * in their space. We also have the board's CPLD to find register space
18 * for.
19 */
20
21#ifndef __ASM_ARCH_VR1000MAP_H
22#define __ASM_ARCH_VR1000MAP_H
23
24#include <mach/bast-map.h>
25
26#define VR1000_IOADDR(x) BAST_IOADDR(x)
27
28/* we put the CPLD registers next, to get them out of the way */
29
30#define VR1000_VA_CTRL1 VR1000_IOADDR(0x00000000) /* 0x01300000 */
31#define VR1000_PA_CTRL1 (S3C2410_CS5 | 0x7800000)
32
33#define VR1000_VA_CTRL2 VR1000_IOADDR(0x00100000) /* 0x01400000 */
34#define VR1000_PA_CTRL2 (S3C2410_CS1 | 0x6000000)
35
36#define VR1000_VA_CTRL3 VR1000_IOADDR(0x00200000) /* 0x01500000 */
37#define VR1000_PA_CTRL3 (S3C2410_CS1 | 0x6800000)
38
39#define VR1000_VA_CTRL4 VR1000_IOADDR(0x00300000) /* 0x01600000 */
40#define VR1000_PA_CTRL4 (S3C2410_CS1 | 0x7000000)
41
42/* next, we have the PC104 ISA interrupt registers */
43
44#define VR1000_PA_PC104_IRQREQ (S3C2410_CS5 | 0x6000000) /* 0x01700000 */
45#define VR1000_VA_PC104_IRQREQ VR1000_IOADDR(0x00400000)
46
47#define VR1000_PA_PC104_IRQRAW (S3C2410_CS5 | 0x6800000) /* 0x01800000 */
48#define VR1000_VA_PC104_IRQRAW VR1000_IOADDR(0x00500000)
49
50#define VR1000_PA_PC104_IRQMASK (S3C2410_CS5 | 0x7000000) /* 0x01900000 */
51#define VR1000_VA_PC104_IRQMASK VR1000_IOADDR(0x00600000)
52
53/* 0xE0000000 contains the IO space that is split by speed and
54 * whether the access is for 8 or 16bit IO... this ensures that
55 * the correct access is made
56 *
57 * 0x10000000 of space, partitioned as so:
58 *
59 * 0x00000000 to 0x04000000 8bit, slow
60 * 0x04000000 to 0x08000000 16bit, slow
61 * 0x08000000 to 0x0C000000 16bit, net
62 * 0x0C000000 to 0x10000000 16bit, fast
63 *
64 * each of these spaces has the following in:
65 *
66 * 0x02000000 to 0x02100000 1MB IDE primary channel
67 * 0x02100000 to 0x02200000 1MB IDE primary channel aux
68 * 0x02200000 to 0x02400000 1MB IDE secondary channel
69 * 0x02300000 to 0x02400000 1MB IDE secondary channel aux
70 * 0x02500000 to 0x02600000 1MB Davicom DM9000 ethernet controllers
71 * 0x02600000 to 0x02700000 1MB
72 *
73 * the phyiscal layout of the zones are:
74 * nGCS2 - 8bit, slow
75 * nGCS3 - 16bit, slow
76 * nGCS4 - 16bit, net
77 * nGCS5 - 16bit, fast
78 */
79
80#define VR1000_VA_MULTISPACE (0xE0000000)
81
82#define VR1000_VA_ISAIO (VR1000_VA_MULTISPACE + 0x00000000)
83#define VR1000_VA_ISAMEM (VR1000_VA_MULTISPACE + 0x01000000)
84#define VR1000_VA_IDEPRI (VR1000_VA_MULTISPACE + 0x02000000)
85#define VR1000_VA_IDEPRIAUX (VR1000_VA_MULTISPACE + 0x02100000)
86#define VR1000_VA_IDESEC (VR1000_VA_MULTISPACE + 0x02200000)
87#define VR1000_VA_IDESECAUX (VR1000_VA_MULTISPACE + 0x02300000)
88#define VR1000_VA_ASIXNET (VR1000_VA_MULTISPACE + 0x02400000)
89#define VR1000_VA_DM9000 (VR1000_VA_MULTISPACE + 0x02500000)
90#define VR1000_VA_SUPERIO (VR1000_VA_MULTISPACE + 0x02600000)
91
92/* physical offset addresses for the peripherals */
93
94#define VR1000_PA_IDEPRI (0x02000000)
95#define VR1000_PA_IDEPRIAUX (0x02800000)
96#define VR1000_PA_IDESEC (0x03000000)
97#define VR1000_PA_IDESECAUX (0x03800000)
98#define VR1000_PA_DM9000 (0x05000000)
99
100#define VR1000_PA_SERIAL (0x11800000)
101#define VR1000_VA_SERIAL (VR1000_IOADDR(0x00700000))
102
103/* VR1000 ram is in CS1, with A26..A24 = 2_101 */
104#define VR1000_PA_SRAM (S3C2410_CS1 | 0x05000000)
105
106/* some configurations for the peripherals */
107
108#define VR1000_DM9000_CS VR1000_VAM_CS4
109
110#endif /* __ASM_ARCH_VR1000MAP_H */
diff --git a/arch/arm/mach-s3c24xx/mach-anubis.c b/arch/arm/mach-s3c24xx/mach-anubis.c
index 85eefab881af..3c4b6e30c742 100644
--- a/arch/arm/mach-s3c24xx/mach-anubis.c
+++ b/arch/arm/mach-s3c24xx/mach-anubis.c
@@ -28,10 +28,6 @@
28#include <asm/mach/map.h> 28#include <asm/mach/map.h>
29#include <asm/mach/irq.h> 29#include <asm/mach/irq.h>
30 30
31#include <mach/anubis-map.h>
32#include <mach/anubis-irq.h>
33#include <mach/anubis-cpld.h>
34
35#include <mach/hardware.h> 31#include <mach/hardware.h>
36#include <asm/irq.h> 32#include <asm/irq.h>
37#include <asm/mach-types.h> 33#include <asm/mach-types.h>
@@ -55,8 +51,9 @@
55#include <plat/cpu.h> 51#include <plat/cpu.h>
56#include <linux/platform_data/asoc-s3c24xx_simtec.h> 52#include <linux/platform_data/asoc-s3c24xx_simtec.h>
57 53
58#include "simtec.h" 54#include "anubis.h"
59#include "common.h" 55#include "common.h"
56#include "simtec.h"
60 57
61#define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics" 58#define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics"
62 59
@@ -237,7 +234,7 @@ static struct pata_platform_info anubis_ide_platdata = {
237static struct resource anubis_ide0_resource[] = { 234static struct resource anubis_ide0_resource[] = {
238 [0] = DEFINE_RES_MEM(S3C2410_CS3, 8 * 32), 235 [0] = DEFINE_RES_MEM(S3C2410_CS3, 8 * 32),
239 [2] = DEFINE_RES_MEM(S3C2410_CS3 + (1 << 26) + (6 * 32), 32), 236 [2] = DEFINE_RES_MEM(S3C2410_CS3 + (1 << 26) + (6 * 32), 32),
240 [3] = DEFINE_RES_IRQ(IRQ_IDE0), 237 [3] = DEFINE_RES_IRQ(ANUBIS_IRQ_IDE0),
241}; 238};
242 239
243static struct platform_device anubis_device_ide0 = { 240static struct platform_device anubis_device_ide0 = {
@@ -254,7 +251,7 @@ static struct platform_device anubis_device_ide0 = {
254static struct resource anubis_ide1_resource[] = { 251static struct resource anubis_ide1_resource[] = {
255 [0] = DEFINE_RES_MEM(S3C2410_CS4, 8 * 32), 252 [0] = DEFINE_RES_MEM(S3C2410_CS4, 8 * 32),
256 [1] = DEFINE_RES_MEM(S3C2410_CS4 + (1 << 26) + (6 * 32), 32), 253 [1] = DEFINE_RES_MEM(S3C2410_CS4 + (1 << 26) + (6 * 32), 32),
257 [2] = DEFINE_RES_IRQ(IRQ_IDE0), 254 [2] = DEFINE_RES_IRQ(ANUBIS_IRQ_IDE0),
258}; 255};
259 256
260static struct platform_device anubis_device_ide1 = { 257static struct platform_device anubis_device_ide1 = {
@@ -279,7 +276,7 @@ static struct ax_plat_data anubis_asix_platdata = {
279 276
280static struct resource anubis_asix_resource[] = { 277static struct resource anubis_asix_resource[] = {
281 [0] = DEFINE_RES_MEM(S3C2410_CS5, 0x20 * 0x20), 278 [0] = DEFINE_RES_MEM(S3C2410_CS5, 0x20 * 0x20),
282 [1] = DEFINE_RES_IRQ(IRQ_ASIX), 279 [1] = DEFINE_RES_IRQ(ANUBIS_IRQ_ASIX),
283}; 280};
284 281
285static struct platform_device anubis_device_asix = { 282static struct platform_device anubis_device_asix = {
diff --git a/arch/arm/mach-s3c24xx/mach-at2440evb.c b/arch/arm/mach-s3c24xx/mach-at2440evb.c
index b31c4aa724f2..cdcd784e30c5 100644
--- a/arch/arm/mach-s3c24xx/mach-at2440evb.c
+++ b/arch/arm/mach-s3c24xx/mach-at2440evb.c
@@ -14,6 +14,7 @@
14 14
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/types.h> 16#include <linux/types.h>
17#include <linux/gpio.h>
17#include <linux/interrupt.h> 18#include <linux/interrupt.h>
18#include <linux/list.h> 19#include <linux/list.h>
19#include <linux/timer.h> 20#include <linux/timer.h>
diff --git a/arch/arm/mach-s3c24xx/mach-bast.c b/arch/arm/mach-s3c24xx/mach-bast.c
index 526964c19dd8..5c1e3dfb9ab3 100644
--- a/arch/arm/mach-s3c24xx/mach-bast.c
+++ b/arch/arm/mach-s3c24xx/mach-bast.c
@@ -24,48 +24,42 @@
24#include <linux/ata_platform.h> 24#include <linux/ata_platform.h>
25#include <linux/i2c.h> 25#include <linux/i2c.h>
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/serial_8250.h>
28
29#include <linux/mtd/mtd.h>
30#include <linux/mtd/nand.h>
31#include <linux/mtd/nand_ecc.h>
32#include <linux/mtd/partitions.h>
33
34#include <linux/platform_data/asoc-s3c24xx_simtec.h>
35#include <linux/platform_data/hwmon-s3c.h>
36#include <linux/platform_data/i2c-s3c2410.h>
37#include <linux/platform_data/mtd-nand-s3c2410.h>
27 38
28#include <net/ax88796.h> 39#include <net/ax88796.h>
29 40
41#include <asm/irq.h>
30#include <asm/mach/arch.h> 42#include <asm/mach/arch.h>
31#include <asm/mach/map.h> 43#include <asm/mach/map.h>
32#include <asm/mach/irq.h> 44#include <asm/mach/irq.h>
33
34#include <mach/bast-map.h>
35#include <mach/bast-irq.h>
36#include <mach/bast-cpld.h>
37
38#include <mach/hardware.h>
39#include <asm/irq.h>
40#include <asm/mach-types.h> 45#include <asm/mach-types.h>
41 46
42//#include <asm/debug-ll.h> 47#include <mach/fb.h>
43#include <plat/regs-serial.h> 48#include <mach/hardware.h>
44#include <mach/regs-gpio.h> 49#include <mach/regs-gpio.h>
45#include <mach/regs-mem.h>
46#include <mach/regs-lcd.h> 50#include <mach/regs-lcd.h>
47 51#include <mach/regs-mem.h>
48#include <linux/platform_data/hwmon-s3c.h>
49#include <linux/platform_data/mtd-nand-s3c2410.h>
50#include <linux/platform_data/i2c-s3c2410.h>
51#include <mach/fb.h>
52
53#include <linux/mtd/mtd.h>
54#include <linux/mtd/nand.h>
55#include <linux/mtd/nand_ecc.h>
56#include <linux/mtd/partitions.h>
57
58#include <linux/serial_8250.h>
59 52
60#include <plat/clock.h> 53#include <plat/clock.h>
61#include <plat/devs.h>
62#include <plat/cpu.h> 54#include <plat/cpu.h>
63#include <plat/cpu-freq.h> 55#include <plat/cpu-freq.h>
56#include <plat/devs.h>
64#include <plat/gpio-cfg.h> 57#include <plat/gpio-cfg.h>
65#include <linux/platform_data/asoc-s3c24xx_simtec.h> 58#include <plat/regs-serial.h>
66 59
67#include "simtec.h" 60#include "bast.h"
68#include "common.h" 61#include "common.h"
62#include "simtec.h"
69 63
70#define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics" 64#define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics"
71 65
@@ -312,7 +306,7 @@ static struct s3c2410_platform_nand __initdata bast_nand_info = {
312static struct resource bast_dm9k_resource[] = { 306static struct resource bast_dm9k_resource[] = {
313 [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000, 4), 307 [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000, 4),
314 [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000 + 0x40, 0x40), 308 [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000 + 0x40, 0x40),
315 [2] = DEFINE_RES_NAMED(IRQ_DM9000 , 1, NULL, IORESOURCE_IRQ \ 309 [2] = DEFINE_RES_NAMED(BAST_IRQ_DM9000 , 1, NULL, IORESOURCE_IRQ \
316 | IORESOURCE_IRQ_HIGHLEVEL), 310 | IORESOURCE_IRQ_HIGHLEVEL),
317}; 311};
318 312
@@ -343,7 +337,7 @@ static struct platform_device bast_device_dm9k = {
343static struct plat_serial8250_port bast_sio_data[] = { 337static struct plat_serial8250_port bast_sio_data[] = {
344 [0] = { 338 [0] = {
345 .mapbase = SERIAL_BASE + 0x2f8, 339 .mapbase = SERIAL_BASE + 0x2f8,
346 .irq = IRQ_PCSERIAL1, 340 .irq = BAST_IRQ_PCSERIAL1,
347 .flags = SERIAL_FLAGS, 341 .flags = SERIAL_FLAGS,
348 .iotype = UPIO_MEM, 342 .iotype = UPIO_MEM,
349 .regshift = 0, 343 .regshift = 0,
@@ -351,7 +345,7 @@ static struct plat_serial8250_port bast_sio_data[] = {
351 }, 345 },
352 [1] = { 346 [1] = {
353 .mapbase = SERIAL_BASE + 0x3f8, 347 .mapbase = SERIAL_BASE + 0x3f8,
354 .irq = IRQ_PCSERIAL2, 348 .irq = BAST_IRQ_PCSERIAL2,
355 .flags = SERIAL_FLAGS, 349 .flags = SERIAL_FLAGS,
356 .iotype = UPIO_MEM, 350 .iotype = UPIO_MEM,
357 .regshift = 0, 351 .regshift = 0,
@@ -390,7 +384,7 @@ static struct ax_plat_data bast_asix_platdata = {
390static struct resource bast_asix_resource[] = { 384static struct resource bast_asix_resource[] = {
391 [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET, 0x18 * 0x20), 385 [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET, 0x18 * 0x20),
392 [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20), 1), 386 [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20), 1),
393 [2] = DEFINE_RES_IRQ(IRQ_ASIX), 387 [2] = DEFINE_RES_IRQ(BAST_IRQ_ASIX),
394}; 388};
395 389
396static struct platform_device bast_device_asix = { 390static struct platform_device bast_device_asix = {
diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c
index fb5d3b3b53db..b9782ac2237a 100644
--- a/arch/arm/mach-s3c24xx/mach-gta02.c
+++ b/arch/arm/mach-s3c24xx/mach-gta02.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/arm/mach-s3c2442/mach-gta02.c
3 *
4 * S3C2442 Machine Support for Openmoko GTA02 / FreeRunner. 2 * S3C2442 Machine Support for Openmoko GTA02 / FreeRunner.
5 * 3 *
6 * Copyright (C) 2006-2009 by Openmoko, Inc. 4 * Copyright (C) 2006-2009 by Openmoko, Inc.
@@ -23,7 +21,6 @@
23 * along with this program; if not, write to the Free Software 21 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA 23 * MA 02111-1307 USA
26 *
27 */ 24 */
28 25
29#include <linux/kernel.h> 26#include <linux/kernel.h>
@@ -34,62 +31,60 @@
34#include <linux/timer.h> 31#include <linux/timer.h>
35#include <linux/init.h> 32#include <linux/init.h>
36#include <linux/gpio.h> 33#include <linux/gpio.h>
34#include <linux/gpio_keys.h>
37#include <linux/workqueue.h> 35#include <linux/workqueue.h>
38#include <linux/platform_device.h> 36#include <linux/platform_device.h>
39#include <linux/serial_core.h> 37#include <linux/serial_core.h>
40#include <linux/spi/spi.h> 38#include <linux/input.h>
41#include <linux/spi/s3c24xx.h> 39#include <linux/io.h>
40#include <linux/i2c.h>
42 41
43#include <linux/mmc/host.h> 42#include <linux/mmc/host.h>
44 43
44#include <linux/mfd/pcf50633/adc.h>
45#include <linux/mfd/pcf50633/backlight.h>
46#include <linux/mfd/pcf50633/core.h>
47#include <linux/mfd/pcf50633/gpio.h>
48#include <linux/mfd/pcf50633/mbc.h>
49#include <linux/mfd/pcf50633/pmic.h>
50
45#include <linux/mtd/mtd.h> 51#include <linux/mtd/mtd.h>
46#include <linux/mtd/nand.h> 52#include <linux/mtd/nand.h>
47#include <linux/mtd/nand_ecc.h> 53#include <linux/mtd/nand_ecc.h>
48#include <linux/mtd/partitions.h> 54#include <linux/mtd/partitions.h>
49#include <linux/mtd/physmap.h> 55#include <linux/mtd/physmap.h>
50#include <linux/io.h>
51 56
52#include <linux/i2c.h>
53#include <linux/regulator/machine.h> 57#include <linux/regulator/machine.h>
54 58
55#include <linux/mfd/pcf50633/core.h> 59#include <linux/spi/spi.h>
56#include <linux/mfd/pcf50633/mbc.h> 60#include <linux/spi/s3c24xx.h>
57#include <linux/mfd/pcf50633/adc.h>
58#include <linux/mfd/pcf50633/gpio.h>
59#include <linux/mfd/pcf50633/pmic.h>
60#include <linux/mfd/pcf50633/backlight.h>
61
62#include <linux/input.h>
63#include <linux/gpio_keys.h>
64 61
62#include <asm/irq.h>
63#include <asm/mach-types.h>
65#include <asm/mach/arch.h> 64#include <asm/mach/arch.h>
66#include <asm/mach/map.h> 65#include <asm/mach/map.h>
67#include <asm/mach/irq.h> 66#include <asm/mach/irq.h>
68 67
69#include <asm/irq.h> 68#include <linux/platform_data/i2c-s3c2410.h>
70#include <asm/mach-types.h> 69#include <linux/platform_data/mtd-nand-s3c2410.h>
70#include <linux/platform_data/touchscreen-s3c2410.h>
71#include <linux/platform_data/usb-ohci-s3c2410.h>
72#include <linux/platform_data/usb-s3c2410_udc.h>
71 73
72#include <mach/regs-irq.h>
73#include <mach/regs-gpio.h>
74#include <mach/fb.h> 74#include <mach/fb.h>
75
76#include <linux/platform_data/usb-ohci-s3c2410.h>
77#include <mach/regs-mem.h>
78#include <mach/hardware.h> 75#include <mach/hardware.h>
76#include <mach/regs-gpio.h>
77#include <mach/regs-irq.h>
78#include <mach/regs-mem.h>
79 79
80#include <mach/gta02.h>
81
82#include <plat/regs-serial.h>
83#include <linux/platform_data/mtd-nand-s3c2410.h>
84#include <plat/devs.h>
85#include <plat/cpu.h> 80#include <plat/cpu.h>
86#include <plat/pm.h> 81#include <plat/devs.h>
87#include <linux/platform_data/usb-s3c2410_udc.h>
88#include <plat/gpio-cfg.h> 82#include <plat/gpio-cfg.h>
89#include <linux/platform_data/i2c-s3c2410.h> 83#include <plat/pm.h>
90#include <linux/platform_data/touchscreen-s3c2410.h> 84#include <plat/regs-serial.h>
91 85
92#include "common.h" 86#include "common.h"
87#include "gta02.h"
93 88
94static struct pcf50633 *gta02_pcf; 89static struct pcf50633 *gta02_pcf;
95 90
diff --git a/arch/arm/mach-s3c24xx/mach-h1940.c b/arch/arm/mach-s3c24xx/mach-h1940.c
index 2eb09e27c13c..79bc0830d740 100644
--- a/arch/arm/mach-s3c24xx/mach-h1940.c
+++ b/arch/arm/mach-s3c24xx/mach-h1940.c
@@ -1,5 +1,4 @@
1/* linux/arch/arm/mach-s3c2410/mach-h1940.c 1/*
2 *
3 * Copyright (c) 2003-2005 Simtec Electronics 2 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 3 * Ben Dooks <ben@simtec.co.uk>
5 * 4 *
@@ -37,40 +36,36 @@
37#include <linux/mmc/host.h> 36#include <linux/mmc/host.h>
38#include <linux/export.h> 37#include <linux/export.h>
39 38
39#include <asm/irq.h>
40#include <asm/mach-types.h>
40#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
41#include <asm/mach/map.h> 42#include <asm/mach/map.h>
42#include <asm/mach/irq.h> 43#include <asm/mach/irq.h>
43 44
44#include <mach/hardware.h> 45#include <linux/platform_data/i2c-s3c2410.h>
45#include <asm/irq.h> 46#include <linux/platform_data/mmc-s3cmci.h>
46#include <asm/mach-types.h> 47#include <linux/platform_data/touchscreen-s3c2410.h>
47 48#include <linux/platform_data/usb-s3c2410_udc.h>
48#include <plat/regs-serial.h>
49#include <mach/regs-lcd.h>
50#include <mach/regs-clock.h>
51 49
52#include <mach/regs-gpio.h> 50#include <sound/uda1380.h>
53#include <mach/gpio-fns.h>
54#include <mach/gpio-nrs.h>
55 51
56#include <mach/h1940.h>
57#include <mach/h1940-latch.h>
58#include <mach/fb.h> 52#include <mach/fb.h>
59#include <linux/platform_data/usb-s3c2410_udc.h> 53#include <mach/hardware.h>
60#include <linux/platform_data/i2c-s3c2410.h> 54#include <mach/regs-clock.h>
55#include <mach/regs-gpio.h>
56#include <mach/regs-lcd.h>
61 57
62#include <plat/gpio-cfg.h>
63#include <plat/clock.h> 58#include <plat/clock.h>
64#include <plat/devs.h>
65#include <plat/cpu.h> 59#include <plat/cpu.h>
60#include <plat/devs.h>
61#include <plat/gpio-cfg.h>
66#include <plat/pll.h> 62#include <plat/pll.h>
67#include <plat/pm.h> 63#include <plat/pm.h>
68#include <linux/platform_data/mmc-s3cmci.h> 64#include <plat/regs-serial.h>
69#include <linux/platform_data/touchscreen-s3c2410.h>
70 65
71#include <sound/uda1380.h>
72 66
73#include "common.h" 67#include "common.h"
68#include "h1940.h"
74 69
75#define H1940_LATCH ((void __force __iomem *)0xF8000000) 70#define H1940_LATCH ((void __force __iomem *)0xF8000000)
76 71
diff --git a/arch/arm/mach-s3c24xx/mach-osiris.c b/arch/arm/mach-s3c24xx/mach-osiris.c
index ba0f5b5ec19e..4b57f9aa0a8f 100644
--- a/arch/arm/mach-s3c24xx/mach-osiris.c
+++ b/arch/arm/mach-s3c24xx/mach-osiris.c
@@ -1,5 +1,4 @@
1/* linux/arch/arm/mach-s3c2440/mach-osiris.c 1/*
2 *
3 * Copyright (c) 2005-2008 Simtec Electronics 2 * Copyright (c) 2005-2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 3 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
@@ -25,22 +24,12 @@
25 24
26#include <linux/i2c/tps65010.h> 25#include <linux/i2c/tps65010.h>
27 26
27#include <asm/mach-types.h>
28#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
29#include <asm/mach/map.h> 29#include <asm/mach/map.h>
30#include <asm/mach/irq.h> 30#include <asm/mach/irq.h>
31
32#include <mach/osiris-map.h>
33#include <mach/osiris-cpld.h>
34
35#include <mach/hardware.h>
36#include <asm/irq.h> 31#include <asm/irq.h>
37#include <asm/mach-types.h>
38 32
39#include <plat/cpu-freq.h>
40#include <plat/regs-serial.h>
41#include <mach/regs-gpio.h>
42#include <mach/regs-mem.h>
43#include <mach/regs-lcd.h>
44#include <linux/platform_data/mtd-nand-s3c2410.h> 33#include <linux/platform_data/mtd-nand-s3c2410.h>
45#include <linux/platform_data/i2c-s3c2410.h> 34#include <linux/platform_data/i2c-s3c2410.h>
46 35
@@ -49,12 +38,20 @@
49#include <linux/mtd/nand_ecc.h> 38#include <linux/mtd/nand_ecc.h>
50#include <linux/mtd/partitions.h> 39#include <linux/mtd/partitions.h>
51 40
52#include <plat/gpio-cfg.h>
53#include <plat/clock.h> 41#include <plat/clock.h>
54#include <plat/devs.h>
55#include <plat/cpu.h> 42#include <plat/cpu.h>
43#include <plat/cpu-freq.h>
44#include <plat/devs.h>
45#include <plat/gpio-cfg.h>
46#include <plat/regs-serial.h>
47
48#include <mach/hardware.h>
49#include <mach/regs-gpio.h>
50#include <mach/regs-mem.h>
51#include <mach/regs-lcd.h>
56 52
57#include "common.h" 53#include "common.h"
54#include "osiris.h"
58 55
59/* onboard perihperal map */ 56/* onboard perihperal map */
60 57
diff --git a/arch/arm/mach-s3c24xx/mach-otom.c b/arch/arm/mach-s3c24xx/mach-otom.c
index e0fdae93aa7b..40a47d6c6a85 100644
--- a/arch/arm/mach-s3c24xx/mach-otom.c
+++ b/arch/arm/mach-s3c24xx/mach-otom.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/mach-s3c2410/mach-otom.c 1/*
2 * 2 *
3 * Copyright (c) 2004 Nex Vision 3 * Copyright (c) 2004 Nex Vision
4 * Guillaume GOURAT <guillaume.gourat@nexvision.fr> 4 * Guillaume GOURAT <guillaume.gourat@nexvision.fr>
@@ -6,7 +6,6 @@
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 *
10 */ 9 */
11 10
12#include <linux/kernel.h> 11#include <linux/kernel.h>
@@ -19,26 +18,25 @@
19#include <linux/platform_device.h> 18#include <linux/platform_device.h>
20#include <linux/io.h> 19#include <linux/io.h>
21 20
21#include <linux/platform_data/i2c-s3c2410.h>
22
23#include <asm/irq.h>
24#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
23#include <asm/mach/map.h> 26#include <asm/mach/map.h>
24#include <asm/mach/irq.h> 27#include <asm/mach/irq.h>
25 28
26#include <mach/otom-map.h>
27
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <asm/irq.h>
30#include <asm/mach-types.h>
31
32#include <plat/regs-serial.h>
33#include <mach/regs-gpio.h> 30#include <mach/regs-gpio.h>
34 31
35#include <plat/s3c2410.h>
36#include <plat/clock.h> 32#include <plat/clock.h>
37#include <plat/devs.h>
38#include <linux/platform_data/i2c-s3c2410.h>
39#include <plat/cpu.h> 33#include <plat/cpu.h>
34#include <plat/devs.h>
35#include <plat/regs-serial.h>
36#include <plat/s3c2410.h>
40 37
41#include "common.h" 38#include "common.h"
39#include "otom.h"
42 40
43static struct map_desc otom11_iodesc[] __initdata = { 41static struct map_desc otom11_iodesc[] __initdata = {
44 /* Device area */ 42 /* Device area */
diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c
index e14ec7105a6d..1f9ba2ae5288 100644
--- a/arch/arm/mach-s3c24xx/mach-rx1950.c
+++ b/arch/arm/mach-s3c24xx/mach-rx1950.c
@@ -1,5 +1,4 @@
1/* linux/arch/arm/mach-s3c2440/mach-rx1950.c 1/*
2 *
3 * Copyright (c) 2006-2009 Victor Chukhantsev, Denis Grigoriev, 2 * Copyright (c) 2006-2009 Victor Chukhantsev, Denis Grigoriev,
4 * Copyright (c) 2007-2010 Vasily Khoruzhick 3 * Copyright (c) 2007-2010 Vasily Khoruzhick
5 * 4 *
@@ -37,31 +36,31 @@
37 36
38#include <linux/mmc/host.h> 37#include <linux/mmc/host.h>
39 38
39#include <asm/mach-types.h>
40#include <asm/mach/arch.h> 40#include <asm/mach/arch.h>
41#include <asm/mach/map.h> 41#include <asm/mach/map.h>
42#include <asm/mach-types.h>
43 42
43#include <linux/platform_data/i2c-s3c2410.h>
44#include <linux/platform_data/mmc-s3cmci.h>
45#include <linux/platform_data/mtd-nand-s3c2410.h>
46#include <linux/platform_data/touchscreen-s3c2410.h>
47#include <linux/platform_data/usb-s3c2410_udc.h>
48
49#include <sound/uda1380.h>
50
51#include <mach/fb.h>
44#include <mach/regs-gpio.h> 52#include <mach/regs-gpio.h>
45#include <mach/regs-lcd.h> 53#include <mach/regs-lcd.h>
46#include <mach/h1940.h>
47#include <mach/fb.h>
48 54
49#include <plat/clock.h> 55#include <plat/clock.h>
50#include <plat/regs-serial.h>
51#include <plat/regs-iic.h>
52#include <linux/platform_data/mmc-s3cmci.h>
53#include <linux/platform_data/usb-s3c2410_udc.h>
54#include <linux/platform_data/mtd-nand-s3c2410.h>
55#include <linux/platform_data/i2c-s3c2410.h>
56#include <plat/devs.h>
57#include <plat/cpu.h> 56#include <plat/cpu.h>
57#include <plat/devs.h>
58#include <plat/pm.h> 58#include <plat/pm.h>
59#include <plat/irq.h> 59#include <plat/regs-iic.h>
60#include <linux/platform_data/touchscreen-s3c2410.h> 60#include <plat/regs-serial.h>
61
62#include <sound/uda1380.h>
63 61
64#include "common.h" 62#include "common.h"
63#include "h1940.h"
65 64
66#define LCD_PWM_PERIOD 192960 65#define LCD_PWM_PERIOD 192960
67#define LCD_PWM_DUTY 127353 66#define LCD_PWM_DUTY 127353
diff --git a/arch/arm/mach-s3c24xx/mach-rx3715.c b/arch/arm/mach-s3c24xx/mach-rx3715.c
index d00caa8de922..f20418a2fb1b 100644
--- a/arch/arm/mach-s3c24xx/mach-rx3715.c
+++ b/arch/arm/mach-s3c24xx/mach-rx3715.c
@@ -31,27 +31,27 @@
31#include <linux/mtd/partitions.h> 31#include <linux/mtd/partitions.h>
32 32
33#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
34#include <asm/mach/map.h>
35#include <asm/mach/irq.h> 34#include <asm/mach/irq.h>
35#include <asm/mach/map.h>
36
37#include <linux/platform_data/mtd-nand-s3c2410.h>
36 38
37#include <mach/hardware.h>
38#include <asm/irq.h> 39#include <asm/irq.h>
39#include <asm/mach-types.h> 40#include <asm/mach-types.h>
40 41
41#include <plat/regs-serial.h> 42#include <mach/fb.h>
43#include <mach/hardware.h>
42#include <mach/regs-gpio.h> 44#include <mach/regs-gpio.h>
43#include <mach/regs-lcd.h> 45#include <mach/regs-lcd.h>
44 46
45#include <mach/h1940.h>
46#include <linux/platform_data/mtd-nand-s3c2410.h>
47#include <mach/fb.h>
48
49#include <plat/clock.h> 47#include <plat/clock.h>
50#include <plat/devs.h>
51#include <plat/cpu.h> 48#include <plat/cpu.h>
49#include <plat/devs.h>
52#include <plat/pm.h> 50#include <plat/pm.h>
51#include <plat/regs-serial.h>
53 52
54#include "common.h" 53#include "common.h"
54#include "h1940.h"
55 55
56static struct map_desc rx3715_iodesc[] __initdata = { 56static struct map_desc rx3715_iodesc[] __initdata = {
57 /* dump ISA space somewhere unused */ 57 /* dump ISA space somewhere unused */
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2413.c b/arch/arm/mach-s3c24xx/mach-smdk2413.c
index 69f356e83790..86d7847c9d45 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2413.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2413.c
@@ -37,7 +37,6 @@
37#include <mach/regs-gpio.h> 37#include <mach/regs-gpio.h>
38#include <mach/regs-lcd.h> 38#include <mach/regs-lcd.h>
39 39
40#include <mach/idle.h>
41#include <linux/platform_data/usb-s3c2410_udc.h> 40#include <linux/platform_data/usb-s3c2410_udc.h>
42#include <linux/platform_data/i2c-s3c2410.h> 41#include <linux/platform_data/i2c-s3c2410.h>
43#include <mach/fb.h> 42#include <mach/fb.h>
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2416.c b/arch/arm/mach-s3c24xx/mach-smdk2416.c
index fe160c7f4b0a..72dfec689322 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2416.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2416.c
@@ -39,7 +39,6 @@
39#include <mach/regs-lcd.h> 39#include <mach/regs-lcd.h>
40#include <mach/regs-s3c2443-clock.h> 40#include <mach/regs-s3c2443-clock.h>
41 41
42#include <mach/idle.h>
43#include <linux/platform_data/leds-s3c24xx.h> 42#include <linux/platform_data/leds-s3c24xx.h>
44#include <linux/platform_data/i2c-s3c2410.h> 43#include <linux/platform_data/i2c-s3c2410.h>
45 44
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2440.c b/arch/arm/mach-s3c24xx/mach-smdk2440.c
index a8fdafedc4c1..08cc38c8a4ae 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2440.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2440.c
@@ -35,7 +35,6 @@
35#include <mach/regs-gpio.h> 35#include <mach/regs-gpio.h>
36#include <mach/regs-lcd.h> 36#include <mach/regs-lcd.h>
37 37
38#include <mach/idle.h>
39#include <mach/fb.h> 38#include <mach/fb.h>
40#include <linux/platform_data/i2c-s3c2410.h> 39#include <linux/platform_data/i2c-s3c2410.h>
41 40
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2443.c b/arch/arm/mach-s3c24xx/mach-smdk2443.c
index 7830d7004306..406c8137620e 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2443.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2443.c
@@ -35,7 +35,6 @@
35#include <mach/regs-gpio.h> 35#include <mach/regs-gpio.h>
36#include <mach/regs-lcd.h> 36#include <mach/regs-lcd.h>
37 37
38#include <mach/idle.h>
39#include <mach/fb.h> 38#include <mach/fb.h>
40#include <linux/platform_data/i2c-s3c2410.h> 39#include <linux/platform_data/i2c-s3c2410.h>
41 40
diff --git a/arch/arm/mach-s3c24xx/mach-vr1000.c b/arch/arm/mach-s3c24xx/mach-vr1000.c
index dda21a01e3cc..ec42d1e4e465 100644
--- a/arch/arm/mach-s3c24xx/mach-vr1000.c
+++ b/arch/arm/mach-s3c24xx/mach-vr1000.c
@@ -1,5 +1,4 @@
1/* linux/arch/arm/mach-s3c2410/mach-vr1000.c 1/*
2 *
3 * Copyright (c) 2003-2008 Simtec Electronics 2 * Copyright (c) 2003-2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 3 * Ben Dooks <ben@simtec.co.uk>
5 * 4 *
@@ -32,27 +31,25 @@
32#include <asm/mach/map.h> 31#include <asm/mach/map.h>
33#include <asm/mach/irq.h> 32#include <asm/mach/irq.h>
34 33
35#include <mach/bast-map.h>
36#include <mach/vr1000-map.h>
37#include <mach/vr1000-irq.h>
38#include <mach/vr1000-cpld.h>
39
40#include <mach/hardware.h>
41#include <asm/irq.h> 34#include <asm/irq.h>
42#include <asm/mach-types.h> 35#include <asm/mach-types.h>
43 36
44#include <plat/regs-serial.h>
45#include <mach/regs-gpio.h>
46#include <linux/platform_data/leds-s3c24xx.h> 37#include <linux/platform_data/leds-s3c24xx.h>
38#include <linux/platform_data/i2c-s3c2410.h>
39#include <linux/platform_data/asoc-s3c24xx_simtec.h>
40
41#include <mach/hardware.h>
42#include <mach/regs-gpio.h>
47 43
48#include <plat/clock.h> 44#include <plat/clock.h>
49#include <plat/devs.h>
50#include <plat/cpu.h> 45#include <plat/cpu.h>
51#include <linux/platform_data/i2c-s3c2410.h> 46#include <plat/devs.h>
52#include <linux/platform_data/asoc-s3c24xx_simtec.h> 47#include <plat/regs-serial.h>
53 48
54#include "simtec.h" 49#include "bast.h"
55#include "common.h" 50#include "common.h"
51#include "simtec.h"
52#include "vr1000.h"
56 53
57/* macros for virtual address mods for the io space entries */ 54/* macros for virtual address mods for the io space entries */
58#define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5) 55#define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
@@ -143,7 +140,7 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
143static struct plat_serial8250_port serial_platform_data[] = { 140static struct plat_serial8250_port serial_platform_data[] = {
144 [0] = { 141 [0] = {
145 .mapbase = VR1000_SERIAL_MAPBASE(0), 142 .mapbase = VR1000_SERIAL_MAPBASE(0),
146 .irq = IRQ_VR1000_SERIAL + 0, 143 .irq = VR1000_IRQ_SERIAL + 0,
147 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 144 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
148 .iotype = UPIO_MEM, 145 .iotype = UPIO_MEM,
149 .regshift = 0, 146 .regshift = 0,
@@ -151,7 +148,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
151 }, 148 },
152 [1] = { 149 [1] = {
153 .mapbase = VR1000_SERIAL_MAPBASE(1), 150 .mapbase = VR1000_SERIAL_MAPBASE(1),
154 .irq = IRQ_VR1000_SERIAL + 1, 151 .irq = VR1000_IRQ_SERIAL + 1,
155 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 152 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
156 .iotype = UPIO_MEM, 153 .iotype = UPIO_MEM,
157 .regshift = 0, 154 .regshift = 0,
@@ -159,7 +156,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
159 }, 156 },
160 [2] = { 157 [2] = {
161 .mapbase = VR1000_SERIAL_MAPBASE(2), 158 .mapbase = VR1000_SERIAL_MAPBASE(2),
162 .irq = IRQ_VR1000_SERIAL + 2, 159 .irq = VR1000_IRQ_SERIAL + 2,
163 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 160 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
164 .iotype = UPIO_MEM, 161 .iotype = UPIO_MEM,
165 .regshift = 0, 162 .regshift = 0,
@@ -167,7 +164,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
167 }, 164 },
168 [3] = { 165 [3] = {
169 .mapbase = VR1000_SERIAL_MAPBASE(3), 166 .mapbase = VR1000_SERIAL_MAPBASE(3),
170 .irq = IRQ_VR1000_SERIAL + 3, 167 .irq = VR1000_IRQ_SERIAL + 3,
171 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 168 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
172 .iotype = UPIO_MEM, 169 .iotype = UPIO_MEM,
173 .regshift = 0, 170 .regshift = 0,
@@ -189,14 +186,14 @@ static struct platform_device serial_device = {
189static struct resource vr1000_dm9k0_resource[] = { 186static struct resource vr1000_dm9k0_resource[] = {
190 [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000, 4), 187 [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000, 4),
191 [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x40, 0x40), 188 [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x40, 0x40),
192 [2] = DEFINE_RES_NAMED(IRQ_VR1000_DM9000A, 1, NULL, IORESOURCE_IRQ \ 189 [2] = DEFINE_RES_NAMED(VR1000_IRQ_DM9000A, 1, NULL, IORESOURCE_IRQ \
193 | IORESOURCE_IRQ_HIGHLEVEL), 190 | IORESOURCE_IRQ_HIGHLEVEL),
194}; 191};
195 192
196static struct resource vr1000_dm9k1_resource[] = { 193static struct resource vr1000_dm9k1_resource[] = {
197 [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x80, 4), 194 [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x80, 4),
198 [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0, 0x40), 195 [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0, 0x40),
199 [2] = DEFINE_RES_NAMED(IRQ_VR1000_DM9000N, 1, NULL, IORESOURCE_IRQ \ 196 [2] = DEFINE_RES_NAMED(VR1000_IRQ_DM9000N, 1, NULL, IORESOURCE_IRQ \
200 | IORESOURCE_IRQ_HIGHLEVEL), 197 | IORESOURCE_IRQ_HIGHLEVEL),
201}; 198};
202 199
diff --git a/arch/arm/mach-s3c24xx/mach-vstms.c b/arch/arm/mach-s3c24xx/mach-vstms.c
index 7fe7d4f60419..3e2bfddc9df1 100644
--- a/arch/arm/mach-s3c24xx/mach-vstms.c
+++ b/arch/arm/mach-s3c24xx/mach-vstms.c
@@ -36,7 +36,6 @@
36#include <mach/regs-gpio.h> 36#include <mach/regs-gpio.h>
37#include <mach/regs-lcd.h> 37#include <mach/regs-lcd.h>
38 38
39#include <mach/idle.h>
40#include <mach/fb.h> 39#include <mach/fb.h>
41 40
42#include <linux/platform_data/i2c-s3c2410.h> 41#include <linux/platform_data/i2c-s3c2410.h>
diff --git a/arch/arm/mach-s3c24xx/include/mach/osiris-map.h b/arch/arm/mach-s3c24xx/osiris.h
index 17380f848428..b8d56074abac 100644
--- a/arch/arm/mach-s3c24xx/include/mach/osiris-map.h
+++ b/arch/arm/mach-s3c24xx/osiris.h
@@ -1,9 +1,9 @@
1/* arch/arm/mach-s3c2410/include/mach/osiris-map.h 1/*
2 *
3 * Copyright 2005 Simtec Electronics 2 * Copyright 2005 Simtec Electronics
4 * http://www.simtec.co.uk/products/ 3 * http://www.simtec.co.uk/products/
5 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
6 * 5 *
6 * OSIRIS - CPLD control constants
7 * OSIRIS - Memory map definitions 7 * OSIRIS - Memory map definitions
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
@@ -11,10 +11,21 @@
11 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
12*/ 12*/
13 13
14/* needs arch/map.h including with this */ 14#ifndef __MACH_S3C24XX_OSIRIS_H
15#define __MACH_S3C24XX_OSIRIS_H __FILE__
16
17/* CTRL0 - NAND WP control */
18
19#define OSIRIS_CTRL0_NANDSEL (0x3)
20#define OSIRIS_CTRL0_BOOT_INT (1<<3)
21#define OSIRIS_CTRL0_PCMCIA (1<<4)
22#define OSIRIS_CTRL0_FIX8 (1<<5)
23#define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6)
24#define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7)
25
26#define OSIRIS_CTRL1_FIX8 (1<<0)
15 27
16#ifndef __ASM_ARCH_OSIRISMAP_H 28#define OSIRIS_ID_REVMASK (0x7)
17#define __ASM_ARCH_OSIRISMAP_H
18 29
19/* start peripherals off after the S3C2410 */ 30/* start peripherals off after the S3C2410 */
20 31
@@ -39,4 +50,4 @@
39#define OSIRIS_VA_IDREG OSIRIS_IOADDR(0x00700000) 50#define OSIRIS_VA_IDREG OSIRIS_IOADDR(0x00700000)
40#define OSIRIS_PA_IDREG (OSIRIS_PA_CPLD + (7<<23)) 51#define OSIRIS_PA_IDREG (OSIRIS_PA_CPLD + (7<<23))
41 52
42#endif /* __ASM_ARCH_OSIRISMAP_H */ 53#endif /* __MACH_S3C24XX_OSIRIS_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/otom-map.h b/arch/arm/mach-s3c24xx/otom.h
index f9277a52c145..321b7be1c0f7 100644
--- a/arch/arm/mach-s3c24xx/include/mach/otom-map.h
+++ b/arch/arm/mach-s3c24xx/otom.h
@@ -1,5 +1,4 @@
1/* arch/arm/mach-s3c2410/include/mach/otom-map.h 1/*
2 *
3 * (c) 2005 Guillaume GOURAT / NexVision 2 * (c) 2005 Guillaume GOURAT / NexVision
4 * guillaume.gourat@nexvision.fr 3 * guillaume.gourat@nexvision.fr
5 * 4 *
@@ -10,21 +9,20 @@
10 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
11*/ 10*/
12 11
13/* needs arch/map.h including with this */ 12/*
14 13 * ok, we've used up to 0x01300000, now we need to find space for the
15/* ok, we've used up to 0x01300000, now we need to find space for the
16 * peripherals that live in the nGCS[x] areas, which are quite numerous 14 * peripherals that live in the nGCS[x] areas, which are quite numerous
17 * in their space. 15 * in their space.
18 */ 16 */
19 17
20#ifndef __ASM_ARCH_OTOMMAP_H 18#ifndef __MACH_S3C24XX_OTOM_H
21#define __ASM_ARCH_OTOMMAP_H 19#define __MACH_S3C24XX_OTOM_H __FILE__
22 20
23#define OTOM_PA_CS8900A_BASE (S3C2410_CS3 + 0x01000000) /* nGCS3 +0x01000000 */ 21#define OTOM_PA_CS8900A_BASE (S3C2410_CS3 + 0x01000000) /* nGCS3 +0x01000000 */
24#define OTOM_VA_CS8900A_BASE S3C2410_ADDR(0x04000000) /* 0xF4000000 */ 22#define OTOM_VA_CS8900A_BASE S3C2410_ADDR(0x04000000) /* 0xF4000000 */
25 23
26/* physical offset addresses for the peripherals */ 24/* physical offset addresses for the peripherals */
27 25
28#define OTOM_PA_FLASH0_BASE (S3C2410_CS0) /* Bank 0 */ 26#define OTOM_PA_FLASH0_BASE (S3C2410_CS0)
29 27
30#endif /* __ASM_ARCH_OTOMMAP_H */ 28#endif /* __MACH_S3C24XX_OTOM_H */
diff --git a/arch/arm/mach-s3c24xx/pm-s3c2410.c b/arch/arm/mach-s3c24xx/pm-s3c2410.c
index 949ae05e07c5..2d82c4f116cd 100644
--- a/arch/arm/mach-s3c24xx/pm-s3c2410.c
+++ b/arch/arm/mach-s3c24xx/pm-s3c2410.c
@@ -29,16 +29,16 @@
29#include <linux/gpio.h> 29#include <linux/gpio.h>
30#include <linux/io.h> 30#include <linux/io.h>
31 31
32#include <mach/hardware.h>
33
34#include <asm/mach-types.h> 32#include <asm/mach-types.h>
35 33
34#include <mach/hardware.h>
36#include <mach/regs-gpio.h> 35#include <mach/regs-gpio.h>
37#include <mach/h1940.h>
38 36
39#include <plat/cpu.h> 37#include <plat/cpu.h>
40#include <plat/pm.h> 38#include <plat/pm.h>
41 39
40#include "h1940.h"
41
42static void s3c2410_pm_prepare(void) 42static void s3c2410_pm_prepare(void)
43{ 43{
44 /* ensure at least GSTATUS3 has the resume address */ 44 /* ensure at least GSTATUS3 has the resume address */
diff --git a/arch/arm/mach-s3c24xx/pm-s3c2412.c b/arch/arm/mach-s3c24xx/pm-s3c2412.c
index c60f67a75aff..206765cc4092 100644
--- a/arch/arm/mach-s3c24xx/pm-s3c2412.c
+++ b/arch/arm/mach-s3c24xx/pm-s3c2412.c
@@ -21,19 +21,19 @@
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <mach/hardware.h>
25#include <asm/cacheflush.h> 24#include <asm/cacheflush.h>
26#include <asm/irq.h> 25#include <asm/irq.h>
27 26
28#include <mach/regs-power.h> 27#include <mach/hardware.h>
29#include <mach/regs-gpio.h> 28#include <mach/regs-gpio.h>
30#include <mach/regs-dsc.h> 29#include <mach/regs-power.h>
31 30
32#include <plat/cpu.h> 31#include <plat/cpu.h>
33#include <plat/pm.h> 32#include <plat/pm.h>
34
35#include <plat/s3c2412.h> 33#include <plat/s3c2412.h>
36 34
35#include "regs-dsc.h"
36
37extern void s3c2412_sleep_enter(void); 37extern void s3c2412_sleep_enter(void);
38 38
39static int s3c2412_cpu_suspend(unsigned long arg) 39static int s3c2412_cpu_suspend(unsigned long arg)
diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-dsc.h b/arch/arm/mach-s3c24xx/regs-dsc.h
index 98fd4a05587c..98fd4a05587c 100644
--- a/arch/arm/mach-s3c24xx/include/mach/regs-dsc.h
+++ b/arch/arm/mach-s3c24xx/regs-dsc.h
diff --git a/arch/arm/mach-s3c24xx/s3c2412.c b/arch/arm/mach-s3c24xx/s3c2412.c
index 6c5f4031ff0c..c511a225f07a 100644
--- a/arch/arm/mach-s3c24xx/s3c2412.c
+++ b/arch/arm/mach-s3c24xx/s3c2412.c
@@ -1,5 +1,4 @@
1/* linux/arch/arm/mach-s3c2412/s3c2412.c 1/*
2 *
3 * Copyright (c) 2006 Simtec Electronics 2 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 3 * Ben Dooks <ben@simtec.co.uk>
5 * 4 *
@@ -28,28 +27,30 @@
28#include <asm/mach/map.h> 27#include <asm/mach/map.h>
29#include <asm/mach/irq.h> 28#include <asm/mach/irq.h>
30 29
31#include <mach/hardware.h>
32#include <asm/proc-fns.h> 30#include <asm/proc-fns.h>
33#include <asm/irq.h> 31#include <asm/irq.h>
34#include <asm/system_misc.h> 32#include <asm/system_misc.h>
35 33
36#include <plat/cpu-freq.h> 34#include <mach/hardware.h>
37
38#include <mach/regs-clock.h> 35#include <mach/regs-clock.h>
39#include <plat/regs-serial.h>
40#include <mach/regs-power.h>
41#include <mach/regs-gpio.h> 36#include <mach/regs-gpio.h>
42#include <mach/regs-dsc.h> 37#include <mach/regs-power.h>
43#include <plat/regs-spi.h>
44#include <mach/regs-s3c2412.h>
45 38
46#include <plat/s3c2412.h> 39#include <plat/clock.h>
47#include <plat/cpu.h> 40#include <plat/cpu.h>
41#include <plat/cpu-freq.h>
48#include <plat/devs.h> 42#include <plat/devs.h>
49#include <plat/clock.h>
50#include <plat/pm.h>
51#include <plat/pll.h>
52#include <plat/nand-core.h> 43#include <plat/nand-core.h>
44#include <plat/pll.h>
45#include <plat/pm.h>
46#include <plat/regs-serial.h>
47#include <plat/regs-spi.h>
48#include <plat/s3c2412.h>
49
50#include "regs-dsc.h"
51
52#define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30)
53#define S3C2412_SWRST_RESET (0x533C2412)
53 54
54#ifndef CONFIG_CPU_S3C2412_ONLY 55#ifndef CONFIG_CPU_S3C2412_ONLY
55void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO; 56void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO;
diff --git a/arch/arm/mach-s3c24xx/s3c244x.c b/arch/arm/mach-s3c24xx/s3c244x.c
index b0b60a1154d6..ad2671baa910 100644
--- a/arch/arm/mach-s3c24xx/s3c244x.c
+++ b/arch/arm/mach-s3c24xx/s3c244x.c
@@ -36,7 +36,6 @@
36#include <mach/regs-clock.h> 36#include <mach/regs-clock.h>
37#include <plat/regs-serial.h> 37#include <plat/regs-serial.h>
38#include <mach/regs-gpio.h> 38#include <mach/regs-gpio.h>
39#include <mach/regs-dsc.h>
40 39
41#include <plat/s3c2410.h> 40#include <plat/s3c2410.h>
42#include <plat/s3c244x.h> 41#include <plat/s3c244x.h>
@@ -48,6 +47,8 @@
48#include <plat/nand-core.h> 47#include <plat/nand-core.h>
49#include <plat/watchdog-reset.h> 48#include <plat/watchdog-reset.h>
50 49
50#include "regs-dsc.h"
51
51static struct map_desc s3c244x_iodesc[] __initdata = { 52static struct map_desc s3c244x_iodesc[] __initdata = {
52 IODESC_ENT(CLKPWR), 53 IODESC_ENT(CLKPWR),
53 IODESC_ENT(TIMER), 54 IODESC_ENT(TIMER),
diff --git a/arch/arm/mach-s3c24xx/simtec-audio.c b/arch/arm/mach-s3c24xx/simtec-audio.c
index fd0ef05763a9..67cb5120dfeb 100644
--- a/arch/arm/mach-s3c24xx/simtec-audio.c
+++ b/arch/arm/mach-s3c24xx/simtec-audio.c
@@ -17,16 +17,13 @@
17#include <linux/device.h> 17#include <linux/device.h>
18#include <linux/io.h> 18#include <linux/io.h>
19 19
20#include <mach/bast-map.h>
21#include <mach/bast-irq.h>
22#include <mach/bast-cpld.h>
23
24#include <mach/hardware.h> 20#include <mach/hardware.h>
25#include <mach/regs-gpio.h> 21#include <mach/regs-gpio.h>
26 22
27#include <linux/platform_data/asoc-s3c24xx_simtec.h> 23#include <linux/platform_data/asoc-s3c24xx_simtec.h>
28#include <plat/devs.h> 24#include <plat/devs.h>
29 25
26#include "bast.h"
30#include "simtec.h" 27#include "simtec.h"
31 28
32/* platform ops for audio */ 29/* platform ops for audio */
diff --git a/arch/arm/mach-s3c24xx/simtec-nor.c b/arch/arm/mach-s3c24xx/simtec-nor.c
index 029744fcaacb..8884bffa619a 100644
--- a/arch/arm/mach-s3c24xx/simtec-nor.c
+++ b/arch/arm/mach-s3c24xx/simtec-nor.c
@@ -27,9 +27,8 @@
27#include <asm/mach/irq.h> 27#include <asm/mach/irq.h>
28 28
29#include <mach/map.h> 29#include <mach/map.h>
30#include <mach/bast-map.h>
31#include <mach/bast-cpld.h>
32 30
31#include "bast.h"
33#include "simtec.h" 32#include "simtec.h"
34 33
35static void simtec_nor_vpp(struct platform_device *pdev, int vpp) 34static void simtec_nor_vpp(struct platform_device *pdev, int vpp)
diff --git a/arch/arm/mach-s3c24xx/simtec-usb.c b/arch/arm/mach-s3c24xx/simtec-usb.c
index ddf7a3c743ac..2ed2e32430dc 100644
--- a/arch/arm/mach-s3c24xx/simtec-usb.c
+++ b/arch/arm/mach-s3c24xx/simtec-usb.c
@@ -28,15 +28,13 @@
28#include <asm/mach/map.h> 28#include <asm/mach/map.h>
29#include <asm/mach/irq.h> 29#include <asm/mach/irq.h>
30 30
31#include <mach/bast-map.h>
32#include <mach/bast-irq.h>
33
34#include <mach/hardware.h> 31#include <mach/hardware.h>
35#include <asm/irq.h> 32#include <asm/irq.h>
36 33
37#include <linux/platform_data/usb-ohci-s3c2410.h> 34#include <linux/platform_data/usb-ohci-s3c2410.h>
38#include <plat/devs.h> 35#include <plat/devs.h>
39 36
37#include "bast.h"
40#include "simtec.h" 38#include "simtec.h"
41 39
42/* control power and monitor over-current events on various Simtec 40/* control power and monitor over-current events on various Simtec
@@ -79,7 +77,7 @@ static void usb_simtec_enableoc(struct s3c2410_hcd_info *info, int on)
79 int ret; 77 int ret;
80 78
81 if (on) { 79 if (on) {
82 ret = request_irq(IRQ_USBOC, usb_simtec_ocirq, 80 ret = request_irq(BAST_IRQ_USBOC, usb_simtec_ocirq,
83 IRQF_DISABLED | IRQF_TRIGGER_RISING | 81 IRQF_DISABLED | IRQF_TRIGGER_RISING |
84 IRQF_TRIGGER_FALLING, 82 IRQF_TRIGGER_FALLING,
85 "USB Over-current", info); 83 "USB Over-current", info);
@@ -87,7 +85,7 @@ static void usb_simtec_enableoc(struct s3c2410_hcd_info *info, int on)
87 printk(KERN_ERR "failed to request usb oc irq\n"); 85 printk(KERN_ERR "failed to request usb oc irq\n");
88 } 86 }
89 } else { 87 } else {
90 free_irq(IRQ_USBOC, info); 88 free_irq(BAST_IRQ_USBOC, info);
91 } 89 }
92} 90}
93 91
diff --git a/arch/arm/mach-s3c24xx/vr1000.h b/arch/arm/mach-s3c24xx/vr1000.h
new file mode 100644
index 000000000000..7fcd2c2f183c
--- /dev/null
+++ b/arch/arm/mach-s3c24xx/vr1000.h
@@ -0,0 +1,118 @@
1
2/* arch/arm/mach-s3c2410/include/mach/vr1000-cpld.h
3 *
4 * Copyright (c) 2003 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * VR1000 - CPLD control constants
8 * Machine VR1000 - IRQ Number definitions
9 * Machine VR1000 - Memory map definitions
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14*/
15
16#ifndef __MACH_S3C24XX_VR1000_H
17#define __MACH_S3C24XX_VR1000_H __FILE__
18
19#define VR1000_CPLD_CTRL2_RAMWEN (0x04) /* SRAM Write Enable */
20
21/* irq numbers to onboard peripherals */
22
23#define VR1000_IRQ_USBOC IRQ_EINT19
24#define VR1000_IRQ_IDE0 IRQ_EINT16
25#define VR1000_IRQ_IDE1 IRQ_EINT17
26#define VR1000_IRQ_SERIAL IRQ_EINT12
27#define VR1000_IRQ_DM9000A IRQ_EINT10
28#define VR1000_IRQ_DM9000N IRQ_EINT9
29#define VR1000_IRQ_SMALERT IRQ_EINT8
30
31/* map */
32
33#define VR1000_IOADDR(x) (S3C2410_ADDR((x) + 0x01300000))
34
35/* we put the CPLD registers next, to get them out of the way */
36
37#define VR1000_VA_CTRL1 VR1000_IOADDR(0x00000000) /* 0x01300000 */
38#define VR1000_PA_CTRL1 (S3C2410_CS5 | 0x7800000)
39
40#define VR1000_VA_CTRL2 VR1000_IOADDR(0x00100000) /* 0x01400000 */
41#define VR1000_PA_CTRL2 (S3C2410_CS1 | 0x6000000)
42
43#define VR1000_VA_CTRL3 VR1000_IOADDR(0x00200000) /* 0x01500000 */
44#define VR1000_PA_CTRL3 (S3C2410_CS1 | 0x6800000)
45
46#define VR1000_VA_CTRL4 VR1000_IOADDR(0x00300000) /* 0x01600000 */
47#define VR1000_PA_CTRL4 (S3C2410_CS1 | 0x7000000)
48
49/* next, we have the PC104 ISA interrupt registers */
50
51#define VR1000_PA_PC104_IRQREQ (S3C2410_CS5 | 0x6000000) /* 0x01700000 */
52#define VR1000_VA_PC104_IRQREQ VR1000_IOADDR(0x00400000)
53
54#define VR1000_PA_PC104_IRQRAW (S3C2410_CS5 | 0x6800000) /* 0x01800000 */
55#define VR1000_VA_PC104_IRQRAW VR1000_IOADDR(0x00500000)
56
57#define VR1000_PA_PC104_IRQMASK (S3C2410_CS5 | 0x7000000) /* 0x01900000 */
58#define VR1000_VA_PC104_IRQMASK VR1000_IOADDR(0x00600000)
59
60/*
61 * 0xE0000000 contains the IO space that is split by speed and
62 * whether the access is for 8 or 16bit IO... this ensures that
63 * the correct access is made
64 *
65 * 0x10000000 of space, partitioned as so:
66 *
67 * 0x00000000 to 0x04000000 8bit, slow
68 * 0x04000000 to 0x08000000 16bit, slow
69 * 0x08000000 to 0x0C000000 16bit, net
70 * 0x0C000000 to 0x10000000 16bit, fast
71 *
72 * each of these spaces has the following in:
73 *
74 * 0x02000000 to 0x02100000 1MB IDE primary channel
75 * 0x02100000 to 0x02200000 1MB IDE primary channel aux
76 * 0x02200000 to 0x02400000 1MB IDE secondary channel
77 * 0x02300000 to 0x02400000 1MB IDE secondary channel aux
78 * 0x02500000 to 0x02600000 1MB Davicom DM9000 ethernet controllers
79 * 0x02600000 to 0x02700000 1MB
80 *
81 * the phyiscal layout of the zones are:
82 * nGCS2 - 8bit, slow
83 * nGCS3 - 16bit, slow
84 * nGCS4 - 16bit, net
85 * nGCS5 - 16bit, fast
86 */
87
88#define VR1000_VA_MULTISPACE (0xE0000000)
89
90#define VR1000_VA_ISAIO (VR1000_VA_MULTISPACE + 0x00000000)
91#define VR1000_VA_ISAMEM (VR1000_VA_MULTISPACE + 0x01000000)
92#define VR1000_VA_IDEPRI (VR1000_VA_MULTISPACE + 0x02000000)
93#define VR1000_VA_IDEPRIAUX (VR1000_VA_MULTISPACE + 0x02100000)
94#define VR1000_VA_IDESEC (VR1000_VA_MULTISPACE + 0x02200000)
95#define VR1000_VA_IDESECAUX (VR1000_VA_MULTISPACE + 0x02300000)
96#define VR1000_VA_ASIXNET (VR1000_VA_MULTISPACE + 0x02400000)
97#define VR1000_VA_DM9000 (VR1000_VA_MULTISPACE + 0x02500000)
98#define VR1000_VA_SUPERIO (VR1000_VA_MULTISPACE + 0x02600000)
99
100/* physical offset addresses for the peripherals */
101
102#define VR1000_PA_IDEPRI (0x02000000)
103#define VR1000_PA_IDEPRIAUX (0x02800000)
104#define VR1000_PA_IDESEC (0x03000000)
105#define VR1000_PA_IDESECAUX (0x03800000)
106#define VR1000_PA_DM9000 (0x05000000)
107
108#define VR1000_PA_SERIAL (0x11800000)
109#define VR1000_VA_SERIAL (VR1000_IOADDR(0x00700000))
110
111/* VR1000 ram is in CS1, with A26..A24 = 2_101 */
112#define VR1000_PA_SRAM (S3C2410_CS1 | 0x05000000)
113
114/* some configurations for the peripherals */
115
116#define VR1000_DM9000_CS VR1000_VAM_CS4
117
118#endif /* __MACH_S3C24XX_VR1000_H */
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 803711e283b2..8499415be9cd 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -23,7 +23,6 @@
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/map.h> 24#include <mach/map.h>
25 25
26#include <mach/regs-sys.h>
27#include <mach/regs-clock.h> 26#include <mach/regs-clock.h>
28 27
29#include <plat/cpu.h> 28#include <plat/cpu.h>
@@ -33,6 +32,8 @@
33#include <plat/clock-clksrc.h> 32#include <plat/clock-clksrc.h>
34#include <plat/pll.h> 33#include <plat/pll.h>
35 34
35#include "regs-sys.h"
36
36/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call 37/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call
37 * ext_xtal_mux for want of an actual name from the manual. 38 * ext_xtal_mux for want of an actual name from the manual.
38*/ 39*/
diff --git a/arch/arm/mach-s3c64xx/cpuidle.c b/arch/arm/mach-s3c64xx/cpuidle.c
index acb197ccf3f7..ead5fab0dbb5 100644
--- a/arch/arm/mach-s3c64xx/cpuidle.c
+++ b/arch/arm/mach-s3c64xx/cpuidle.c
@@ -20,8 +20,8 @@
20 20
21#include <mach/map.h> 21#include <mach/map.h>
22 22
23#include <mach/regs-sys.h> 23#include "regs-sys.h"
24#include <mach/regs-syscon-power.h> 24#include "regs-syscon-power.h"
25 25
26static int s3c64xx_enter_idle(struct cpuidle_device *dev, 26static int s3c64xx_enter_idle(struct cpuidle_device *dev,
27 struct cpuidle_driver *drv, 27 struct cpuidle_driver *drv,
diff --git a/arch/arm/mach-s3c64xx/include/mach/crag6410.h b/arch/arm/mach-s3c64xx/crag6410.h
index 4c3c9994fc2c..4c3c9994fc2c 100644
--- a/arch/arm/mach-s3c64xx/include/mach/crag6410.h
+++ b/arch/arm/mach-s3c64xx/crag6410.h
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index f2a7a1725596..ec29b35f25c0 100644
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -28,10 +28,10 @@
28#include <mach/map.h> 28#include <mach/map.h>
29#include <mach/irqs.h> 29#include <mach/irqs.h>
30 30
31#include <mach/regs-sys.h>
32
33#include <asm/hardware/pl080.h> 31#include <asm/hardware/pl080.h>
34 32
33#include "regs-sys.h"
34
35/* dma channel state information */ 35/* dma channel state information */
36 36
37struct s3c64xx_dmac { 37struct s3c64xx_dmac {
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-sys.h b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h
deleted file mode 100644
index b91e02093289..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/regs-sys.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/* arch/arm/plat-s3c64xx/include/plat/regs-sys.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C64XX system register definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __PLAT_REGS_SYS_H
16#define __PLAT_REGS_SYS_H __FILE__
17
18#define S3C_SYSREG(x) (S3C_VA_SYS + (x))
19
20#define S3C64XX_AHB_CON0 S3C_SYSREG(0x100)
21#define S3C64XX_AHB_CON1 S3C_SYSREG(0x104)
22#define S3C64XX_AHB_CON2 S3C_SYSREG(0x108)
23
24#define S3C64XX_SDMA_SEL S3C_SYSREG(0x110)
25
26#define S3C64XX_OTHERS S3C_SYSREG(0x900)
27
28#define S3C64XX_OTHERS_USBMASK (1 << 16)
29#define S3C64XX_OTHERS_SYNCMUXSEL (1 << 6)
30
31#endif /* _PLAT_REGS_SYS_H */
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index afeae0b5bb28..728eef3296b2 100644
--- a/arch/arm/mach-s3c64xx/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -49,9 +49,9 @@
49#include <plat/devs.h> 49#include <plat/devs.h>
50#include <plat/cpu.h> 50#include <plat/cpu.h>
51#include <mach/regs-gpio.h> 51#include <mach/regs-gpio.h>
52#include <mach/regs-modem.h>
53 52
54#include "common.h" 53#include "common.h"
54#include "regs-modem.h"
55 55
56/* DM9000 */ 56/* DM9000 */
57#define ANW6410_PA_DM9000 (0x18000000) 57#define ANW6410_PA_DM9000 (0x18000000)
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
index 755c0bb119f4..bf3d1c09b085 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
@@ -29,7 +29,7 @@
29 29
30#include <linux/platform_data/spi-s3c64xx.h> 30#include <linux/platform_data/spi-s3c64xx.h>
31 31
32#include <mach/crag6410.h> 32#include "crag6410.h"
33 33
34static struct s3c64xx_spi_csinfo wm0010_spi_csinfo = { 34static struct s3c64xx_spi_csinfo wm0010_spi_csinfo = {
35 .line = S3C64XX_GPC(3), 35 .line = S3C64XX_GPC(3),
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index 5b6adc7f1d39..1acf02bace57 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -49,12 +49,7 @@
49#include <mach/hardware.h> 49#include <mach/hardware.h>
50#include <mach/map.h> 50#include <mach/map.h>
51 51
52#include <mach/regs-sys.h>
53#include <mach/regs-gpio.h> 52#include <mach/regs-gpio.h>
54#include <mach/regs-modem.h>
55#include <mach/crag6410.h>
56
57#include <mach/regs-gpio-memport.h>
58 53
59#include <plat/regs-serial.h> 54#include <plat/regs-serial.h>
60#include <plat/fb.h> 55#include <plat/fb.h>
@@ -71,6 +66,10 @@
71#include <plat/pm.h> 66#include <plat/pm.h>
72 67
73#include "common.h" 68#include "common.h"
69#include "crag6410.h"
70#include "regs-gpio-memport.h"
71#include "regs-modem.h"
72#include "regs-sys.h"
74 73
75/* serial port setup */ 74/* serial port setup */
76 75
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index e173e6e98228..4b41fcdaa7b6 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -30,8 +30,6 @@
30 30
31#include <mach/map.h> 31#include <mach/map.h>
32#include <mach/regs-gpio.h> 32#include <mach/regs-gpio.h>
33#include <mach/regs-modem.h>
34#include <mach/regs-srom.h>
35 33
36#include <plat/adc.h> 34#include <plat/adc.h>
37#include <plat/cpu.h> 35#include <plat/cpu.h>
@@ -45,6 +43,8 @@
45#include <video/samsung_fimd.h> 43#include <video/samsung_fimd.h>
46 44
47#include "common.h" 45#include "common.h"
46#include "regs-modem.h"
47#include "regs-srom.h"
48 48
49#define UCON S3C2410_UCON_DEFAULT 49#define UCON S3C2410_UCON_DEFAULT
50#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) 50#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index 4d0d47a66930..fa12bd21ad82 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -31,8 +31,6 @@
31 31
32#include <mach/map.h> 32#include <mach/map.h>
33#include <mach/regs-gpio.h> 33#include <mach/regs-gpio.h>
34#include <mach/regs-modem.h>
35#include <mach/regs-srom.h>
36 34
37#include <plat/adc.h> 35#include <plat/adc.h>
38#include <plat/cpu.h> 36#include <plat/cpu.h>
@@ -46,6 +44,8 @@
46#include <video/samsung_fimd.h> 44#include <video/samsung_fimd.h>
47 45
48#include "common.h" 46#include "common.h"
47#include "regs-modem.h"
48#include "regs-srom.h"
49 49
50#define UCON S3C2410_UCON_DEFAULT 50#define UCON S3C2410_UCON_DEFAULT
51#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) 51#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c
index c6d7390939ae..fc3e9b32e26f 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq.c
@@ -25,7 +25,6 @@
25 25
26#include <mach/map.h> 26#include <mach/map.h>
27#include <mach/regs-gpio.h> 27#include <mach/regs-gpio.h>
28#include <mach/regs-modem.h>
29 28
30#include <plat/clock.h> 29#include <plat/clock.h>
31#include <plat/cpu.h> 30#include <plat/cpu.h>
@@ -41,6 +40,7 @@
41#include <video/platform_lcd.h> 40#include <video/platform_lcd.h>
42 41
43#include "common.h" 42#include "common.h"
43#include "regs-modem.h"
44 44
45#define UCON S3C2410_UCON_DEFAULT 45#define UCON S3C2410_UCON_DEFAULT
46#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) 46#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 1663d10ba02a..ba7544e2d04d 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -56,10 +56,7 @@
56#include <asm/mach-types.h> 56#include <asm/mach-types.h>
57 57
58#include <plat/regs-serial.h> 58#include <plat/regs-serial.h>
59#include <mach/regs-modem.h>
60#include <mach/regs-gpio.h> 59#include <mach/regs-gpio.h>
61#include <mach/regs-sys.h>
62#include <mach/regs-srom.h>
63#include <linux/platform_data/ata-samsung_cf.h> 60#include <linux/platform_data/ata-samsung_cf.h>
64#include <linux/platform_data/i2c-s3c2410.h> 61#include <linux/platform_data/i2c-s3c2410.h>
65#include <plat/fb.h> 62#include <plat/fb.h>
@@ -74,6 +71,9 @@
74#include <plat/backlight.h> 71#include <plat/backlight.h>
75 72
76#include "common.h" 73#include "common.h"
74#include "regs-modem.h"
75#include "regs-srom.h"
76#include "regs-sys.h"
77 77
78#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK 78#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
79#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 79#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index d2e1a16690bd..a6d7c6cf45e7 100644
--- a/arch/arm/mach-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -26,12 +26,13 @@
26#include <plat/pm.h> 26#include <plat/pm.h>
27#include <plat/wakeup-mask.h> 27#include <plat/wakeup-mask.h>
28 28
29#include <mach/regs-sys.h>
30#include <mach/regs-gpio.h> 29#include <mach/regs-gpio.h>
31#include <mach/regs-clock.h> 30#include <mach/regs-clock.h>
32#include <mach/regs-syscon-power.h> 31
33#include <mach/regs-gpio-memport.h> 32#include "regs-gpio-memport.h"
34#include <mach/regs-modem.h> 33#include "regs-modem.h"
34#include "regs-sys.h"
35#include "regs-syscon-power.h"
35 36
36struct s3c64xx_pm_domain { 37struct s3c64xx_pm_domain {
37 char *const name; 38 char *const name;
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h b/arch/arm/mach-s3c64xx/regs-gpio-memport.h
index 82342f6fd27d..b927593019f5 100644
--- a/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h
+++ b/arch/arm/mach-s3c64xx/regs-gpio-memport.h
@@ -1,5 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/mach/regs-gpio-memport.h 1/*
2 *
3 * Copyright 2008 Openmoko, Inc. 2 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 3 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
@@ -8,8 +7,8 @@
8 * S3C64XX - GPIO memory port register definitions 7 * S3C64XX - GPIO memory port register definitions
9 */ 8 */
10 9
11#ifndef __ASM_PLAT_S3C64XX_REGS_GPIO_MEMPORT_H 10#ifndef __MACH_S3C64XX_REGS_GPIO_MEMPORT_H
12#define __ASM_PLAT_S3C64XX_REGS_GPIO_MEMPORT_H __FILE__ 11#define __MACH_S3C64XX_REGS_GPIO_MEMPORT_H __FILE__
13 12
14#define S3C64XX_MEM0CONSTOP S3C64XX_GPIOREG(0x1B0) 13#define S3C64XX_MEM0CONSTOP S3C64XX_GPIOREG(0x1B0)
15#define S3C64XX_MEM1CONSTOP S3C64XX_GPIOREG(0x1B4) 14#define S3C64XX_MEM1CONSTOP S3C64XX_GPIOREG(0x1B4)
@@ -21,5 +20,5 @@
21#define S3C64XX_MEM0DRVCON S3C64XX_GPIOREG(0x1D0) 20#define S3C64XX_MEM0DRVCON S3C64XX_GPIOREG(0x1D0)
22#define S3C64XX_MEM1DRVCON S3C64XX_GPIOREG(0x1D4) 21#define S3C64XX_MEM1DRVCON S3C64XX_GPIOREG(0x1D4)
23 22
24#endif /* __ASM_PLAT_S3C64XX_REGS_GPIO_MEMPORT_H */ 23#endif /* __MACH_S3C64XX_REGS_GPIO_MEMPORT_H */
25 24
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-modem.h b/arch/arm/mach-s3c64xx/regs-modem.h
index 49f7759dedfa..073cdd3a03be 100644
--- a/arch/arm/mach-s3c64xx/include/mach/regs-modem.h
+++ b/arch/arm/mach-s3c64xx/regs-modem.h
@@ -1,5 +1,4 @@
1/* arch/arm/plat-s3c64xx/include/plat/regs-modem.h 1/*
2 *
3 * Copyright 2008 Openmoko, Inc. 2 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 3 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/ 4 * http://armlinux.simtec.co.uk/
@@ -12,10 +11,10 @@
12 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
13*/ 12*/
14 13
15#ifndef __PLAT_S3C64XX_REGS_MODEM_H 14#ifndef __MACH_S3C64XX_REGS_MODEM_H
16#define __PLAT_S3C64XX_REGS_MODEM_H __FILE__ 15#define __MACH_S3C64XX_REGS_MODEM_H __FILE__
17 16
18#define S3C64XX_MODEMREG(x) (S3C64XX_VA_MODEM + (x)) 17#define S3C64XX_MODEMREG(x) (S3C64XX_VA_MODEM + (x))
19 18
20#define S3C64XX_MODEM_INT2AP S3C64XX_MODEMREG(0x0) 19#define S3C64XX_MODEM_INT2AP S3C64XX_MODEMREG(0x0)
21#define S3C64XX_MODEM_INT2MODEM S3C64XX_MODEMREG(0x4) 20#define S3C64XX_MODEM_INT2MODEM S3C64XX_MODEMREG(0x4)
@@ -28,4 +27,4 @@
28#define MIFPCON_INT2M_LEVEL (1 << 4) 27#define MIFPCON_INT2M_LEVEL (1 << 4)
29#define MIFPCON_LCD_BYPASS (1 << 3) 28#define MIFPCON_LCD_BYPASS (1 << 3)
30 29
31#endif /* __PLAT_S3C64XX_REGS_MODEM_H */ 30#endif /* __MACH_S3C64XX_REGS_MODEM_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-srom.h b/arch/arm/mach-s3c64xx/regs-srom.h
index 756731b36297..d56f3386eb00 100644
--- a/arch/arm/mach-s3c64xx/include/mach/regs-srom.h
+++ b/arch/arm/mach-s3c64xx/regs-srom.h
@@ -1,5 +1,4 @@
1/* arch/arm/plat-s3c64xx/include/plat/regs-srom.h 1/*
2 *
3 * Copyright 2009 Andy Green <andy@warmcat.com> 2 * Copyright 2009 Andy Green <andy@warmcat.com>
4 * 3 *
5 * S3C64XX SROM definitions 4 * S3C64XX SROM definitions
@@ -9,8 +8,8 @@
9 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
10*/ 9*/
11 10
12#ifndef __PLAT_REGS_SROM_H 11#ifndef __MACH_S3C64XX_REGS_SROM_H
13#define __PLAT_REGS_SROM_H __FILE__ 12#define __MACH_S3C64XX_REGS_SROM_H __FILE__
14 13
15#define S3C64XX_SROMREG(x) (S3C_VA_MEM + (x)) 14#define S3C64XX_SROMREG(x) (S3C_VA_MEM + (x))
16 15
@@ -29,7 +28,7 @@
29#define S3C64XX_SROM_BW__DATAWIDTH__SHIFT 0 28#define S3C64XX_SROM_BW__DATAWIDTH__SHIFT 0
30#define S3C64XX_SROM_BW__WAITENABLE__SHIFT 2 29#define S3C64XX_SROM_BW__WAITENABLE__SHIFT 2
31#define S3C64XX_SROM_BW__BYTEENABLE__SHIFT 3 30#define S3C64XX_SROM_BW__BYTEENABLE__SHIFT 3
32#define S3C64XX_SROM_BW__CS_MASK 0xf 31#define S3C64XX_SROM_BW__CS_MASK 0xf
33 32
34#define S3C64XX_SROM_BW__NCS0__SHIFT 0 33#define S3C64XX_SROM_BW__NCS0__SHIFT 0
35#define S3C64XX_SROM_BW__NCS1__SHIFT 4 34#define S3C64XX_SROM_BW__NCS1__SHIFT 4
@@ -56,4 +55,4 @@
56#define S3C64XX_SROM_BCX__TACS__SHIFT 28 55#define S3C64XX_SROM_BCX__TACS__SHIFT 28
57#define S3C64XX_SROM_BCX__TACS__MASK 0xf 56#define S3C64XX_SROM_BCX__TACS__MASK 0xf
58 57
59#endif /* _PLAT_REGS_SROM_H */ 58#endif /* __MACH_S3C64XX_REGS_SROM_H */
diff --git a/arch/arm/mach-s3c64xx/regs-sys.h b/arch/arm/mach-s3c64xx/regs-sys.h
new file mode 100644
index 000000000000..8c411fbb0cd9
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/regs-sys.h
@@ -0,0 +1,30 @@
1/*
2 * Copyright 2008 Openmoko, Inc.
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * S3C64XX system register definitions
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#ifndef __MACH_S3C64XX_REGS_SYS_H
15#define __MACH_S3C64XX_REGS_SYS_H __FILE__
16
17#define S3C_SYSREG(x) (S3C_VA_SYS + (x))
18
19#define S3C64XX_AHB_CON0 S3C_SYSREG(0x100)
20#define S3C64XX_AHB_CON1 S3C_SYSREG(0x104)
21#define S3C64XX_AHB_CON2 S3C_SYSREG(0x108)
22
23#define S3C64XX_SDMA_SEL S3C_SYSREG(0x110)
24
25#define S3C64XX_OTHERS S3C_SYSREG(0x900)
26
27#define S3C64XX_OTHERS_USBMASK (1 << 16)
28#define S3C64XX_OTHERS_SYNCMUXSEL (1 << 6)
29
30#endif /* __MACH_S3C64XX_REGS_SYS_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-syscon-power.h b/arch/arm/mach-s3c64xx/regs-syscon-power.h
index 270d96ac9705..6e16b3404da9 100644
--- a/arch/arm/mach-s3c64xx/include/mach/regs-syscon-power.h
+++ b/arch/arm/mach-s3c64xx/regs-syscon-power.h
@@ -1,5 +1,4 @@
1/* arch/arm/plat-s3c64xx/include/plat/regs-syscon-power.h 1/*
2 *
3 * Copyright 2008 Openmoko, Inc. 2 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 3 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/ 4 * http://armlinux.simtec.co.uk/
@@ -12,8 +11,8 @@
12 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
13*/ 12*/
14 13
15#ifndef __PLAT_S3C64XX_REGS_SYSCON_POWER_H 14#ifndef __MACH_S3C64XX_REGS_SYSCON_POWER_H
16#define __PLAT_S3C64XX_REGS_SYSCON_POWER_H __FILE__ 15#define __MACH_S3C64XX_REGS_SYSCON_POWER_H __FILE__
17 16
18#define S3C64XX_PWR_CFG S3C_SYSREG(0x804) 17#define S3C64XX_PWR_CFG S3C_SYSREG(0x804)
19 18
@@ -113,4 +112,4 @@
113#define S3C64XX_INFORM2 S3C_SYSREG(0xA08) 112#define S3C64XX_INFORM2 S3C_SYSREG(0xA08)
114#define S3C64XX_INFORM3 S3C_SYSREG(0xA0C) 113#define S3C64XX_INFORM3 S3C_SYSREG(0xA0C)
115 114
116#endif /* __PLAT_S3C64XX_REGS_SYSCON_POWER_H */ 115#endif /* __MACH_S3C64XX_REGS_SYSCON_POWER_H */
diff --git a/arch/arm/mach-s3c64xx/setup-usb-phy.c b/arch/arm/mach-s3c64xx/setup-usb-phy.c
index f6757e02d7db..c8174d95339b 100644
--- a/arch/arm/mach-s3c64xx/setup-usb-phy.c
+++ b/arch/arm/mach-s3c64xx/setup-usb-phy.c
@@ -15,11 +15,12 @@
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <mach/map.h> 17#include <mach/map.h>
18#include <mach/regs-sys.h>
19#include <plat/cpu.h> 18#include <plat/cpu.h>
20#include <plat/regs-usb-hsotg-phy.h> 19#include <plat/regs-usb-hsotg-phy.h>
21#include <plat/usb-phy.h> 20#include <plat/usb-phy.h>
22 21
22#include "regs-sys.h"
23
23static int s3c_usb_otgphy_init(struct platform_device *pdev) 24static int s3c_usb_otgphy_init(struct platform_device *pdev)
24{ 25{
25 struct clk *xusbxti; 26 struct clk *xusbxti;
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
index 5112371079d0..3537815247f1 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6440.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c
@@ -23,7 +23,6 @@
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/map.h> 24#include <mach/map.h>
25#include <mach/regs-clock.h> 25#include <mach/regs-clock.h>
26#include <mach/s5p64x0-clock.h>
27 26
28#include <plat/cpu-freq.h> 27#include <plat/cpu-freq.h>
29#include <plat/clock.h> 28#include <plat/clock.h>
@@ -32,6 +31,7 @@
32#include <plat/s5p-clock.h> 31#include <plat/s5p-clock.h>
33#include <plat/clock-clksrc.h> 32#include <plat/clock-clksrc.h>
34 33
34#include "clock.h"
35#include "common.h" 35#include "common.h"
36 36
37static u32 epll_div[][5] = { 37static u32 epll_div[][5] = {
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
index 154dea702d70..af384ddd2dcf 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -23,7 +23,6 @@
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/map.h> 24#include <mach/map.h>
25#include <mach/regs-clock.h> 25#include <mach/regs-clock.h>
26#include <mach/s5p64x0-clock.h>
27 26
28#include <plat/cpu-freq.h> 27#include <plat/cpu-freq.h>
29#include <plat/clock.h> 28#include <plat/clock.h>
@@ -32,6 +31,7 @@
32#include <plat/s5p-clock.h> 31#include <plat/s5p-clock.h>
33#include <plat/clock-clksrc.h> 32#include <plat/clock-clksrc.h>
34 33
34#include "clock.h"
35#include "common.h" 35#include "common.h"
36 36
37static struct clksrc_clk clk_mout_dpll = { 37static struct clksrc_clk clk_mout_dpll = {
diff --git a/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h b/arch/arm/mach-s5p64x0/clock.h
index 0ef47d1b7670..28b8e3c6bd24 100644
--- a/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h
+++ b/arch/arm/mach-s5p64x0/clock.h
@@ -1,5 +1,4 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h 1/*
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd. 2 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com 3 * http://www.samsung.com
5 * 4 *
@@ -10,8 +9,8 @@
10 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
11*/ 10*/
12 11
13#ifndef __ASM_ARCH_CLOCK_H 12#ifndef __MACH_S5P64X0_CLOCK_H
14#define __ASM_ARCH_CLOCK_H __FILE__ 13#define __MACH_S5P64X0_CLOCK_H __FILE__
15 14
16#include <linux/clk.h> 15#include <linux/clk.h>
17 16
@@ -36,4 +35,4 @@ extern int s5p64x0_mem_ctrl(struct clk *clk, int enable);
36 35
37extern int s5p64x0_clk48m_ctrl(struct clk *clk, int enable); 36extern int s5p64x0_clk48m_ctrl(struct clk *clk, int enable);
38 37
39#endif /* __ASM_ARCH_CLOCK_H */ 38#endif /* __MACH_S5P64X0_CLOCK_H */
diff --git a/arch/arm/mach-s5p64x0/gpiolib.c b/arch/arm/mach-s5p64x0/gpiolib.c
deleted file mode 100644
index 700dac6c43f3..000000000000
--- a/arch/arm/mach-s5p64x0/gpiolib.c
+++ /dev/null
@@ -1,508 +0,0 @@
1/* linux/arch/arm/mach-s5p64x0/gpiolib.c
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5P64X0 - GPIOlib support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/irq.h>
15#include <linux/io.h>
16#include <linux/gpio.h>
17
18#include <mach/map.h>
19#include <mach/regs-gpio.h>
20#include <mach/regs-clock.h>
21
22#include <plat/cpu.h>
23#include <plat/gpio-core.h>
24#include <plat/gpio-cfg.h>
25#include <plat/gpio-cfg-helpers.h>
26
27/*
28 * S5P6440 GPIO bank summary:
29 *
30 * Bank GPIOs Style SlpCon ExtInt Group
31 * A 6 4Bit Yes 1
32 * B 7 4Bit Yes 1
33 * C 8 4Bit Yes 2
34 * F 2 2Bit Yes 4 [1]
35 * G 7 4Bit Yes 5
36 * H 10 4Bit[2] Yes 6
37 * I 16 2Bit Yes None
38 * J 12 2Bit Yes None
39 * N 16 2Bit No IRQ_EINT
40 * P 8 2Bit Yes 8
41 * R 15 4Bit[2] Yes 8
42 *
43 * S5P6450 GPIO bank summary:
44 *
45 * Bank GPIOs Style SlpCon ExtInt Group
46 * A 6 4Bit Yes 1
47 * B 7 4Bit Yes 1
48 * C 8 4Bit Yes 2
49 * D 8 4Bit Yes None
50 * F 2 2Bit Yes None
51 * G 14 4Bit[2] Yes 5
52 * H 10 4Bit[2] Yes 6
53 * I 16 2Bit Yes None
54 * J 12 2Bit Yes None
55 * K 5 4Bit Yes None
56 * N 16 2Bit No IRQ_EINT
57 * P 11 2Bit Yes 8
58 * Q 14 2Bit Yes None
59 * R 15 4Bit[2] Yes None
60 * S 8 2Bit Yes None
61 *
62 * [1] BANKF pins 14,15 do not form part of the external interrupt sources
63 * [2] BANK has two control registers, GPxCON0 and GPxCON1
64 */
65
66static int s5p64x0_gpiolib_rbank_4bit2_input(struct gpio_chip *chip,
67 unsigned int offset)
68{
69 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
70 void __iomem *base = ourchip->base;
71 void __iomem *regcon = base;
72 unsigned long con;
73 unsigned long flags;
74
75 switch (offset) {
76 case 6:
77 offset += 1;
78 case 0:
79 case 1:
80 case 2:
81 case 3:
82 case 4:
83 case 5:
84 regcon -= 4;
85 break;
86 default:
87 offset -= 7;
88 break;
89 }
90
91 s3c_gpio_lock(ourchip, flags);
92
93 con = __raw_readl(regcon);
94 con &= ~(0xf << con_4bit_shift(offset));
95 __raw_writel(con, regcon);
96
97 s3c_gpio_unlock(ourchip, flags);
98
99 return 0;
100}
101
102static int s5p64x0_gpiolib_rbank_4bit2_output(struct gpio_chip *chip,
103 unsigned int offset, int value)
104{
105 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
106 void __iomem *base = ourchip->base;
107 void __iomem *regcon = base;
108 unsigned long con;
109 unsigned long dat;
110 unsigned long flags;
111 unsigned con_offset = offset;
112
113 switch (con_offset) {
114 case 6:
115 con_offset += 1;
116 case 0:
117 case 1:
118 case 2:
119 case 3:
120 case 4:
121 case 5:
122 regcon -= 4;
123 break;
124 default:
125 con_offset -= 7;
126 break;
127 }
128
129 s3c_gpio_lock(ourchip, flags);
130
131 con = __raw_readl(regcon);
132 con &= ~(0xf << con_4bit_shift(con_offset));
133 con |= 0x1 << con_4bit_shift(con_offset);
134
135 dat = __raw_readl(base + GPIODAT_OFF);
136 if (value)
137 dat |= 1 << offset;
138 else
139 dat &= ~(1 << offset);
140
141 __raw_writel(con, regcon);
142 __raw_writel(dat, base + GPIODAT_OFF);
143
144 s3c_gpio_unlock(ourchip, flags);
145
146 return 0;
147}
148
149int s5p64x0_gpio_setcfg_4bit_rbank(struct s3c_gpio_chip *chip,
150 unsigned int off, unsigned int cfg)
151{
152 void __iomem *reg = chip->base;
153 unsigned int shift;
154 u32 con;
155
156 switch (off) {
157 case 0:
158 case 1:
159 case 2:
160 case 3:
161 case 4:
162 case 5:
163 shift = (off & 7) * 4;
164 reg -= 4;
165 break;
166 case 6:
167 shift = ((off + 1) & 7) * 4;
168 reg -= 4;
169 default:
170 shift = ((off + 1) & 7) * 4;
171 break;
172 }
173
174 if (s3c_gpio_is_cfg_special(cfg)) {
175 cfg &= 0xf;
176 cfg <<= shift;
177 }
178
179 con = __raw_readl(reg);
180 con &= ~(0xf << shift);
181 con |= cfg;
182 __raw_writel(con, reg);
183
184 return 0;
185}
186
187static struct s3c_gpio_cfg s5p64x0_gpio_cfgs[] = {
188 {
189 .cfg_eint = 0,
190 }, {
191 .cfg_eint = 7,
192 }, {
193 .cfg_eint = 3,
194 .set_config = s5p64x0_gpio_setcfg_4bit_rbank,
195 }, {
196 .cfg_eint = 0,
197 .set_config = s3c_gpio_setcfg_s3c24xx,
198 .get_config = s3c_gpio_getcfg_s3c24xx,
199 }, {
200 .cfg_eint = 2,
201 .set_config = s3c_gpio_setcfg_s3c24xx,
202 .get_config = s3c_gpio_getcfg_s3c24xx,
203 }, {
204 .cfg_eint = 3,
205 .set_config = s3c_gpio_setcfg_s3c24xx,
206 .get_config = s3c_gpio_getcfg_s3c24xx,
207 },
208};
209
210static struct s3c_gpio_chip s5p6440_gpio_4bit[] = {
211 {
212 .base = S5P64X0_GPA_BASE,
213 .config = &s5p64x0_gpio_cfgs[1],
214 .chip = {
215 .base = S5P6440_GPA(0),
216 .ngpio = S5P6440_GPIO_A_NR,
217 .label = "GPA",
218 },
219 }, {
220 .base = S5P64X0_GPB_BASE,
221 .config = &s5p64x0_gpio_cfgs[1],
222 .chip = {
223 .base = S5P6440_GPB(0),
224 .ngpio = S5P6440_GPIO_B_NR,
225 .label = "GPB",
226 },
227 }, {
228 .base = S5P64X0_GPC_BASE,
229 .config = &s5p64x0_gpio_cfgs[1],
230 .chip = {
231 .base = S5P6440_GPC(0),
232 .ngpio = S5P6440_GPIO_C_NR,
233 .label = "GPC",
234 },
235 }, {
236 .base = S5P64X0_GPG_BASE,
237 .config = &s5p64x0_gpio_cfgs[1],
238 .chip = {
239 .base = S5P6440_GPG(0),
240 .ngpio = S5P6440_GPIO_G_NR,
241 .label = "GPG",
242 },
243 },
244};
245
246static struct s3c_gpio_chip s5p6440_gpio_4bit2[] = {
247 {
248 .base = S5P64X0_GPH_BASE + 0x4,
249 .config = &s5p64x0_gpio_cfgs[1],
250 .chip = {
251 .base = S5P6440_GPH(0),
252 .ngpio = S5P6440_GPIO_H_NR,
253 .label = "GPH",
254 },
255 },
256};
257
258static struct s3c_gpio_chip s5p6440_gpio_rbank_4bit2[] = {
259 {
260 .base = S5P64X0_GPR_BASE + 0x4,
261 .config = &s5p64x0_gpio_cfgs[2],
262 .chip = {
263 .base = S5P6440_GPR(0),
264 .ngpio = S5P6440_GPIO_R_NR,
265 .label = "GPR",
266 },
267 },
268};
269
270static struct s3c_gpio_chip s5p6440_gpio_2bit[] = {
271 {
272 .base = S5P64X0_GPF_BASE,
273 .config = &s5p64x0_gpio_cfgs[5],
274 .chip = {
275 .base = S5P6440_GPF(0),
276 .ngpio = S5P6440_GPIO_F_NR,
277 .label = "GPF",
278 },
279 }, {
280 .base = S5P64X0_GPI_BASE,
281 .config = &s5p64x0_gpio_cfgs[3],
282 .chip = {
283 .base = S5P6440_GPI(0),
284 .ngpio = S5P6440_GPIO_I_NR,
285 .label = "GPI",
286 },
287 }, {
288 .base = S5P64X0_GPJ_BASE,
289 .config = &s5p64x0_gpio_cfgs[3],
290 .chip = {
291 .base = S5P6440_GPJ(0),
292 .ngpio = S5P6440_GPIO_J_NR,
293 .label = "GPJ",
294 },
295 }, {
296 .base = S5P64X0_GPN_BASE,
297 .config = &s5p64x0_gpio_cfgs[4],
298 .chip = {
299 .base = S5P6440_GPN(0),
300 .ngpio = S5P6440_GPIO_N_NR,
301 .label = "GPN",
302 },
303 }, {
304 .base = S5P64X0_GPP_BASE,
305 .config = &s5p64x0_gpio_cfgs[5],
306 .chip = {
307 .base = S5P6440_GPP(0),
308 .ngpio = S5P6440_GPIO_P_NR,
309 .label = "GPP",
310 },
311 },
312};
313
314static struct s3c_gpio_chip s5p6450_gpio_4bit[] = {
315 {
316 .base = S5P64X0_GPA_BASE,
317 .config = &s5p64x0_gpio_cfgs[1],
318 .chip = {
319 .base = S5P6450_GPA(0),
320 .ngpio = S5P6450_GPIO_A_NR,
321 .label = "GPA",
322 },
323 }, {
324 .base = S5P64X0_GPB_BASE,
325 .config = &s5p64x0_gpio_cfgs[1],
326 .chip = {
327 .base = S5P6450_GPB(0),
328 .ngpio = S5P6450_GPIO_B_NR,
329 .label = "GPB",
330 },
331 }, {
332 .base = S5P64X0_GPC_BASE,
333 .config = &s5p64x0_gpio_cfgs[1],
334 .chip = {
335 .base = S5P6450_GPC(0),
336 .ngpio = S5P6450_GPIO_C_NR,
337 .label = "GPC",
338 },
339 }, {
340 .base = S5P6450_GPD_BASE,
341 .config = &s5p64x0_gpio_cfgs[1],
342 .chip = {
343 .base = S5P6450_GPD(0),
344 .ngpio = S5P6450_GPIO_D_NR,
345 .label = "GPD",
346 },
347 }, {
348 .base = S5P6450_GPK_BASE,
349 .config = &s5p64x0_gpio_cfgs[1],
350 .chip = {
351 .base = S5P6450_GPK(0),
352 .ngpio = S5P6450_GPIO_K_NR,
353 .label = "GPK",
354 },
355 },
356};
357
358static struct s3c_gpio_chip s5p6450_gpio_4bit2[] = {
359 {
360 .base = S5P64X0_GPG_BASE + 0x4,
361 .config = &s5p64x0_gpio_cfgs[1],
362 .chip = {
363 .base = S5P6450_GPG(0),
364 .ngpio = S5P6450_GPIO_G_NR,
365 .label = "GPG",
366 },
367 }, {
368 .base = S5P64X0_GPH_BASE + 0x4,
369 .config = &s5p64x0_gpio_cfgs[1],
370 .chip = {
371 .base = S5P6450_GPH(0),
372 .ngpio = S5P6450_GPIO_H_NR,
373 .label = "GPH",
374 },
375 },
376};
377
378static struct s3c_gpio_chip s5p6450_gpio_rbank_4bit2[] = {
379 {
380 .base = S5P64X0_GPR_BASE + 0x4,
381 .config = &s5p64x0_gpio_cfgs[2],
382 .chip = {
383 .base = S5P6450_GPR(0),
384 .ngpio = S5P6450_GPIO_R_NR,
385 .label = "GPR",
386 },
387 },
388};
389
390static struct s3c_gpio_chip s5p6450_gpio_2bit[] = {
391 {
392 .base = S5P64X0_GPF_BASE,
393 .config = &s5p64x0_gpio_cfgs[5],
394 .chip = {
395 .base = S5P6450_GPF(0),
396 .ngpio = S5P6450_GPIO_F_NR,
397 .label = "GPF",
398 },
399 }, {
400 .base = S5P64X0_GPI_BASE,
401 .config = &s5p64x0_gpio_cfgs[3],
402 .chip = {
403 .base = S5P6450_GPI(0),
404 .ngpio = S5P6450_GPIO_I_NR,
405 .label = "GPI",
406 },
407 }, {
408 .base = S5P64X0_GPJ_BASE,
409 .config = &s5p64x0_gpio_cfgs[3],
410 .chip = {
411 .base = S5P6450_GPJ(0),
412 .ngpio = S5P6450_GPIO_J_NR,
413 .label = "GPJ",
414 },
415 }, {
416 .base = S5P64X0_GPN_BASE,
417 .config = &s5p64x0_gpio_cfgs[4],
418 .chip = {
419 .base = S5P6450_GPN(0),
420 .ngpio = S5P6450_GPIO_N_NR,
421 .label = "GPN",
422 },
423 }, {
424 .base = S5P64X0_GPP_BASE,
425 .config = &s5p64x0_gpio_cfgs[5],
426 .chip = {
427 .base = S5P6450_GPP(0),
428 .ngpio = S5P6450_GPIO_P_NR,
429 .label = "GPP",
430 },
431 }, {
432 .base = S5P6450_GPQ_BASE,
433 .config = &s5p64x0_gpio_cfgs[4],
434 .chip = {
435 .base = S5P6450_GPQ(0),
436 .ngpio = S5P6450_GPIO_Q_NR,
437 .label = "GPQ",
438 },
439 }, {
440 .base = S5P6450_GPS_BASE,
441 .config = &s5p64x0_gpio_cfgs[5],
442 .chip = {
443 .base = S5P6450_GPS(0),
444 .ngpio = S5P6450_GPIO_S_NR,
445 .label = "GPS",
446 },
447 },
448};
449
450void __init s5p64x0_gpiolib_set_cfg(struct s3c_gpio_cfg *chipcfg, int nr_chips)
451{
452 for (; nr_chips > 0; nr_chips--, chipcfg++) {
453 if (!chipcfg->set_config)
454 chipcfg->set_config = s3c_gpio_setcfg_s3c64xx_4bit;
455 if (!chipcfg->get_config)
456 chipcfg->get_config = s3c_gpio_getcfg_s3c64xx_4bit;
457 if (!chipcfg->set_pull)
458 chipcfg->set_pull = s3c_gpio_setpull_updown;
459 if (!chipcfg->get_pull)
460 chipcfg->get_pull = s3c_gpio_getpull_updown;
461 }
462}
463
464static void __init s5p64x0_gpio_add_rbank_4bit2(struct s3c_gpio_chip *chip,
465 int nr_chips)
466{
467 for (; nr_chips > 0; nr_chips--, chip++) {
468 chip->chip.direction_input = s5p64x0_gpiolib_rbank_4bit2_input;
469 chip->chip.direction_output =
470 s5p64x0_gpiolib_rbank_4bit2_output;
471 s3c_gpiolib_add(chip);
472 }
473}
474
475static int __init s5p64x0_gpiolib_init(void)
476{
477 s5p64x0_gpiolib_set_cfg(s5p64x0_gpio_cfgs,
478 ARRAY_SIZE(s5p64x0_gpio_cfgs));
479
480 if (soc_is_s5p6450()) {
481 samsung_gpiolib_add_2bit_chips(s5p6450_gpio_2bit,
482 ARRAY_SIZE(s5p6450_gpio_2bit));
483
484 samsung_gpiolib_add_4bit_chips(s5p6450_gpio_4bit,
485 ARRAY_SIZE(s5p6450_gpio_4bit));
486
487 samsung_gpiolib_add_4bit2_chips(s5p6450_gpio_4bit2,
488 ARRAY_SIZE(s5p6450_gpio_4bit2));
489
490 s5p64x0_gpio_add_rbank_4bit2(s5p6450_gpio_rbank_4bit2,
491 ARRAY_SIZE(s5p6450_gpio_rbank_4bit2));
492 } else {
493 samsung_gpiolib_add_2bit_chips(s5p6440_gpio_2bit,
494 ARRAY_SIZE(s5p6440_gpio_2bit));
495
496 samsung_gpiolib_add_4bit_chips(s5p6440_gpio_4bit,
497 ARRAY_SIZE(s5p6440_gpio_4bit));
498
499 samsung_gpiolib_add_4bit2_chips(s5p6440_gpio_4bit2,
500 ARRAY_SIZE(s5p6440_gpio_4bit2));
501
502 s5p64x0_gpio_add_rbank_4bit2(s5p6440_gpio_rbank_4bit2,
503 ARRAY_SIZE(s5p6440_gpio_rbank_4bit2));
504 }
505
506 return 0;
507}
508core_initcall(s5p64x0_gpiolib_init);
diff --git a/arch/arm/mach-s5p64x0/include/mach/i2c.h b/arch/arm/mach-s5p64x0/i2c.h
index 887d25209e8e..1e5bb4ea200d 100644
--- a/arch/arm/mach-s5p64x0/include/mach/i2c.h
+++ b/arch/arm/mach-s5p64x0/i2c.h
@@ -1,5 +1,4 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/i2c.h 1/*
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd. 2 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com 3 * http://www.samsung.com
5 * 4 *
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index a40d5eb38124..e23723a5a214 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -37,7 +37,6 @@
37#include <mach/hardware.h> 37#include <mach/hardware.h>
38#include <mach/map.h> 38#include <mach/map.h>
39#include <mach/regs-clock.h> 39#include <mach/regs-clock.h>
40#include <mach/i2c.h>
41#include <mach/regs-gpio.h> 40#include <mach/regs-gpio.h>
42 41
43#include <plat/regs-serial.h> 42#include <plat/regs-serial.h>
@@ -55,6 +54,7 @@
55#include <plat/sdhci.h> 54#include <plat/sdhci.h>
56 55
57#include "common.h" 56#include "common.h"
57#include "i2c.h"
58 58
59#define SMDK6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 59#define SMDK6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
60 S3C2410_UCON_RXILEVEL | \ 60 S3C2410_UCON_RXILEVEL | \
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 703e576a26e0..ca10963a959e 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -37,7 +37,6 @@
37#include <mach/hardware.h> 37#include <mach/hardware.h>
38#include <mach/map.h> 38#include <mach/map.h>
39#include <mach/regs-clock.h> 39#include <mach/regs-clock.h>
40#include <mach/i2c.h>
41#include <mach/regs-gpio.h> 40#include <mach/regs-gpio.h>
42 41
43#include <plat/regs-serial.h> 42#include <plat/regs-serial.h>
@@ -55,6 +54,7 @@
55#include <plat/sdhci.h> 54#include <plat/sdhci.h>
56 55
57#include "common.h" 56#include "common.h"
57#include "i2c.h"
58 58
59#define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 59#define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
60 S3C2410_UCON_RXILEVEL | \ 60 S3C2410_UCON_RXILEVEL | \
diff --git a/arch/arm/mach-s5p64x0/setup-i2c0.c b/arch/arm/mach-s5p64x0/setup-i2c0.c
index a32edc545e6c..569b76ac98cb 100644
--- a/arch/arm/mach-s5p64x0/setup-i2c0.c
+++ b/arch/arm/mach-s5p64x0/setup-i2c0.c
@@ -21,7 +21,7 @@ struct platform_device; /* don't need the contents */
21#include <plat/gpio-cfg.h> 21#include <plat/gpio-cfg.h>
22#include <linux/platform_data/i2c-s3c2410.h> 22#include <linux/platform_data/i2c-s3c2410.h>
23 23
24#include <mach/i2c.h> 24#include "i2c.h"
25 25
26void s5p6440_i2c0_cfg_gpio(struct platform_device *dev) 26void s5p6440_i2c0_cfg_gpio(struct platform_device *dev)
27{ 27{
diff --git a/arch/arm/mach-s5p64x0/setup-i2c1.c b/arch/arm/mach-s5p64x0/setup-i2c1.c
index ca2c5c7f8aa6..867374e6d0bc 100644
--- a/arch/arm/mach-s5p64x0/setup-i2c1.c
+++ b/arch/arm/mach-s5p64x0/setup-i2c1.c
@@ -21,7 +21,7 @@ struct platform_device; /* don't need the contents */
21#include <plat/gpio-cfg.h> 21#include <plat/gpio-cfg.h>
22#include <linux/platform_data/i2c-s3c2410.h> 22#include <linux/platform_data/i2c-s3c2410.h>
23 23
24#include <mach/i2c.h> 24#include "i2c.h"
25 25
26void s5p6440_i2c1_cfg_gpio(struct platform_device *dev) 26void s5p6440_i2c1_cfg_gpio(struct platform_device *dev)
27{ 27{
diff --git a/arch/arm/mach-s5pv210/dev-audio.c b/arch/arm/mach-s5pv210/dev-audio.c
index addfb165c13d..2d67361ef431 100644
--- a/arch/arm/mach-s5pv210/dev-audio.c
+++ b/arch/arm/mach-s5pv210/dev-audio.c
@@ -18,7 +18,8 @@
18#include <mach/map.h> 18#include <mach/map.h>
19#include <mach/dma.h> 19#include <mach/dma.h>
20#include <mach/irqs.h> 20#include <mach/irqs.h>
21#include <mach/regs-audss.h> 21
22#define S5PV210_AUDSS_INT_MEM (0xC0000000)
22 23
23static int s5pv210_cfg_i2s(struct platform_device *pdev) 24static int s5pv210_cfg_i2s(struct platform_device *pdev)
24{ 25{
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-audss.h b/arch/arm/mach-s5pv210/include/mach/regs-audss.h
deleted file mode 100644
index eacc1f790807..000000000000
--- a/arch/arm/mach-s5pv210/include/mach/regs-audss.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/* arch/arm/mach-s5pv210/include/mach/regs-audss.h
2 *
3 * Copyright (c) 2011 Samsung Electronics
4 * http://www.samsung.com
5 *
6 * S5PV210 Audio SubSystem clock register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __PLAT_REGS_AUDSS_H
14#define __PLAT_REGS_AUDSS_H __FILE__
15
16#define S5PV210_AUDSS_INT_MEM (0xC0000000)
17
18#endif /* _PLAT_REGS_AUDSS_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-sys.h b/arch/arm/mach-s5pv210/include/mach/regs-sys.h
deleted file mode 100644
index cccb1eddaa38..000000000000
--- a/arch/arm/mach-s5pv210/include/mach/regs-sys.h
+++ /dev/null
@@ -1,15 +0,0 @@
1/* arch/arm/mach-s5pv210/include/mach/regs-sys.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - System registers definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#define S5PV210_USB_PHY_CON (S3C_VA_SYS + 0xE80C)
14#define S5PV210_USB_PHY0_EN (1 << 0)
15#define S5PV210_USB_PHY1_EN (1 << 1)
diff --git a/arch/arm/mach-s5pv210/setup-usb-phy.c b/arch/arm/mach-s5pv210/setup-usb-phy.c
index be39cf4aa91b..356a0900af03 100644
--- a/arch/arm/mach-s5pv210/setup-usb-phy.c
+++ b/arch/arm/mach-s5pv210/setup-usb-phy.c
@@ -12,12 +12,17 @@
12#include <linux/err.h> 12#include <linux/err.h>
13#include <linux/io.h> 13#include <linux/io.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15
15#include <mach/map.h> 16#include <mach/map.h>
16#include <mach/regs-sys.h> 17
17#include <plat/cpu.h> 18#include <plat/cpu.h>
18#include <plat/regs-usb-hsotg-phy.h> 19#include <plat/regs-usb-hsotg-phy.h>
19#include <plat/usb-phy.h> 20#include <plat/usb-phy.h>
20 21
22#define S5PV210_USB_PHY_CON (S3C_VA_SYS + 0xE80C)
23#define S5PV210_USB_PHY0_EN (1 << 0)
24#define S5PV210_USB_PHY1_EN (1 << 1)
25
21static int s5pv210_usb_otgphy_init(struct platform_device *pdev) 26static int s5pv210_usb_otgphy_init(struct platform_device *pdev)
22{ 27{
23 struct clk *xusbxti; 28 struct clk *xusbxti;
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
index f7a3ea2c498a..cf5aae5b0975 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-core.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
@@ -106,7 +106,18 @@ static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int chi
106#else 106#else
107/* machine specific code should provide samsung_gpiolib_getchip */ 107/* machine specific code should provide samsung_gpiolib_getchip */
108 108
109#include <mach/gpio-track.h> 109extern struct samsung_gpio_chip s3c24xx_gpios[];
110
111static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int pin)
112{
113 struct samsung_gpio_chip *chip;
114
115 if (pin > S3C_GPIO_END)
116 return NULL;
117
118 chip = &s3c24xx_gpios[pin/32];
119 return ((pin - chip->chip.base) < chip->chip.ngpio) ? chip : NULL;
120}
110 121
111static inline void s3c_gpiolib_track(struct samsung_gpio_chip *chip) { } 122static inline void s3c_gpiolib_track(struct samsung_gpio_chip *chip) { }
112#endif 123#endif
diff --git a/arch/arm/plat-samsung/include/plat/gpio-fns.h b/arch/arm/plat-samsung/include/plat/gpio-fns.h
deleted file mode 100644
index d1ecef0e38e0..000000000000
--- a/arch/arm/plat-samsung/include/plat/gpio-fns.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <plat/gpio-cfg.h>
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-28 17:50:12 -0500