diff options
| author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2015-02-21 09:31:22 -0500 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2015-03-30 04:39:41 -0400 |
| commit | 54a6bcb82ec06ba656f64b0ce470b26f3cd050b0 (patch) | |
| tree | a0ce2eb2343c2c466e5e56591830bd8bf56f535c /arch/arm | |
| parent | b1df649b4a765cf2e5fe7411081ed782cf27e550 (diff) | |
ARM: imx25: fix some wrong iomux definitions
Noticed while looking over the pad definitions. None of the bogus
definitions is used in-tree.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/imx25-pinfunc.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/imx25-pinfunc.h b/arch/arm/boot/dts/imx25-pinfunc.h index 88eebb15da6a..957cf506e066 100644 --- a/arch/arm/boot/dts/imx25-pinfunc.h +++ b/arch/arm/boot/dts/imx25-pinfunc.h | |||
| @@ -40,7 +40,7 @@ | |||
| 40 | #define MX25_PAD_A18__FEC_COL 0x020 0x23c 0x504 0x17 0x000 | 40 | #define MX25_PAD_A18__FEC_COL 0x020 0x23c 0x504 0x17 0x000 |
| 41 | 41 | ||
| 42 | #define MX25_PAD_A19__A19 0x024 0x240 0x000 0x10 0x000 | 42 | #define MX25_PAD_A19__A19 0x024 0x240 0x000 0x10 0x000 |
| 43 | #define MX25_PAD_A19__FEC_RX_ER 0x024 0x240 0x518 0x17 0x000 | 43 | #define MX25_PAD_A19__FEC_RX_ERR 0x024 0x240 0x518 0x17 0x000 |
| 44 | #define MX25_PAD_A19__GPIO_2_5 0x024 0x240 0x000 0x15 0x000 | 44 | #define MX25_PAD_A19__GPIO_2_5 0x024 0x240 0x000 0x15 0x000 |
| 45 | 45 | ||
| 46 | #define MX25_PAD_A20__A20 0x028 0x244 0x000 0x10 0x000 | 46 | #define MX25_PAD_A20__A20 0x028 0x244 0x000 0x10 0x000 |
| @@ -217,7 +217,7 @@ | |||
| 217 | #define MX25_PAD_LD9__FEC_COL 0x0ec 0x2e4 0x504 0x15 0x001 | 217 | #define MX25_PAD_LD9__FEC_COL 0x0ec 0x2e4 0x504 0x15 0x001 |
| 218 | 218 | ||
| 219 | #define MX25_PAD_LD10__LD10 0x0f0 0x2e8 0x000 0x10 0x000 | 219 | #define MX25_PAD_LD10__LD10 0x0f0 0x2e8 0x000 0x10 0x000 |
| 220 | #define MX25_PAD_LD10__FEC_RX_ER 0x0f0 0x2e8 0x518 0x15 0x001 | 220 | #define MX25_PAD_LD10__FEC_RX_ERR 0x0f0 0x2e8 0x518 0x15 0x001 |
| 221 | 221 | ||
| 222 | #define MX25_PAD_LD11__LD11 0x0f4 0x2ec 0x000 0x10 0x000 | 222 | #define MX25_PAD_LD11__LD11 0x0f4 0x2ec 0x000 0x10 0x000 |
| 223 | #define MX25_PAD_LD11__FEC_RDATA2 0x0f4 0x2ec 0x50c 0x15 0x001 | 223 | #define MX25_PAD_LD11__FEC_RDATA2 0x0f4 0x2ec 0x50c 0x15 0x001 |
| @@ -369,7 +369,7 @@ | |||
| 369 | #define MX25_PAD_UART2_RTS__CC1 0x188 0x380 0x000 0x13 0x000 | 369 | #define MX25_PAD_UART2_RTS__CC1 0x188 0x380 0x000 0x13 0x000 |
| 370 | #define MX25_PAD_UART2_RTS__GPIO_4_28 0x188 0x380 0x000 0x15 0x000 | 370 | #define MX25_PAD_UART2_RTS__GPIO_4_28 0x188 0x380 0x000 0x15 0x000 |
| 371 | 371 | ||
| 372 | #define MX25_PAD_UART2_CTS__FEC_RX_ER 0x18c 0x384 0x518 0x12 0x002 | 372 | #define MX25_PAD_UART2_CTS__FEC_RX_ERR 0x18c 0x384 0x518 0x12 0x002 |
| 373 | #define MX25_PAD_UART2_CTS__UART2_CTS 0x18c 0x384 0x000 0x10 0x000 | 373 | #define MX25_PAD_UART2_CTS__UART2_CTS 0x18c 0x384 0x000 0x10 0x000 |
| 374 | #define MX25_PAD_UART2_CTS__GPIO_4_29 0x18c 0x384 0x000 0x15 0x000 | 374 | #define MX25_PAD_UART2_CTS__GPIO_4_29 0x18c 0x384 0x000 0x15 0x000 |
| 375 | 375 | ||
| @@ -392,11 +392,11 @@ | |||
| 392 | #define MX25_PAD_SD1_DATA1__GPIO_2_26 0x19c 0x394 0x000 0x15 0x000 | 392 | #define MX25_PAD_SD1_DATA1__GPIO_2_26 0x19c 0x394 0x000 0x15 0x000 |
| 393 | 393 | ||
| 394 | #define MX25_PAD_SD1_DATA2__SD1_DATA2 0x1a0 0x398 0x000 0x10 0x000 | 394 | #define MX25_PAD_SD1_DATA2__SD1_DATA2 0x1a0 0x398 0x000 0x10 0x000 |
| 395 | #define MX25_PAD_SD1_DATA2__FEC_RX_CLK 0x1a0 0x398 0x514 0x15 0x002 | 395 | #define MX25_PAD_SD1_DATA2__FEC_RX_CLK 0x1a0 0x398 0x514 0x12 0x002 |
| 396 | #define MX25_PAD_SD1_DATA2__GPIO_2_27 0x1a0 0x398 0x000 0x15 0x000 | 396 | #define MX25_PAD_SD1_DATA2__GPIO_2_27 0x1a0 0x398 0x000 0x15 0x000 |
| 397 | 397 | ||
| 398 | #define MX25_PAD_SD1_DATA3__SD1_DATA3 0x1a4 0x39c 0x000 0x10 0x000 | 398 | #define MX25_PAD_SD1_DATA3__SD1_DATA3 0x1a4 0x39c 0x000 0x10 0x000 |
| 399 | #define MX25_PAD_SD1_DATA3__FEC_CRS 0x1a4 0x39c 0x508 0x10 0x002 | 399 | #define MX25_PAD_SD1_DATA3__FEC_CRS 0x1a4 0x39c 0x508 0x12 0x002 |
| 400 | #define MX25_PAD_SD1_DATA3__GPIO_2_28 0x1a4 0x39c 0x000 0x15 0x000 | 400 | #define MX25_PAD_SD1_DATA3__GPIO_2_28 0x1a4 0x39c 0x000 0x15 0x000 |
| 401 | 401 | ||
| 402 | #define MX25_PAD_KPP_ROW0__KPP_ROW0 0x1a8 0x3a0 0x000 0x10 0x000 | 402 | #define MX25_PAD_KPP_ROW0__KPP_ROW0 0x1a8 0x3a0 0x000 0x10 0x000 |
| @@ -410,7 +410,7 @@ | |||
| 410 | #define MX25_PAD_KPP_ROW2__GPIO_2_31 0x1b0 0x3a8 0x000 0x15 0x000 | 410 | #define MX25_PAD_KPP_ROW2__GPIO_2_31 0x1b0 0x3a8 0x000 0x15 0x000 |
| 411 | 411 | ||
| 412 | #define MX25_PAD_KPP_ROW3__KPP_ROW3 0x1b4 0x3ac 0x000 0x10 0x000 | 412 | #define MX25_PAD_KPP_ROW3__KPP_ROW3 0x1b4 0x3ac 0x000 0x10 0x000 |
| 413 | #define MX25_PAD_KPP_ROW3__CSI_LD1 0x1b4 0x3ac 0x48c 0x13 0x002 | 413 | #define MX25_PAD_KPP_ROW3__CSI_D1 0x1b4 0x3ac 0x48c 0x13 0x002 |
| 414 | #define MX25_PAD_KPP_ROW3__GPIO_3_0 0x1b4 0x3ac 0x000 0x15 0x000 | 414 | #define MX25_PAD_KPP_ROW3__GPIO_3_0 0x1b4 0x3ac 0x000 0x15 0x000 |
| 415 | 415 | ||
| 416 | #define MX25_PAD_KPP_COL0__KPP_COL0 0x1b8 0x3b0 0x000 0x10 0x000 | 416 | #define MX25_PAD_KPP_COL0__KPP_COL0 0x1b8 0x3b0 0x000 0x10 0x000 |