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authorLinus Torvalds <torvalds@linux-foundation.org>2013-06-08 14:56:22 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-06-08 14:56:22 -0400
commit50b4b9c3e84a6ef2ba02e6e41ec221b0c84abf56 (patch)
tree6edde1867cc1c081e72e744900b34579e9167e46 /arch/arm
parent554e6e9f816bdf08c2962e6f003f8298c935646b (diff)
parent090878aa951628143f40a1acc19ec074a5ae9200 (diff)
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson: "Another week, another batch of fixes for arm-soc platforms. Nothing controversial here, a handful of fixes for regressions and/or serious problems across several of the platforms. Things are slowing down nicely on fix rates for 3.10" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: exynos: add debug_ll_io_init() call in exynos_init_io() ARM: EXYNOS: uncompress - print debug messages if DEBUG_LL is defined ARM: shmobile: sh73a0: Update CMT clockevent rating to 80 sh-pfc: r8a7779: Don't group USB OVC and PENC pins ARM: mxs: icoll: Fix interrupts gpio bank 0 ARM: imx: clk-imx6q: AXI clock select index is incorrect ARM: bcm2835: override the HW UART periphid ARM: mvebu: Fix bug in coherency fabric low level init function ARM: Kirkwood: TS219: Fix crash by double PCIe instantiation ARM: ux500: Provide supplies for AUX1, AUX2 and AUX3 ARM: ux500: Only configure wake-up reasons on ux500 based platforms ARM: dts: imx: fix clocks for cspi ARM i.MX6q: fix for ldb_di_sels
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/bcm2835.dtsi1
-rw-r--r--arch/arm/boot/dts/imx25.dtsi12
-rw-r--r--arch/arm/boot/dts/imx27.dtsi6
-rw-r--r--arch/arm/boot/dts/imx51.dtsi2
-rw-r--r--arch/arm/boot/dts/imx53.dtsi2
-rw-r--r--arch/arm/mach-exynos/common.c2
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c4
-rw-r--r--arch/arm/mach-kirkwood/board-ts219.c10
-rw-r--r--arch/arm/mach-mvebu/coherency_ll.S16
-rw-r--r--arch/arm/mach-shmobile/setup-sh73a0.c2
-rw-r--r--arch/arm/mach-ux500/board-mop500-regulators.c3
-rw-r--r--arch/arm/mach-ux500/cpuidle.c4
-rw-r--r--arch/arm/plat-samsung/include/plat/uncompress.h10
13 files changed, 44 insertions, 30 deletions
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index f0052dccf9a8..1e12aeff403b 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -44,6 +44,7 @@
44 reg = <0x7e201000 0x1000>; 44 reg = <0x7e201000 0x1000>;
45 interrupts = <2 25>; 45 interrupts = <2 25>;
46 clock-frequency = <3000000>; 46 clock-frequency = <3000000>;
47 arm,primecell-periphid = <0x00241011>;
47 }; 48 };
48 49
49 gpio: gpio { 50 gpio: gpio {
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
index d2550e0bca24..701153992c69 100644
--- a/arch/arm/boot/dts/imx25.dtsi
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -141,8 +141,8 @@
141 #size-cells = <0>; 141 #size-cells = <0>;
142 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 142 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
143 reg = <0x43fa4000 0x4000>; 143 reg = <0x43fa4000 0x4000>;
144 clocks = <&clks 62>; 144 clocks = <&clks 62>, <&clks 62>;
145 clock-names = "ipg"; 145 clock-names = "ipg", "per";
146 interrupts = <14>; 146 interrupts = <14>;
147 status = "disabled"; 147 status = "disabled";
148 }; 148 };
@@ -182,8 +182,8 @@
182 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 182 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
183 reg = <0x50004000 0x4000>; 183 reg = <0x50004000 0x4000>;
184 interrupts = <0>; 184 interrupts = <0>;
185 clocks = <&clks 80>; 185 clocks = <&clks 80>, <&clks 80>;
186 clock-names = "ipg"; 186 clock-names = "ipg", "per";
187 status = "disabled"; 187 status = "disabled";
188 }; 188 };
189 189
@@ -210,8 +210,8 @@
210 #size-cells = <0>; 210 #size-cells = <0>;
211 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 211 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
212 reg = <0x50010000 0x4000>; 212 reg = <0x50010000 0x4000>;
213 clocks = <&clks 79>; 213 clocks = <&clks 79>, <&clks 79>;
214 clock-names = "ipg"; 214 clock-names = "ipg", "per";
215 interrupts = <13>; 215 interrupts = <13>;
216 status = "disabled"; 216 status = "disabled";
217 }; 217 };
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index ff4bd4873edf..75bd11386516 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -131,7 +131,7 @@
131 compatible = "fsl,imx27-cspi"; 131 compatible = "fsl,imx27-cspi";
132 reg = <0x1000e000 0x1000>; 132 reg = <0x1000e000 0x1000>;
133 interrupts = <16>; 133 interrupts = <16>;
134 clocks = <&clks 53>, <&clks 0>; 134 clocks = <&clks 53>, <&clks 53>;
135 clock-names = "ipg", "per"; 135 clock-names = "ipg", "per";
136 status = "disabled"; 136 status = "disabled";
137 }; 137 };
@@ -142,7 +142,7 @@
142 compatible = "fsl,imx27-cspi"; 142 compatible = "fsl,imx27-cspi";
143 reg = <0x1000f000 0x1000>; 143 reg = <0x1000f000 0x1000>;
144 interrupts = <15>; 144 interrupts = <15>;
145 clocks = <&clks 52>, <&clks 0>; 145 clocks = <&clks 52>, <&clks 52>;
146 clock-names = "ipg", "per"; 146 clock-names = "ipg", "per";
147 status = "disabled"; 147 status = "disabled";
148 }; 148 };
@@ -223,7 +223,7 @@
223 compatible = "fsl,imx27-cspi"; 223 compatible = "fsl,imx27-cspi";
224 reg = <0x10017000 0x1000>; 224 reg = <0x10017000 0x1000>;
225 interrupts = <6>; 225 interrupts = <6>;
226 clocks = <&clks 51>, <&clks 0>; 226 clocks = <&clks 51>, <&clks 51>;
227 clock-names = "ipg", "per"; 227 clock-names = "ipg", "per";
228 status = "disabled"; 228 status = "disabled";
229 }; 229 };
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 21bb786c5b31..53fdde69bbf4 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -631,7 +631,7 @@
631 compatible = "fsl,imx51-cspi", "fsl,imx35-cspi"; 631 compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
632 reg = <0x83fc0000 0x4000>; 632 reg = <0x83fc0000 0x4000>;
633 interrupts = <38>; 633 interrupts = <38>;
634 clocks = <&clks 55>, <&clks 0>; 634 clocks = <&clks 55>, <&clks 55>;
635 clock-names = "ipg", "per"; 635 clock-names = "ipg", "per";
636 status = "disabled"; 636 status = "disabled";
637 }; 637 };
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 845982eaac22..eb83aa039b8b 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -714,7 +714,7 @@
714 compatible = "fsl,imx53-cspi", "fsl,imx35-cspi"; 714 compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";
715 reg = <0x63fc0000 0x4000>; 715 reg = <0x63fc0000 0x4000>;
716 interrupts = <38>; 716 interrupts = <38>;
717 clocks = <&clks 55>, <&clks 0>; 717 clocks = <&clks 55>, <&clks 55>;
718 clock-names = "ipg", "per"; 718 clock-names = "ipg", "per";
719 status = "disabled"; 719 status = "disabled";
720 }; 720 };
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 027c9e7f0d13..f7e504b7874d 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -386,6 +386,8 @@ int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
386 386
387void __init exynos_init_io(struct map_desc *mach_desc, int size) 387void __init exynos_init_io(struct map_desc *mach_desc, int size)
388{ 388{
389 debug_ll_io_init();
390
389#ifdef CONFIG_OF 391#ifdef CONFIG_OF
390 if (initial_boot_params) 392 if (initial_boot_params)
391 of_scan_flat_dt(exynos_fdt_map_chipid, NULL); 393 of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index dda9a2bd3acb..4e3148ce852d 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -181,14 +181,14 @@ static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", "osc", "dummy",
181static const char *periph2_clk2_sels[] = { "pll3_usb_otg", "pll2_bus", }; 181static const char *periph2_clk2_sels[] = { "pll3_usb_otg", "pll2_bus", };
182static const char *periph_sels[] = { "periph_pre", "periph_clk2", }; 182static const char *periph_sels[] = { "periph_pre", "periph_clk2", };
183static const char *periph2_sels[] = { "periph2_pre", "periph2_clk2", }; 183static const char *periph2_sels[] = { "periph2_pre", "periph2_clk2", };
184static const char *axi_sels[] = { "periph", "pll2_pfd2_396m", "pll3_pfd1_540m", }; 184static const char *axi_sels[] = { "periph", "pll2_pfd2_396m", "periph", "pll3_pfd1_540m", };
185static const char *audio_sels[] = { "pll4_post_div", "pll3_pfd2_508m", "pll3_pfd3_454m", "pll3_usb_otg", }; 185static const char *audio_sels[] = { "pll4_post_div", "pll3_pfd2_508m", "pll3_pfd3_454m", "pll3_usb_otg", };
186static const char *gpu_axi_sels[] = { "axi", "ahb", }; 186static const char *gpu_axi_sels[] = { "axi", "ahb", };
187static const char *gpu2d_core_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd0_352m", "pll2_pfd2_396m", }; 187static const char *gpu2d_core_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd0_352m", "pll2_pfd2_396m", };
188static const char *gpu3d_core_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", }; 188static const char *gpu3d_core_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", };
189static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll3_pfd0_720m", }; 189static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll3_pfd0_720m", };
190static const char *ipu_sels[] = { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", }; 190static const char *ipu_sels[] = { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", };
191static const char *ldb_di_sels[] = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_usb_otg", }; 191static const char *ldb_di_sels[] = { "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_usb_otg", };
192static const char *ipu_di_pre_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", }; 192static const char *ipu_di_pre_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", };
193static const char *ipu1_di0_sels[] = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", }; 193static const char *ipu1_di0_sels[] = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
194static const char *ipu1_di1_sels[] = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", }; 194static const char *ipu1_di1_sels[] = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
diff --git a/arch/arm/mach-kirkwood/board-ts219.c b/arch/arm/mach-kirkwood/board-ts219.c
index acb0187c7ee1..4695d5f35fc9 100644
--- a/arch/arm/mach-kirkwood/board-ts219.c
+++ b/arch/arm/mach-kirkwood/board-ts219.c
@@ -41,13 +41,3 @@ void __init qnap_dt_ts219_init(void)
41 41
42 pm_power_off = qnap_tsx1x_power_off; 42 pm_power_off = qnap_tsx1x_power_off;
43} 43}
44
45/* FIXME: Will not work with DT. Maybe use MPP40_GPIO? */
46static int __init ts219_pci_init(void)
47{
48 if (machine_is_ts219())
49 kirkwood_pcie_init(KW_PCIE0);
50
51 return 0;
52}
53subsys_initcall(ts219_pci_init);
diff --git a/arch/arm/mach-mvebu/coherency_ll.S b/arch/arm/mach-mvebu/coherency_ll.S
index 53e8391192cd..5476669ba905 100644
--- a/arch/arm/mach-mvebu/coherency_ll.S
+++ b/arch/arm/mach-mvebu/coherency_ll.S
@@ -32,15 +32,21 @@ ENTRY(ll_set_cpu_coherent)
32 32
33 /* Add CPU to SMP group - Atomic */ 33 /* Add CPU to SMP group - Atomic */
34 add r3, r0, #ARMADA_XP_CFB_CTL_REG_OFFSET 34 add r3, r0, #ARMADA_XP_CFB_CTL_REG_OFFSET
35 ldr r2, [r3] 351:
36 ldrex r2, [r3]
36 orr r2, r2, r1 37 orr r2, r2, r1
37 str r2, [r3] 38 strex r0, r2, [r3]
39 cmp r0, #0
40 bne 1b
38 41
39 /* Enable coherency on CPU - Atomic */ 42 /* Enable coherency on CPU - Atomic */
40 add r3, r0, #ARMADA_XP_CFB_CFG_REG_OFFSET 43 add r3, r3, #ARMADA_XP_CFB_CFG_REG_OFFSET
41 ldr r2, [r3] 441:
45 ldrex r2, [r3]
42 orr r2, r2, r1 46 orr r2, r2, r1
43 str r2, [r3] 47 strex r0, r2, [r3]
48 cmp r0, #0
49 bne 1b
44 50
45 dsb 51 dsb
46 52
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index fdf3894b1cc3..9696f3646864 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -252,7 +252,7 @@ static struct sh_timer_config cmt10_platform_data = {
252 .name = "CMT10", 252 .name = "CMT10",
253 .channel_offset = 0x10, 253 .channel_offset = 0x10,
254 .timer_bit = 0, 254 .timer_bit = 0,
255 .clockevent_rating = 125, 255 .clockevent_rating = 80,
256 .clocksource_rating = 125, 256 .clocksource_rating = 125,
257}; 257};
258 258
diff --git a/arch/arm/mach-ux500/board-mop500-regulators.c b/arch/arm/mach-ux500/board-mop500-regulators.c
index 33c353bc1c4a..d6b7c8556fa1 100644
--- a/arch/arm/mach-ux500/board-mop500-regulators.c
+++ b/arch/arm/mach-ux500/board-mop500-regulators.c
@@ -374,6 +374,7 @@ static struct ab8500_regulator_reg_init ab8500_reg_init[] = {
374static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = { 374static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
375 /* supplies to the display/camera */ 375 /* supplies to the display/camera */
376 [AB8500_LDO_AUX1] = { 376 [AB8500_LDO_AUX1] = {
377 .supply_regulator = "ab8500-ext-supply3",
377 .constraints = { 378 .constraints = {
378 .name = "V-DISPLAY", 379 .name = "V-DISPLAY",
379 .min_uV = 2800000, 380 .min_uV = 2800000,
@@ -387,6 +388,7 @@ static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
387 }, 388 },
388 /* supplies to the on-board eMMC */ 389 /* supplies to the on-board eMMC */
389 [AB8500_LDO_AUX2] = { 390 [AB8500_LDO_AUX2] = {
391 .supply_regulator = "ab8500-ext-supply3",
390 .constraints = { 392 .constraints = {
391 .name = "V-eMMC1", 393 .name = "V-eMMC1",
392 .min_uV = 1100000, 394 .min_uV = 1100000,
@@ -402,6 +404,7 @@ static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
402 }, 404 },
403 /* supply for VAUX3, supplies to SDcard slots */ 405 /* supply for VAUX3, supplies to SDcard slots */
404 [AB8500_LDO_AUX3] = { 406 [AB8500_LDO_AUX3] = {
407 .supply_regulator = "ab8500-ext-supply3",
405 .constraints = { 408 .constraints = {
406 .name = "V-MMC-SD", 409 .name = "V-MMC-SD",
407 .min_uV = 1100000, 410 .min_uV = 1100000,
diff --git a/arch/arm/mach-ux500/cpuidle.c b/arch/arm/mach-ux500/cpuidle.c
index 317a2be129fb..a45dd09daed9 100644
--- a/arch/arm/mach-ux500/cpuidle.c
+++ b/arch/arm/mach-ux500/cpuidle.c
@@ -21,6 +21,7 @@
21#include <asm/proc-fns.h> 21#include <asm/proc-fns.h>
22 22
23#include "db8500-regs.h" 23#include "db8500-regs.h"
24#include "id.h"
24 25
25static atomic_t master = ATOMIC_INIT(0); 26static atomic_t master = ATOMIC_INIT(0);
26static DEFINE_SPINLOCK(master_lock); 27static DEFINE_SPINLOCK(master_lock);
@@ -114,6 +115,9 @@ static struct cpuidle_driver ux500_idle_driver = {
114 115
115int __init ux500_idle_init(void) 116int __init ux500_idle_init(void)
116{ 117{
118 if (!(cpu_is_u8500_family() || cpu_is_ux540_family()))
119 return -ENODEV;
120
117 /* Configure wake up reasons */ 121 /* Configure wake up reasons */
118 prcmu_enable_wakeups(PRCMU_WAKEUP(ARM) | PRCMU_WAKEUP(RTC) | 122 prcmu_enable_wakeups(PRCMU_WAKEUP(ARM) | PRCMU_WAKEUP(RTC) |
119 PRCMU_WAKEUP(ABB)); 123 PRCMU_WAKEUP(ABB));
diff --git a/arch/arm/plat-samsung/include/plat/uncompress.h b/arch/arm/plat-samsung/include/plat/uncompress.h
index 438b24846e7f..02b66d723d1a 100644
--- a/arch/arm/plat-samsung/include/plat/uncompress.h
+++ b/arch/arm/plat-samsung/include/plat/uncompress.h
@@ -66,6 +66,9 @@ uart_rd(unsigned int reg)
66 66
67static void putc(int ch) 67static void putc(int ch)
68{ 68{
69 if (!config_enabled(CONFIG_DEBUG_LL))
70 return;
71
69 if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) { 72 if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
70 int level; 73 int level;
71 74
@@ -118,7 +121,12 @@ static void arch_decomp_error(const char *x)
118#ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO 121#ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO
119static inline void arch_enable_uart_fifo(void) 122static inline void arch_enable_uart_fifo(void)
120{ 123{
121 u32 fifocon = uart_rd(S3C2410_UFCON); 124 u32 fifocon;
125
126 if (!config_enabled(CONFIG_DEBUG_LL))
127 return;
128
129 fifocon = uart_rd(S3C2410_UFCON);
122 130
123 if (!(fifocon & S3C2410_UFCON_FIFOMODE)) { 131 if (!(fifocon & S3C2410_UFCON_FIFOMODE)) {
124 fifocon |= S3C2410_UFCON_RESETBOTH; 132 fifocon |= S3C2410_UFCON_RESETBOTH;