aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
authorRussell King <rmk+kernel@arm.linux.org.uk>2015-04-14 17:28:32 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2015-04-14 17:28:32 -0400
commit4b2f8838479eb2abe042e094f7d2cced6d5ea772 (patch)
tree5ef3236b354a494c8d71a572896283e44989c696 /arch/arm
parentc848791f0336914a3081ea3fe029cf177d81de81 (diff)
parent9fd85eb502a78bd812db58bd1f668b2a06ee30a5 (diff)
Merge branch 'devel-stable' into for-next
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Makefile1
-rw-r--r--arch/arm/boot/dts/am335x-bone-common.dtsi9
-rw-r--r--arch/arm/boot/dts/am335x-bone.dts8
-rw-r--r--arch/arm/boot/dts/am335x-lxm.dts4
-rw-r--r--arch/arm/boot/dts/am33xx-clocks.dtsi6
-rw-r--r--arch/arm/boot/dts/am437x-idk-evm.dts25
-rw-r--r--arch/arm/boot/dts/am43xx-clocks.dtsi12
-rw-r--r--arch/arm/boot/dts/am57xx-beagle-x15.dts8
-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi7
-rw-r--r--arch/arm/boot/dts/at91sam9261.dtsi9
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi5
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi3
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi1
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi5
-rw-r--r--arch/arm/boot/dts/dm8168-evm.dts25
-rw-r--r--arch/arm/boot/dts/dm816x.dtsi34
-rw-r--r--arch/arm/boot/dts/dra7-evm.dts18
-rw-r--r--arch/arm/boot/dts/dra7.dtsi8
-rw-r--r--arch/arm/boot/dts/dra72-evm.dts18
-rw-r--r--arch/arm/boot/dts/dra7xx-clocks.dtsi90
-rw-r--r--arch/arm/boot/dts/exynos3250.dtsi2
-rw-r--r--arch/arm/boot/dts/exynos4-cpu-thermal.dtsi52
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi45
-rw-r--r--arch/arm/boot/dts/exynos4210-trats.dts19
-rw-r--r--arch/arm/boot/dts/exynos4210-universal_c210.dts57
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi38
-rw-r--r--arch/arm/boot/dts/exynos4212.dtsi5
-rw-r--r--arch/arm/boot/dts/exynos4412-odroid-common.dtsi64
-rw-r--r--arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi24
-rw-r--r--arch/arm/boot/dts/exynos4412-trats2.dts15
-rw-r--r--arch/arm/boot/dts/exynos4412.dtsi5
-rw-r--r--arch/arm/boot/dts/exynos4x12.dtsi12
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi44
-rw-r--r--arch/arm/boot/dts/exynos5420-trip-points.dtsi35
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi33
-rw-r--r--arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi24
-rw-r--r--arch/arm/boot/dts/exynos5440-trip-points.dtsi25
-rw-r--r--arch/arm/boot/dts/exynos5440.dtsi18
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabresd.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6sl-evk.dts2
-rw-r--r--arch/arm/boot/dts/omap2.dtsi4
-rw-r--r--arch/arm/boot/dts/omap3-n900.dts9
-rw-r--r--arch/arm/boot/dts/omap3.dtsi4
-rw-r--r--arch/arm/boot/dts/omap4.dtsi4
-rw-r--r--arch/arm/boot/dts/omap5-core-thermal.dtsi2
-rw-r--r--arch/arm/boot/dts/omap5-gpu-thermal.dtsi2
-rw-r--r--arch/arm/boot/dts/omap5.dtsi12
-rw-r--r--arch/arm/boot/dts/omap54xx-clocks.dtsi41
-rw-r--r--arch/arm/boot/dts/sama5d3.dtsi3
-rw-r--r--arch/arm/boot/dts/sama5d4.dtsi9
-rw-r--r--arch/arm/boot/dts/socfpga.dtsi6
-rw-r--r--arch/arm/configs/at91_dt_defconfig1
-rw-r--r--arch/arm/configs/multi_v7_defconfig84
-rw-r--r--arch/arm/configs/omap2plus_defconfig5
-rw-r--r--arch/arm/configs/sama5_defconfig2
-rw-r--r--arch/arm/configs/sunxi_defconfig1
-rw-r--r--arch/arm/configs/vexpress_defconfig2
-rw-r--r--arch/arm/include/asm/kvm_mmu.h2
-rw-r--r--arch/arm/include/asm/pmu.h1
-rw-r--r--arch/arm/include/debug/at91.S5
-rw-r--r--arch/arm/kernel/perf_event.c21
-rw-r--r--arch/arm/kernel/perf_event_cpu.c71
-rw-r--r--arch/arm/kernel/perf_event_v7.c525
-rw-r--r--arch/arm/kvm/arm.c2
-rw-r--r--arch/arm/kvm/trace.h10
-rw-r--r--arch/arm/mach-asm9260/Kconfig2
-rw-r--r--arch/arm/mach-at91/pm.c22
-rw-r--r--arch/arm/mach-at91/pm.h2
-rw-r--r--arch/arm/mach-at91/pm_slowclock.S80
-rw-r--r--arch/arm/mach-exynos/platsmp.c3
-rw-r--r--arch/arm/mach-exynos/pm_domains.c28
-rw-r--r--arch/arm/mach-exynos/suspend.c4
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c5
-rw-r--r--arch/arm/mach-msm/board-halibut.c8
-rw-r--r--arch/arm/mach-msm/board-qsd8x50.c8
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c10
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.h1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_7xx_data.c103
-rw-r--r--arch/arm/mach-omap2/pdata-quirks.c1
-rw-r--r--arch/arm/mach-omap2/prm44xx.c4
-rw-r--r--arch/arm/mach-pxa/idp.c6
-rw-r--r--arch/arm/mach-pxa/lpd270.c8
-rw-r--r--arch/arm/mach-realview/core.c7
-rw-r--r--arch/arm/mach-realview/realview_eb.c2
-rw-r--r--arch/arm/mach-sa1100/neponset.c6
-rw-r--r--arch/arm/mach-sa1100/pleb.c7
-rw-r--r--arch/arm/mach-socfpga/core.h2
-rw-r--r--arch/arm/mach-socfpga/socfpga.c5
-rw-r--r--arch/arm/mach-sti/board-dt.c1
89 files changed, 1594 insertions, 376 deletions
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index e9d1fd6067c6..5575d9fa8806 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -150,6 +150,7 @@ machine-$(CONFIG_ARCH_BERLIN) += berlin
150machine-$(CONFIG_ARCH_CLPS711X) += clps711x 150machine-$(CONFIG_ARCH_CLPS711X) += clps711x
151machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx 151machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx
152machine-$(CONFIG_ARCH_DAVINCI) += davinci 152machine-$(CONFIG_ARCH_DAVINCI) += davinci
153machine-$(CONFIG_ARCH_DIGICOLOR) += digicolor
153machine-$(CONFIG_ARCH_DOVE) += dove 154machine-$(CONFIG_ARCH_DOVE) += dove
154machine-$(CONFIG_ARCH_EBSA110) += ebsa110 155machine-$(CONFIG_ARCH_EBSA110) += ebsa110
155machine-$(CONFIG_ARCH_EFM32) += efm32 156machine-$(CONFIG_ARCH_EFM32) += efm32
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index 6cc25ed912ee..c3255e0c90aa 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -195,6 +195,7 @@
195 195
196&usb0 { 196&usb0 {
197 status = "okay"; 197 status = "okay";
198 dr_mode = "peripheral";
198}; 199};
199 200
200&usb1 { 201&usb1 {
@@ -300,3 +301,11 @@
300 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 301 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
301 cd-inverted; 302 cd-inverted;
302}; 303};
304
305&aes {
306 status = "okay";
307};
308
309&sham {
310 status = "okay";
311};
diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
index 83d40f7655e5..6b8493720424 100644
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -24,11 +24,3 @@
24&mmc1 { 24&mmc1 {
25 vmmc-supply = <&ldo3_reg>; 25 vmmc-supply = <&ldo3_reg>;
26}; 26};
27
28&sham {
29 status = "okay";
30};
31
32&aes {
33 status = "okay";
34};
diff --git a/arch/arm/boot/dts/am335x-lxm.dts b/arch/arm/boot/dts/am335x-lxm.dts
index 7266a00aab2e..5c5667a3624d 100644
--- a/arch/arm/boot/dts/am335x-lxm.dts
+++ b/arch/arm/boot/dts/am335x-lxm.dts
@@ -328,6 +328,10 @@
328 dual_emac_res_vlan = <3>; 328 dual_emac_res_vlan = <3>;
329}; 329};
330 330
331&phy_sel {
332 rmii-clock-ext;
333};
334
331&mac { 335&mac {
332 pinctrl-names = "default", "sleep"; 336 pinctrl-names = "default", "sleep";
333 pinctrl-0 = <&cpsw_default>; 337 pinctrl-0 = <&cpsw_default>;
diff --git a/arch/arm/boot/dts/am33xx-clocks.dtsi b/arch/arm/boot/dts/am33xx-clocks.dtsi
index 712edce7d6fb..071b56aa0c7e 100644
--- a/arch/arm/boot/dts/am33xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am33xx-clocks.dtsi
@@ -99,7 +99,7 @@
99 ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 { 99 ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 {
100 #clock-cells = <0>; 100 #clock-cells = <0>;
101 compatible = "ti,gate-clock"; 101 compatible = "ti,gate-clock";
102 clocks = <&dpll_per_m2_ck>; 102 clocks = <&l4ls_gclk>;
103 ti,bit-shift = <0>; 103 ti,bit-shift = <0>;
104 reg = <0x0664>; 104 reg = <0x0664>;
105 }; 105 };
@@ -107,7 +107,7 @@
107 ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 { 107 ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 {
108 #clock-cells = <0>; 108 #clock-cells = <0>;
109 compatible = "ti,gate-clock"; 109 compatible = "ti,gate-clock";
110 clocks = <&dpll_per_m2_ck>; 110 clocks = <&l4ls_gclk>;
111 ti,bit-shift = <1>; 111 ti,bit-shift = <1>;
112 reg = <0x0664>; 112 reg = <0x0664>;
113 }; 113 };
@@ -115,7 +115,7 @@
115 ehrpwm2_tbclk: ehrpwm2_tbclk@44e10664 { 115 ehrpwm2_tbclk: ehrpwm2_tbclk@44e10664 {
116 #clock-cells = <0>; 116 #clock-cells = <0>;
117 compatible = "ti,gate-clock"; 117 compatible = "ti,gate-clock";
118 clocks = <&dpll_per_m2_ck>; 118 clocks = <&l4ls_gclk>;
119 ti,bit-shift = <2>; 119 ti,bit-shift = <2>;
120 reg = <0x0664>; 120 reg = <0x0664>;
121 }; 121 };
diff --git a/arch/arm/boot/dts/am437x-idk-evm.dts b/arch/arm/boot/dts/am437x-idk-evm.dts
index f9a17e2ca8cb..0198f5a62b96 100644
--- a/arch/arm/boot/dts/am437x-idk-evm.dts
+++ b/arch/arm/boot/dts/am437x-idk-evm.dts
@@ -133,20 +133,6 @@
133 >; 133 >;
134 }; 134 };
135 135
136 i2c1_pins_default: i2c1_pins_default {
137 pinctrl-single,pins = <
138 0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
139 0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
140 >;
141 };
142
143 i2c1_pins_sleep: i2c1_pins_sleep {
144 pinctrl-single,pins = <
145 0x15c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_cs0.i2c1_scl */
146 0x158 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d1.i2c1_sda */
147 >;
148 };
149
150 mmc1_pins_default: pinmux_mmc1_pins_default { 136 mmc1_pins_default: pinmux_mmc1_pins_default {
151 pinctrl-single,pins = < 137 pinctrl-single,pins = <
152 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ 138 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
@@ -254,7 +240,7 @@
254 status = "okay"; 240 status = "okay";
255 pinctrl-names = "default", "sleep"; 241 pinctrl-names = "default", "sleep";
256 pinctrl-0 = <&i2c0_pins_default>; 242 pinctrl-0 = <&i2c0_pins_default>;
257 pinctrl-1 = <&i2c0_pins_default>; 243 pinctrl-1 = <&i2c0_pins_sleep>;
258 clock-frequency = <400000>; 244 clock-frequency = <400000>;
259 245
260 at24@50 { 246 at24@50 {
@@ -262,17 +248,10 @@
262 pagesize = <64>; 248 pagesize = <64>;
263 reg = <0x50>; 249 reg = <0x50>;
264 }; 250 };
265};
266
267&i2c1 {
268 status = "okay";
269 pinctrl-names = "default", "sleep";
270 pinctrl-0 = <&i2c1_pins_default>;
271 pinctrl-1 = <&i2c1_pins_default>;
272 clock-frequency = <400000>;
273 251
274 tps: tps62362@60 { 252 tps: tps62362@60 {
275 compatible = "ti,tps62362"; 253 compatible = "ti,tps62362";
254 reg = <0x60>;
276 regulator-name = "VDD_MPU"; 255 regulator-name = "VDD_MPU";
277 regulator-min-microvolt = <950000>; 256 regulator-min-microvolt = <950000>;
278 regulator-max-microvolt = <1330000>; 257 regulator-max-microvolt = <1330000>;
diff --git a/arch/arm/boot/dts/am43xx-clocks.dtsi b/arch/arm/boot/dts/am43xx-clocks.dtsi
index c7dc9dab93a4..cfb49686ab6a 100644
--- a/arch/arm/boot/dts/am43xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am43xx-clocks.dtsi
@@ -107,7 +107,7 @@
107 ehrpwm0_tbclk: ehrpwm0_tbclk { 107 ehrpwm0_tbclk: ehrpwm0_tbclk {
108 #clock-cells = <0>; 108 #clock-cells = <0>;
109 compatible = "ti,gate-clock"; 109 compatible = "ti,gate-clock";
110 clocks = <&dpll_per_m2_ck>; 110 clocks = <&l4ls_gclk>;
111 ti,bit-shift = <0>; 111 ti,bit-shift = <0>;
112 reg = <0x0664>; 112 reg = <0x0664>;
113 }; 113 };
@@ -115,7 +115,7 @@
115 ehrpwm1_tbclk: ehrpwm1_tbclk { 115 ehrpwm1_tbclk: ehrpwm1_tbclk {
116 #clock-cells = <0>; 116 #clock-cells = <0>;
117 compatible = "ti,gate-clock"; 117 compatible = "ti,gate-clock";
118 clocks = <&dpll_per_m2_ck>; 118 clocks = <&l4ls_gclk>;
119 ti,bit-shift = <1>; 119 ti,bit-shift = <1>;
120 reg = <0x0664>; 120 reg = <0x0664>;
121 }; 121 };
@@ -123,7 +123,7 @@
123 ehrpwm2_tbclk: ehrpwm2_tbclk { 123 ehrpwm2_tbclk: ehrpwm2_tbclk {
124 #clock-cells = <0>; 124 #clock-cells = <0>;
125 compatible = "ti,gate-clock"; 125 compatible = "ti,gate-clock";
126 clocks = <&dpll_per_m2_ck>; 126 clocks = <&l4ls_gclk>;
127 ti,bit-shift = <2>; 127 ti,bit-shift = <2>;
128 reg = <0x0664>; 128 reg = <0x0664>;
129 }; 129 };
@@ -131,7 +131,7 @@
131 ehrpwm3_tbclk: ehrpwm3_tbclk { 131 ehrpwm3_tbclk: ehrpwm3_tbclk {
132 #clock-cells = <0>; 132 #clock-cells = <0>;
133 compatible = "ti,gate-clock"; 133 compatible = "ti,gate-clock";
134 clocks = <&dpll_per_m2_ck>; 134 clocks = <&l4ls_gclk>;
135 ti,bit-shift = <4>; 135 ti,bit-shift = <4>;
136 reg = <0x0664>; 136 reg = <0x0664>;
137 }; 137 };
@@ -139,7 +139,7 @@
139 ehrpwm4_tbclk: ehrpwm4_tbclk { 139 ehrpwm4_tbclk: ehrpwm4_tbclk {
140 #clock-cells = <0>; 140 #clock-cells = <0>;
141 compatible = "ti,gate-clock"; 141 compatible = "ti,gate-clock";
142 clocks = <&dpll_per_m2_ck>; 142 clocks = <&l4ls_gclk>;
143 ti,bit-shift = <5>; 143 ti,bit-shift = <5>;
144 reg = <0x0664>; 144 reg = <0x0664>;
145 }; 145 };
@@ -147,7 +147,7 @@
147 ehrpwm5_tbclk: ehrpwm5_tbclk { 147 ehrpwm5_tbclk: ehrpwm5_tbclk {
148 #clock-cells = <0>; 148 #clock-cells = <0>;
149 compatible = "ti,gate-clock"; 149 compatible = "ti,gate-clock";
150 clocks = <&dpll_per_m2_ck>; 150 clocks = <&l4ls_gclk>;
151 ti,bit-shift = <6>; 151 ti,bit-shift = <6>;
152 reg = <0x0664>; 152 reg = <0x0664>;
153 }; 153 };
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts
index 03750af3b49a..6463f9ef2b54 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15.dts
+++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts
@@ -549,14 +549,6 @@
549 pinctrl-0 = <&usb1_pins>; 549 pinctrl-0 = <&usb1_pins>;
550}; 550};
551 551
552&omap_dwc3_1 {
553 extcon = <&extcon_usb1>;
554};
555
556&omap_dwc3_2 {
557 extcon = <&extcon_usb2>;
558};
559
560&usb2 { 552&usb2 {
561 dr_mode = "peripheral"; 553 dr_mode = "peripheral";
562}; 554};
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index fff0ee69aab4..e7f0a4ae271c 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -494,12 +494,12 @@
494 494
495 pinctrl_usart3_rts: usart3_rts-0 { 495 pinctrl_usart3_rts: usart3_rts-0 {
496 atmel,pins = 496 atmel,pins =
497 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC8 periph B */ 497 <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
498 }; 498 };
499 499
500 pinctrl_usart3_cts: usart3_cts-0 { 500 pinctrl_usart3_cts: usart3_cts-0 {
501 atmel,pins = 501 atmel,pins =
502 <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC10 periph B */ 502 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
503 }; 503 };
504 }; 504 };
505 505
@@ -853,7 +853,7 @@
853 }; 853 };
854 854
855 usb1: gadget@fffa4000 { 855 usb1: gadget@fffa4000 {
856 compatible = "atmel,at91rm9200-udc"; 856 compatible = "atmel,at91sam9260-udc";
857 reg = <0xfffa4000 0x4000>; 857 reg = <0xfffa4000 0x4000>;
858 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; 858 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
859 clocks = <&udc_clk>, <&udpck>; 859 clocks = <&udc_clk>, <&udpck>;
@@ -976,7 +976,6 @@
976 atmel,watchdog-type = "hardware"; 976 atmel,watchdog-type = "hardware";
977 atmel,reset-type = "all"; 977 atmel,reset-type = "all";
978 atmel,dbg-halt; 978 atmel,dbg-halt;
979 atmel,idle-halt;
980 status = "disabled"; 979 status = "disabled";
981 }; 980 };
982 981
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index e247b0b5fdab..d55fdf2487ef 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -124,11 +124,12 @@
124 }; 124 };
125 125
126 usb1: gadget@fffa4000 { 126 usb1: gadget@fffa4000 {
127 compatible = "atmel,at91rm9200-udc"; 127 compatible = "atmel,at91sam9261-udc";
128 reg = <0xfffa4000 0x4000>; 128 reg = <0xfffa4000 0x4000>;
129 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; 129 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
130 clocks = <&usb>, <&udc_clk>, <&udpck>; 130 clocks = <&udc_clk>, <&udpck>;
131 clock-names = "usb_clk", "udc_clk", "udpck"; 131 clock-names = "pclk", "hclk";
132 atmel,matrix = <&matrix>;
132 status = "disabled"; 133 status = "disabled";
133 }; 134 };
134 135
@@ -262,7 +263,7 @@
262 }; 263 };
263 264
264 matrix: matrix@ffffee00 { 265 matrix: matrix@ffffee00 {
265 compatible = "atmel,at91sam9260-bus-matrix"; 266 compatible = "atmel,at91sam9260-bus-matrix", "syscon";
266 reg = <0xffffee00 0x200>; 267 reg = <0xffffee00 0x200>;
267 }; 268 };
268 269
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 1f67bb4c144e..fce301c4e9d6 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -69,7 +69,7 @@
69 69
70 sram1: sram@00500000 { 70 sram1: sram@00500000 {
71 compatible = "mmio-sram"; 71 compatible = "mmio-sram";
72 reg = <0x00300000 0x4000>; 72 reg = <0x00500000 0x4000>;
73 }; 73 };
74 74
75 ahb { 75 ahb {
@@ -856,7 +856,7 @@
856 }; 856 };
857 857
858 usb1: gadget@fff78000 { 858 usb1: gadget@fff78000 {
859 compatible = "atmel,at91rm9200-udc"; 859 compatible = "atmel,at91sam9263-udc";
860 reg = <0xfff78000 0x4000>; 860 reg = <0xfff78000 0x4000>;
861 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>; 861 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
862 clocks = <&udc_clk>, <&udpck>; 862 clocks = <&udc_clk>, <&udpck>;
@@ -905,7 +905,6 @@
905 atmel,watchdog-type = "hardware"; 905 atmel,watchdog-type = "hardware";
906 atmel,reset-type = "all"; 906 atmel,reset-type = "all";
907 atmel,dbg-halt; 907 atmel,dbg-halt;
908 atmel,idle-halt;
909 status = "disabled"; 908 status = "disabled";
910 }; 909 };
911 910
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index ee80aa9c0759..488af63d5174 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -1116,7 +1116,6 @@
1116 atmel,watchdog-type = "hardware"; 1116 atmel,watchdog-type = "hardware";
1117 atmel,reset-type = "all"; 1117 atmel,reset-type = "all";
1118 atmel,dbg-halt; 1118 atmel,dbg-halt;
1119 atmel,idle-halt;
1120 status = "disabled"; 1119 status = "disabled";
1121 }; 1120 };
1122 1121
@@ -1301,7 +1300,7 @@
1301 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 1300 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1302 reg = <0x00800000 0x100000>; 1301 reg = <0x00800000 0x100000>;
1303 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 1302 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1304 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; 1303 clocks = <&utmi>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1305 clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck"; 1304 clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck";
1306 status = "disabled"; 1305 status = "disabled";
1307 }; 1306 };
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index c2666a7cb5b1..0c53a375ba99 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -894,7 +894,6 @@
894 atmel,watchdog-type = "hardware"; 894 atmel,watchdog-type = "hardware";
895 atmel,reset-type = "all"; 895 atmel,reset-type = "all";
896 atmel,dbg-halt; 896 atmel,dbg-halt;
897 atmel,idle-halt;
898 status = "disabled"; 897 status = "disabled";
899 }; 898 };
900 899
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 818dabdd8c0e..d221179d0f1a 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -1066,7 +1066,7 @@
1066 reg = <0x00500000 0x80000 1066 reg = <0x00500000 0x80000
1067 0xf803c000 0x400>; 1067 0xf803c000 0x400>;
1068 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>; 1068 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
1069 clocks = <&usb>, <&udphs_clk>; 1069 clocks = <&utmi>, <&udphs_clk>;
1070 clock-names = "hclk", "pclk"; 1070 clock-names = "hclk", "pclk";
1071 status = "disabled"; 1071 status = "disabled";
1072 1072
@@ -1130,7 +1130,6 @@
1130 atmel,watchdog-type = "hardware"; 1130 atmel,watchdog-type = "hardware";
1131 atmel,reset-type = "all"; 1131 atmel,reset-type = "all";
1132 atmel,dbg-halt; 1132 atmel,dbg-halt;
1133 atmel,idle-halt;
1134 status = "disabled"; 1133 status = "disabled";
1135 }; 1134 };
1136 1135
@@ -1186,7 +1185,7 @@
1186 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 1185 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1187 reg = <0x00700000 0x100000>; 1186 reg = <0x00700000 0x100000>;
1188 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 1187 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1189 clocks = <&usb>, <&uhphs_clk>, <&uhpck>; 1188 clocks = <&utmi>, <&uhphs_clk>, <&uhpck>;
1190 clock-names = "usb_clk", "ehci_clk", "uhpck"; 1189 clock-names = "usb_clk", "ehci_clk", "uhpck";
1191 status = "disabled"; 1190 status = "disabled";
1192 }; 1191 };
diff --git a/arch/arm/boot/dts/dm8168-evm.dts b/arch/arm/boot/dts/dm8168-evm.dts
index 857d0289ad4d..d3a29c1b8417 100644
--- a/arch/arm/boot/dts/dm8168-evm.dts
+++ b/arch/arm/boot/dts/dm8168-evm.dts
@@ -35,6 +35,18 @@
35 DM816X_IOPAD(0x0aac, PIN_INPUT | MUX_MODE0) /* SPI_D1 */ 35 DM816X_IOPAD(0x0aac, PIN_INPUT | MUX_MODE0) /* SPI_D1 */
36 >; 36 >;
37 }; 37 };
38
39 usb0_pins: pinmux_usb0_pins {
40 pinctrl-single,pins = <
41 DM816X_IOPAD(0x0d00, MUX_MODE0) /* USB0_DRVVBUS */
42 >;
43 };
44
45 usb1_pins: pinmux_usb0_pins {
46 pinctrl-single,pins = <
47 DM816X_IOPAD(0x0d04, MUX_MODE0) /* USB1_DRVVBUS */
48 >;
49 };
38}; 50};
39 51
40&i2c1 { 52&i2c1 {
@@ -127,3 +139,16 @@
127&mmc1 { 139&mmc1 {
128 vmmc-supply = <&vmmcsd_fixed>; 140 vmmc-supply = <&vmmcsd_fixed>;
129}; 141};
142
143/* At least dm8168-evm rev c won't support multipoint, later may */
144&usb0 {
145 pinctrl-names = "default";
146 pinctrl-0 = <&usb0_pins>;
147 mentor,multipoint = <0>;
148};
149
150&usb1 {
151 pinctrl-names = "default";
152 pinctrl-0 = <&usb1_pins>;
153 mentor,multipoint = <0>;
154};
diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi
index d98d0f7de380..3c97b5f2addc 100644
--- a/arch/arm/boot/dts/dm816x.dtsi
+++ b/arch/arm/boot/dts/dm816x.dtsi
@@ -97,10 +97,31 @@
97 97
98 /* Device Configuration Registers */ 98 /* Device Configuration Registers */
99 scm_conf: syscon@600 { 99 scm_conf: syscon@600 {
100 compatible = "syscon"; 100 compatible = "syscon", "simple-bus";
101 reg = <0x600 0x110>; 101 reg = <0x600 0x110>;
102 #address-cells = <1>; 102 #address-cells = <1>;
103 #size-cells = <1>; 103 #size-cells = <1>;
104 ranges = <0 0x600 0x110>;
105
106 usb_phy0: usb-phy@20 {
107 compatible = "ti,dm8168-usb-phy";
108 reg = <0x20 0x8>;
109 reg-names = "phy";
110 clocks = <&main_fapll 6>;
111 clock-names = "refclk";
112 #phy-cells = <0>;
113 syscon = <&scm_conf>;
114 };
115
116 usb_phy1: usb-phy@28 {
117 compatible = "ti,dm8168-usb-phy";
118 reg = <0x28 0x8>;
119 reg-names = "phy";
120 clocks = <&main_fapll 6>;
121 clock-names = "refclk";
122 #phy-cells = <0>;
123 syscon = <&scm_conf>;
124 };
104 }; 125 };
105 126
106 scrm_clocks: clocks { 127 scrm_clocks: clocks {
@@ -357,7 +378,10 @@
357 reg-names = "mc", "control"; 378 reg-names = "mc", "control";
358 interrupts = <18>; 379 interrupts = <18>;
359 interrupt-names = "mc"; 380 interrupt-names = "mc";
360 dr_mode = "otg"; 381 dr_mode = "host";
382 interface-type = <0>;
383 phys = <&usb_phy0>;
384 phy-names = "usb2-phy";
361 mentor,multipoint = <1>; 385 mentor,multipoint = <1>;
362 mentor,num-eps = <16>; 386 mentor,num-eps = <16>;
363 mentor,ram-bits = <12>; 387 mentor,ram-bits = <12>;
@@ -366,13 +390,15 @@
366 390
367 usb1: usb@47401800 { 391 usb1: usb@47401800 {
368 compatible = "ti,musb-am33xx"; 392 compatible = "ti,musb-am33xx";
369 status = "disabled";
370 reg = <0x47401c00 0x400 393 reg = <0x47401c00 0x400
371 0x47401800 0x200>; 394 0x47401800 0x200>;
372 reg-names = "mc", "control"; 395 reg-names = "mc", "control";
373 interrupts = <19>; 396 interrupts = <19>;
374 interrupt-names = "mc"; 397 interrupt-names = "mc";
375 dr_mode = "otg"; 398 dr_mode = "host";
399 interface-type = <0>;
400 phys = <&usb_phy1>;
401 phy-names = "usb2-phy";
376 mentor,multipoint = <1>; 402 mentor,multipoint = <1>;
377 mentor,num-eps = <16>; 403 mentor,num-eps = <16>;
378 mentor,ram-bits = <12>; 404 mentor,ram-bits = <12>;
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 746cddb1b8f5..7563d7ce01bb 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -263,17 +263,15 @@
263 263
264 dcan1_pins_default: dcan1_pins_default { 264 dcan1_pins_default: dcan1_pins_default {
265 pinctrl-single,pins = < 265 pinctrl-single,pins = <
266 0x3d0 (PIN_OUTPUT | MUX_MODE0) /* dcan1_tx */ 266 0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
267 0x3d4 (MUX_MODE15) /* dcan1_rx.off */ 267 0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
268 0x418 (PULL_DIS | MUX_MODE1) /* wakeup0.dcan1_rx */
269 >; 268 >;
270 }; 269 };
271 270
272 dcan1_pins_sleep: dcan1_pins_sleep { 271 dcan1_pins_sleep: dcan1_pins_sleep {
273 pinctrl-single,pins = < 272 pinctrl-single,pins = <
274 0x3d0 (MUX_MODE15) /* dcan1_tx.off */ 273 0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
275 0x3d4 (MUX_MODE15) /* dcan1_rx.off */ 274 0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */
276 0x418 (MUX_MODE15) /* wakeup0.off */
277 >; 275 >;
278 }; 276 };
279}; 277};
@@ -543,14 +541,6 @@
543 }; 541 };
544}; 542};
545 543
546&omap_dwc3_1 {
547 extcon = <&extcon_usb1>;
548};
549
550&omap_dwc3_2 {
551 extcon = <&extcon_usb2>;
552};
553
554&usb1 { 544&usb1 {
555 dr_mode = "peripheral"; 545 dr_mode = "peripheral";
556 pinctrl-names = "default"; 546 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 5827fedafd43..127608d79033 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -249,8 +249,8 @@
249 <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 249 <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
250 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 250 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
251 #dma-cells = <1>; 251 #dma-cells = <1>;
252 #dma-channels = <32>; 252 dma-channels = <32>;
253 #dma-requests = <127>; 253 dma-requests = <127>;
254 }; 254 };
255 255
256 gpio1: gpio@4ae10000 { 256 gpio1: gpio@4ae10000 {
@@ -1090,8 +1090,8 @@
1090 <0x4A096800 0x40>; /* pll_ctrl */ 1090 <0x4A096800 0x40>; /* pll_ctrl */
1091 reg-names = "phy_rx", "phy_tx", "pll_ctrl"; 1091 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
1092 ctrl-module = <&omap_control_sata>; 1092 ctrl-module = <&omap_control_sata>;
1093 clocks = <&sys_clkin1>; 1093 clocks = <&sys_clkin1>, <&sata_ref_clk>;
1094 clock-names = "sysclk"; 1094 clock-names = "sysclk", "refclk";
1095 #phy-cells = <0>; 1095 #phy-cells = <0>;
1096 }; 1096 };
1097 1097
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 4d8711713610..40ed539ce474 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -119,17 +119,15 @@
119 119
120 dcan1_pins_default: dcan1_pins_default { 120 dcan1_pins_default: dcan1_pins_default {
121 pinctrl-single,pins = < 121 pinctrl-single,pins = <
122 0x3d0 (PIN_OUTPUT | MUX_MODE0) /* dcan1_tx */ 122 0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
123 0x3d4 (MUX_MODE15) /* dcan1_rx.off */ 123 0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
124 0x418 (PULL_DIS | MUX_MODE1) /* wakeup0.dcan1_rx */
125 >; 124 >;
126 }; 125 };
127 126
128 dcan1_pins_sleep: dcan1_pins_sleep { 127 dcan1_pins_sleep: dcan1_pins_sleep {
129 pinctrl-single,pins = < 128 pinctrl-single,pins = <
130 0x3d0 (MUX_MODE15) /* dcan1_tx.off */ 129 0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
131 0x3d4 (MUX_MODE15) /* dcan1_rx.off */ 130 0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */
132 0x418 (MUX_MODE15) /* wakeup0.off */
133 >; 131 >;
134 }; 132 };
135 133
@@ -380,14 +378,6 @@
380 phy-supply = <&ldo4_reg>; 378 phy-supply = <&ldo4_reg>;
381}; 379};
382 380
383&omap_dwc3_1 {
384 extcon = <&extcon_usb1>;
385};
386
387&omap_dwc3_2 {
388 extcon = <&extcon_usb2>;
389};
390
391&usb1 { 381&usb1 {
392 dr_mode = "peripheral"; 382 dr_mode = "peripheral";
393 pinctrl-names = "default"; 383 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index 4bdcbd61ce47..99b09a44e269 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -243,10 +243,18 @@
243 ti,invert-autoidle-bit; 243 ti,invert-autoidle-bit;
244 }; 244 };
245 245
246 dpll_core_byp_mux: dpll_core_byp_mux {
247 #clock-cells = <0>;
248 compatible = "ti,mux-clock";
249 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
250 ti,bit-shift = <23>;
251 reg = <0x012c>;
252 };
253
246 dpll_core_ck: dpll_core_ck { 254 dpll_core_ck: dpll_core_ck {
247 #clock-cells = <0>; 255 #clock-cells = <0>;
248 compatible = "ti,omap4-dpll-core-clock"; 256 compatible = "ti,omap4-dpll-core-clock";
249 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; 257 clocks = <&sys_clkin1>, <&dpll_core_byp_mux>;
250 reg = <0x0120>, <0x0124>, <0x012c>, <0x0128>; 258 reg = <0x0120>, <0x0124>, <0x012c>, <0x0128>;
251 }; 259 };
252 260
@@ -309,10 +317,18 @@
309 clock-div = <1>; 317 clock-div = <1>;
310 }; 318 };
311 319
320 dpll_dsp_byp_mux: dpll_dsp_byp_mux {
321 #clock-cells = <0>;
322 compatible = "ti,mux-clock";
323 clocks = <&sys_clkin1>, <&dsp_dpll_hs_clk_div>;
324 ti,bit-shift = <23>;
325 reg = <0x0240>;
326 };
327
312 dpll_dsp_ck: dpll_dsp_ck { 328 dpll_dsp_ck: dpll_dsp_ck {
313 #clock-cells = <0>; 329 #clock-cells = <0>;
314 compatible = "ti,omap4-dpll-clock"; 330 compatible = "ti,omap4-dpll-clock";
315 clocks = <&sys_clkin1>, <&dsp_dpll_hs_clk_div>; 331 clocks = <&sys_clkin1>, <&dpll_dsp_byp_mux>;
316 reg = <0x0234>, <0x0238>, <0x0240>, <0x023c>; 332 reg = <0x0234>, <0x0238>, <0x0240>, <0x023c>;
317 }; 333 };
318 334
@@ -335,10 +351,18 @@
335 clock-div = <1>; 351 clock-div = <1>;
336 }; 352 };
337 353
354 dpll_iva_byp_mux: dpll_iva_byp_mux {
355 #clock-cells = <0>;
356 compatible = "ti,mux-clock";
357 clocks = <&sys_clkin1>, <&iva_dpll_hs_clk_div>;
358 ti,bit-shift = <23>;
359 reg = <0x01ac>;
360 };
361
338 dpll_iva_ck: dpll_iva_ck { 362 dpll_iva_ck: dpll_iva_ck {
339 #clock-cells = <0>; 363 #clock-cells = <0>;
340 compatible = "ti,omap4-dpll-clock"; 364 compatible = "ti,omap4-dpll-clock";
341 clocks = <&sys_clkin1>, <&iva_dpll_hs_clk_div>; 365 clocks = <&sys_clkin1>, <&dpll_iva_byp_mux>;
342 reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>; 366 reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>;
343 }; 367 };
344 368
@@ -361,10 +385,18 @@
361 clock-div = <1>; 385 clock-div = <1>;
362 }; 386 };
363 387
388 dpll_gpu_byp_mux: dpll_gpu_byp_mux {
389 #clock-cells = <0>;
390 compatible = "ti,mux-clock";
391 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
392 ti,bit-shift = <23>;
393 reg = <0x02e4>;
394 };
395
364 dpll_gpu_ck: dpll_gpu_ck { 396 dpll_gpu_ck: dpll_gpu_ck {
365 #clock-cells = <0>; 397 #clock-cells = <0>;
366 compatible = "ti,omap4-dpll-clock"; 398 compatible = "ti,omap4-dpll-clock";
367 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; 399 clocks = <&sys_clkin1>, <&dpll_gpu_byp_mux>;
368 reg = <0x02d8>, <0x02dc>, <0x02e4>, <0x02e0>; 400 reg = <0x02d8>, <0x02dc>, <0x02e4>, <0x02e0>;
369 }; 401 };
370 402
@@ -398,10 +430,18 @@
398 clock-div = <1>; 430 clock-div = <1>;
399 }; 431 };
400 432
433 dpll_ddr_byp_mux: dpll_ddr_byp_mux {
434 #clock-cells = <0>;
435 compatible = "ti,mux-clock";
436 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
437 ti,bit-shift = <23>;
438 reg = <0x021c>;
439 };
440
401 dpll_ddr_ck: dpll_ddr_ck { 441 dpll_ddr_ck: dpll_ddr_ck {
402 #clock-cells = <0>; 442 #clock-cells = <0>;
403 compatible = "ti,omap4-dpll-clock"; 443 compatible = "ti,omap4-dpll-clock";
404 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; 444 clocks = <&sys_clkin1>, <&dpll_ddr_byp_mux>;
405 reg = <0x0210>, <0x0214>, <0x021c>, <0x0218>; 445 reg = <0x0210>, <0x0214>, <0x021c>, <0x0218>;
406 }; 446 };
407 447
@@ -416,10 +456,18 @@
416 ti,invert-autoidle-bit; 456 ti,invert-autoidle-bit;
417 }; 457 };
418 458
459 dpll_gmac_byp_mux: dpll_gmac_byp_mux {
460 #clock-cells = <0>;
461 compatible = "ti,mux-clock";
462 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
463 ti,bit-shift = <23>;
464 reg = <0x02b4>;
465 };
466
419 dpll_gmac_ck: dpll_gmac_ck { 467 dpll_gmac_ck: dpll_gmac_ck {
420 #clock-cells = <0>; 468 #clock-cells = <0>;
421 compatible = "ti,omap4-dpll-clock"; 469 compatible = "ti,omap4-dpll-clock";
422 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; 470 clocks = <&sys_clkin1>, <&dpll_gmac_byp_mux>;
423 reg = <0x02a8>, <0x02ac>, <0x02b4>, <0x02b0>; 471 reg = <0x02a8>, <0x02ac>, <0x02b4>, <0x02b0>;
424 }; 472 };
425 473
@@ -482,10 +530,18 @@
482 clock-div = <1>; 530 clock-div = <1>;
483 }; 531 };
484 532
533 dpll_eve_byp_mux: dpll_eve_byp_mux {
534 #clock-cells = <0>;
535 compatible = "ti,mux-clock";
536 clocks = <&sys_clkin1>, <&eve_dpll_hs_clk_div>;
537 ti,bit-shift = <23>;
538 reg = <0x0290>;
539 };
540
485 dpll_eve_ck: dpll_eve_ck { 541 dpll_eve_ck: dpll_eve_ck {
486 #clock-cells = <0>; 542 #clock-cells = <0>;
487 compatible = "ti,omap4-dpll-clock"; 543 compatible = "ti,omap4-dpll-clock";
488 clocks = <&sys_clkin1>, <&eve_dpll_hs_clk_div>; 544 clocks = <&sys_clkin1>, <&dpll_eve_byp_mux>;
489 reg = <0x0284>, <0x0288>, <0x0290>, <0x028c>; 545 reg = <0x0284>, <0x0288>, <0x0290>, <0x028c>;
490 }; 546 };
491 547
@@ -1249,10 +1305,18 @@
1249 clock-div = <1>; 1305 clock-div = <1>;
1250 }; 1306 };
1251 1307
1308 dpll_per_byp_mux: dpll_per_byp_mux {
1309 #clock-cells = <0>;
1310 compatible = "ti,mux-clock";
1311 clocks = <&sys_clkin1>, <&per_dpll_hs_clk_div>;
1312 ti,bit-shift = <23>;
1313 reg = <0x014c>;
1314 };
1315
1252 dpll_per_ck: dpll_per_ck { 1316 dpll_per_ck: dpll_per_ck {
1253 #clock-cells = <0>; 1317 #clock-cells = <0>;
1254 compatible = "ti,omap4-dpll-clock"; 1318 compatible = "ti,omap4-dpll-clock";
1255 clocks = <&sys_clkin1>, <&per_dpll_hs_clk_div>; 1319 clocks = <&sys_clkin1>, <&dpll_per_byp_mux>;
1256 reg = <0x0140>, <0x0144>, <0x014c>, <0x0148>; 1320 reg = <0x0140>, <0x0144>, <0x014c>, <0x0148>;
1257 }; 1321 };
1258 1322
@@ -1275,10 +1339,18 @@
1275 clock-div = <1>; 1339 clock-div = <1>;
1276 }; 1340 };
1277 1341
1342 dpll_usb_byp_mux: dpll_usb_byp_mux {
1343 #clock-cells = <0>;
1344 compatible = "ti,mux-clock";
1345 clocks = <&sys_clkin1>, <&usb_dpll_hs_clk_div>;
1346 ti,bit-shift = <23>;
1347 reg = <0x018c>;
1348 };
1349
1278 dpll_usb_ck: dpll_usb_ck { 1350 dpll_usb_ck: dpll_usb_ck {
1279 #clock-cells = <0>; 1351 #clock-cells = <0>;
1280 compatible = "ti,omap4-dpll-j-type-clock"; 1352 compatible = "ti,omap4-dpll-j-type-clock";
1281 clocks = <&sys_clkin1>, <&usb_dpll_hs_clk_div>; 1353 clocks = <&sys_clkin1>, <&dpll_usb_byp_mux>;
1282 reg = <0x0180>, <0x0184>, <0x018c>, <0x0188>; 1354 reg = <0x0180>, <0x0184>, <0x018c>, <0x0188>;
1283 }; 1355 };
1284 1356
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 277b48b0b6f9..ac6b0ae42caf 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -18,6 +18,7 @@
18 */ 18 */
19 19
20#include "skeleton.dtsi" 20#include "skeleton.dtsi"
21#include "exynos4-cpu-thermal.dtsi"
21#include <dt-bindings/clock/exynos3250.h> 22#include <dt-bindings/clock/exynos3250.h>
22 23
23/ { 24/ {
@@ -193,6 +194,7 @@
193 interrupts = <0 216 0>; 194 interrupts = <0 216 0>;
194 clocks = <&cmu CLK_TMU_APBIF>; 195 clocks = <&cmu CLK_TMU_APBIF>;
195 clock-names = "tmu_apbif"; 196 clock-names = "tmu_apbif";
197 #include "exynos4412-tmu-sensor-conf.dtsi"
196 status = "disabled"; 198 status = "disabled";
197 }; 199 };
198 200
diff --git a/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi b/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi
new file mode 100644
index 000000000000..735cb2f10817
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi
@@ -0,0 +1,52 @@
1/*
2 * Device tree sources for Exynos4 thermal zone
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <dt-bindings/thermal/thermal.h>
13
14/ {
15thermal-zones {
16 cpu_thermal: cpu-thermal {
17 thermal-sensors = <&tmu 0>;
18 polling-delay-passive = <0>;
19 polling-delay = <0>;
20 trips {
21 cpu_alert0: cpu-alert-0 {
22 temperature = <70000>; /* millicelsius */
23 hysteresis = <10000>; /* millicelsius */
24 type = "active";
25 };
26 cpu_alert1: cpu-alert-1 {
27 temperature = <95000>; /* millicelsius */
28 hysteresis = <10000>; /* millicelsius */
29 type = "active";
30 };
31 cpu_alert2: cpu-alert-2 {
32 temperature = <110000>; /* millicelsius */
33 hysteresis = <10000>; /* millicelsius */
34 type = "active";
35 };
36 cpu_crit0: cpu-crit-0 {
37 temperature = <120000>; /* millicelsius */
38 hysteresis = <0>; /* millicelsius */
39 type = "critical";
40 };
41 };
42 cooling-maps {
43 map0 {
44 trip = <&cpu_alert0>;
45 };
46 map1 {
47 trip = <&cpu_alert1>;
48 };
49 };
50 };
51};
52};
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 76173cacd450..77ea547768f4 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -38,6 +38,7 @@
38 i2c5 = &i2c_5; 38 i2c5 = &i2c_5;
39 i2c6 = &i2c_6; 39 i2c6 = &i2c_6;
40 i2c7 = &i2c_7; 40 i2c7 = &i2c_7;
41 i2c8 = &i2c_8;
41 csis0 = &csis_0; 42 csis0 = &csis_0;
42 csis1 = &csis_1; 43 csis1 = &csis_1;
43 fimc0 = &fimc_0; 44 fimc0 = &fimc_0;
@@ -104,6 +105,7 @@
104 compatible = "samsung,exynos4210-pd"; 105 compatible = "samsung,exynos4210-pd";
105 reg = <0x10023C20 0x20>; 106 reg = <0x10023C20 0x20>;
106 #power-domain-cells = <0>; 107 #power-domain-cells = <0>;
108 power-domains = <&pd_lcd0>;
107 }; 109 };
108 110
109 pd_cam: cam-power-domain@10023C00 { 111 pd_cam: cam-power-domain@10023C00 {
@@ -554,6 +556,22 @@
554 status = "disabled"; 556 status = "disabled";
555 }; 557 };
556 558
559 i2c_8: i2c@138E0000 {
560 #address-cells = <1>;
561 #size-cells = <0>;
562 compatible = "samsung,s3c2440-hdmiphy-i2c";
563 reg = <0x138E0000 0x100>;
564 interrupts = <0 93 0>;
565 clocks = <&clock CLK_I2C_HDMI>;
566 clock-names = "i2c";
567 status = "disabled";
568
569 hdmi_i2c_phy: hdmiphy@38 {
570 compatible = "exynos4210-hdmiphy";
571 reg = <0x38>;
572 };
573 };
574
557 spi_0: spi@13920000 { 575 spi_0: spi@13920000 {
558 compatible = "samsung,exynos4210-spi"; 576 compatible = "samsung,exynos4210-spi";
559 reg = <0x13920000 0x100>; 577 reg = <0x13920000 0x100>;
@@ -663,6 +681,33 @@
663 status = "disabled"; 681 status = "disabled";
664 }; 682 };
665 683
684 tmu: tmu@100C0000 {
685 #include "exynos4412-tmu-sensor-conf.dtsi"
686 };
687
688 hdmi: hdmi@12D00000 {
689 compatible = "samsung,exynos4210-hdmi";
690 reg = <0x12D00000 0x70000>;
691 interrupts = <0 92 0>;
692 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy",
693 "mout_hdmi";
694 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
695 <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
696 <&clock CLK_MOUT_HDMI>;
697 phy = <&hdmi_i2c_phy>;
698 power-domains = <&pd_tv>;
699 samsung,syscon-phandle = <&pmu_system_controller>;
700 status = "disabled";
701 };
702
703 mixer: mixer@12C10000 {
704 compatible = "samsung,exynos4210-mixer";
705 interrupts = <0 91 0>;
706 reg = <0x12C10000 0x2100>, <0x12c00000 0x300>;
707 power-domains = <&pd_tv>;
708 status = "disabled";
709 };
710
666 ppmu_dmc0: ppmu_dmc0@106a0000 { 711 ppmu_dmc0: ppmu_dmc0@106a0000 {
667 compatible = "samsung,exynos-ppmu"; 712 compatible = "samsung,exynos-ppmu";
668 reg = <0x106a0000 0x2000>; 713 reg = <0x106a0000 0x2000>;
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index 3d6652a4b6cb..32c5fd8f6269 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -426,6 +426,25 @@
426 status = "okay"; 426 status = "okay";
427 }; 427 };
428 428
429 tmu@100C0000 {
430 status = "okay";
431 };
432
433 thermal-zones {
434 cpu_thermal: cpu-thermal {
435 cooling-maps {
436 map0 {
437 /* Corresponds to 800MHz at freq_table */
438 cooling-device = <&cpu0 2 2>;
439 };
440 map1 {
441 /* Corresponds to 200MHz at freq_table */
442 cooling-device = <&cpu0 4 4>;
443 };
444 };
445 };
446 };
447
429 camera { 448 camera {
430 pinctrl-names = "default"; 449 pinctrl-names = "default";
431 pinctrl-0 = <>; 450 pinctrl-0 = <>;
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index b57e6b82ea20..d4f2b11319dd 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -505,6 +505,63 @@
505 assigned-clock-rates = <0>, <160000000>; 505 assigned-clock-rates = <0>, <160000000>;
506 }; 506 };
507 }; 507 };
508
509 hdmi_en: voltage-regulator-hdmi-5v {
510 compatible = "regulator-fixed";
511 regulator-name = "HDMI_5V";
512 regulator-min-microvolt = <5000000>;
513 regulator-max-microvolt = <5000000>;
514 gpio = <&gpe0 1 0>;
515 enable-active-high;
516 };
517
518 hdmi_ddc: i2c-ddc {
519 compatible = "i2c-gpio";
520 gpios = <&gpe4 2 0 &gpe4 3 0>;
521 i2c-gpio,delay-us = <100>;
522 #address-cells = <1>;
523 #size-cells = <0>;
524
525 pinctrl-0 = <&i2c_ddc_bus>;
526 pinctrl-names = "default";
527 status = "okay";
528 };
529
530 mixer@12C10000 {
531 status = "okay";
532 };
533
534 hdmi@12D00000 {
535 hpd-gpio = <&gpx3 7 0>;
536 pinctrl-names = "default";
537 pinctrl-0 = <&hdmi_hpd>;
538 hdmi-en-supply = <&hdmi_en>;
539 vdd-supply = <&ldo3_reg>;
540 vdd_osc-supply = <&ldo4_reg>;
541 vdd_pll-supply = <&ldo3_reg>;
542 ddc = <&hdmi_ddc>;
543 status = "okay";
544 };
545
546 i2c@138E0000 {
547 status = "okay";
548 };
549};
550
551&pinctrl_1 {
552 hdmi_hpd: hdmi-hpd {
553 samsung,pins = "gpx3-7";
554 samsung,pin-pud = <0>;
555 };
556};
557
558&pinctrl_0 {
559 i2c_ddc_bus: i2c-ddc-bus {
560 samsung,pins = "gpe4-2", "gpe4-3";
561 samsung,pin-function = <2>;
562 samsung,pin-pud = <3>;
563 samsung,pin-drv = <0>;
564 };
508}; 565};
509 566
510&mdma1 { 567&mdma1 {
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 67c832c9dcf1..be89f83f70e7 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -21,6 +21,7 @@
21 21
22#include "exynos4.dtsi" 22#include "exynos4.dtsi"
23#include "exynos4210-pinctrl.dtsi" 23#include "exynos4210-pinctrl.dtsi"
24#include "exynos4-cpu-thermal.dtsi"
24 25
25/ { 26/ {
26 compatible = "samsung,exynos4210", "samsung,exynos4"; 27 compatible = "samsung,exynos4210", "samsung,exynos4";
@@ -35,10 +36,13 @@
35 #address-cells = <1>; 36 #address-cells = <1>;
36 #size-cells = <0>; 37 #size-cells = <0>;
37 38
38 cpu@900 { 39 cpu0: cpu@900 {
39 device_type = "cpu"; 40 device_type = "cpu";
40 compatible = "arm,cortex-a9"; 41 compatible = "arm,cortex-a9";
41 reg = <0x900>; 42 reg = <0x900>;
43 cooling-min-level = <4>;
44 cooling-max-level = <2>;
45 #cooling-cells = <2>; /* min followed by max */
42 }; 46 };
43 47
44 cpu@901 { 48 cpu@901 {
@@ -153,16 +157,38 @@
153 reg = <0x03860000 0x1000>; 157 reg = <0x03860000 0x1000>;
154 }; 158 };
155 159
156 tmu@100C0000 { 160 tmu: tmu@100C0000 {
157 compatible = "samsung,exynos4210-tmu"; 161 compatible = "samsung,exynos4210-tmu";
158 interrupt-parent = <&combiner>; 162 interrupt-parent = <&combiner>;
159 reg = <0x100C0000 0x100>; 163 reg = <0x100C0000 0x100>;
160 interrupts = <2 4>; 164 interrupts = <2 4>;
161 clocks = <&clock CLK_TMU_APBIF>; 165 clocks = <&clock CLK_TMU_APBIF>;
162 clock-names = "tmu_apbif"; 166 clock-names = "tmu_apbif";
167 samsung,tmu_gain = <15>;
168 samsung,tmu_reference_voltage = <7>;
163 status = "disabled"; 169 status = "disabled";
164 }; 170 };
165 171
172 thermal-zones {
173 cpu_thermal: cpu-thermal {
174 polling-delay-passive = <0>;
175 polling-delay = <0>;
176 thermal-sensors = <&tmu 0>;
177
178 trips {
179 cpu_alert0: cpu-alert-0 {
180 temperature = <85000>; /* millicelsius */
181 };
182 cpu_alert1: cpu-alert-1 {
183 temperature = <100000>; /* millicelsius */
184 };
185 cpu_alert2: cpu-alert-2 {
186 temperature = <110000>; /* millicelsius */
187 };
188 };
189 };
190 };
191
166 g2d@12800000 { 192 g2d@12800000 {
167 compatible = "samsung,s5pv210-g2d"; 193 compatible = "samsung,s5pv210-g2d";
168 reg = <0x12800000 0x1000>; 194 reg = <0x12800000 0x1000>;
@@ -203,6 +229,14 @@
203 }; 229 };
204 }; 230 };
205 231
232 mixer: mixer@12C10000 {
233 clock-names = "mixer", "hdmi", "sclk_hdmi", "vp", "mout_mixer",
234 "sclk_mixer";
235 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
236 <&clock CLK_SCLK_HDMI>, <&clock CLK_VP>,
237 <&clock CLK_MOUT_MIXER>, <&clock CLK_SCLK_MIXER>;
238 };
239
206 ppmu_lcd1: ppmu_lcd1@12240000 { 240 ppmu_lcd1: ppmu_lcd1@12240000 {
207 compatible = "samsung,exynos-ppmu"; 241 compatible = "samsung,exynos-ppmu";
208 reg = <0x12240000 0x2000>; 242 reg = <0x12240000 0x2000>;
diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi
index dd0a43ec56da..5be03288f1ee 100644
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -26,10 +26,13 @@
26 #address-cells = <1>; 26 #address-cells = <1>;
27 #size-cells = <0>; 27 #size-cells = <0>;
28 28
29 cpu@A00 { 29 cpu0: cpu@A00 {
30 device_type = "cpu"; 30 device_type = "cpu";
31 compatible = "arm,cortex-a9"; 31 compatible = "arm,cortex-a9";
32 reg = <0xA00>; 32 reg = <0xA00>;
33 cooling-min-level = <13>;
34 cooling-max-level = <7>;
35 #cooling-cells = <2>; /* min followed by max */
33 }; 36 };
34 37
35 cpu@A01 { 38 cpu@A01 {
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index de80b5bba204..adb4f6a97a1d 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -249,6 +249,20 @@
249 regulator-always-on; 249 regulator-always-on;
250 }; 250 };
251 251
252 ldo8_reg: ldo@8 {
253 regulator-compatible = "LDO8";
254 regulator-name = "VDD10_HDMI_1.0V";
255 regulator-min-microvolt = <1000000>;
256 regulator-max-microvolt = <1000000>;
257 };
258
259 ldo10_reg: ldo@10 {
260 regulator-compatible = "LDO10";
261 regulator-name = "VDDQ_MIPIHSI_1.8V";
262 regulator-min-microvolt = <1800000>;
263 regulator-max-microvolt = <1800000>;
264 };
265
252 ldo11_reg: LDO11 { 266 ldo11_reg: LDO11 {
253 regulator-name = "VDD18_ABB1_1.8V"; 267 regulator-name = "VDD18_ABB1_1.8V";
254 regulator-min-microvolt = <1800000>; 268 regulator-min-microvolt = <1800000>;
@@ -411,6 +425,51 @@
411 ehci: ehci@12580000 { 425 ehci: ehci@12580000 {
412 status = "okay"; 426 status = "okay";
413 }; 427 };
428
429 tmu@100C0000 {
430 vtmu-supply = <&ldo10_reg>;
431 status = "okay";
432 };
433
434 thermal-zones {
435 cpu_thermal: cpu-thermal {
436 cooling-maps {
437 map0 {
438 /* Corresponds to 800MHz at freq_table */
439 cooling-device = <&cpu0 7 7>;
440 };
441 map1 {
442 /* Corresponds to 200MHz at freq_table */
443 cooling-device = <&cpu0 13 13>;
444 };
445 };
446 };
447 };
448
449 mixer: mixer@12C10000 {
450 status = "okay";
451 };
452
453 hdmi@12D00000 {
454 hpd-gpio = <&gpx3 7 0>;
455 pinctrl-names = "default";
456 pinctrl-0 = <&hdmi_hpd>;
457 vdd-supply = <&ldo8_reg>;
458 vdd_osc-supply = <&ldo10_reg>;
459 vdd_pll-supply = <&ldo8_reg>;
460 ddc = <&hdmi_ddc>;
461 status = "okay";
462 };
463
464 hdmi_ddc: i2c@13880000 {
465 status = "okay";
466 pinctrl-names = "default";
467 pinctrl-0 = <&i2c2_bus>;
468 };
469
470 i2c@138E0000 {
471 status = "okay";
472 };
414}; 473};
415 474
416&pinctrl_1 { 475&pinctrl_1 {
@@ -425,4 +484,9 @@
425 samsung,pin-pud = <0>; 484 samsung,pin-pud = <0>;
426 samsung,pin-drv = <0>; 485 samsung,pin-drv = <0>;
427 }; 486 };
487
488 hdmi_hpd: hdmi-hpd {
489 samsung,pins = "gpx3-7";
490 samsung,pin-pud = <1>;
491 };
428}; 492};
diff --git a/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi b/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi
new file mode 100644
index 000000000000..e3f7934d19d0
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi
@@ -0,0 +1,24 @@
1/*
2 * Device tree sources for Exynos4412 TMU sensor configuration
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <dt-bindings/thermal/thermal_exynos.h>
13
14#thermal-sensor-cells = <0>;
15samsung,tmu_gain = <8>;
16samsung,tmu_reference_voltage = <16>;
17samsung,tmu_noise_cancel_mode = <4>;
18samsung,tmu_efuse_value = <55>;
19samsung,tmu_min_efuse_value = <40>;
20samsung,tmu_max_efuse_value = <100>;
21samsung,tmu_first_point_trim = <25>;
22samsung,tmu_second_point_trim = <85>;
23samsung,tmu_default_temp_offset = <50>;
24samsung,tmu_cal_type = <TYPE_ONE_POINT_TRIMMING>;
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index 21f748083586..173ffa479ad3 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -927,6 +927,21 @@
927 pulldown-ohm = <100000>; /* 100K */ 927 pulldown-ohm = <100000>; /* 100K */
928 io-channels = <&adc 2>; /* Battery temperature */ 928 io-channels = <&adc 2>; /* Battery temperature */
929 }; 929 };
930
931 thermal-zones {
932 cpu_thermal: cpu-thermal {
933 cooling-maps {
934 map0 {
935 /* Corresponds to 800MHz at freq_table */
936 cooling-device = <&cpu0 7 7>;
937 };
938 map1 {
939 /* Corresponds to 200MHz at freq_table */
940 cooling-device = <&cpu0 13 13>;
941 };
942 };
943 };
944 };
930}; 945};
931 946
932&pmu_system_controller { 947&pmu_system_controller {
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 0f6ec93bb1d8..68ad43b391ae 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -26,10 +26,13 @@
26 #address-cells = <1>; 26 #address-cells = <1>;
27 #size-cells = <0>; 27 #size-cells = <0>;
28 28
29 cpu@A00 { 29 cpu0: cpu@A00 {
30 device_type = "cpu"; 30 device_type = "cpu";
31 compatible = "arm,cortex-a9"; 31 compatible = "arm,cortex-a9";
32 reg = <0xA00>; 32 reg = <0xA00>;
33 cooling-min-level = <13>;
34 cooling-max-level = <7>;
35 #cooling-cells = <2>; /* min followed by max */
33 }; 36 };
34 37
35 cpu@A01 { 38 cpu@A01 {
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index f5e0ae780d6c..6a6abe14fd9b 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -19,6 +19,7 @@
19 19
20#include "exynos4.dtsi" 20#include "exynos4.dtsi"
21#include "exynos4x12-pinctrl.dtsi" 21#include "exynos4x12-pinctrl.dtsi"
22#include "exynos4-cpu-thermal.dtsi"
22 23
23/ { 24/ {
24 aliases { 25 aliases {
@@ -297,4 +298,15 @@
297 clock-names = "tmu_apbif"; 298 clock-names = "tmu_apbif";
298 status = "disabled"; 299 status = "disabled";
299 }; 300 };
301
302 hdmi: hdmi@12D00000 {
303 compatible = "samsung,exynos4212-hdmi";
304 };
305
306 mixer: mixer@12C10000 {
307 compatible = "samsung,exynos4212-mixer";
308 clock-names = "mixer", "hdmi", "sclk_hdmi", "vp";
309 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
310 <&clock CLK_SCLK_HDMI>, <&clock CLK_VP>;
311 };
300}; 312};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 9bb1b0b738f5..adbde1adad95 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -20,7 +20,7 @@
20#include <dt-bindings/clock/exynos5250.h> 20#include <dt-bindings/clock/exynos5250.h>
21#include "exynos5.dtsi" 21#include "exynos5.dtsi"
22#include "exynos5250-pinctrl.dtsi" 22#include "exynos5250-pinctrl.dtsi"
23 23#include "exynos4-cpu-thermal.dtsi"
24#include <dt-bindings/clock/exynos-audss-clk.h> 24#include <dt-bindings/clock/exynos-audss-clk.h>
25 25
26/ { 26/ {
@@ -58,11 +58,14 @@
58 #address-cells = <1>; 58 #address-cells = <1>;
59 #size-cells = <0>; 59 #size-cells = <0>;
60 60
61 cpu@0 { 61 cpu0: cpu@0 {
62 device_type = "cpu"; 62 device_type = "cpu";
63 compatible = "arm,cortex-a15"; 63 compatible = "arm,cortex-a15";
64 reg = <0>; 64 reg = <0>;
65 clock-frequency = <1700000000>; 65 clock-frequency = <1700000000>;
66 cooling-min-level = <15>;
67 cooling-max-level = <9>;
68 #cooling-cells = <2>; /* min followed by max */
66 }; 69 };
67 cpu@1 { 70 cpu@1 {
68 device_type = "cpu"; 71 device_type = "cpu";
@@ -102,6 +105,12 @@
102 #power-domain-cells = <0>; 105 #power-domain-cells = <0>;
103 }; 106 };
104 107
108 pd_disp1: disp1-power-domain@100440A0 {
109 compatible = "samsung,exynos4210-pd";
110 reg = <0x100440A0 0x20>;
111 #power-domain-cells = <0>;
112 };
113
105 clock: clock-controller@10010000 { 114 clock: clock-controller@10010000 {
106 compatible = "samsung,exynos5250-clock"; 115 compatible = "samsung,exynos5250-clock";
107 reg = <0x10010000 0x30000>; 116 reg = <0x10010000 0x30000>;
@@ -235,12 +244,32 @@
235 status = "disabled"; 244 status = "disabled";
236 }; 245 };
237 246
238 tmu@10060000 { 247 tmu: tmu@10060000 {
239 compatible = "samsung,exynos5250-tmu"; 248 compatible = "samsung,exynos5250-tmu";
240 reg = <0x10060000 0x100>; 249 reg = <0x10060000 0x100>;
241 interrupts = <0 65 0>; 250 interrupts = <0 65 0>;
242 clocks = <&clock CLK_TMU>; 251 clocks = <&clock CLK_TMU>;
243 clock-names = "tmu_apbif"; 252 clock-names = "tmu_apbif";
253 #include "exynos4412-tmu-sensor-conf.dtsi"
254 };
255
256 thermal-zones {
257 cpu_thermal: cpu-thermal {
258 polling-delay-passive = <0>;
259 polling-delay = <0>;
260 thermal-sensors = <&tmu 0>;
261
262 cooling-maps {
263 map0 {
264 /* Corresponds to 800MHz at freq_table */
265 cooling-device = <&cpu0 9 9>;
266 };
267 map1 {
268 /* Corresponds to 200MHz at freq_table */
269 cooling-device = <&cpu0 15 15>;
270 };
271 };
272 };
244 }; 273 };
245 274
246 serial@12C00000 { 275 serial@12C00000 {
@@ -719,6 +748,7 @@
719 hdmi: hdmi { 748 hdmi: hdmi {
720 compatible = "samsung,exynos4212-hdmi"; 749 compatible = "samsung,exynos4212-hdmi";
721 reg = <0x14530000 0x70000>; 750 reg = <0x14530000 0x70000>;
751 power-domains = <&pd_disp1>;
722 interrupts = <0 95 0>; 752 interrupts = <0 95 0>;
723 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, 753 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
724 <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>, 754 <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
@@ -731,9 +761,11 @@
731 mixer { 761 mixer {
732 compatible = "samsung,exynos5250-mixer"; 762 compatible = "samsung,exynos5250-mixer";
733 reg = <0x14450000 0x10000>; 763 reg = <0x14450000 0x10000>;
764 power-domains = <&pd_disp1>;
734 interrupts = <0 94 0>; 765 interrupts = <0 94 0>;
735 clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>; 766 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
736 clock-names = "mixer", "sclk_hdmi"; 767 <&clock CLK_SCLK_HDMI>;
768 clock-names = "mixer", "hdmi", "sclk_hdmi";
737 }; 769 };
738 770
739 dp_phy: video-phy@10040720 { 771 dp_phy: video-phy@10040720 {
@@ -743,6 +775,7 @@
743 }; 775 };
744 776
745 dp: dp-controller@145B0000 { 777 dp: dp-controller@145B0000 {
778 power-domains = <&pd_disp1>;
746 clocks = <&clock CLK_DP>; 779 clocks = <&clock CLK_DP>;
747 clock-names = "dp"; 780 clock-names = "dp";
748 phys = <&dp_phy>; 781 phys = <&dp_phy>;
@@ -750,6 +783,7 @@
750 }; 783 };
751 784
752 fimd: fimd@14400000 { 785 fimd: fimd@14400000 {
786 power-domains = <&pd_disp1>;
753 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>; 787 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
754 clock-names = "sclk_fimd", "fimd"; 788 clock-names = "sclk_fimd", "fimd";
755 }; 789 };
diff --git a/arch/arm/boot/dts/exynos5420-trip-points.dtsi b/arch/arm/boot/dts/exynos5420-trip-points.dtsi
new file mode 100644
index 000000000000..5d31fc140823
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5420-trip-points.dtsi
@@ -0,0 +1,35 @@
1/*
2 * Device tree sources for default Exynos5420 thermal zone definition
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12polling-delay-passive = <0>;
13polling-delay = <0>;
14trips {
15 cpu-alert-0 {
16 temperature = <85000>; /* millicelsius */
17 hysteresis = <10000>; /* millicelsius */
18 type = "active";
19 };
20 cpu-alert-1 {
21 temperature = <103000>; /* millicelsius */
22 hysteresis = <10000>; /* millicelsius */
23 type = "active";
24 };
25 cpu-alert-2 {
26 temperature = <110000>; /* millicelsius */
27 hysteresis = <10000>; /* millicelsius */
28 type = "active";
29 };
30 cpu-crit-0 {
31 temperature = <1200000>; /* millicelsius */
32 hysteresis = <0>; /* millicelsius */
33 type = "critical";
34 };
35};
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 9dc2e9773b30..c0e98cf3514f 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -740,8 +740,9 @@
740 compatible = "samsung,exynos5420-mixer"; 740 compatible = "samsung,exynos5420-mixer";
741 reg = <0x14450000 0x10000>; 741 reg = <0x14450000 0x10000>;
742 interrupts = <0 94 0>; 742 interrupts = <0 94 0>;
743 clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>; 743 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
744 clock-names = "mixer", "sclk_hdmi"; 744 <&clock CLK_SCLK_HDMI>;
745 clock-names = "mixer", "hdmi", "sclk_hdmi";
745 power-domains = <&disp_pd>; 746 power-domains = <&disp_pd>;
746 }; 747 };
747 748
@@ -782,6 +783,7 @@
782 interrupts = <0 65 0>; 783 interrupts = <0 65 0>;
783 clocks = <&clock CLK_TMU>; 784 clocks = <&clock CLK_TMU>;
784 clock-names = "tmu_apbif"; 785 clock-names = "tmu_apbif";
786 #include "exynos4412-tmu-sensor-conf.dtsi"
785 }; 787 };
786 788
787 tmu_cpu1: tmu@10064000 { 789 tmu_cpu1: tmu@10064000 {
@@ -790,6 +792,7 @@
790 interrupts = <0 183 0>; 792 interrupts = <0 183 0>;
791 clocks = <&clock CLK_TMU>; 793 clocks = <&clock CLK_TMU>;
792 clock-names = "tmu_apbif"; 794 clock-names = "tmu_apbif";
795 #include "exynos4412-tmu-sensor-conf.dtsi"
793 }; 796 };
794 797
795 tmu_cpu2: tmu@10068000 { 798 tmu_cpu2: tmu@10068000 {
@@ -798,6 +801,7 @@
798 interrupts = <0 184 0>; 801 interrupts = <0 184 0>;
799 clocks = <&clock CLK_TMU>, <&clock CLK_TMU>; 802 clocks = <&clock CLK_TMU>, <&clock CLK_TMU>;
800 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 803 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
804 #include "exynos4412-tmu-sensor-conf.dtsi"
801 }; 805 };
802 806
803 tmu_cpu3: tmu@1006c000 { 807 tmu_cpu3: tmu@1006c000 {
@@ -806,6 +810,7 @@
806 interrupts = <0 185 0>; 810 interrupts = <0 185 0>;
807 clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>; 811 clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>;
808 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 812 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
813 #include "exynos4412-tmu-sensor-conf.dtsi"
809 }; 814 };
810 815
811 tmu_gpu: tmu@100a0000 { 816 tmu_gpu: tmu@100a0000 {
@@ -814,6 +819,30 @@
814 interrupts = <0 215 0>; 819 interrupts = <0 215 0>;
815 clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>; 820 clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>;
816 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 821 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
822 #include "exynos4412-tmu-sensor-conf.dtsi"
823 };
824
825 thermal-zones {
826 cpu0_thermal: cpu0-thermal {
827 thermal-sensors = <&tmu_cpu0>;
828 #include "exynos5420-trip-points.dtsi"
829 };
830 cpu1_thermal: cpu1-thermal {
831 thermal-sensors = <&tmu_cpu1>;
832 #include "exynos5420-trip-points.dtsi"
833 };
834 cpu2_thermal: cpu2-thermal {
835 thermal-sensors = <&tmu_cpu2>;
836 #include "exynos5420-trip-points.dtsi"
837 };
838 cpu3_thermal: cpu3-thermal {
839 thermal-sensors = <&tmu_cpu3>;
840 #include "exynos5420-trip-points.dtsi"
841 };
842 gpu_thermal: gpu-thermal {
843 thermal-sensors = <&tmu_gpu>;
844 #include "exynos5420-trip-points.dtsi"
845 };
817 }; 846 };
818 847
819 watchdog: watchdog@101D0000 { 848 watchdog: watchdog@101D0000 {
diff --git a/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi b/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi
new file mode 100644
index 000000000000..7b2fba0ae92b
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi
@@ -0,0 +1,24 @@
1/*
2 * Device tree sources for Exynos5440 TMU sensor configuration
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <dt-bindings/thermal/thermal_exynos.h>
13
14#thermal-sensor-cells = <0>;
15samsung,tmu_gain = <5>;
16samsung,tmu_reference_voltage = <16>;
17samsung,tmu_noise_cancel_mode = <4>;
18samsung,tmu_efuse_value = <0x5d2d>;
19samsung,tmu_min_efuse_value = <16>;
20samsung,tmu_max_efuse_value = <76>;
21samsung,tmu_first_point_trim = <25>;
22samsung,tmu_second_point_trim = <70>;
23samsung,tmu_default_temp_offset = <25>;
24samsung,tmu_cal_type = <TYPE_ONE_POINT_TRIMMING>;
diff --git a/arch/arm/boot/dts/exynos5440-trip-points.dtsi b/arch/arm/boot/dts/exynos5440-trip-points.dtsi
new file mode 100644
index 000000000000..48adfa8f4300
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5440-trip-points.dtsi
@@ -0,0 +1,25 @@
1/*
2 * Device tree sources for default Exynos5440 thermal zone definition
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12polling-delay-passive = <0>;
13polling-delay = <0>;
14trips {
15 cpu-alert-0 {
16 temperature = <100000>; /* millicelsius */
17 hysteresis = <0>; /* millicelsius */
18 type = "active";
19 };
20 cpu-crit-0 {
21 temperature = <1050000>; /* millicelsius */
22 hysteresis = <0>; /* millicelsius */
23 type = "critical";
24 };
25};
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 8f3373cd7b87..59d9416b3b03 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -219,6 +219,7 @@
219 interrupts = <0 58 0>; 219 interrupts = <0 58 0>;
220 clocks = <&clock CLK_B_125>; 220 clocks = <&clock CLK_B_125>;
221 clock-names = "tmu_apbif"; 221 clock-names = "tmu_apbif";
222 #include "exynos5440-tmu-sensor-conf.dtsi"
222 }; 223 };
223 224
224 tmuctrl_1: tmuctrl@16011C { 225 tmuctrl_1: tmuctrl@16011C {
@@ -227,6 +228,7 @@
227 interrupts = <0 58 0>; 228 interrupts = <0 58 0>;
228 clocks = <&clock CLK_B_125>; 229 clocks = <&clock CLK_B_125>;
229 clock-names = "tmu_apbif"; 230 clock-names = "tmu_apbif";
231 #include "exynos5440-tmu-sensor-conf.dtsi"
230 }; 232 };
231 233
232 tmuctrl_2: tmuctrl@160120 { 234 tmuctrl_2: tmuctrl@160120 {
@@ -235,6 +237,22 @@
235 interrupts = <0 58 0>; 237 interrupts = <0 58 0>;
236 clocks = <&clock CLK_B_125>; 238 clocks = <&clock CLK_B_125>;
237 clock-names = "tmu_apbif"; 239 clock-names = "tmu_apbif";
240 #include "exynos5440-tmu-sensor-conf.dtsi"
241 };
242
243 thermal-zones {
244 cpu0_thermal: cpu0-thermal {
245 thermal-sensors = <&tmuctrl_0>;
246 #include "exynos5440-trip-points.dtsi"
247 };
248 cpu1_thermal: cpu1-thermal {
249 thermal-sensors = <&tmuctrl_1>;
250 #include "exynos5440-trip-points.dtsi"
251 };
252 cpu2_thermal: cpu2-thermal {
253 thermal-sensors = <&tmuctrl_2>;
254 #include "exynos5440-trip-points.dtsi"
255 };
238 }; 256 };
239 257
240 sata@210000 { 258 sata@210000 {
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index f1cd2147421d..a626e6dd8022 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -35,6 +35,7 @@
35 regulator-max-microvolt = <5000000>; 35 regulator-max-microvolt = <5000000>;
36 gpio = <&gpio3 22 0>; 36 gpio = <&gpio3 22 0>;
37 enable-active-high; 37 enable-active-high;
38 vin-supply = <&swbst_reg>;
38 }; 39 };
39 40
40 reg_usb_h1_vbus: regulator@1 { 41 reg_usb_h1_vbus: regulator@1 {
@@ -45,6 +46,7 @@
45 regulator-max-microvolt = <5000000>; 46 regulator-max-microvolt = <5000000>;
46 gpio = <&gpio1 29 0>; 47 gpio = <&gpio1 29 0>;
47 enable-active-high; 48 enable-active-high;
49 vin-supply = <&swbst_reg>;
48 }; 50 };
49 51
50 reg_audio: regulator@2 { 52 reg_audio: regulator@2 {
diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
index fda4932faefd..945887d3fdb3 100644
--- a/arch/arm/boot/dts/imx6sl-evk.dts
+++ b/arch/arm/boot/dts/imx6sl-evk.dts
@@ -52,6 +52,7 @@
52 regulator-max-microvolt = <5000000>; 52 regulator-max-microvolt = <5000000>;
53 gpio = <&gpio4 0 0>; 53 gpio = <&gpio4 0 0>;
54 enable-active-high; 54 enable-active-high;
55 vin-supply = <&swbst_reg>;
55 }; 56 };
56 57
57 reg_usb_otg2_vbus: regulator@1 { 58 reg_usb_otg2_vbus: regulator@1 {
@@ -62,6 +63,7 @@
62 regulator-max-microvolt = <5000000>; 63 regulator-max-microvolt = <5000000>;
63 gpio = <&gpio4 2 0>; 64 gpio = <&gpio4 2 0>;
64 enable-active-high; 65 enable-active-high;
66 vin-supply = <&swbst_reg>;
65 }; 67 };
66 68
67 reg_aud3v: regulator@2 { 69 reg_aud3v: regulator@2 {
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index 59d1c297bb30..578fa2a54dce 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -87,8 +87,8 @@
87 <14>, 87 <14>,
88 <15>; 88 <15>;
89 #dma-cells = <1>; 89 #dma-cells = <1>;
90 #dma-channels = <32>; 90 dma-channels = <32>;
91 #dma-requests = <64>; 91 dma-requests = <64>;
92 }; 92 };
93 93
94 i2c1: i2c@48070000 { 94 i2c1: i2c@48070000 {
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 60403273f83e..db80f9d376fa 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -16,6 +16,13 @@
16 model = "Nokia N900"; 16 model = "Nokia N900";
17 compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3"; 17 compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
18 18
19 aliases {
20 i2c0;
21 i2c1 = &i2c1;
22 i2c2 = &i2c2;
23 i2c3 = &i2c3;
24 };
25
19 cpus { 26 cpus {
20 cpu@0 { 27 cpu@0 {
21 cpu0-supply = <&vcc>; 28 cpu0-supply = <&vcc>;
@@ -704,7 +711,7 @@
704 compatible = "smsc,lan91c94"; 711 compatible = "smsc,lan91c94";
705 interrupt-parent = <&gpio2>; 712 interrupt-parent = <&gpio2>;
706 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */ 713 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */
707 reg = <1 0x300 0xf>; /* 16 byte IO range at offset 0x300 */ 714 reg = <1 0 0xf>; /* 16 byte IO range */
708 bank-width = <2>; 715 bank-width = <2>;
709 pinctrl-names = "default"; 716 pinctrl-names = "default";
710 pinctrl-0 = <&ethernet_pins>; 717 pinctrl-0 = <&ethernet_pins>;
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 01b71111bd55..f4f78c40b564 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -155,8 +155,8 @@
155 <14>, 155 <14>,
156 <15>; 156 <15>;
157 #dma-cells = <1>; 157 #dma-cells = <1>;
158 #dma-channels = <32>; 158 dma-channels = <32>;
159 #dma-requests = <96>; 159 dma-requests = <96>;
160 }; 160 };
161 161
162 omap3_pmx_core: pinmux@48002030 { 162 omap3_pmx_core: pinmux@48002030 {
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 074147cebae4..87401d9f4d8b 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -223,8 +223,8 @@
223 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 223 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
224 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 224 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
225 #dma-cells = <1>; 225 #dma-cells = <1>;
226 #dma-channels = <32>; 226 dma-channels = <32>;
227 #dma-requests = <127>; 227 dma-requests = <127>;
228 }; 228 };
229 229
230 gpio1: gpio@4a310000 { 230 gpio1: gpio@4a310000 {
diff --git a/arch/arm/boot/dts/omap5-core-thermal.dtsi b/arch/arm/boot/dts/omap5-core-thermal.dtsi
index 19212ac6eef0..de8a3d456cf7 100644
--- a/arch/arm/boot/dts/omap5-core-thermal.dtsi
+++ b/arch/arm/boot/dts/omap5-core-thermal.dtsi
@@ -13,7 +13,7 @@
13 13
14core_thermal: core_thermal { 14core_thermal: core_thermal {
15 polling-delay-passive = <250>; /* milliseconds */ 15 polling-delay-passive = <250>; /* milliseconds */
16 polling-delay = <1000>; /* milliseconds */ 16 polling-delay = <500>; /* milliseconds */
17 17
18 /* sensor ID */ 18 /* sensor ID */
19 thermal-sensors = <&bandgap 2>; 19 thermal-sensors = <&bandgap 2>;
diff --git a/arch/arm/boot/dts/omap5-gpu-thermal.dtsi b/arch/arm/boot/dts/omap5-gpu-thermal.dtsi
index 1b87aca88b77..bc3090f2e84b 100644
--- a/arch/arm/boot/dts/omap5-gpu-thermal.dtsi
+++ b/arch/arm/boot/dts/omap5-gpu-thermal.dtsi
@@ -13,7 +13,7 @@
13 13
14gpu_thermal: gpu_thermal { 14gpu_thermal: gpu_thermal {
15 polling-delay-passive = <250>; /* milliseconds */ 15 polling-delay-passive = <250>; /* milliseconds */
16 polling-delay = <1000>; /* milliseconds */ 16 polling-delay = <500>; /* milliseconds */
17 17
18 /* sensor ID */ 18 /* sensor ID */
19 thermal-sensors = <&bandgap 1>; 19 thermal-sensors = <&bandgap 1>;
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index b321fdf42c9f..4a485b63a141 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -238,8 +238,8 @@
238 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 238 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
239 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 239 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
240 #dma-cells = <1>; 240 #dma-cells = <1>;
241 #dma-channels = <32>; 241 dma-channels = <32>;
242 #dma-requests = <127>; 242 dma-requests = <127>;
243 }; 243 };
244 244
245 gpio1: gpio@4ae10000 { 245 gpio1: gpio@4ae10000 {
@@ -929,8 +929,8 @@
929 <0x4A096800 0x40>; /* pll_ctrl */ 929 <0x4A096800 0x40>; /* pll_ctrl */
930 reg-names = "phy_rx", "phy_tx", "pll_ctrl"; 930 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
931 ctrl-module = <&omap_control_sata>; 931 ctrl-module = <&omap_control_sata>;
932 clocks = <&sys_clkin>; 932 clocks = <&sys_clkin>, <&sata_ref_clk>;
933 clock-names = "sysclk"; 933 clock-names = "sysclk", "refclk";
934 #phy-cells = <0>; 934 #phy-cells = <0>;
935 }; 935 };
936 }; 936 };
@@ -1079,4 +1079,8 @@
1079 }; 1079 };
1080}; 1080};
1081 1081
1082&cpu_thermal {
1083 polling-delay = <500>; /* milliseconds */
1084};
1085
1082/include/ "omap54xx-clocks.dtsi" 1086/include/ "omap54xx-clocks.dtsi"
diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi
index 58c27466f012..83b425fb3ac2 100644
--- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
@@ -167,10 +167,18 @@
167 ti,index-starts-at-one; 167 ti,index-starts-at-one;
168 }; 168 };
169 169
170 dpll_core_byp_mux: dpll_core_byp_mux {
171 #clock-cells = <0>;
172 compatible = "ti,mux-clock";
173 clocks = <&sys_clkin>, <&dpll_abe_m3x2_ck>;
174 ti,bit-shift = <23>;
175 reg = <0x012c>;
176 };
177
170 dpll_core_ck: dpll_core_ck { 178 dpll_core_ck: dpll_core_ck {
171 #clock-cells = <0>; 179 #clock-cells = <0>;
172 compatible = "ti,omap4-dpll-core-clock"; 180 compatible = "ti,omap4-dpll-core-clock";
173 clocks = <&sys_clkin>, <&dpll_abe_m3x2_ck>; 181 clocks = <&sys_clkin>, <&dpll_core_byp_mux>;
174 reg = <0x0120>, <0x0124>, <0x012c>, <0x0128>; 182 reg = <0x0120>, <0x0124>, <0x012c>, <0x0128>;
175 }; 183 };
176 184
@@ -294,10 +302,18 @@
294 clock-div = <1>; 302 clock-div = <1>;
295 }; 303 };
296 304
305 dpll_iva_byp_mux: dpll_iva_byp_mux {
306 #clock-cells = <0>;
307 compatible = "ti,mux-clock";
308 clocks = <&sys_clkin>, <&iva_dpll_hs_clk_div>;
309 ti,bit-shift = <23>;
310 reg = <0x01ac>;
311 };
312
297 dpll_iva_ck: dpll_iva_ck { 313 dpll_iva_ck: dpll_iva_ck {
298 #clock-cells = <0>; 314 #clock-cells = <0>;
299 compatible = "ti,omap4-dpll-clock"; 315 compatible = "ti,omap4-dpll-clock";
300 clocks = <&sys_clkin>, <&iva_dpll_hs_clk_div>; 316 clocks = <&sys_clkin>, <&dpll_iva_byp_mux>;
301 reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>; 317 reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>;
302 }; 318 };
303 319
@@ -599,10 +615,19 @@
599 }; 615 };
600}; 616};
601&cm_core_clocks { 617&cm_core_clocks {
618
619 dpll_per_byp_mux: dpll_per_byp_mux {
620 #clock-cells = <0>;
621 compatible = "ti,mux-clock";
622 clocks = <&sys_clkin>, <&per_dpll_hs_clk_div>;
623 ti,bit-shift = <23>;
624 reg = <0x014c>;
625 };
626
602 dpll_per_ck: dpll_per_ck { 627 dpll_per_ck: dpll_per_ck {
603 #clock-cells = <0>; 628 #clock-cells = <0>;
604 compatible = "ti,omap4-dpll-clock"; 629 compatible = "ti,omap4-dpll-clock";
605 clocks = <&sys_clkin>, <&per_dpll_hs_clk_div>; 630 clocks = <&sys_clkin>, <&dpll_per_byp_mux>;
606 reg = <0x0140>, <0x0144>, <0x014c>, <0x0148>; 631 reg = <0x0140>, <0x0144>, <0x014c>, <0x0148>;
607 }; 632 };
608 633
@@ -714,10 +739,18 @@
714 ti,index-starts-at-one; 739 ti,index-starts-at-one;
715 }; 740 };
716 741
742 dpll_usb_byp_mux: dpll_usb_byp_mux {
743 #clock-cells = <0>;
744 compatible = "ti,mux-clock";
745 clocks = <&sys_clkin>, <&usb_dpll_hs_clk_div>;
746 ti,bit-shift = <23>;
747 reg = <0x018c>;
748 };
749
717 dpll_usb_ck: dpll_usb_ck { 750 dpll_usb_ck: dpll_usb_ck {
718 #clock-cells = <0>; 751 #clock-cells = <0>;
719 compatible = "ti,omap4-dpll-j-type-clock"; 752 compatible = "ti,omap4-dpll-j-type-clock";
720 clocks = <&sys_clkin>, <&usb_dpll_hs_clk_div>; 753 clocks = <&sys_clkin>, <&dpll_usb_byp_mux>;
721 reg = <0x0180>, <0x0184>, <0x018c>, <0x0188>; 754 reg = <0x0180>, <0x0184>, <0x018c>, <0x0188>;
722 }; 755 };
723 756
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 261311bdf65b..367af53c1b84 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -1248,7 +1248,6 @@
1248 atmel,watchdog-type = "hardware"; 1248 atmel,watchdog-type = "hardware";
1249 atmel,reset-type = "all"; 1249 atmel,reset-type = "all";
1250 atmel,dbg-halt; 1250 atmel,dbg-halt;
1251 atmel,idle-halt;
1252 status = "disabled"; 1251 status = "disabled";
1253 }; 1252 };
1254 1253
@@ -1416,7 +1415,7 @@
1416 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 1415 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1417 reg = <0x00700000 0x100000>; 1416 reg = <0x00700000 0x100000>;
1418 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; 1417 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1419 clocks = <&usb>, <&uhphs_clk>, <&uhpck>; 1418 clocks = <&utmi>, <&uhphs_clk>, <&uhpck>;
1420 clock-names = "usb_clk", "ehci_clk", "uhpck"; 1419 clock-names = "usb_clk", "ehci_clk", "uhpck";
1421 status = "disabled"; 1420 status = "disabled";
1422 }; 1421 };
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index d986b41b9654..4303874889c6 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -66,6 +66,7 @@
66 gpio4 = &pioE; 66 gpio4 = &pioE;
67 tcb0 = &tcb0; 67 tcb0 = &tcb0;
68 tcb1 = &tcb1; 68 tcb1 = &tcb1;
69 i2c0 = &i2c0;
69 i2c2 = &i2c2; 70 i2c2 = &i2c2;
70 }; 71 };
71 cpus { 72 cpus {
@@ -259,7 +260,7 @@
259 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 260 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
260 reg = <0x00600000 0x100000>; 261 reg = <0x00600000 0x100000>;
261 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>; 262 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
262 clocks = <&usb>, <&uhphs_clk>, <&uhpck>; 263 clocks = <&utmi>, <&uhphs_clk>, <&uhpck>;
263 clock-names = "usb_clk", "ehci_clk", "uhpck"; 264 clock-names = "usb_clk", "ehci_clk", "uhpck";
264 status = "disabled"; 265 status = "disabled";
265 }; 266 };
@@ -461,8 +462,8 @@
461 462
462 lcdck: lcdck { 463 lcdck: lcdck {
463 #clock-cells = <0>; 464 #clock-cells = <0>;
464 reg = <4>; 465 reg = <3>;
465 clocks = <&smd>; 466 clocks = <&mck>;
466 }; 467 };
467 468
468 smdck: smdck { 469 smdck: smdck {
@@ -770,7 +771,7 @@
770 reg = <50>; 771 reg = <50>;
771 }; 772 };
772 773
773 lcd_clk: lcd_clk { 774 lcdc_clk: lcdc_clk {
774 #clock-cells = <0>; 775 #clock-cells = <0>;
775 reg = <51>; 776 reg = <51>;
776 }; 777 };
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 252c3d1bda50..9d8760956752 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -713,6 +713,9 @@
713 reg-shift = <2>; 713 reg-shift = <2>;
714 reg-io-width = <4>; 714 reg-io-width = <4>;
715 clocks = <&l4_sp_clk>; 715 clocks = <&l4_sp_clk>;
716 dmas = <&pdma 28>,
717 <&pdma 29>;
718 dma-names = "tx", "rx";
716 }; 719 };
717 720
718 uart1: serial1@ffc03000 { 721 uart1: serial1@ffc03000 {
@@ -722,6 +725,9 @@
722 reg-shift = <2>; 725 reg-shift = <2>;
723 reg-io-width = <4>; 726 reg-io-width = <4>;
724 clocks = <&l4_sp_clk>; 727 clocks = <&l4_sp_clk>;
728 dmas = <&pdma 30>,
729 <&pdma 31>;
730 dma-names = "tx", "rx";
725 }; 731 };
726 732
727 rst: rstmgr@ffd05000 { 733 rst: rstmgr@ffd05000 {
diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig
index f2670f638e97..811e72bbe642 100644
--- a/arch/arm/configs/at91_dt_defconfig
+++ b/arch/arm/configs/at91_dt_defconfig
@@ -70,6 +70,7 @@ CONFIG_SCSI=y
70CONFIG_BLK_DEV_SD=y 70CONFIG_BLK_DEV_SD=y
71# CONFIG_SCSI_LOWLEVEL is not set 71# CONFIG_SCSI_LOWLEVEL is not set
72CONFIG_NETDEVICES=y 72CONFIG_NETDEVICES=y
73CONFIG_ARM_AT91_ETHER=y
73CONFIG_MACB=y 74CONFIG_MACB=y
74# CONFIG_NET_VENDOR_BROADCOM is not set 75# CONFIG_NET_VENDOR_BROADCOM is not set
75CONFIG_DM9000=y 76CONFIG_DM9000=y
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index e8a4c955241b..06075b6d2463 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -62,6 +62,17 @@ CONFIG_MACH_SPEAR1340=y
62CONFIG_ARCH_STI=y 62CONFIG_ARCH_STI=y
63CONFIG_ARCH_EXYNOS=y 63CONFIG_ARCH_EXYNOS=y
64CONFIG_EXYNOS5420_MCPM=y 64CONFIG_EXYNOS5420_MCPM=y
65CONFIG_ARCH_SHMOBILE_MULTI=y
66CONFIG_ARCH_EMEV2=y
67CONFIG_ARCH_R7S72100=y
68CONFIG_ARCH_R8A73A4=y
69CONFIG_ARCH_R8A7740=y
70CONFIG_ARCH_R8A7779=y
71CONFIG_ARCH_R8A7790=y
72CONFIG_ARCH_R8A7791=y
73CONFIG_ARCH_R8A7794=y
74CONFIG_ARCH_SH73A0=y
75CONFIG_MACH_MARZEN=y
65CONFIG_ARCH_SUNXI=y 76CONFIG_ARCH_SUNXI=y
66CONFIG_ARCH_SIRF=y 77CONFIG_ARCH_SIRF=y
67CONFIG_ARCH_TEGRA=y 78CONFIG_ARCH_TEGRA=y
@@ -84,9 +95,11 @@ CONFIG_PCI_KEYSTONE=y
84CONFIG_PCI_MSI=y 95CONFIG_PCI_MSI=y
85CONFIG_PCI_MVEBU=y 96CONFIG_PCI_MVEBU=y
86CONFIG_PCI_TEGRA=y 97CONFIG_PCI_TEGRA=y
98CONFIG_PCI_RCAR_GEN2=y
99CONFIG_PCI_RCAR_GEN2_PCIE=y
87CONFIG_PCIEPORTBUS=y 100CONFIG_PCIEPORTBUS=y
88CONFIG_SMP=y 101CONFIG_SMP=y
89CONFIG_NR_CPUS=8 102CONFIG_NR_CPUS=16
90CONFIG_HIGHPTE=y 103CONFIG_HIGHPTE=y
91CONFIG_CMA=y 104CONFIG_CMA=y
92CONFIG_ARM_APPENDED_DTB=y 105CONFIG_ARM_APPENDED_DTB=y
@@ -130,6 +143,7 @@ CONFIG_DEVTMPFS_MOUNT=y
130CONFIG_DMA_CMA=y 143CONFIG_DMA_CMA=y
131CONFIG_CMA_SIZE_MBYTES=64 144CONFIG_CMA_SIZE_MBYTES=64
132CONFIG_OMAP_OCP2SCP=y 145CONFIG_OMAP_OCP2SCP=y
146CONFIG_SIMPLE_PM_BUS=y
133CONFIG_MTD=y 147CONFIG_MTD=y
134CONFIG_MTD_CMDLINE_PARTS=y 148CONFIG_MTD_CMDLINE_PARTS=y
135CONFIG_MTD_BLOCK=y 149CONFIG_MTD_BLOCK=y
@@ -157,6 +171,7 @@ CONFIG_AHCI_SUNXI=y
157CONFIG_AHCI_TEGRA=y 171CONFIG_AHCI_TEGRA=y
158CONFIG_SATA_HIGHBANK=y 172CONFIG_SATA_HIGHBANK=y
159CONFIG_SATA_MV=y 173CONFIG_SATA_MV=y
174CONFIG_SATA_RCAR=y
160CONFIG_NETDEVICES=y 175CONFIG_NETDEVICES=y
161CONFIG_HIX5HD2_GMAC=y 176CONFIG_HIX5HD2_GMAC=y
162CONFIG_SUN4I_EMAC=y 177CONFIG_SUN4I_EMAC=y
@@ -167,14 +182,17 @@ CONFIG_MV643XX_ETH=y
167CONFIG_MVNETA=y 182CONFIG_MVNETA=y
168CONFIG_KS8851=y 183CONFIG_KS8851=y
169CONFIG_R8169=y 184CONFIG_R8169=y
185CONFIG_SH_ETH=y
170CONFIG_SMSC911X=y 186CONFIG_SMSC911X=y
171CONFIG_STMMAC_ETH=y 187CONFIG_STMMAC_ETH=y
172CONFIG_TI_CPSW=y 188CONFIG_TI_CPSW=y
173CONFIG_XILINX_EMACLITE=y 189CONFIG_XILINX_EMACLITE=y
174CONFIG_AT803X_PHY=y 190CONFIG_AT803X_PHY=y
175CONFIG_MARVELL_PHY=y 191CONFIG_MARVELL_PHY=y
192CONFIG_SMSC_PHY=y
176CONFIG_BROADCOM_PHY=y 193CONFIG_BROADCOM_PHY=y
177CONFIG_ICPLUS_PHY=y 194CONFIG_ICPLUS_PHY=y
195CONFIG_MICREL_PHY=y
178CONFIG_USB_PEGASUS=y 196CONFIG_USB_PEGASUS=y
179CONFIG_USB_USBNET=y 197CONFIG_USB_USBNET=y
180CONFIG_USB_NET_SMSC75XX=y 198CONFIG_USB_NET_SMSC75XX=y
@@ -192,15 +210,18 @@ CONFIG_KEYBOARD_CROS_EC=y
192CONFIG_MOUSE_PS2_ELANTECH=y 210CONFIG_MOUSE_PS2_ELANTECH=y
193CONFIG_INPUT_TOUCHSCREEN=y 211CONFIG_INPUT_TOUCHSCREEN=y
194CONFIG_TOUCHSCREEN_ATMEL_MXT=y 212CONFIG_TOUCHSCREEN_ATMEL_MXT=y
213CONFIG_TOUCHSCREEN_ST1232=m
195CONFIG_TOUCHSCREEN_STMPE=y 214CONFIG_TOUCHSCREEN_STMPE=y
196CONFIG_TOUCHSCREEN_SUN4I=y 215CONFIG_TOUCHSCREEN_SUN4I=y
197CONFIG_INPUT_MISC=y 216CONFIG_INPUT_MISC=y
198CONFIG_INPUT_MPU3050=y 217CONFIG_INPUT_MPU3050=y
199CONFIG_INPUT_AXP20X_PEK=y 218CONFIG_INPUT_AXP20X_PEK=y
219CONFIG_INPUT_ADXL34X=m
200CONFIG_SERIO_AMBAKMI=y 220CONFIG_SERIO_AMBAKMI=y
201CONFIG_SERIAL_8250=y 221CONFIG_SERIAL_8250=y
202CONFIG_SERIAL_8250_CONSOLE=y 222CONFIG_SERIAL_8250_CONSOLE=y
203CONFIG_SERIAL_8250_DW=y 223CONFIG_SERIAL_8250_DW=y
224CONFIG_SERIAL_8250_EM=y
204CONFIG_SERIAL_8250_MT6577=y 225CONFIG_SERIAL_8250_MT6577=y
205CONFIG_SERIAL_AMBA_PL011=y 226CONFIG_SERIAL_AMBA_PL011=y
206CONFIG_SERIAL_AMBA_PL011_CONSOLE=y 227CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
@@ -213,6 +234,9 @@ CONFIG_SERIAL_SIRFSOC_CONSOLE=y
213CONFIG_SERIAL_TEGRA=y 234CONFIG_SERIAL_TEGRA=y
214CONFIG_SERIAL_IMX=y 235CONFIG_SERIAL_IMX=y
215CONFIG_SERIAL_IMX_CONSOLE=y 236CONFIG_SERIAL_IMX_CONSOLE=y
237CONFIG_SERIAL_SH_SCI=y
238CONFIG_SERIAL_SH_SCI_NR_UARTS=20
239CONFIG_SERIAL_SH_SCI_CONSOLE=y
216CONFIG_SERIAL_MSM=y 240CONFIG_SERIAL_MSM=y
217CONFIG_SERIAL_MSM_CONSOLE=y 241CONFIG_SERIAL_MSM_CONSOLE=y
218CONFIG_SERIAL_VT8500=y 242CONFIG_SERIAL_VT8500=y
@@ -233,19 +257,26 @@ CONFIG_I2C_MUX_PCA954x=y
233CONFIG_I2C_MUX_PINCTRL=y 257CONFIG_I2C_MUX_PINCTRL=y
234CONFIG_I2C_CADENCE=y 258CONFIG_I2C_CADENCE=y
235CONFIG_I2C_DESIGNWARE_PLATFORM=y 259CONFIG_I2C_DESIGNWARE_PLATFORM=y
260CONFIG_I2C_GPIO=m
236CONFIG_I2C_EXYNOS5=y 261CONFIG_I2C_EXYNOS5=y
237CONFIG_I2C_MV64XXX=y 262CONFIG_I2C_MV64XXX=y
263CONFIG_I2C_RIIC=y
238CONFIG_I2C_S3C2410=y 264CONFIG_I2C_S3C2410=y
265CONFIG_I2C_SH_MOBILE=y
239CONFIG_I2C_SIRF=y 266CONFIG_I2C_SIRF=y
240CONFIG_I2C_TEGRA=y
241CONFIG_I2C_ST=y 267CONFIG_I2C_ST=y
242CONFIG_SPI=y 268CONFIG_I2C_TEGRA=y
243CONFIG_I2C_XILINX=y 269CONFIG_I2C_XILINX=y
244CONFIG_SPI_DAVINCI=y 270CONFIG_I2C_RCAR=y
271CONFIG_SPI=y
245CONFIG_SPI_CADENCE=y 272CONFIG_SPI_CADENCE=y
273CONFIG_SPI_DAVINCI=y
246CONFIG_SPI_OMAP24XX=y 274CONFIG_SPI_OMAP24XX=y
247CONFIG_SPI_ORION=y 275CONFIG_SPI_ORION=y
248CONFIG_SPI_PL022=y 276CONFIG_SPI_PL022=y
277CONFIG_SPI_RSPI=y
278CONFIG_SPI_SH_MSIOF=m
279CONFIG_SPI_SH_HSPI=y
249CONFIG_SPI_SIRF=y 280CONFIG_SPI_SIRF=y
250CONFIG_SPI_SUN4I=y 281CONFIG_SPI_SUN4I=y
251CONFIG_SPI_SUN6I=y 282CONFIG_SPI_SUN6I=y
@@ -259,12 +290,15 @@ CONFIG_PINCTRL_PALMAS=y
259CONFIG_PINCTRL_APQ8084=y 290CONFIG_PINCTRL_APQ8084=y
260CONFIG_GPIO_SYSFS=y 291CONFIG_GPIO_SYSFS=y
261CONFIG_GPIO_GENERIC_PLATFORM=y 292CONFIG_GPIO_GENERIC_PLATFORM=y
262CONFIG_GPIO_DWAPB=y
263CONFIG_GPIO_DAVINCI=y 293CONFIG_GPIO_DAVINCI=y
294CONFIG_GPIO_DWAPB=y
295CONFIG_GPIO_EM=y
296CONFIG_GPIO_RCAR=y
264CONFIG_GPIO_XILINX=y 297CONFIG_GPIO_XILINX=y
265CONFIG_GPIO_ZYNQ=y 298CONFIG_GPIO_ZYNQ=y
266CONFIG_GPIO_PCA953X=y 299CONFIG_GPIO_PCA953X=y
267CONFIG_GPIO_PCA953X_IRQ=y 300CONFIG_GPIO_PCA953X_IRQ=y
301CONFIG_GPIO_PCF857X=y
268CONFIG_GPIO_TWL4030=y 302CONFIG_GPIO_TWL4030=y
269CONFIG_GPIO_PALMAS=y 303CONFIG_GPIO_PALMAS=y
270CONFIG_GPIO_SYSCON=y 304CONFIG_GPIO_SYSCON=y
@@ -276,10 +310,12 @@ CONFIG_POWER_RESET_AS3722=y
276CONFIG_POWER_RESET_GPIO=y 310CONFIG_POWER_RESET_GPIO=y
277CONFIG_POWER_RESET_KEYSTONE=y 311CONFIG_POWER_RESET_KEYSTONE=y
278CONFIG_POWER_RESET_SUN6I=y 312CONFIG_POWER_RESET_SUN6I=y
313CONFIG_POWER_RESET_RMOBILE=y
279CONFIG_SENSORS_LM90=y 314CONFIG_SENSORS_LM90=y
280CONFIG_SENSORS_LM95245=y 315CONFIG_SENSORS_LM95245=y
281CONFIG_THERMAL=y 316CONFIG_THERMAL=y
282CONFIG_CPU_THERMAL=y 317CONFIG_CPU_THERMAL=y
318CONFIG_RCAR_THERMAL=y
283CONFIG_ARMADA_THERMAL=y 319CONFIG_ARMADA_THERMAL=y
284CONFIG_DAVINCI_WATCHDOG 320CONFIG_DAVINCI_WATCHDOG
285CONFIG_ST_THERMAL_SYSCFG=y 321CONFIG_ST_THERMAL_SYSCFG=y
@@ -290,6 +326,7 @@ CONFIG_ARM_SP805_WATCHDOG=y
290CONFIG_ORION_WATCHDOG=y 326CONFIG_ORION_WATCHDOG=y
291CONFIG_SUNXI_WATCHDOG=y 327CONFIG_SUNXI_WATCHDOG=y
292CONFIG_MESON_WATCHDOG=y 328CONFIG_MESON_WATCHDOG=y
329CONFIG_MFD_AS3711=y
293CONFIG_MFD_AS3722=y 330CONFIG_MFD_AS3722=y
294CONFIG_MFD_BCM590XX=y 331CONFIG_MFD_BCM590XX=y
295CONFIG_MFD_AXP20X=y 332CONFIG_MFD_AXP20X=y
@@ -304,13 +341,16 @@ CONFIG_MFD_TPS65090=y
304CONFIG_MFD_TPS6586X=y 341CONFIG_MFD_TPS6586X=y
305CONFIG_MFD_TPS65910=y 342CONFIG_MFD_TPS65910=y
306CONFIG_REGULATOR_AB8500=y 343CONFIG_REGULATOR_AB8500=y
344CONFIG_REGULATOR_AS3711=y
307CONFIG_REGULATOR_AS3722=y 345CONFIG_REGULATOR_AS3722=y
308CONFIG_REGULATOR_AXP20X=y 346CONFIG_REGULATOR_AXP20X=y
309CONFIG_REGULATOR_BCM590XX=y 347CONFIG_REGULATOR_BCM590XX=y
348CONFIG_REGULATOR_DA9210=y
310CONFIG_REGULATOR_GPIO=y 349CONFIG_REGULATOR_GPIO=y
311CONFIG_MFD_SYSCON=y 350CONFIG_MFD_SYSCON=y
312CONFIG_POWER_RESET_SYSCON=y 351CONFIG_POWER_RESET_SYSCON=y
313CONFIG_REGULATOR_MAX8907=y 352CONFIG_REGULATOR_MAX8907=y
353CONFIG_REGULATOR_MAX8973=y
314CONFIG_REGULATOR_MAX77686=y 354CONFIG_REGULATOR_MAX77686=y
315CONFIG_REGULATOR_PALMAS=y 355CONFIG_REGULATOR_PALMAS=y
316CONFIG_REGULATOR_S2MPS11=y 356CONFIG_REGULATOR_S2MPS11=y
@@ -324,18 +364,32 @@ CONFIG_REGULATOR_TWL4030=y
324CONFIG_REGULATOR_VEXPRESS=y 364CONFIG_REGULATOR_VEXPRESS=y
325CONFIG_MEDIA_SUPPORT=y 365CONFIG_MEDIA_SUPPORT=y
326CONFIG_MEDIA_CAMERA_SUPPORT=y 366CONFIG_MEDIA_CAMERA_SUPPORT=y
367CONFIG_MEDIA_CONTROLLER=y
368CONFIG_VIDEO_V4L2_SUBDEV_API=y
327CONFIG_MEDIA_USB_SUPPORT=y 369CONFIG_MEDIA_USB_SUPPORT=y
328CONFIG_USB_VIDEO_CLASS=y 370CONFIG_USB_VIDEO_CLASS=y
329CONFIG_USB_GSPCA=y 371CONFIG_USB_GSPCA=y
372CONFIG_V4L_PLATFORM_DRIVERS=y
373CONFIG_SOC_CAMERA=m
374CONFIG_SOC_CAMERA_PLATFORM=m
375CONFIG_VIDEO_RCAR_VIN=m
376CONFIG_V4L_MEM2MEM_DRIVERS=y
377CONFIG_VIDEO_RENESAS_VSP1=m
378# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
379CONFIG_VIDEO_ADV7180=m
330CONFIG_DRM=y 380CONFIG_DRM=y
381CONFIG_DRM_RCAR_DU=m
331CONFIG_DRM_TEGRA=y 382CONFIG_DRM_TEGRA=y
332CONFIG_DRM_PANEL_SIMPLE=y 383CONFIG_DRM_PANEL_SIMPLE=y
333CONFIG_FB_ARMCLCD=y 384CONFIG_FB_ARMCLCD=y
334CONFIG_FB_WM8505=y 385CONFIG_FB_WM8505=y
386CONFIG_FB_SH_MOBILE_LCDC=y
335CONFIG_FB_SIMPLE=y 387CONFIG_FB_SIMPLE=y
388CONFIG_FB_SH_MOBILE_MERAM=y
336CONFIG_BACKLIGHT_LCD_SUPPORT=y 389CONFIG_BACKLIGHT_LCD_SUPPORT=y
337CONFIG_BACKLIGHT_CLASS_DEVICE=y 390CONFIG_BACKLIGHT_CLASS_DEVICE=y
338CONFIG_BACKLIGHT_PWM=y 391CONFIG_BACKLIGHT_PWM=y
392CONFIG_BACKLIGHT_AS3711=y
339CONFIG_FRAMEBUFFER_CONSOLE=y 393CONFIG_FRAMEBUFFER_CONSOLE=y
340CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y 394CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
341CONFIG_SOUND=y 395CONFIG_SOUND=y
@@ -343,6 +397,8 @@ CONFIG_SND=y
343CONFIG_SND_DYNAMIC_MINORS=y 397CONFIG_SND_DYNAMIC_MINORS=y
344CONFIG_SND_USB_AUDIO=y 398CONFIG_SND_USB_AUDIO=y
345CONFIG_SND_SOC=y 399CONFIG_SND_SOC=y
400CONFIG_SND_SOC_SH4_FSI=m
401CONFIG_SND_SOC_RCAR=m
346CONFIG_SND_SOC_TEGRA=y 402CONFIG_SND_SOC_TEGRA=y
347CONFIG_SND_SOC_TEGRA_RT5640=y 403CONFIG_SND_SOC_TEGRA_RT5640=y
348CONFIG_SND_SOC_TEGRA_WM8753=y 404CONFIG_SND_SOC_TEGRA_WM8753=y
@@ -350,6 +406,8 @@ CONFIG_SND_SOC_TEGRA_WM8903=y
350CONFIG_SND_SOC_TEGRA_TRIMSLICE=y 406CONFIG_SND_SOC_TEGRA_TRIMSLICE=y
351CONFIG_SND_SOC_TEGRA_ALC5632=y 407CONFIG_SND_SOC_TEGRA_ALC5632=y
352CONFIG_SND_SOC_TEGRA_MAX98090=y 408CONFIG_SND_SOC_TEGRA_MAX98090=y
409CONFIG_SND_SOC_AK4642=m
410CONFIG_SND_SOC_WM8978=m
353CONFIG_USB=y 411CONFIG_USB=y
354CONFIG_USB_XHCI_HCD=y 412CONFIG_USB_XHCI_HCD=y
355CONFIG_USB_XHCI_MVEBU=y 413CONFIG_USB_XHCI_MVEBU=y
@@ -362,6 +420,8 @@ CONFIG_USB_ISP1760_HCD=y
362CONFIG_USB_OHCI_HCD=y 420CONFIG_USB_OHCI_HCD=y
363CONFIG_USB_OHCI_HCD_STI=y 421CONFIG_USB_OHCI_HCD_STI=y
364CONFIG_USB_OHCI_HCD_PLATFORM=y 422CONFIG_USB_OHCI_HCD_PLATFORM=y
423CONFIG_USB_R8A66597_HCD=m
424CONFIG_USB_RENESAS_USBHS=m
365CONFIG_USB_STORAGE=y 425CONFIG_USB_STORAGE=y
366CONFIG_USB_DWC3=y 426CONFIG_USB_DWC3=y
367CONFIG_USB_CHIPIDEA=y 427CONFIG_USB_CHIPIDEA=y
@@ -374,6 +434,10 @@ CONFIG_SAMSUNG_USB3PHY=y
374CONFIG_USB_GPIO_VBUS=y 434CONFIG_USB_GPIO_VBUS=y
375CONFIG_USB_ISP1301=y 435CONFIG_USB_ISP1301=y
376CONFIG_USB_MXS_PHY=y 436CONFIG_USB_MXS_PHY=y
437CONFIG_USB_RCAR_PHY=m
438CONFIG_USB_RCAR_GEN2_PHY=m
439CONFIG_USB_GADGET=y
440CONFIG_USB_RENESAS_USBHS_UDC=m
377CONFIG_MMC=y 441CONFIG_MMC=y
378CONFIG_MMC_BLOCK_MINORS=16 442CONFIG_MMC_BLOCK_MINORS=16
379CONFIG_MMC_ARMMMCI=y 443CONFIG_MMC_ARMMMCI=y
@@ -392,12 +456,14 @@ CONFIG_MMC_SDHCI_ST=y
392CONFIG_MMC_OMAP=y 456CONFIG_MMC_OMAP=y
393CONFIG_MMC_OMAP_HS=y 457CONFIG_MMC_OMAP_HS=y
394CONFIG_MMC_MVSDIO=y 458CONFIG_MMC_MVSDIO=y
395CONFIG_MMC_SUNXI=y 459CONFIG_MMC_SDHI=y
396CONFIG_MMC_DW=y 460CONFIG_MMC_DW=y
397CONFIG_MMC_DW_IDMAC=y 461CONFIG_MMC_DW_IDMAC=y
398CONFIG_MMC_DW_PLTFM=y 462CONFIG_MMC_DW_PLTFM=y
399CONFIG_MMC_DW_EXYNOS=y 463CONFIG_MMC_DW_EXYNOS=y
400CONFIG_MMC_DW_ROCKCHIP=y 464CONFIG_MMC_DW_ROCKCHIP=y
465CONFIG_MMC_SH_MMCIF=y
466CONFIG_MMC_SUNXI=y
401CONFIG_NEW_LEDS=y 467CONFIG_NEW_LEDS=y
402CONFIG_LEDS_CLASS=y 468CONFIG_LEDS_CLASS=y
403CONFIG_LEDS_GPIO=y 469CONFIG_LEDS_GPIO=y
@@ -421,10 +487,12 @@ CONFIG_RTC_DRV_AS3722=y
421CONFIG_RTC_DRV_DS1307=y 487CONFIG_RTC_DRV_DS1307=y
422CONFIG_RTC_DRV_MAX8907=y 488CONFIG_RTC_DRV_MAX8907=y
423CONFIG_RTC_DRV_MAX77686=y 489CONFIG_RTC_DRV_MAX77686=y
490CONFIG_RTC_DRV_RS5C372=m
424CONFIG_RTC_DRV_PALMAS=y 491CONFIG_RTC_DRV_PALMAS=y
425CONFIG_RTC_DRV_TWL4030=y 492CONFIG_RTC_DRV_TWL4030=y
426CONFIG_RTC_DRV_TPS6586X=y 493CONFIG_RTC_DRV_TPS6586X=y
427CONFIG_RTC_DRV_TPS65910=y 494CONFIG_RTC_DRV_TPS65910=y
495CONFIG_RTC_DRV_S35390A=m
428CONFIG_RTC_DRV_EM3027=y 496CONFIG_RTC_DRV_EM3027=y
429CONFIG_RTC_DRV_PL031=y 497CONFIG_RTC_DRV_PL031=y
430CONFIG_RTC_DRV_VT8500=y 498CONFIG_RTC_DRV_VT8500=y
@@ -436,6 +504,9 @@ CONFIG_DMADEVICES=y
436CONFIG_DW_DMAC=y 504CONFIG_DW_DMAC=y
437CONFIG_MV_XOR=y 505CONFIG_MV_XOR=y
438CONFIG_TEGRA20_APB_DMA=y 506CONFIG_TEGRA20_APB_DMA=y
507CONFIG_SH_DMAE=y
508CONFIG_RCAR_AUDMAC_PP=m
509CONFIG_RCAR_DMAC=y
439CONFIG_STE_DMA40=y 510CONFIG_STE_DMA40=y
440CONFIG_SIRF_DMA=y 511CONFIG_SIRF_DMA=y
441CONFIG_TI_EDMA=y 512CONFIG_TI_EDMA=y
@@ -468,6 +539,7 @@ CONFIG_IIO=y
468CONFIG_XILINX_XADC=y 539CONFIG_XILINX_XADC=y
469CONFIG_AK8975=y 540CONFIG_AK8975=y
470CONFIG_PWM=y 541CONFIG_PWM=y
542CONFIG_PWM_RENESAS_TPU=y
471CONFIG_PWM_TEGRA=y 543CONFIG_PWM_TEGRA=y
472CONFIG_PWM_VT8500=y 544CONFIG_PWM_VT8500=y
473CONFIG_PHY_HIX5HD2_SATA=y 545CONFIG_PHY_HIX5HD2_SATA=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index b7386524c356..8e108599e1af 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -114,6 +114,7 @@ CONFIG_MTD_PHYSMAP_OF=y
114CONFIG_MTD_NAND=y 114CONFIG_MTD_NAND=y
115CONFIG_MTD_NAND_ECC_BCH=y 115CONFIG_MTD_NAND_ECC_BCH=y
116CONFIG_MTD_NAND_OMAP2=y 116CONFIG_MTD_NAND_OMAP2=y
117CONFIG_MTD_NAND_OMAP_BCH=y
117CONFIG_MTD_ONENAND=y 118CONFIG_MTD_ONENAND=y
118CONFIG_MTD_ONENAND_VERIFY_WRITE=y 119CONFIG_MTD_ONENAND_VERIFY_WRITE=y
119CONFIG_MTD_ONENAND_OMAP2=y 120CONFIG_MTD_ONENAND_OMAP2=y
@@ -248,6 +249,7 @@ CONFIG_TWL6040_CORE=y
248CONFIG_REGULATOR_PALMAS=y 249CONFIG_REGULATOR_PALMAS=y
249CONFIG_REGULATOR_PBIAS=y 250CONFIG_REGULATOR_PBIAS=y
250CONFIG_REGULATOR_TI_ABB=y 251CONFIG_REGULATOR_TI_ABB=y
252CONFIG_REGULATOR_TPS62360=m
251CONFIG_REGULATOR_TPS65023=y 253CONFIG_REGULATOR_TPS65023=y
252CONFIG_REGULATOR_TPS6507X=y 254CONFIG_REGULATOR_TPS6507X=y
253CONFIG_REGULATOR_TPS65217=y 255CONFIG_REGULATOR_TPS65217=y
@@ -374,7 +376,8 @@ CONFIG_PWM_TIEHRPWM=m
374CONFIG_PWM_TWL=m 376CONFIG_PWM_TWL=m
375CONFIG_PWM_TWL_LED=m 377CONFIG_PWM_TWL_LED=m
376CONFIG_OMAP_USB2=m 378CONFIG_OMAP_USB2=m
377CONFIG_TI_PIPE3=m 379CONFIG_TI_PIPE3=y
380CONFIG_TWL4030_USB=m
378CONFIG_EXT2_FS=y 381CONFIG_EXT2_FS=y
379CONFIG_EXT3_FS=y 382CONFIG_EXT3_FS=y
380# CONFIG_EXT3_FS_XATTR is not set 383# CONFIG_EXT3_FS_XATTR is not set
diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
index 41d856effe6c..510c747c65b4 100644
--- a/arch/arm/configs/sama5_defconfig
+++ b/arch/arm/configs/sama5_defconfig
@@ -3,8 +3,6 @@
3CONFIG_SYSVIPC=y 3CONFIG_SYSVIPC=y
4CONFIG_IRQ_DOMAIN_DEBUG=y 4CONFIG_IRQ_DOMAIN_DEBUG=y
5CONFIG_LOG_BUF_SHIFT=14 5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_SYSFS_DEPRECATED=y
7CONFIG_SYSFS_DEPRECATED_V2=y
8CONFIG_BLK_DEV_INITRD=y 6CONFIG_BLK_DEV_INITRD=y
9CONFIG_EMBEDDED=y 7CONFIG_EMBEDDED=y
10CONFIG_SLAB=y 8CONFIG_SLAB=y
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index 38840a812924..8f6a5702b696 100644
--- a/arch/arm/configs/sunxi_defconfig
+++ b/arch/arm/configs/sunxi_defconfig
@@ -4,6 +4,7 @@ CONFIG_BLK_DEV_INITRD=y
4CONFIG_PERF_EVENTS=y 4CONFIG_PERF_EVENTS=y
5CONFIG_ARCH_SUNXI=y 5CONFIG_ARCH_SUNXI=y
6CONFIG_SMP=y 6CONFIG_SMP=y
7CONFIG_NR_CPUS=8
7CONFIG_AEABI=y 8CONFIG_AEABI=y
8CONFIG_HIGHMEM=y 9CONFIG_HIGHMEM=y
9CONFIG_HIGHPTE=y 10CONFIG_HIGHPTE=y
diff --git a/arch/arm/configs/vexpress_defconfig b/arch/arm/configs/vexpress_defconfig
index f489fdaa19b8..37fe607a4ede 100644
--- a/arch/arm/configs/vexpress_defconfig
+++ b/arch/arm/configs/vexpress_defconfig
@@ -118,8 +118,8 @@ CONFIG_HID_ZEROPLUS=y
118CONFIG_USB=y 118CONFIG_USB=y
119CONFIG_USB_ANNOUNCE_NEW_DEVICES=y 119CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
120CONFIG_USB_MON=y 120CONFIG_USB_MON=y
121CONFIG_USB_ISP1760_HCD=y
122CONFIG_USB_STORAGE=y 121CONFIG_USB_STORAGE=y
122CONFIG_USB_ISP1760=y
123CONFIG_MMC=y 123CONFIG_MMC=y
124CONFIG_MMC_ARMMMCI=y 124CONFIG_MMC_ARMMMCI=y
125CONFIG_NEW_LEDS=y 125CONFIG_NEW_LEDS=y
diff --git a/arch/arm/include/asm/kvm_mmu.h b/arch/arm/include/asm/kvm_mmu.h
index 37ca2a4c6f09..bf0fe99e8ca9 100644
--- a/arch/arm/include/asm/kvm_mmu.h
+++ b/arch/arm/include/asm/kvm_mmu.h
@@ -207,7 +207,7 @@ static inline void __coherent_cache_guest_page(struct kvm_vcpu *vcpu, pfn_t pfn,
207 207
208 bool need_flush = !vcpu_has_cache_enabled(vcpu) || ipa_uncached; 208 bool need_flush = !vcpu_has_cache_enabled(vcpu) || ipa_uncached;
209 209
210 VM_BUG_ON(size & PAGE_MASK); 210 VM_BUG_ON(size & ~PAGE_MASK);
211 211
212 if (!need_flush && !icache_is_pipt()) 212 if (!need_flush && !icache_is_pipt())
213 goto vipt_cache; 213 goto vipt_cache;
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index b1596bd59129..675e4ab79f68 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -92,6 +92,7 @@ struct pmu_hw_events {
92struct arm_pmu { 92struct arm_pmu {
93 struct pmu pmu; 93 struct pmu pmu;
94 cpumask_t active_irqs; 94 cpumask_t active_irqs;
95 int *irq_affinity;
95 char *name; 96 char *name;
96 irqreturn_t (*handle_irq)(int irq_num, void *dev); 97 irqreturn_t (*handle_irq)(int irq_num, void *dev);
97 void (*enable)(struct perf_event *event); 98 void (*enable)(struct perf_event *event);
diff --git a/arch/arm/include/debug/at91.S b/arch/arm/include/debug/at91.S
index 80a6501b4d50..c3c45e628e33 100644
--- a/arch/arm/include/debug/at91.S
+++ b/arch/arm/include/debug/at91.S
@@ -18,8 +18,11 @@
18#define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */ 18#define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */
19#endif 19#endif
20 20
21/* Keep in sync with mach-at91/include/mach/hardware.h */ 21#ifdef CONFIG_MMU
22#define AT91_IO_P2V(x) ((x) - 0x01000000) 22#define AT91_IO_P2V(x) ((x) - 0x01000000)
23#else
24#define AT91_IO_P2V(x) (x)
25#endif
23 26
24#define AT91_DBGU_SR (0x14) /* Status Register */ 27#define AT91_DBGU_SR (0x14) /* Status Register */
25#define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */ 28#define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 557e128e4df0..4a86a0133ac3 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -259,20 +259,29 @@ out:
259} 259}
260 260
261static int 261static int
262validate_event(struct pmu_hw_events *hw_events, 262validate_event(struct pmu *pmu, struct pmu_hw_events *hw_events,
263 struct perf_event *event) 263 struct perf_event *event)
264{ 264{
265 struct arm_pmu *armpmu = to_arm_pmu(event->pmu); 265 struct arm_pmu *armpmu;
266 266
267 if (is_software_event(event)) 267 if (is_software_event(event))
268 return 1; 268 return 1;
269 269
270 /*
271 * Reject groups spanning multiple HW PMUs (e.g. CPU + CCI). The
272 * core perf code won't check that the pmu->ctx == leader->ctx
273 * until after pmu->event_init(event).
274 */
275 if (event->pmu != pmu)
276 return 0;
277
270 if (event->state < PERF_EVENT_STATE_OFF) 278 if (event->state < PERF_EVENT_STATE_OFF)
271 return 1; 279 return 1;
272 280
273 if (event->state == PERF_EVENT_STATE_OFF && !event->attr.enable_on_exec) 281 if (event->state == PERF_EVENT_STATE_OFF && !event->attr.enable_on_exec)
274 return 1; 282 return 1;
275 283
284 armpmu = to_arm_pmu(event->pmu);
276 return armpmu->get_event_idx(hw_events, event) >= 0; 285 return armpmu->get_event_idx(hw_events, event) >= 0;
277} 286}
278 287
@@ -288,15 +297,15 @@ validate_group(struct perf_event *event)
288 */ 297 */
289 memset(&fake_pmu.used_mask, 0, sizeof(fake_pmu.used_mask)); 298 memset(&fake_pmu.used_mask, 0, sizeof(fake_pmu.used_mask));
290 299
291 if (!validate_event(&fake_pmu, leader)) 300 if (!validate_event(event->pmu, &fake_pmu, leader))
292 return -EINVAL; 301 return -EINVAL;
293 302
294 list_for_each_entry(sibling, &leader->sibling_list, group_entry) { 303 list_for_each_entry(sibling, &leader->sibling_list, group_entry) {
295 if (!validate_event(&fake_pmu, sibling)) 304 if (!validate_event(event->pmu, &fake_pmu, sibling))
296 return -EINVAL; 305 return -EINVAL;
297 } 306 }
298 307
299 if (!validate_event(&fake_pmu, event)) 308 if (!validate_event(event->pmu, &fake_pmu, event))
300 return -EINVAL; 309 return -EINVAL;
301 310
302 return 0; 311 return 0;
diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c
index 61b53c46edfa..91c7ba182dcd 100644
--- a/arch/arm/kernel/perf_event_cpu.c
+++ b/arch/arm/kernel/perf_event_cpu.c
@@ -92,11 +92,16 @@ static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu)
92 free_percpu_irq(irq, &hw_events->percpu_pmu); 92 free_percpu_irq(irq, &hw_events->percpu_pmu);
93 } else { 93 } else {
94 for (i = 0; i < irqs; ++i) { 94 for (i = 0; i < irqs; ++i) {
95 if (!cpumask_test_and_clear_cpu(i, &cpu_pmu->active_irqs)) 95 int cpu = i;
96
97 if (cpu_pmu->irq_affinity)
98 cpu = cpu_pmu->irq_affinity[i];
99
100 if (!cpumask_test_and_clear_cpu(cpu, &cpu_pmu->active_irqs))
96 continue; 101 continue;
97 irq = platform_get_irq(pmu_device, i); 102 irq = platform_get_irq(pmu_device, i);
98 if (irq >= 0) 103 if (irq >= 0)
99 free_irq(irq, per_cpu_ptr(&hw_events->percpu_pmu, i)); 104 free_irq(irq, per_cpu_ptr(&hw_events->percpu_pmu, cpu));
100 } 105 }
101 } 106 }
102} 107}
@@ -128,32 +133,37 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
128 on_each_cpu(cpu_pmu_enable_percpu_irq, &irq, 1); 133 on_each_cpu(cpu_pmu_enable_percpu_irq, &irq, 1);
129 } else { 134 } else {
130 for (i = 0; i < irqs; ++i) { 135 for (i = 0; i < irqs; ++i) {
136 int cpu = i;
137
131 err = 0; 138 err = 0;
132 irq = platform_get_irq(pmu_device, i); 139 irq = platform_get_irq(pmu_device, i);
133 if (irq < 0) 140 if (irq < 0)
134 continue; 141 continue;
135 142
143 if (cpu_pmu->irq_affinity)
144 cpu = cpu_pmu->irq_affinity[i];
145
136 /* 146 /*
137 * If we have a single PMU interrupt that we can't shift, 147 * If we have a single PMU interrupt that we can't shift,
138 * assume that we're running on a uniprocessor machine and 148 * assume that we're running on a uniprocessor machine and
139 * continue. Otherwise, continue without this interrupt. 149 * continue. Otherwise, continue without this interrupt.
140 */ 150 */
141 if (irq_set_affinity(irq, cpumask_of(i)) && irqs > 1) { 151 if (irq_set_affinity(irq, cpumask_of(cpu)) && irqs > 1) {
142 pr_warn("unable to set irq affinity (irq=%d, cpu=%u)\n", 152 pr_warn("unable to set irq affinity (irq=%d, cpu=%u)\n",
143 irq, i); 153 irq, cpu);
144 continue; 154 continue;
145 } 155 }
146 156
147 err = request_irq(irq, handler, 157 err = request_irq(irq, handler,
148 IRQF_NOBALANCING | IRQF_NO_THREAD, "arm-pmu", 158 IRQF_NOBALANCING | IRQF_NO_THREAD, "arm-pmu",
149 per_cpu_ptr(&hw_events->percpu_pmu, i)); 159 per_cpu_ptr(&hw_events->percpu_pmu, cpu));
150 if (err) { 160 if (err) {
151 pr_err("unable to request IRQ%d for ARM PMU counters\n", 161 pr_err("unable to request IRQ%d for ARM PMU counters\n",
152 irq); 162 irq);
153 return err; 163 return err;
154 } 164 }
155 165
156 cpumask_set_cpu(i, &cpu_pmu->active_irqs); 166 cpumask_set_cpu(cpu, &cpu_pmu->active_irqs);
157 } 167 }
158 } 168 }
159 169
@@ -243,6 +253,8 @@ static const struct of_device_id cpu_pmu_of_device_ids[] = {
243 {.compatible = "arm,arm1176-pmu", .data = armv6_1176_pmu_init}, 253 {.compatible = "arm,arm1176-pmu", .data = armv6_1176_pmu_init},
244 {.compatible = "arm,arm1136-pmu", .data = armv6_1136_pmu_init}, 254 {.compatible = "arm,arm1136-pmu", .data = armv6_1136_pmu_init},
245 {.compatible = "qcom,krait-pmu", .data = krait_pmu_init}, 255 {.compatible = "qcom,krait-pmu", .data = krait_pmu_init},
256 {.compatible = "qcom,scorpion-pmu", .data = scorpion_pmu_init},
257 {.compatible = "qcom,scorpion-mp-pmu", .data = scorpion_mp_pmu_init},
246 {}, 258 {},
247}; 259};
248 260
@@ -289,6 +301,48 @@ static int probe_current_pmu(struct arm_pmu *pmu)
289 return ret; 301 return ret;
290} 302}
291 303
304static int of_pmu_irq_cfg(struct platform_device *pdev)
305{
306 int i;
307 int *irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
308
309 if (!irqs)
310 return -ENOMEM;
311
312 for (i = 0; i < pdev->num_resources; ++i) {
313 struct device_node *dn;
314 int cpu;
315
316 dn = of_parse_phandle(pdev->dev.of_node, "interrupt-affinity",
317 i);
318 if (!dn) {
319 pr_warn("Failed to parse %s/interrupt-affinity[%d]\n",
320 of_node_full_name(dn), i);
321 break;
322 }
323
324 for_each_possible_cpu(cpu)
325 if (arch_find_n_match_cpu_physical_id(dn, cpu, NULL))
326 break;
327
328 of_node_put(dn);
329 if (cpu >= nr_cpu_ids) {
330 pr_warn("Failed to find logical CPU for %s\n",
331 dn->name);
332 break;
333 }
334
335 irqs[i] = cpu;
336 }
337
338 if (i == pdev->num_resources)
339 cpu_pmu->irq_affinity = irqs;
340 else
341 kfree(irqs);
342
343 return 0;
344}
345
292static int cpu_pmu_device_probe(struct platform_device *pdev) 346static int cpu_pmu_device_probe(struct platform_device *pdev)
293{ 347{
294 const struct of_device_id *of_id; 348 const struct of_device_id *of_id;
@@ -313,7 +367,10 @@ static int cpu_pmu_device_probe(struct platform_device *pdev)
313 367
314 if (node && (of_id = of_match_node(cpu_pmu_of_device_ids, pdev->dev.of_node))) { 368 if (node && (of_id = of_match_node(cpu_pmu_of_device_ids, pdev->dev.of_node))) {
315 init_fn = of_id->data; 369 init_fn = of_id->data;
316 ret = init_fn(pmu); 370
371 ret = of_pmu_irq_cfg(pdev);
372 if (!ret)
373 ret = init_fn(pmu);
317 } else { 374 } else {
318 ret = probe_current_pmu(pmu); 375 ret = probe_current_pmu(pmu);
319 } 376 }
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 8993770c47de..f4207a4dcb01 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -140,6 +140,23 @@ enum krait_perf_types {
140 KRAIT_PERFCTR_L1_DTLB_ACCESS = 0x12210, 140 KRAIT_PERFCTR_L1_DTLB_ACCESS = 0x12210,
141}; 141};
142 142
143/* ARMv7 Scorpion specific event types */
144enum scorpion_perf_types {
145 SCORPION_LPM0_GROUP0 = 0x4c,
146 SCORPION_LPM1_GROUP0 = 0x50,
147 SCORPION_LPM2_GROUP0 = 0x54,
148 SCORPION_L2LPM_GROUP0 = 0x58,
149 SCORPION_VLPM_GROUP0 = 0x5c,
150
151 SCORPION_ICACHE_ACCESS = 0x10053,
152 SCORPION_ICACHE_MISS = 0x10052,
153
154 SCORPION_DTLB_ACCESS = 0x12013,
155 SCORPION_DTLB_MISS = 0x12012,
156
157 SCORPION_ITLB_MISS = 0x12021,
158};
159
143/* 160/*
144 * Cortex-A8 HW events mapping 161 * Cortex-A8 HW events mapping
145 * 162 *
@@ -482,6 +499,49 @@ static const unsigned krait_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
482}; 499};
483 500
484/* 501/*
502 * Scorpion HW events mapping
503 */
504static const unsigned scorpion_perf_map[PERF_COUNT_HW_MAX] = {
505 PERF_MAP_ALL_UNSUPPORTED,
506 [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES,
507 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED,
508 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE,
509 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
510 [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_CLOCK_CYCLES,
511};
512
513static const unsigned scorpion_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
514 [PERF_COUNT_HW_CACHE_OP_MAX]
515 [PERF_COUNT_HW_CACHE_RESULT_MAX] = {
516 PERF_CACHE_MAP_ALL_UNSUPPORTED,
517 /*
518 * The performance counters don't differentiate between read and write
519 * accesses/misses so this isn't strictly correct, but it's the best we
520 * can do. Writes and reads get combined.
521 */
522 [C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
523 [C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
524 [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
525 [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
526 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = SCORPION_ICACHE_ACCESS,
527 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = SCORPION_ICACHE_MISS,
528 /*
529 * Only ITLB misses and DTLB refills are supported. If users want the
530 * DTLB refills misses a raw counter must be used.
531 */
532 [C(DTLB)][C(OP_READ)][C(RESULT_ACCESS)] = SCORPION_DTLB_ACCESS,
533 [C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = SCORPION_DTLB_MISS,
534 [C(DTLB)][C(OP_WRITE)][C(RESULT_ACCESS)] = SCORPION_DTLB_ACCESS,
535 [C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = SCORPION_DTLB_MISS,
536 [C(ITLB)][C(OP_READ)][C(RESULT_MISS)] = SCORPION_ITLB_MISS,
537 [C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)] = SCORPION_ITLB_MISS,
538 [C(BPU)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
539 [C(BPU)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
540 [C(BPU)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
541 [C(BPU)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
542};
543
544/*
485 * Perf Events' indices 545 * Perf Events' indices
486 */ 546 */
487#define ARMV7_IDX_CYCLE_COUNTER 0 547#define ARMV7_IDX_CYCLE_COUNTER 0
@@ -976,6 +1036,12 @@ static int krait_map_event_no_branch(struct perf_event *event)
976 &krait_perf_cache_map, 0xFFFFF); 1036 &krait_perf_cache_map, 0xFFFFF);
977} 1037}
978 1038
1039static int scorpion_map_event(struct perf_event *event)
1040{
1041 return armpmu_map_event(event, &scorpion_perf_map,
1042 &scorpion_perf_cache_map, 0xFFFFF);
1043}
1044
979static void armv7pmu_init(struct arm_pmu *cpu_pmu) 1045static void armv7pmu_init(struct arm_pmu *cpu_pmu)
980{ 1046{
981 cpu_pmu->handle_irq = armv7pmu_handle_irq; 1047 cpu_pmu->handle_irq = armv7pmu_handle_irq;
@@ -1103,6 +1169,12 @@ static int armv7_a17_pmu_init(struct arm_pmu *cpu_pmu)
1103#define KRAIT_EVENT_MASK (KRAIT_EVENT | VENUM_EVENT) 1169#define KRAIT_EVENT_MASK (KRAIT_EVENT | VENUM_EVENT)
1104#define PMRESRn_EN BIT(31) 1170#define PMRESRn_EN BIT(31)
1105 1171
1172#define EVENT_REGION(event) (((event) >> 12) & 0xf) /* R */
1173#define EVENT_GROUP(event) ((event) & 0xf) /* G */
1174#define EVENT_CODE(event) (((event) >> 4) & 0xff) /* CC */
1175#define EVENT_VENUM(event) (!!(event & VENUM_EVENT)) /* N=2 */
1176#define EVENT_CPU(event) (!!(event & KRAIT_EVENT)) /* N=1 */
1177
1106static u32 krait_read_pmresrn(int n) 1178static u32 krait_read_pmresrn(int n)
1107{ 1179{
1108 u32 val; 1180 u32 val;
@@ -1141,19 +1213,19 @@ static void krait_write_pmresrn(int n, u32 val)
1141 } 1213 }
1142} 1214}
1143 1215
1144static u32 krait_read_vpmresr0(void) 1216static u32 venum_read_pmresr(void)
1145{ 1217{
1146 u32 val; 1218 u32 val;
1147 asm volatile("mrc p10, 7, %0, c11, c0, 0" : "=r" (val)); 1219 asm volatile("mrc p10, 7, %0, c11, c0, 0" : "=r" (val));
1148 return val; 1220 return val;
1149} 1221}
1150 1222
1151static void krait_write_vpmresr0(u32 val) 1223static void venum_write_pmresr(u32 val)
1152{ 1224{
1153 asm volatile("mcr p10, 7, %0, c11, c0, 0" : : "r" (val)); 1225 asm volatile("mcr p10, 7, %0, c11, c0, 0" : : "r" (val));
1154} 1226}
1155 1227
1156static void krait_pre_vpmresr0(u32 *venum_orig_val, u32 *fp_orig_val) 1228static void venum_pre_pmresr(u32 *venum_orig_val, u32 *fp_orig_val)
1157{ 1229{
1158 u32 venum_new_val; 1230 u32 venum_new_val;
1159 u32 fp_new_val; 1231 u32 fp_new_val;
@@ -1170,7 +1242,7 @@ static void krait_pre_vpmresr0(u32 *venum_orig_val, u32 *fp_orig_val)
1170 fmxr(FPEXC, fp_new_val); 1242 fmxr(FPEXC, fp_new_val);
1171} 1243}
1172 1244
1173static void krait_post_vpmresr0(u32 venum_orig_val, u32 fp_orig_val) 1245static void venum_post_pmresr(u32 venum_orig_val, u32 fp_orig_val)
1174{ 1246{
1175 BUG_ON(preemptible()); 1247 BUG_ON(preemptible());
1176 /* Restore FPEXC */ 1248 /* Restore FPEXC */
@@ -1193,16 +1265,11 @@ static void krait_evt_setup(int idx, u32 config_base)
1193 u32 val; 1265 u32 val;
1194 u32 mask; 1266 u32 mask;
1195 u32 vval, fval; 1267 u32 vval, fval;
1196 unsigned int region; 1268 unsigned int region = EVENT_REGION(config_base);
1197 unsigned int group; 1269 unsigned int group = EVENT_GROUP(config_base);
1198 unsigned int code; 1270 unsigned int code = EVENT_CODE(config_base);
1199 unsigned int group_shift; 1271 unsigned int group_shift;
1200 bool venum_event; 1272 bool venum_event = EVENT_VENUM(config_base);
1201
1202 venum_event = !!(config_base & VENUM_EVENT);
1203 region = (config_base >> 12) & 0xf;
1204 code = (config_base >> 4) & 0xff;
1205 group = (config_base >> 0) & 0xf;
1206 1273
1207 group_shift = group * 8; 1274 group_shift = group * 8;
1208 mask = 0xff << group_shift; 1275 mask = 0xff << group_shift;
@@ -1217,16 +1284,14 @@ static void krait_evt_setup(int idx, u32 config_base)
1217 val |= config_base & (ARMV7_EXCLUDE_USER | ARMV7_EXCLUDE_PL1); 1284 val |= config_base & (ARMV7_EXCLUDE_USER | ARMV7_EXCLUDE_PL1);
1218 armv7_pmnc_write_evtsel(idx, val); 1285 armv7_pmnc_write_evtsel(idx, val);
1219 1286
1220 asm volatile("mcr p15, 0, %0, c9, c15, 0" : : "r" (0));
1221
1222 if (venum_event) { 1287 if (venum_event) {
1223 krait_pre_vpmresr0(&vval, &fval); 1288 venum_pre_pmresr(&vval, &fval);
1224 val = krait_read_vpmresr0(); 1289 val = venum_read_pmresr();
1225 val &= ~mask; 1290 val &= ~mask;
1226 val |= code << group_shift; 1291 val |= code << group_shift;
1227 val |= PMRESRn_EN; 1292 val |= PMRESRn_EN;
1228 krait_write_vpmresr0(val); 1293 venum_write_pmresr(val);
1229 krait_post_vpmresr0(vval, fval); 1294 venum_post_pmresr(vval, fval);
1230 } else { 1295 } else {
1231 val = krait_read_pmresrn(region); 1296 val = krait_read_pmresrn(region);
1232 val &= ~mask; 1297 val &= ~mask;
@@ -1236,7 +1301,7 @@ static void krait_evt_setup(int idx, u32 config_base)
1236 } 1301 }
1237} 1302}
1238 1303
1239static u32 krait_clear_pmresrn_group(u32 val, int group) 1304static u32 clear_pmresrn_group(u32 val, int group)
1240{ 1305{
1241 u32 mask; 1306 u32 mask;
1242 int group_shift; 1307 int group_shift;
@@ -1256,23 +1321,19 @@ static void krait_clearpmu(u32 config_base)
1256{ 1321{
1257 u32 val; 1322 u32 val;
1258 u32 vval, fval; 1323 u32 vval, fval;
1259 unsigned int region; 1324 unsigned int region = EVENT_REGION(config_base);
1260 unsigned int group; 1325 unsigned int group = EVENT_GROUP(config_base);
1261 bool venum_event; 1326 bool venum_event = EVENT_VENUM(config_base);
1262
1263 venum_event = !!(config_base & VENUM_EVENT);
1264 region = (config_base >> 12) & 0xf;
1265 group = (config_base >> 0) & 0xf;
1266 1327
1267 if (venum_event) { 1328 if (venum_event) {
1268 krait_pre_vpmresr0(&vval, &fval); 1329 venum_pre_pmresr(&vval, &fval);
1269 val = krait_read_vpmresr0(); 1330 val = venum_read_pmresr();
1270 val = krait_clear_pmresrn_group(val, group); 1331 val = clear_pmresrn_group(val, group);
1271 krait_write_vpmresr0(val); 1332 venum_write_pmresr(val);
1272 krait_post_vpmresr0(vval, fval); 1333 venum_post_pmresr(vval, fval);
1273 } else { 1334 } else {
1274 val = krait_read_pmresrn(region); 1335 val = krait_read_pmresrn(region);
1275 val = krait_clear_pmresrn_group(val, group); 1336 val = clear_pmresrn_group(val, group);
1276 krait_write_pmresrn(region, val); 1337 krait_write_pmresrn(region, val);
1277 } 1338 }
1278} 1339}
@@ -1342,6 +1403,8 @@ static void krait_pmu_enable_event(struct perf_event *event)
1342static void krait_pmu_reset(void *info) 1403static void krait_pmu_reset(void *info)
1343{ 1404{
1344 u32 vval, fval; 1405 u32 vval, fval;
1406 struct arm_pmu *cpu_pmu = info;
1407 u32 idx, nb_cnt = cpu_pmu->num_events;
1345 1408
1346 armv7pmu_reset(info); 1409 armv7pmu_reset(info);
1347 1410
@@ -1350,9 +1413,16 @@ static void krait_pmu_reset(void *info)
1350 krait_write_pmresrn(1, 0); 1413 krait_write_pmresrn(1, 0);
1351 krait_write_pmresrn(2, 0); 1414 krait_write_pmresrn(2, 0);
1352 1415
1353 krait_pre_vpmresr0(&vval, &fval); 1416 venum_pre_pmresr(&vval, &fval);
1354 krait_write_vpmresr0(0); 1417 venum_write_pmresr(0);
1355 krait_post_vpmresr0(vval, fval); 1418 venum_post_pmresr(vval, fval);
1419
1420 /* Reset PMxEVNCTCR to sane default */
1421 for (idx = ARMV7_IDX_CYCLE_COUNTER; idx < nb_cnt; ++idx) {
1422 armv7_pmnc_select_counter(idx);
1423 asm volatile("mcr p15, 0, %0, c9, c15, 0" : : "r" (0));
1424 }
1425
1356} 1426}
1357 1427
1358static int krait_event_to_bit(struct perf_event *event, unsigned int region, 1428static int krait_event_to_bit(struct perf_event *event, unsigned int region,
@@ -1386,26 +1456,18 @@ static int krait_pmu_get_event_idx(struct pmu_hw_events *cpuc,
1386{ 1456{
1387 int idx; 1457 int idx;
1388 int bit = -1; 1458 int bit = -1;
1389 unsigned int prefix;
1390 unsigned int region;
1391 unsigned int code;
1392 unsigned int group;
1393 bool krait_event;
1394 struct hw_perf_event *hwc = &event->hw; 1459 struct hw_perf_event *hwc = &event->hw;
1460 unsigned int region = EVENT_REGION(hwc->config_base);
1461 unsigned int code = EVENT_CODE(hwc->config_base);
1462 unsigned int group = EVENT_GROUP(hwc->config_base);
1463 bool venum_event = EVENT_VENUM(hwc->config_base);
1464 bool krait_event = EVENT_CPU(hwc->config_base);
1395 1465
1396 region = (hwc->config_base >> 12) & 0xf; 1466 if (venum_event || krait_event) {
1397 code = (hwc->config_base >> 4) & 0xff;
1398 group = (hwc->config_base >> 0) & 0xf;
1399 krait_event = !!(hwc->config_base & KRAIT_EVENT_MASK);
1400
1401 if (krait_event) {
1402 /* Ignore invalid events */ 1467 /* Ignore invalid events */
1403 if (group > 3 || region > 2) 1468 if (group > 3 || region > 2)
1404 return -EINVAL; 1469 return -EINVAL;
1405 prefix = hwc->config_base & KRAIT_EVENT_MASK; 1470 if (venum_event && (code & 0xe0))
1406 if (prefix != KRAIT_EVENT && prefix != VENUM_EVENT)
1407 return -EINVAL;
1408 if (prefix == VENUM_EVENT && (code & 0xe0))
1409 return -EINVAL; 1471 return -EINVAL;
1410 1472
1411 bit = krait_event_to_bit(event, region, group); 1473 bit = krait_event_to_bit(event, region, group);
@@ -1425,15 +1487,12 @@ static void krait_pmu_clear_event_idx(struct pmu_hw_events *cpuc,
1425{ 1487{
1426 int bit; 1488 int bit;
1427 struct hw_perf_event *hwc = &event->hw; 1489 struct hw_perf_event *hwc = &event->hw;
1428 unsigned int region; 1490 unsigned int region = EVENT_REGION(hwc->config_base);
1429 unsigned int group; 1491 unsigned int group = EVENT_GROUP(hwc->config_base);
1430 bool krait_event; 1492 bool venum_event = EVENT_VENUM(hwc->config_base);
1493 bool krait_event = EVENT_CPU(hwc->config_base);
1431 1494
1432 region = (hwc->config_base >> 12) & 0xf; 1495 if (venum_event || krait_event) {
1433 group = (hwc->config_base >> 0) & 0xf;
1434 krait_event = !!(hwc->config_base & KRAIT_EVENT_MASK);
1435
1436 if (krait_event) {
1437 bit = krait_event_to_bit(event, region, group); 1496 bit = krait_event_to_bit(event, region, group);
1438 clear_bit(bit, cpuc->used_mask); 1497 clear_bit(bit, cpuc->used_mask);
1439 } 1498 }
@@ -1458,6 +1517,344 @@ static int krait_pmu_init(struct arm_pmu *cpu_pmu)
1458 cpu_pmu->clear_event_idx = krait_pmu_clear_event_idx; 1517 cpu_pmu->clear_event_idx = krait_pmu_clear_event_idx;
1459 return 0; 1518 return 0;
1460} 1519}
1520
1521/*
1522 * Scorpion Local Performance Monitor Register (LPMn)
1523 *
1524 * 31 30 24 16 8 0
1525 * +--------------------------------+
1526 * LPM0 | EN | CC | CC | CC | CC | N = 1, R = 0
1527 * +--------------------------------+
1528 * LPM1 | EN | CC | CC | CC | CC | N = 1, R = 1
1529 * +--------------------------------+
1530 * LPM2 | EN | CC | CC | CC | CC | N = 1, R = 2
1531 * +--------------------------------+
1532 * L2LPM | EN | CC | CC | CC | CC | N = 1, R = 3
1533 * +--------------------------------+
1534 * VLPM | EN | CC | CC | CC | CC | N = 2, R = ?
1535 * +--------------------------------+
1536 * EN | G=3 | G=2 | G=1 | G=0
1537 *
1538 *
1539 * Event Encoding:
1540 *
1541 * hwc->config_base = 0xNRCCG
1542 *
1543 * N = prefix, 1 for Scorpion CPU (LPMn/L2LPM), 2 for Venum VFP (VLPM)
1544 * R = region register
1545 * CC = class of events the group G is choosing from
1546 * G = group or particular event
1547 *
1548 * Example: 0x12021 is a Scorpion CPU event in LPM2's group 1 with code 2
1549 *
1550 * A region (R) corresponds to a piece of the CPU (execution unit, instruction
1551 * unit, etc.) while the event code (CC) corresponds to a particular class of
1552 * events (interrupts for example). An event code is broken down into
1553 * groups (G) that can be mapped into the PMU (irq, fiqs, and irq+fiqs for
1554 * example).
1555 */
1556
1557static u32 scorpion_read_pmresrn(int n)
1558{
1559 u32 val;
1560
1561 switch (n) {
1562 case 0:
1563 asm volatile("mrc p15, 0, %0, c15, c0, 0" : "=r" (val));
1564 break;
1565 case 1:
1566 asm volatile("mrc p15, 1, %0, c15, c0, 0" : "=r" (val));
1567 break;
1568 case 2:
1569 asm volatile("mrc p15, 2, %0, c15, c0, 0" : "=r" (val));
1570 break;
1571 case 3:
1572 asm volatile("mrc p15, 3, %0, c15, c2, 0" : "=r" (val));
1573 break;
1574 default:
1575 BUG(); /* Should be validated in scorpion_pmu_get_event_idx() */
1576 }
1577
1578 return val;
1579}
1580
1581static void scorpion_write_pmresrn(int n, u32 val)
1582{
1583 switch (n) {
1584 case 0:
1585 asm volatile("mcr p15, 0, %0, c15, c0, 0" : : "r" (val));
1586 break;
1587 case 1:
1588 asm volatile("mcr p15, 1, %0, c15, c0, 0" : : "r" (val));
1589 break;
1590 case 2:
1591 asm volatile("mcr p15, 2, %0, c15, c0, 0" : : "r" (val));
1592 break;
1593 case 3:
1594 asm volatile("mcr p15, 3, %0, c15, c2, 0" : : "r" (val));
1595 break;
1596 default:
1597 BUG(); /* Should be validated in scorpion_pmu_get_event_idx() */
1598 }
1599}
1600
1601static u32 scorpion_get_pmresrn_event(unsigned int region)
1602{
1603 static const u32 pmresrn_table[] = { SCORPION_LPM0_GROUP0,
1604 SCORPION_LPM1_GROUP0,
1605 SCORPION_LPM2_GROUP0,
1606 SCORPION_L2LPM_GROUP0 };
1607 return pmresrn_table[region];
1608}
1609
1610static void scorpion_evt_setup(int idx, u32 config_base)
1611{
1612 u32 val;
1613 u32 mask;
1614 u32 vval, fval;
1615 unsigned int region = EVENT_REGION(config_base);
1616 unsigned int group = EVENT_GROUP(config_base);
1617 unsigned int code = EVENT_CODE(config_base);
1618 unsigned int group_shift;
1619 bool venum_event = EVENT_VENUM(config_base);
1620
1621 group_shift = group * 8;
1622 mask = 0xff << group_shift;
1623
1624 /* Configure evtsel for the region and group */
1625 if (venum_event)
1626 val = SCORPION_VLPM_GROUP0;
1627 else
1628 val = scorpion_get_pmresrn_event(region);
1629 val += group;
1630 /* Mix in mode-exclusion bits */
1631 val |= config_base & (ARMV7_EXCLUDE_USER | ARMV7_EXCLUDE_PL1);
1632 armv7_pmnc_write_evtsel(idx, val);
1633
1634 asm volatile("mcr p15, 0, %0, c9, c15, 0" : : "r" (0));
1635
1636 if (venum_event) {
1637 venum_pre_pmresr(&vval, &fval);
1638 val = venum_read_pmresr();
1639 val &= ~mask;
1640 val |= code << group_shift;
1641 val |= PMRESRn_EN;
1642 venum_write_pmresr(val);
1643 venum_post_pmresr(vval, fval);
1644 } else {
1645 val = scorpion_read_pmresrn(region);
1646 val &= ~mask;
1647 val |= code << group_shift;
1648 val |= PMRESRn_EN;
1649 scorpion_write_pmresrn(region, val);
1650 }
1651}
1652
1653static void scorpion_clearpmu(u32 config_base)
1654{
1655 u32 val;
1656 u32 vval, fval;
1657 unsigned int region = EVENT_REGION(config_base);
1658 unsigned int group = EVENT_GROUP(config_base);
1659 bool venum_event = EVENT_VENUM(config_base);
1660
1661 if (venum_event) {
1662 venum_pre_pmresr(&vval, &fval);
1663 val = venum_read_pmresr();
1664 val = clear_pmresrn_group(val, group);
1665 venum_write_pmresr(val);
1666 venum_post_pmresr(vval, fval);
1667 } else {
1668 val = scorpion_read_pmresrn(region);
1669 val = clear_pmresrn_group(val, group);
1670 scorpion_write_pmresrn(region, val);
1671 }
1672}
1673
1674static void scorpion_pmu_disable_event(struct perf_event *event)
1675{
1676 unsigned long flags;
1677 struct hw_perf_event *hwc = &event->hw;
1678 int idx = hwc->idx;
1679 struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu);
1680 struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);
1681
1682 /* Disable counter and interrupt */
1683 raw_spin_lock_irqsave(&events->pmu_lock, flags);
1684
1685 /* Disable counter */
1686 armv7_pmnc_disable_counter(idx);
1687
1688 /*
1689 * Clear pmresr code (if destined for PMNx counters)
1690 */
1691 if (hwc->config_base & KRAIT_EVENT_MASK)
1692 scorpion_clearpmu(hwc->config_base);
1693
1694 /* Disable interrupt for this counter */
1695 armv7_pmnc_disable_intens(idx);
1696
1697 raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
1698}
1699
1700static void scorpion_pmu_enable_event(struct perf_event *event)
1701{
1702 unsigned long flags;
1703 struct hw_perf_event *hwc = &event->hw;
1704 int idx = hwc->idx;
1705 struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu);
1706 struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);
1707
1708 /*
1709 * Enable counter and interrupt, and set the counter to count
1710 * the event that we're interested in.
1711 */
1712 raw_spin_lock_irqsave(&events->pmu_lock, flags);
1713
1714 /* Disable counter */
1715 armv7_pmnc_disable_counter(idx);
1716
1717 /*
1718 * Set event (if destined for PMNx counters)
1719 * We don't set the event for the cycle counter because we
1720 * don't have the ability to perform event filtering.
1721 */
1722 if (hwc->config_base & KRAIT_EVENT_MASK)
1723 scorpion_evt_setup(idx, hwc->config_base);
1724 else if (idx != ARMV7_IDX_CYCLE_COUNTER)
1725 armv7_pmnc_write_evtsel(idx, hwc->config_base);
1726
1727 /* Enable interrupt for this counter */
1728 armv7_pmnc_enable_intens(idx);
1729
1730 /* Enable counter */
1731 armv7_pmnc_enable_counter(idx);
1732
1733 raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
1734}
1735
1736static void scorpion_pmu_reset(void *info)
1737{
1738 u32 vval, fval;
1739 struct arm_pmu *cpu_pmu = info;
1740 u32 idx, nb_cnt = cpu_pmu->num_events;
1741
1742 armv7pmu_reset(info);
1743
1744 /* Clear all pmresrs */
1745 scorpion_write_pmresrn(0, 0);
1746 scorpion_write_pmresrn(1, 0);
1747 scorpion_write_pmresrn(2, 0);
1748 scorpion_write_pmresrn(3, 0);
1749
1750 venum_pre_pmresr(&vval, &fval);
1751 venum_write_pmresr(0);
1752 venum_post_pmresr(vval, fval);
1753
1754 /* Reset PMxEVNCTCR to sane default */
1755 for (idx = ARMV7_IDX_CYCLE_COUNTER; idx < nb_cnt; ++idx) {
1756 armv7_pmnc_select_counter(idx);
1757 asm volatile("mcr p15, 0, %0, c9, c15, 0" : : "r" (0));
1758 }
1759}
1760
1761static int scorpion_event_to_bit(struct perf_event *event, unsigned int region,
1762 unsigned int group)
1763{
1764 int bit;
1765 struct hw_perf_event *hwc = &event->hw;
1766 struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu);
1767
1768 if (hwc->config_base & VENUM_EVENT)
1769 bit = SCORPION_VLPM_GROUP0;
1770 else
1771 bit = scorpion_get_pmresrn_event(region);
1772 bit -= scorpion_get_pmresrn_event(0);
1773 bit += group;
1774 /*
1775 * Lower bits are reserved for use by the counters (see
1776 * armv7pmu_get_event_idx() for more info)
1777 */
1778 bit += ARMV7_IDX_COUNTER_LAST(cpu_pmu) + 1;
1779
1780 return bit;
1781}
1782
1783/*
1784 * We check for column exclusion constraints here.
1785 * Two events cant use the same group within a pmresr register.
1786 */
1787static int scorpion_pmu_get_event_idx(struct pmu_hw_events *cpuc,
1788 struct perf_event *event)
1789{
1790 int idx;
1791 int bit = -1;
1792 struct hw_perf_event *hwc = &event->hw;
1793 unsigned int region = EVENT_REGION(hwc->config_base);
1794 unsigned int group = EVENT_GROUP(hwc->config_base);
1795 bool venum_event = EVENT_VENUM(hwc->config_base);
1796 bool scorpion_event = EVENT_CPU(hwc->config_base);
1797
1798 if (venum_event || scorpion_event) {
1799 /* Ignore invalid events */
1800 if (group > 3 || region > 3)
1801 return -EINVAL;
1802
1803 bit = scorpion_event_to_bit(event, region, group);
1804 if (test_and_set_bit(bit, cpuc->used_mask))
1805 return -EAGAIN;
1806 }
1807
1808 idx = armv7pmu_get_event_idx(cpuc, event);
1809 if (idx < 0 && bit >= 0)
1810 clear_bit(bit, cpuc->used_mask);
1811
1812 return idx;
1813}
1814
1815static void scorpion_pmu_clear_event_idx(struct pmu_hw_events *cpuc,
1816 struct perf_event *event)
1817{
1818 int bit;
1819 struct hw_perf_event *hwc = &event->hw;
1820 unsigned int region = EVENT_REGION(hwc->config_base);
1821 unsigned int group = EVENT_GROUP(hwc->config_base);
1822 bool venum_event = EVENT_VENUM(hwc->config_base);
1823 bool scorpion_event = EVENT_CPU(hwc->config_base);
1824
1825 if (venum_event || scorpion_event) {
1826 bit = scorpion_event_to_bit(event, region, group);
1827 clear_bit(bit, cpuc->used_mask);
1828 }
1829}
1830
1831static int scorpion_pmu_init(struct arm_pmu *cpu_pmu)
1832{
1833 armv7pmu_init(cpu_pmu);
1834 cpu_pmu->name = "armv7_scorpion";
1835 cpu_pmu->map_event = scorpion_map_event;
1836 cpu_pmu->num_events = armv7_read_num_pmnc_events();
1837 cpu_pmu->reset = scorpion_pmu_reset;
1838 cpu_pmu->enable = scorpion_pmu_enable_event;
1839 cpu_pmu->disable = scorpion_pmu_disable_event;
1840 cpu_pmu->get_event_idx = scorpion_pmu_get_event_idx;
1841 cpu_pmu->clear_event_idx = scorpion_pmu_clear_event_idx;
1842 return 0;
1843}
1844
1845static int scorpion_mp_pmu_init(struct arm_pmu *cpu_pmu)
1846{
1847 armv7pmu_init(cpu_pmu);
1848 cpu_pmu->name = "armv7_scorpion_mp";
1849 cpu_pmu->map_event = scorpion_map_event;
1850 cpu_pmu->num_events = armv7_read_num_pmnc_events();
1851 cpu_pmu->reset = scorpion_pmu_reset;
1852 cpu_pmu->enable = scorpion_pmu_enable_event;
1853 cpu_pmu->disable = scorpion_pmu_disable_event;
1854 cpu_pmu->get_event_idx = scorpion_pmu_get_event_idx;
1855 cpu_pmu->clear_event_idx = scorpion_pmu_clear_event_idx;
1856 return 0;
1857}
1461#else 1858#else
1462static inline int armv7_a8_pmu_init(struct arm_pmu *cpu_pmu) 1859static inline int armv7_a8_pmu_init(struct arm_pmu *cpu_pmu)
1463{ 1860{
@@ -1498,4 +1895,14 @@ static inline int krait_pmu_init(struct arm_pmu *cpu_pmu)
1498{ 1895{
1499 return -ENODEV; 1896 return -ENODEV;
1500} 1897}
1898
1899static inline int scorpion_pmu_init(struct arm_pmu *cpu_pmu)
1900{
1901 return -ENODEV;
1902}
1903
1904static inline int scorpion_mp_pmu_init(struct arm_pmu *cpu_pmu)
1905{
1906 return -ENODEV;
1907}
1501#endif /* CONFIG_CPU_V7 */ 1908#endif /* CONFIG_CPU_V7 */
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index 07e7eb1d7ab6..5560f74f9eee 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -540,7 +540,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
540 540
541 vcpu->mode = OUTSIDE_GUEST_MODE; 541 vcpu->mode = OUTSIDE_GUEST_MODE;
542 kvm_guest_exit(); 542 kvm_guest_exit();
543 trace_kvm_exit(*vcpu_pc(vcpu)); 543 trace_kvm_exit(kvm_vcpu_trap_get_class(vcpu), *vcpu_pc(vcpu));
544 /* 544 /*
545 * We may have taken a host interrupt in HYP mode (ie 545 * We may have taken a host interrupt in HYP mode (ie
546 * while executing the guest). This interrupt is still 546 * while executing the guest). This interrupt is still
diff --git a/arch/arm/kvm/trace.h b/arch/arm/kvm/trace.h
index 881874b1a036..6817664b46b8 100644
--- a/arch/arm/kvm/trace.h
+++ b/arch/arm/kvm/trace.h
@@ -25,18 +25,22 @@ TRACE_EVENT(kvm_entry,
25); 25);
26 26
27TRACE_EVENT(kvm_exit, 27TRACE_EVENT(kvm_exit,
28 TP_PROTO(unsigned long vcpu_pc), 28 TP_PROTO(unsigned int exit_reason, unsigned long vcpu_pc),
29 TP_ARGS(vcpu_pc), 29 TP_ARGS(exit_reason, vcpu_pc),
30 30
31 TP_STRUCT__entry( 31 TP_STRUCT__entry(
32 __field( unsigned int, exit_reason )
32 __field( unsigned long, vcpu_pc ) 33 __field( unsigned long, vcpu_pc )
33 ), 34 ),
34 35
35 TP_fast_assign( 36 TP_fast_assign(
37 __entry->exit_reason = exit_reason;
36 __entry->vcpu_pc = vcpu_pc; 38 __entry->vcpu_pc = vcpu_pc;
37 ), 39 ),
38 40
39 TP_printk("PC: 0x%08lx", __entry->vcpu_pc) 41 TP_printk("HSR_EC: 0x%04x, PC: 0x%08lx",
42 __entry->exit_reason,
43 __entry->vcpu_pc)
40); 44);
41 45
42TRACE_EVENT(kvm_guest_fault, 46TRACE_EVENT(kvm_guest_fault,
diff --git a/arch/arm/mach-asm9260/Kconfig b/arch/arm/mach-asm9260/Kconfig
index 8423be76080e..52241207a82a 100644
--- a/arch/arm/mach-asm9260/Kconfig
+++ b/arch/arm/mach-asm9260/Kconfig
@@ -2,5 +2,7 @@ config MACH_ASM9260
2 bool "Alphascale ASM9260" 2 bool "Alphascale ASM9260"
3 depends on ARCH_MULTI_V5 3 depends on ARCH_MULTI_V5
4 select CPU_ARM926T 4 select CPU_ARM926T
5 select ASM9260_TIMER
6 select GENERIC_CLOCKEVENTS
5 help 7 help
6 Support for Alphascale ASM9260 based platform. 8 Support for Alphascale ASM9260 based platform.
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 5e34fb143309..aa4116e9452f 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -270,37 +270,35 @@ static void __init at91_pm_sram_init(void)
270 phys_addr_t sram_pbase; 270 phys_addr_t sram_pbase;
271 unsigned long sram_base; 271 unsigned long sram_base;
272 struct device_node *node; 272 struct device_node *node;
273 struct platform_device *pdev; 273 struct platform_device *pdev = NULL;
274 274
275 node = of_find_compatible_node(NULL, NULL, "mmio-sram"); 275 for_each_compatible_node(node, NULL, "mmio-sram") {
276 if (!node) { 276 pdev = of_find_device_by_node(node);
277 pr_warn("%s: failed to find sram node!\n", __func__); 277 if (pdev) {
278 return; 278 of_node_put(node);
279 break;
280 }
279 } 281 }
280 282
281 pdev = of_find_device_by_node(node);
282 if (!pdev) { 283 if (!pdev) {
283 pr_warn("%s: failed to find sram device!\n", __func__); 284 pr_warn("%s: failed to find sram device!\n", __func__);
284 goto put_node; 285 return;
285 } 286 }
286 287
287 sram_pool = dev_get_gen_pool(&pdev->dev); 288 sram_pool = dev_get_gen_pool(&pdev->dev);
288 if (!sram_pool) { 289 if (!sram_pool) {
289 pr_warn("%s: sram pool unavailable!\n", __func__); 290 pr_warn("%s: sram pool unavailable!\n", __func__);
290 goto put_node; 291 return;
291 } 292 }
292 293
293 sram_base = gen_pool_alloc(sram_pool, at91_slow_clock_sz); 294 sram_base = gen_pool_alloc(sram_pool, at91_slow_clock_sz);
294 if (!sram_base) { 295 if (!sram_base) {
295 pr_warn("%s: unable to alloc ocram!\n", __func__); 296 pr_warn("%s: unable to alloc ocram!\n", __func__);
296 goto put_node; 297 return;
297 } 298 }
298 299
299 sram_pbase = gen_pool_virt_to_phys(sram_pool, sram_base); 300 sram_pbase = gen_pool_virt_to_phys(sram_pool, sram_base);
300 slow_clock = __arm_ioremap_exec(sram_pbase, at91_slow_clock_sz, false); 301 slow_clock = __arm_ioremap_exec(sram_pbase, at91_slow_clock_sz, false);
301
302put_node:
303 of_node_put(node);
304} 302}
305#endif 303#endif
306 304
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index d2c89963af2d..86c0aa819d25 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -44,7 +44,7 @@ static inline void at91rm9200_standby(void)
44 " mcr p15, 0, %0, c7, c0, 4\n\t" 44 " mcr p15, 0, %0, c7, c0, 4\n\t"
45 " str %5, [%1, %2]" 45 " str %5, [%1, %2]"
46 : 46 :
47 : "r" (0), "r" (AT91_BASE_SYS), "r" (AT91RM9200_SDRAMC_LPR), 47 : "r" (0), "r" (at91_ramc_base[0]), "r" (AT91RM9200_SDRAMC_LPR),
48 "r" (1), "r" (AT91RM9200_SDRAMC_SRR), 48 "r" (1), "r" (AT91RM9200_SDRAMC_SRR),
49 "r" (lpr)); 49 "r" (lpr));
50} 50}
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 556151e85ec4..931f0e302c03 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -25,11 +25,6 @@
25 */ 25 */
26#undef SLOWDOWN_MASTER_CLOCK 26#undef SLOWDOWN_MASTER_CLOCK
27 27
28#define MCKRDY_TIMEOUT 1000
29#define MOSCRDY_TIMEOUT 1000
30#define PLLALOCK_TIMEOUT 1000
31#define PLLBLOCK_TIMEOUT 1000
32
33pmc .req r0 28pmc .req r0
34sdramc .req r1 29sdramc .req r1
35ramc1 .req r2 30ramc1 .req r2
@@ -41,60 +36,42 @@ tmp2 .req r5
41 * Wait until master clock is ready (after switching master clock source) 36 * Wait until master clock is ready (after switching master clock source)
42 */ 37 */
43 .macro wait_mckrdy 38 .macro wait_mckrdy
44 mov tmp2, #MCKRDY_TIMEOUT 391: ldr tmp1, [pmc, #AT91_PMC_SR]
451: sub tmp2, tmp2, #1
46 cmp tmp2, #0
47 beq 2f
48 ldr tmp1, [pmc, #AT91_PMC_SR]
49 tst tmp1, #AT91_PMC_MCKRDY 40 tst tmp1, #AT91_PMC_MCKRDY
50 beq 1b 41 beq 1b
512:
52 .endm 42 .endm
53 43
54/* 44/*
55 * Wait until master oscillator has stabilized. 45 * Wait until master oscillator has stabilized.
56 */ 46 */
57 .macro wait_moscrdy 47 .macro wait_moscrdy
58 mov tmp2, #MOSCRDY_TIMEOUT 481: ldr tmp1, [pmc, #AT91_PMC_SR]
591: sub tmp2, tmp2, #1
60 cmp tmp2, #0
61 beq 2f
62 ldr tmp1, [pmc, #AT91_PMC_SR]
63 tst tmp1, #AT91_PMC_MOSCS 49 tst tmp1, #AT91_PMC_MOSCS
64 beq 1b 50 beq 1b
652:
66 .endm 51 .endm
67 52
68/* 53/*
69 * Wait until PLLA has locked. 54 * Wait until PLLA has locked.
70 */ 55 */
71 .macro wait_pllalock 56 .macro wait_pllalock
72 mov tmp2, #PLLALOCK_TIMEOUT 571: ldr tmp1, [pmc, #AT91_PMC_SR]
731: sub tmp2, tmp2, #1
74 cmp tmp2, #0
75 beq 2f
76 ldr tmp1, [pmc, #AT91_PMC_SR]
77 tst tmp1, #AT91_PMC_LOCKA 58 tst tmp1, #AT91_PMC_LOCKA
78 beq 1b 59 beq 1b
792:
80 .endm 60 .endm
81 61
82/* 62/*
83 * Wait until PLLB has locked. 63 * Wait until PLLB has locked.
84 */ 64 */
85 .macro wait_pllblock 65 .macro wait_pllblock
86 mov tmp2, #PLLBLOCK_TIMEOUT 661: ldr tmp1, [pmc, #AT91_PMC_SR]
871: sub tmp2, tmp2, #1
88 cmp tmp2, #0
89 beq 2f
90 ldr tmp1, [pmc, #AT91_PMC_SR]
91 tst tmp1, #AT91_PMC_LOCKB 67 tst tmp1, #AT91_PMC_LOCKB
92 beq 1b 68 beq 1b
932:
94 .endm 69 .endm
95 70
96 .text 71 .text
97 72
73 .arm
74
98/* void at91_slow_clock(void __iomem *pmc, void __iomem *sdramc, 75/* void at91_slow_clock(void __iomem *pmc, void __iomem *sdramc,
99 * void __iomem *ramc1, int memctrl) 76 * void __iomem *ramc1, int memctrl)
100 */ 77 */
@@ -134,6 +111,16 @@ ddr_sr_enable:
134 cmp memctrl, #AT91_MEMCTRL_DDRSDR 111 cmp memctrl, #AT91_MEMCTRL_DDRSDR
135 bne sdr_sr_enable 112 bne sdr_sr_enable
136 113
114 /* LPDDR1 --> force DDR2 mode during self-refresh */
115 ldr tmp1, [sdramc, #AT91_DDRSDRC_MDR]
116 str tmp1, .saved_sam9_mdr
117 bic tmp1, tmp1, #~AT91_DDRSDRC_MD
118 cmp tmp1, #AT91_DDRSDRC_MD_LOW_POWER_DDR
119 ldreq tmp1, [sdramc, #AT91_DDRSDRC_MDR]
120 biceq tmp1, tmp1, #AT91_DDRSDRC_MD
121 orreq tmp1, tmp1, #AT91_DDRSDRC_MD_DDR2
122 streq tmp1, [sdramc, #AT91_DDRSDRC_MDR]
123
137 /* prepare for DDRAM self-refresh mode */ 124 /* prepare for DDRAM self-refresh mode */
138 ldr tmp1, [sdramc, #AT91_DDRSDRC_LPR] 125 ldr tmp1, [sdramc, #AT91_DDRSDRC_LPR]
139 str tmp1, .saved_sam9_lpr 126 str tmp1, .saved_sam9_lpr
@@ -142,14 +129,26 @@ ddr_sr_enable:
142 129
143 /* figure out if we use the second ram controller */ 130 /* figure out if we use the second ram controller */
144 cmp ramc1, #0 131 cmp ramc1, #0
145 ldrne tmp2, [ramc1, #AT91_DDRSDRC_LPR] 132 beq ddr_no_2nd_ctrl
146 strne tmp2, .saved_sam9_lpr1 133
147 bicne tmp2, #AT91_DDRSDRC_LPCB 134 ldr tmp2, [ramc1, #AT91_DDRSDRC_MDR]
148 orrne tmp2, #AT91_DDRSDRC_LPCB_SELF_REFRESH 135 str tmp2, .saved_sam9_mdr1
136 bic tmp2, tmp2, #~AT91_DDRSDRC_MD
137 cmp tmp2, #AT91_DDRSDRC_MD_LOW_POWER_DDR
138 ldreq tmp2, [ramc1, #AT91_DDRSDRC_MDR]
139 biceq tmp2, tmp2, #AT91_DDRSDRC_MD
140 orreq tmp2, tmp2, #AT91_DDRSDRC_MD_DDR2
141 streq tmp2, [ramc1, #AT91_DDRSDRC_MDR]
142
143 ldr tmp2, [ramc1, #AT91_DDRSDRC_LPR]
144 str tmp2, .saved_sam9_lpr1
145 bic tmp2, #AT91_DDRSDRC_LPCB
146 orr tmp2, #AT91_DDRSDRC_LPCB_SELF_REFRESH
149 147
150 /* Enable DDRAM self-refresh mode */ 148 /* Enable DDRAM self-refresh mode */
149 str tmp2, [ramc1, #AT91_DDRSDRC_LPR]
150ddr_no_2nd_ctrl:
151 str tmp1, [sdramc, #AT91_DDRSDRC_LPR] 151 str tmp1, [sdramc, #AT91_DDRSDRC_LPR]
152 strne tmp2, [ramc1, #AT91_DDRSDRC_LPR]
153 152
154 b sdr_sr_done 153 b sdr_sr_done
155 154
@@ -208,6 +207,7 @@ sdr_sr_done:
208 /* Turn off the main oscillator */ 207 /* Turn off the main oscillator */
209 ldr tmp1, [pmc, #AT91_CKGR_MOR] 208 ldr tmp1, [pmc, #AT91_CKGR_MOR]
210 bic tmp1, tmp1, #AT91_PMC_MOSCEN 209 bic tmp1, tmp1, #AT91_PMC_MOSCEN
210 orr tmp1, tmp1, #AT91_PMC_KEY
211 str tmp1, [pmc, #AT91_CKGR_MOR] 211 str tmp1, [pmc, #AT91_CKGR_MOR]
212 212
213 /* Wait for interrupt */ 213 /* Wait for interrupt */
@@ -216,6 +216,7 @@ sdr_sr_done:
216 /* Turn on the main oscillator */ 216 /* Turn on the main oscillator */
217 ldr tmp1, [pmc, #AT91_CKGR_MOR] 217 ldr tmp1, [pmc, #AT91_CKGR_MOR]
218 orr tmp1, tmp1, #AT91_PMC_MOSCEN 218 orr tmp1, tmp1, #AT91_PMC_MOSCEN
219 orr tmp1, tmp1, #AT91_PMC_KEY
219 str tmp1, [pmc, #AT91_CKGR_MOR] 220 str tmp1, [pmc, #AT91_CKGR_MOR]
220 221
221 wait_moscrdy 222 wait_moscrdy
@@ -280,12 +281,17 @@ sdr_sr_done:
280 */ 281 */
281 cmp memctrl, #AT91_MEMCTRL_DDRSDR 282 cmp memctrl, #AT91_MEMCTRL_DDRSDR
282 bne sdr_en_restore 283 bne sdr_en_restore
284 /* Restore MDR in case of LPDDR1 */
285 ldr tmp1, .saved_sam9_mdr
286 str tmp1, [sdramc, #AT91_DDRSDRC_MDR]
283 /* Restore LPR on AT91 with DDRAM */ 287 /* Restore LPR on AT91 with DDRAM */
284 ldr tmp1, .saved_sam9_lpr 288 ldr tmp1, .saved_sam9_lpr
285 str tmp1, [sdramc, #AT91_DDRSDRC_LPR] 289 str tmp1, [sdramc, #AT91_DDRSDRC_LPR]
286 290
287 /* if we use the second ram controller */ 291 /* if we use the second ram controller */
288 cmp ramc1, #0 292 cmp ramc1, #0
293 ldrne tmp2, .saved_sam9_mdr1
294 strne tmp2, [ramc1, #AT91_DDRSDRC_MDR]
289 ldrne tmp2, .saved_sam9_lpr1 295 ldrne tmp2, .saved_sam9_lpr1
290 strne tmp2, [ramc1, #AT91_DDRSDRC_LPR] 296 strne tmp2, [ramc1, #AT91_DDRSDRC_LPR]
291 297
@@ -319,5 +325,11 @@ ram_restored:
319.saved_sam9_lpr1: 325.saved_sam9_lpr1:
320 .word 0 326 .word 0
321 327
328.saved_sam9_mdr:
329 .word 0
330
331.saved_sam9_mdr1:
332 .word 0
333
322ENTRY(at91_slow_clock_sz) 334ENTRY(at91_slow_clock_sz)
323 .word .-at91_slow_clock 335 .word .-at91_slow_clock
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 3f32c47a6d74..d2e9f12d12f1 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -126,8 +126,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
126 */ 126 */
127void exynos_cpu_power_down(int cpu) 127void exynos_cpu_power_down(int cpu)
128{ 128{
129 if (cpu == 0 && (of_machine_is_compatible("samsung,exynos5420") || 129 if (cpu == 0 && (soc_is_exynos5420() || soc_is_exynos5800())) {
130 of_machine_is_compatible("samsung,exynos5800"))) {
131 /* 130 /*
132 * Bypass power down for CPU0 during suspend. Check for 131 * Bypass power down for CPU0 during suspend. Check for
133 * the SYS_PWR_REG value to decide if we are suspending 132 * the SYS_PWR_REG value to decide if we are suspending
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index 20f267121b3e..37266a826437 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -161,6 +161,34 @@ no_clk:
161 of_genpd_add_provider_simple(np, &pd->pd); 161 of_genpd_add_provider_simple(np, &pd->pd);
162 } 162 }
163 163
164 /* Assign the child power domains to their parents */
165 for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") {
166 struct generic_pm_domain *child_domain, *parent_domain;
167 struct of_phandle_args args;
168
169 args.np = np;
170 args.args_count = 0;
171 child_domain = of_genpd_get_from_provider(&args);
172 if (!child_domain)
173 continue;
174
175 if (of_parse_phandle_with_args(np, "power-domains",
176 "#power-domain-cells", 0, &args) != 0)
177 continue;
178
179 parent_domain = of_genpd_get_from_provider(&args);
180 if (!parent_domain)
181 continue;
182
183 if (pm_genpd_add_subdomain(parent_domain, child_domain))
184 pr_warn("%s failed to add subdomain: %s\n",
185 parent_domain->name, child_domain->name);
186 else
187 pr_info("%s has as child subdomain: %s.\n",
188 parent_domain->name, child_domain->name);
189 of_node_put(np);
190 }
191
164 return 0; 192 return 0;
165} 193}
166arch_initcall(exynos4_pm_init_power_domain); 194arch_initcall(exynos4_pm_init_power_domain);
diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
index 52e2b1a2fddb..318d127df147 100644
--- a/arch/arm/mach-exynos/suspend.c
+++ b/arch/arm/mach-exynos/suspend.c
@@ -87,8 +87,8 @@ static unsigned int exynos_pmu_spare3;
87static u32 exynos_irqwake_intmask = 0xffffffff; 87static u32 exynos_irqwake_intmask = 0xffffffff;
88 88
89static const struct exynos_wkup_irq exynos3250_wkup_irq[] = { 89static const struct exynos_wkup_irq exynos3250_wkup_irq[] = {
90 { 73, BIT(1) }, /* RTC alarm */ 90 { 105, BIT(1) }, /* RTC alarm */
91 { 74, BIT(2) }, /* RTC tick */ 91 { 106, BIT(2) }, /* RTC tick */
92 { /* sentinel */ }, 92 { /* sentinel */ },
93}; 93};
94 94
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 4ad6e473cf83..9de3412af406 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -211,8 +211,9 @@ static void __init imx6q_1588_init(void)
211 * set bit IOMUXC_GPR1[21]. Or the PTP clock must be from pad 211 * set bit IOMUXC_GPR1[21]. Or the PTP clock must be from pad
212 * (external OSC), and we need to clear the bit. 212 * (external OSC), and we need to clear the bit.
213 */ 213 */
214 clksel = ptp_clk == enet_ref ? IMX6Q_GPR1_ENET_CLK_SEL_ANATOP : 214 clksel = clk_is_match(ptp_clk, enet_ref) ?
215 IMX6Q_GPR1_ENET_CLK_SEL_PAD; 215 IMX6Q_GPR1_ENET_CLK_SEL_ANATOP :
216 IMX6Q_GPR1_ENET_CLK_SEL_PAD;
216 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr"); 217 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");
217 if (!IS_ERR(gpr)) 218 if (!IS_ERR(gpr))
218 regmap_update_bits(gpr, IOMUXC_GPR1, 219 regmap_update_bits(gpr, IOMUXC_GPR1,
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index 61bfe584a9d7..fc832040c6e9 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -20,6 +20,7 @@
20#include <linux/input.h> 20#include <linux/input.h>
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/delay.h> 22#include <linux/delay.h>
23#include <linux/smc91x.h>
23 24
24#include <mach/hardware.h> 25#include <mach/hardware.h>
25#include <asm/mach-types.h> 26#include <asm/mach-types.h>
@@ -46,15 +47,20 @@ static struct resource smc91x_resources[] = {
46 [1] = { 47 [1] = {
47 .start = MSM_GPIO_TO_INT(49), 48 .start = MSM_GPIO_TO_INT(49),
48 .end = MSM_GPIO_TO_INT(49), 49 .end = MSM_GPIO_TO_INT(49),
49 .flags = IORESOURCE_IRQ, 50 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
50 }, 51 },
51}; 52};
52 53
54static struct smc91x_platdata smc91x_platdata = {
55 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
56};
57
53static struct platform_device smc91x_device = { 58static struct platform_device smc91x_device = {
54 .name = "smc91x", 59 .name = "smc91x",
55 .id = 0, 60 .id = 0,
56 .num_resources = ARRAY_SIZE(smc91x_resources), 61 .num_resources = ARRAY_SIZE(smc91x_resources),
57 .resource = smc91x_resources, 62 .resource = smc91x_resources,
63 .dev.platform_data = &smc91x_platdata,
58}; 64};
59 65
60static struct platform_device *devices[] __initdata = { 66static struct platform_device *devices[] __initdata = {
diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c
index 4c748616ef47..10016a3bc698 100644
--- a/arch/arm/mach-msm/board-qsd8x50.c
+++ b/arch/arm/mach-msm/board-qsd8x50.c
@@ -22,6 +22,7 @@
22#include <linux/usb/msm_hsusb.h> 22#include <linux/usb/msm_hsusb.h>
23#include <linux/err.h> 23#include <linux/err.h>
24#include <linux/clkdev.h> 24#include <linux/clkdev.h>
25#include <linux/smc91x.h>
25 26
26#include <asm/mach-types.h> 27#include <asm/mach-types.h>
27#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
@@ -49,15 +50,20 @@ static struct resource smc91x_resources[] = {
49 .flags = IORESOURCE_MEM, 50 .flags = IORESOURCE_MEM,
50 }, 51 },
51 [1] = { 52 [1] = {
52 .flags = IORESOURCE_IRQ, 53 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
53 }, 54 },
54}; 55};
55 56
57static struct smc91x_platdata smc91x_platdata = {
58 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
59};
60
56static struct platform_device smc91x_device = { 61static struct platform_device smc91x_device = {
57 .name = "smc91x", 62 .name = "smc91x",
58 .id = 0, 63 .id = 0,
59 .num_resources = ARRAY_SIZE(smc91x_resources), 64 .num_resources = ARRAY_SIZE(smc91x_resources),
60 .resource = smc91x_resources, 65 .resource = smc91x_resources,
66 .dev.platform_data = &smc91x_platdata,
61}; 67};
62 68
63static int __init msm_init_smc91x(void) 69static int __init msm_init_smc91x(void)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 92afb723dcfc..355b08936871 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1692,16 +1692,15 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1692 if (ret == -EBUSY) 1692 if (ret == -EBUSY)
1693 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name); 1693 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1694 1694
1695 if (!ret) { 1695 if (oh->clkdm) {
1696 /* 1696 /*
1697 * Set the clockdomain to HW_AUTO, assuming that the 1697 * Set the clockdomain to HW_AUTO, assuming that the
1698 * previous state was HW_AUTO. 1698 * previous state was HW_AUTO.
1699 */ 1699 */
1700 if (oh->clkdm && hwsup) 1700 if (hwsup)
1701 clkdm_allow_idle(oh->clkdm); 1701 clkdm_allow_idle(oh->clkdm);
1702 } else { 1702
1703 if (oh->clkdm) 1703 clkdm_hwmod_disable(oh->clkdm, oh);
1704 clkdm_hwmod_disable(oh->clkdm, oh);
1705 } 1704 }
1706 1705
1707 return ret; 1706 return ret;
@@ -2698,6 +2697,7 @@ static int __init _register(struct omap_hwmod *oh)
2698 INIT_LIST_HEAD(&oh->master_ports); 2697 INIT_LIST_HEAD(&oh->master_ports);
2699 INIT_LIST_HEAD(&oh->slave_ports); 2698 INIT_LIST_HEAD(&oh->slave_ports);
2700 spin_lock_init(&oh->_lock); 2699 spin_lock_init(&oh->_lock);
2700 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2701 2701
2702 oh->_state = _HWMOD_STATE_REGISTERED; 2702 oh->_state = _HWMOD_STATE_REGISTERED;
2703 2703
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index 9d4bec6ee742..9611c91d9b82 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -674,6 +674,7 @@ struct omap_hwmod {
674 u32 _sysc_cache; 674 u32 _sysc_cache;
675 void __iomem *_mpu_rt_va; 675 void __iomem *_mpu_rt_va;
676 spinlock_t _lock; 676 spinlock_t _lock;
677 struct lock_class_key hwmod_key; /* unique lock class */
677 struct list_head node; 678 struct list_head node;
678 struct omap_hwmod_ocp_if *_mpu_port; 679 struct omap_hwmod_ocp_if *_mpu_port;
679 unsigned int (*xlate_irq)(unsigned int); 680 unsigned int (*xlate_irq)(unsigned int);
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index e8692e7675b8..16fe7a1b7a35 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1466,55 +1466,18 @@ static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
1466 * 1466 *
1467 */ 1467 */
1468 1468
1469static struct omap_hwmod_class dra7xx_pcie_hwmod_class = { 1469static struct omap_hwmod_class dra7xx_pciess_hwmod_class = {
1470 .name = "pcie", 1470 .name = "pcie",
1471}; 1471};
1472 1472
1473/* pcie1 */ 1473/* pcie1 */
1474static struct omap_hwmod dra7xx_pcie1_hwmod = { 1474static struct omap_hwmod dra7xx_pciess1_hwmod = {
1475 .name = "pcie1", 1475 .name = "pcie1",
1476 .class = &dra7xx_pcie_hwmod_class, 1476 .class = &dra7xx_pciess_hwmod_class,
1477 .clkdm_name = "pcie_clkdm", 1477 .clkdm_name = "pcie_clkdm",
1478 .main_clk = "l4_root_clk_div", 1478 .main_clk = "l4_root_clk_div",
1479 .prcm = { 1479 .prcm = {
1480 .omap4 = { 1480 .omap4 = {
1481 .clkctrl_offs = DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET,
1482 .modulemode = MODULEMODE_SWCTRL,
1483 },
1484 },
1485};
1486
1487/* pcie2 */
1488static struct omap_hwmod dra7xx_pcie2_hwmod = {
1489 .name = "pcie2",
1490 .class = &dra7xx_pcie_hwmod_class,
1491 .clkdm_name = "pcie_clkdm",
1492 .main_clk = "l4_root_clk_div",
1493 .prcm = {
1494 .omap4 = {
1495 .clkctrl_offs = DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET,
1496 .modulemode = MODULEMODE_SWCTRL,
1497 },
1498 },
1499};
1500
1501/*
1502 * 'PCIE PHY' class
1503 *
1504 */
1505
1506static struct omap_hwmod_class dra7xx_pcie_phy_hwmod_class = {
1507 .name = "pcie-phy",
1508};
1509
1510/* pcie1 phy */
1511static struct omap_hwmod dra7xx_pcie1_phy_hwmod = {
1512 .name = "pcie1-phy",
1513 .class = &dra7xx_pcie_phy_hwmod_class,
1514 .clkdm_name = "l3init_clkdm",
1515 .main_clk = "l4_root_clk_div",
1516 .prcm = {
1517 .omap4 = {
1518 .clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS1_CLKCTRL_OFFSET, 1481 .clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS1_CLKCTRL_OFFSET,
1519 .context_offs = DRA7XX_RM_L3INIT_PCIESS1_CONTEXT_OFFSET, 1482 .context_offs = DRA7XX_RM_L3INIT_PCIESS1_CONTEXT_OFFSET,
1520 .modulemode = MODULEMODE_SWCTRL, 1483 .modulemode = MODULEMODE_SWCTRL,
@@ -1522,11 +1485,11 @@ static struct omap_hwmod dra7xx_pcie1_phy_hwmod = {
1522 }, 1485 },
1523}; 1486};
1524 1487
1525/* pcie2 phy */ 1488/* pcie2 */
1526static struct omap_hwmod dra7xx_pcie2_phy_hwmod = { 1489static struct omap_hwmod dra7xx_pciess2_hwmod = {
1527 .name = "pcie2-phy", 1490 .name = "pcie2",
1528 .class = &dra7xx_pcie_phy_hwmod_class, 1491 .class = &dra7xx_pciess_hwmod_class,
1529 .clkdm_name = "l3init_clkdm", 1492 .clkdm_name = "pcie_clkdm",
1530 .main_clk = "l4_root_clk_div", 1493 .main_clk = "l4_root_clk_div",
1531 .prcm = { 1494 .prcm = {
1532 .omap4 = { 1495 .omap4 = {
@@ -2877,50 +2840,34 @@ static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
2877 .user = OCP_USER_MPU | OCP_USER_SDMA, 2840 .user = OCP_USER_MPU | OCP_USER_SDMA,
2878}; 2841};
2879 2842
2880/* l3_main_1 -> pcie1 */ 2843/* l3_main_1 -> pciess1 */
2881static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pcie1 = { 2844static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pciess1 = {
2882 .master = &dra7xx_l3_main_1_hwmod, 2845 .master = &dra7xx_l3_main_1_hwmod,
2883 .slave = &dra7xx_pcie1_hwmod, 2846 .slave = &dra7xx_pciess1_hwmod,
2884 .clk = "l3_iclk_div", 2847 .clk = "l3_iclk_div",
2885 .user = OCP_USER_MPU | OCP_USER_SDMA, 2848 .user = OCP_USER_MPU | OCP_USER_SDMA,
2886}; 2849};
2887 2850
2888/* l4_cfg -> pcie1 */ 2851/* l4_cfg -> pciess1 */
2889static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie1 = { 2852static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pciess1 = {
2890 .master = &dra7xx_l4_cfg_hwmod, 2853 .master = &dra7xx_l4_cfg_hwmod,
2891 .slave = &dra7xx_pcie1_hwmod, 2854 .slave = &dra7xx_pciess1_hwmod,
2892 .clk = "l4_root_clk_div", 2855 .clk = "l4_root_clk_div",
2893 .user = OCP_USER_MPU | OCP_USER_SDMA, 2856 .user = OCP_USER_MPU | OCP_USER_SDMA,
2894}; 2857};
2895 2858
2896/* l3_main_1 -> pcie2 */ 2859/* l3_main_1 -> pciess2 */
2897static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pcie2 = { 2860static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pciess2 = {
2898 .master = &dra7xx_l3_main_1_hwmod, 2861 .master = &dra7xx_l3_main_1_hwmod,
2899 .slave = &dra7xx_pcie2_hwmod, 2862 .slave = &dra7xx_pciess2_hwmod,
2900 .clk = "l3_iclk_div", 2863 .clk = "l3_iclk_div",
2901 .user = OCP_USER_MPU | OCP_USER_SDMA, 2864 .user = OCP_USER_MPU | OCP_USER_SDMA,
2902}; 2865};
2903 2866
2904/* l4_cfg -> pcie2 */ 2867/* l4_cfg -> pciess2 */
2905static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie2 = { 2868static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pciess2 = {
2906 .master = &dra7xx_l4_cfg_hwmod,
2907 .slave = &dra7xx_pcie2_hwmod,
2908 .clk = "l4_root_clk_div",
2909 .user = OCP_USER_MPU | OCP_USER_SDMA,
2910};
2911
2912/* l4_cfg -> pcie1 phy */
2913static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie1_phy = {
2914 .master = &dra7xx_l4_cfg_hwmod,
2915 .slave = &dra7xx_pcie1_phy_hwmod,
2916 .clk = "l4_root_clk_div",
2917 .user = OCP_USER_MPU | OCP_USER_SDMA,
2918};
2919
2920/* l4_cfg -> pcie2 phy */
2921static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie2_phy = {
2922 .master = &dra7xx_l4_cfg_hwmod, 2869 .master = &dra7xx_l4_cfg_hwmod,
2923 .slave = &dra7xx_pcie2_phy_hwmod, 2870 .slave = &dra7xx_pciess2_hwmod,
2924 .clk = "l4_root_clk_div", 2871 .clk = "l4_root_clk_div",
2925 .user = OCP_USER_MPU | OCP_USER_SDMA, 2872 .user = OCP_USER_MPU | OCP_USER_SDMA,
2926}; 2873};
@@ -3327,12 +3274,10 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
3327 &dra7xx_l4_cfg__mpu, 3274 &dra7xx_l4_cfg__mpu,
3328 &dra7xx_l4_cfg__ocp2scp1, 3275 &dra7xx_l4_cfg__ocp2scp1,
3329 &dra7xx_l4_cfg__ocp2scp3, 3276 &dra7xx_l4_cfg__ocp2scp3,
3330 &dra7xx_l3_main_1__pcie1, 3277 &dra7xx_l3_main_1__pciess1,
3331 &dra7xx_l4_cfg__pcie1, 3278 &dra7xx_l4_cfg__pciess1,
3332 &dra7xx_l3_main_1__pcie2, 3279 &dra7xx_l3_main_1__pciess2,
3333 &dra7xx_l4_cfg__pcie2, 3280 &dra7xx_l4_cfg__pciess2,
3334 &dra7xx_l4_cfg__pcie1_phy,
3335 &dra7xx_l4_cfg__pcie2_phy,
3336 &dra7xx_l3_main_1__qspi, 3281 &dra7xx_l3_main_1__qspi,
3337 &dra7xx_l4_per3__rtcss, 3282 &dra7xx_l4_per3__rtcss,
3338 &dra7xx_l4_cfg__sata, 3283 &dra7xx_l4_cfg__sata,
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 190fa43e7479..e642b079e9f3 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -173,6 +173,7 @@ static void __init omap3_igep0030_rev_g_legacy_init(void)
173 173
174static void __init omap3_evm_legacy_init(void) 174static void __init omap3_evm_legacy_init(void)
175{ 175{
176 hsmmc2_internal_input_clk();
176 legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 149); 177 legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 149);
177} 178}
178 179
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index a08a617a6c11..d6d6bc39e05c 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -252,10 +252,10 @@ static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
252{ 252{
253 saved_mask[0] = 253 saved_mask[0] =
254 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, 254 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
255 OMAP4_PRM_IRQSTATUS_MPU_OFFSET); 255 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
256 saved_mask[1] = 256 saved_mask[1] =
257 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, 257 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
258 OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET); 258 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
259 259
260 omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST, 260 omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
261 OMAP4_PRM_IRQENABLE_MPU_OFFSET); 261 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index 343c4e3a7c5d..f6d02e4cbcda 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -36,6 +36,7 @@
36#include <linux/platform_data/video-pxafb.h> 36#include <linux/platform_data/video-pxafb.h>
37#include <mach/bitfield.h> 37#include <mach/bitfield.h>
38#include <linux/platform_data/mmc-pxamci.h> 38#include <linux/platform_data/mmc-pxamci.h>
39#include <linux/smc91x.h>
39 40
40#include "generic.h" 41#include "generic.h"
41#include "devices.h" 42#include "devices.h"
@@ -81,11 +82,16 @@ static struct resource smc91x_resources[] = {
81 } 82 }
82}; 83};
83 84
85static struct smc91x_platdata smc91x_platdata = {
86 .flags = SMC91X_USE_32BIT | SMC91X_USE_DMA | SMC91X_NOWAIT,
87};
88
84static struct platform_device smc91x_device = { 89static struct platform_device smc91x_device = {
85 .name = "smc91x", 90 .name = "smc91x",
86 .id = 0, 91 .id = 0,
87 .num_resources = ARRAY_SIZE(smc91x_resources), 92 .num_resources = ARRAY_SIZE(smc91x_resources),
88 .resource = smc91x_resources, 93 .resource = smc91x_resources,
94 .dev.platform_data = &smc91x_platdata,
89}; 95};
90 96
91static void idp_backlight_power(int on) 97static void idp_backlight_power(int on)
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index ad777b353bd5..eaee2c20b189 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -24,6 +24,7 @@
24#include <linux/mtd/mtd.h> 24#include <linux/mtd/mtd.h>
25#include <linux/mtd/partitions.h> 25#include <linux/mtd/partitions.h>
26#include <linux/pwm_backlight.h> 26#include <linux/pwm_backlight.h>
27#include <linux/smc91x.h>
27 28
28#include <asm/types.h> 29#include <asm/types.h>
29#include <asm/setup.h> 30#include <asm/setup.h>
@@ -189,15 +190,20 @@ static struct resource smc91x_resources[] = {
189 [1] = { 190 [1] = {
190 .start = LPD270_ETHERNET_IRQ, 191 .start = LPD270_ETHERNET_IRQ,
191 .end = LPD270_ETHERNET_IRQ, 192 .end = LPD270_ETHERNET_IRQ,
192 .flags = IORESOURCE_IRQ, 193 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
193 }, 194 },
194}; 195};
195 196
197struct smc91x_platdata smc91x_platdata = {
198 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
199};
200
196static struct platform_device smc91x_device = { 201static struct platform_device smc91x_device = {
197 .name = "smc91x", 202 .name = "smc91x",
198 .id = 0, 203 .id = 0,
199 .num_resources = ARRAY_SIZE(smc91x_resources), 204 .num_resources = ARRAY_SIZE(smc91x_resources),
200 .resource = smc91x_resources, 205 .resource = smc91x_resources,
206 .dev.platform_data = &smc91x_platdata,
201}; 207};
202 208
203static struct resource lpd270_flash_resources[] = { 209static struct resource lpd270_flash_resources[] = {
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 850e506926df..c309593abdb2 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -28,6 +28,7 @@
28#include <linux/platform_data/video-clcd-versatile.h> 28#include <linux/platform_data/video-clcd-versatile.h>
29#include <linux/io.h> 29#include <linux/io.h>
30#include <linux/smsc911x.h> 30#include <linux/smsc911x.h>
31#include <linux/smc91x.h>
31#include <linux/ata_platform.h> 32#include <linux/ata_platform.h>
32#include <linux/amba/mmci.h> 33#include <linux/amba/mmci.h>
33#include <linux/gfp.h> 34#include <linux/gfp.h>
@@ -94,6 +95,10 @@ static struct smsc911x_platform_config smsc911x_config = {
94 .phy_interface = PHY_INTERFACE_MODE_MII, 95 .phy_interface = PHY_INTERFACE_MODE_MII,
95}; 96};
96 97
98static struct smc91x_platdata smc91x_platdata = {
99 .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT,
100};
101
97static struct platform_device realview_eth_device = { 102static struct platform_device realview_eth_device = {
98 .name = "smsc911x", 103 .name = "smsc911x",
99 .id = 0, 104 .id = 0,
@@ -107,6 +112,8 @@ int realview_eth_register(const char *name, struct resource *res)
107 realview_eth_device.resource = res; 112 realview_eth_device.resource = res;
108 if (strcmp(realview_eth_device.name, "smsc911x") == 0) 113 if (strcmp(realview_eth_device.name, "smsc911x") == 0)
109 realview_eth_device.dev.platform_data = &smsc911x_config; 114 realview_eth_device.dev.platform_data = &smsc911x_config;
115 else
116 realview_eth_device.dev.platform_data = &smc91x_platdata;
110 117
111 return platform_device_register(&realview_eth_device); 118 return platform_device_register(&realview_eth_device);
112} 119}
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 64c88d657f9e..b3869cbbcc68 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -234,7 +234,7 @@ static struct resource realview_eb_eth_resources[] = {
234 [1] = { 234 [1] = {
235 .start = IRQ_EB_ETH, 235 .start = IRQ_EB_ETH,
236 .end = IRQ_EB_ETH, 236 .end = IRQ_EB_ETH,
237 .flags = IORESOURCE_IRQ, 237 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
238 }, 238 },
239}; 239};
240 240
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 169262e3040d..af868d258e66 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -12,6 +12,7 @@
12#include <linux/pm.h> 12#include <linux/pm.h>
13#include <linux/serial_core.h> 13#include <linux/serial_core.h>
14#include <linux/slab.h> 14#include <linux/slab.h>
15#include <linux/smc91x.h>
15 16
16#include <asm/mach-types.h> 17#include <asm/mach-types.h>
17#include <asm/mach/map.h> 18#include <asm/mach/map.h>
@@ -258,12 +259,17 @@ static int neponset_probe(struct platform_device *dev)
258 0x02000000, "smc91x-attrib"), 259 0x02000000, "smc91x-attrib"),
259 { .flags = IORESOURCE_IRQ }, 260 { .flags = IORESOURCE_IRQ },
260 }; 261 };
262 struct smc91x_platdata smc91x_platdata = {
263 .flags = SMC91X_USE_8BIT | SMC91X_IO_SHIFT_2 | SMC91X_NOWAIT,
264 };
261 struct platform_device_info smc91x_devinfo = { 265 struct platform_device_info smc91x_devinfo = {
262 .parent = &dev->dev, 266 .parent = &dev->dev,
263 .name = "smc91x", 267 .name = "smc91x",
264 .id = 0, 268 .id = 0,
265 .res = smc91x_resources, 269 .res = smc91x_resources,
266 .num_res = ARRAY_SIZE(smc91x_resources), 270 .num_res = ARRAY_SIZE(smc91x_resources),
271 .data = &smc91x_platdata,
272 .size_data = sizeof(smc91x_platdata),
267 }; 273 };
268 int ret, irq; 274 int ret, irq;
269 275
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
index 091261878eff..1525d7b5f1b7 100644
--- a/arch/arm/mach-sa1100/pleb.c
+++ b/arch/arm/mach-sa1100/pleb.c
@@ -11,6 +11,7 @@
11#include <linux/irq.h> 11#include <linux/irq.h>
12#include <linux/io.h> 12#include <linux/io.h>
13#include <linux/mtd/partitions.h> 13#include <linux/mtd/partitions.h>
14#include <linux/smc91x.h>
14 15
15#include <mach/hardware.h> 16#include <mach/hardware.h>
16#include <asm/setup.h> 17#include <asm/setup.h>
@@ -43,12 +44,18 @@ static struct resource smc91x_resources[] = {
43#endif 44#endif
44}; 45};
45 46
47static struct smc91x_platdata smc91x_platdata = {
48 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
49};
46 50
47static struct platform_device smc91x_device = { 51static struct platform_device smc91x_device = {
48 .name = "smc91x", 52 .name = "smc91x",
49 .id = 0, 53 .id = 0,
50 .num_resources = ARRAY_SIZE(smc91x_resources), 54 .num_resources = ARRAY_SIZE(smc91x_resources),
51 .resource = smc91x_resources, 55 .resource = smc91x_resources,
56 .dev = {
57 .platform_data = &smc91x_platdata,
58 },
52}; 59};
53 60
54static struct platform_device *devices[] __initdata = { 61static struct platform_device *devices[] __initdata = {
diff --git a/arch/arm/mach-socfpga/core.h b/arch/arm/mach-socfpga/core.h
index 483cb467bf65..a0f3b1cd497c 100644
--- a/arch/arm/mach-socfpga/core.h
+++ b/arch/arm/mach-socfpga/core.h
@@ -45,6 +45,6 @@ extern char secondary_trampoline, secondary_trampoline_end;
45 45
46extern unsigned long socfpga_cpu1start_addr; 46extern unsigned long socfpga_cpu1start_addr;
47 47
48#define SOCFPGA_SCU_VIRT_BASE 0xfffec000 48#define SOCFPGA_SCU_VIRT_BASE 0xfee00000
49 49
50#endif 50#endif
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c
index 383d61e138af..f5e597c207b9 100644
--- a/arch/arm/mach-socfpga/socfpga.c
+++ b/arch/arm/mach-socfpga/socfpga.c
@@ -23,6 +23,7 @@
23#include <asm/hardware/cache-l2x0.h> 23#include <asm/hardware/cache-l2x0.h>
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/mach/map.h> 25#include <asm/mach/map.h>
26#include <asm/cacheflush.h>
26 27
27#include "core.h" 28#include "core.h"
28 29
@@ -73,6 +74,10 @@ void __init socfpga_sysmgr_init(void)
73 (u32 *) &socfpga_cpu1start_addr)) 74 (u32 *) &socfpga_cpu1start_addr))
74 pr_err("SMP: Need cpu1-start-addr in device tree.\n"); 75 pr_err("SMP: Need cpu1-start-addr in device tree.\n");
75 76
77 /* Ensure that socfpga_cpu1start_addr is visible to other CPUs */
78 smp_wmb();
79 sync_cache_w(&socfpga_cpu1start_addr);
80
76 sys_manager_base_addr = of_iomap(np, 0); 81 sys_manager_base_addr = of_iomap(np, 0);
77 82
78 np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr"); 83 np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr");
diff --git a/arch/arm/mach-sti/board-dt.c b/arch/arm/mach-sti/board-dt.c
index b067390cef4e..b373acade338 100644
--- a/arch/arm/mach-sti/board-dt.c
+++ b/arch/arm/mach-sti/board-dt.c
@@ -18,6 +18,7 @@ static const char *stih41x_dt_match[] __initdata = {
18 "st,stih415", 18 "st,stih415",
19 "st,stih416", 19 "st,stih416",
20 "st,stih407", 20 "st,stih407",
21 "st,stih410",
21 "st,stih418", 22 "st,stih418",
22 NULL 23 NULL
23}; 24};
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-01 10:26:43 -0400