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authorColin Cross <ccross@android.com>2011-02-23 16:58:00 -0500
committerColin Cross <ccross@android.com>2011-02-23 16:58:00 -0500
commit48e5114d6f4cade466b127c6aad09769a574b557 (patch)
treed68264b7039cac7be21043a3f2a80a3da8c000dd /arch/arm
parent38376866a1fe5b1e6d9510ec4913c2b461f456f3 (diff)
parentd9a51fe75da73084b6c38f7f4450ad4c1bef8224 (diff)
Merge branch 'boards-for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra-2.6 into for-next
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-tegra/Kconfig19
-rw-r--r--arch/arm/mach-tegra/Makefile4
-rw-r--r--arch/arm/mach-tegra/board-harmony-pinmux.c19
-rw-r--r--arch/arm/mach-tegra/board-harmony.c55
-rw-r--r--arch/arm/mach-tegra/board-seaboard-pinmux.c179
-rw-r--r--arch/arm/mach-tegra/board-seaboard.c196
-rw-r--r--arch/arm/mach-tegra/board-seaboard.h38
-rw-r--r--arch/arm/mach-tegra/devices.c505
-rw-r--r--arch/arm/mach-tegra/devices.h46
-rw-r--r--arch/arm/mach-tegra/gpio.c14
-rw-r--r--arch/arm/mach-tegra/include/mach/gpio.h7
11 files changed, 1054 insertions, 28 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index bdf52f0f7295..b94e52df0d8e 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -27,12 +27,31 @@ config MACH_HARMONY
27 help 27 help
28 Support for nVidia Harmony development platform 28 Support for nVidia Harmony development platform
29 29
30config MACH_KAEN
31 bool "Kaen board"
32 select MACH_SEABOARD
33 help
34 Support for the Kaen version of Seaboard
35
36config MACH_SEABOARD
37 bool "Seaboard board"
38 help
39 Support for nVidia Seaboard development platform. It will
40 also be included for some of the derivative boards that
41 have large similarities with the seaboard design.
42
30config MACH_TRIMSLICE 43config MACH_TRIMSLICE
31 bool "TrimSlice board" 44 bool "TrimSlice board"
32 select TEGRA_PCI 45 select TEGRA_PCI
33 help 46 help
34 Support for CompuLab TrimSlice platform 47 Support for CompuLab TrimSlice platform
35 48
49config MACH_WARIO
50 bool "Wario board"
51 select MACH_SEABOARD
52 help
53 Support for the Wario version of Seaboard
54
36choice 55choice
37 prompt "Low-level debug console UART" 56 prompt "Low-level debug console UART"
38 default TEGRA_DEBUG_UART_NONE 57 default TEGRA_DEBUG_UART_NONE
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 3fe357bc763c..9bf39fa34d85 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -1,4 +1,5 @@
1obj-y += common.o 1obj-y += common.o
2obj-y += devices.o
2obj-y += io.o 3obj-y += io.o
3obj-y += irq.o legacy_irq.o 4obj-y += irq.o legacy_irq.o
4obj-y += clock.o 5obj-y += clock.o
@@ -21,5 +22,8 @@ obj-${CONFIG_MACH_HARMONY} += board-harmony.o
21obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o 22obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o
22obj-${CONFIG_MACH_HARMONY} += board-harmony-pcie.o 23obj-${CONFIG_MACH_HARMONY} += board-harmony-pcie.o
23 24
25obj-${CONFIG_MACH_SEABOARD} += board-seaboard.o
26obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o
27
24obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice.o 28obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice.o
25obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice-pinmux.o 29obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice-pinmux.o
diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index 50b15d500cac..98368d947be3 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -15,8 +15,10 @@
15 */ 15 */
16 16
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/gpio.h>
18#include <mach/pinmux.h> 19#include <mach/pinmux.h>
19 20
21#include "gpio-names.h"
20#include "board-harmony.h" 22#include "board-harmony.h"
21 23
22static struct tegra_pingroup_config harmony_pinmux[] = { 24static struct tegra_pingroup_config harmony_pinmux[] = {
@@ -34,10 +36,10 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
34 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 36 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
35 {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 37 {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
36 {TEGRA_PINGROUP_DDC, TEGRA_MUX_I2C2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 38 {TEGRA_PINGROUP_DDC, TEGRA_MUX_I2C2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
37 {TEGRA_PINGROUP_DTA, TEGRA_MUX_SDIO2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 39 {TEGRA_PINGROUP_DTA, TEGRA_MUX_SDIO2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
38 {TEGRA_PINGROUP_DTB, TEGRA_MUX_RSVD1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 40 {TEGRA_PINGROUP_DTB, TEGRA_MUX_RSVD1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
39 {TEGRA_PINGROUP_DTC, TEGRA_MUX_RSVD1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 41 {TEGRA_PINGROUP_DTC, TEGRA_MUX_RSVD1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
40 {TEGRA_PINGROUP_DTD, TEGRA_MUX_SDIO2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 42 {TEGRA_PINGROUP_DTD, TEGRA_MUX_SDIO2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
41 {TEGRA_PINGROUP_DTE, TEGRA_MUX_RSVD1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 43 {TEGRA_PINGROUP_DTE, TEGRA_MUX_RSVD1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
42 {TEGRA_PINGROUP_DTF, TEGRA_MUX_I2C3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 44 {TEGRA_PINGROUP_DTF, TEGRA_MUX_I2C3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
43 {TEGRA_PINGROUP_GMA, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 45 {TEGRA_PINGROUP_GMA, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -138,7 +140,18 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
138 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 140 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
139}; 141};
140 142
143static struct tegra_gpio_table gpio_table[] = {
144 { .gpio = TEGRA_GPIO_PI5, .enable = true }, /* mmc2 cd */
145 { .gpio = TEGRA_GPIO_PH1, .enable = true }, /* mmc2 wp */
146 { .gpio = TEGRA_GPIO_PT3, .enable = true }, /* mmc2 pwr */
147 { .gpio = TEGRA_GPIO_PH2, .enable = true }, /* mmc4 cd */
148 { .gpio = TEGRA_GPIO_PH3, .enable = true }, /* mmc4 wp */
149 { .gpio = TEGRA_GPIO_PI6, .enable = true }, /* mmc4 pwr */
150};
151
141void harmony_pinmux_init(void) 152void harmony_pinmux_init(void)
142{ 153{
143 tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux)); 154 tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux));
155
156 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
144} 157}
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index 368ddff953fc..49224e936eb4 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -30,35 +30,13 @@
30 30
31#include <mach/iomap.h> 31#include <mach/iomap.h>
32#include <mach/irqs.h> 32#include <mach/irqs.h>
33#include <mach/sdhci.h>
33 34
34#include "board.h" 35#include "board.h"
35#include "board-harmony.h" 36#include "board-harmony.h"
36#include "clock.h" 37#include "clock.h"
37 38#include "devices.h"
38/* NVidia bootloader tags */ 39#include "gpio-names.h"
39#define ATAG_NVIDIA 0x41000801
40
41#define ATAG_NVIDIA_RM 0x1
42#define ATAG_NVIDIA_DISPLAY 0x2
43#define ATAG_NVIDIA_FRAMEBUFFER 0x3
44#define ATAG_NVIDIA_CHIPSHMOO 0x4
45#define ATAG_NVIDIA_CHIPSHMOOPHYS 0x5
46#define ATAG_NVIDIA_PRESERVED_MEM_0 0x10000
47#define ATAG_NVIDIA_PRESERVED_MEM_N 2
48#define ATAG_NVIDIA_FORCE_32 0x7fffffff
49
50struct tag_tegra {
51 __u32 bootarg_key;
52 __u32 bootarg_len;
53 char bootarg[1];
54};
55
56static int __init parse_tag_nvidia(const struct tag *tag)
57{
58
59 return 0;
60}
61__tagtable(ATAG_NVIDIA, parse_tag_nvidia);
62 40
63static struct plat_serial8250_port debug_uart_platform_data[] = { 41static struct plat_serial8250_port debug_uart_platform_data[] = {
64 { 42 {
@@ -84,6 +62,9 @@ static struct platform_device debug_uart = {
84 62
85static struct platform_device *harmony_devices[] __initdata = { 63static struct platform_device *harmony_devices[] __initdata = {
86 &debug_uart, 64 &debug_uart,
65 &tegra_sdhci_device1,
66 &tegra_sdhci_device2,
67 &tegra_sdhci_device4,
87}; 68};
88 69
89static void __init tegra_harmony_fixup(struct machine_desc *desc, 70static void __init tegra_harmony_fixup(struct machine_desc *desc,
@@ -102,12 +83,36 @@ static __initdata struct tegra_clk_init_table harmony_clk_init_table[] = {
102 { NULL, NULL, 0, 0}, 83 { NULL, NULL, 0, 0},
103}; 84};
104 85
86
87static struct tegra_sdhci_platform_data sdhci_pdata1 = {
88 .cd_gpio = -1,
89 .wp_gpio = -1,
90 .power_gpio = -1,
91};
92
93static struct tegra_sdhci_platform_data sdhci_pdata2 = {
94 .cd_gpio = TEGRA_GPIO_PI5,
95 .wp_gpio = TEGRA_GPIO_PH1,
96 .power_gpio = TEGRA_GPIO_PT3,
97};
98
99static struct tegra_sdhci_platform_data sdhci_pdata4 = {
100 .cd_gpio = TEGRA_GPIO_PH2,
101 .wp_gpio = TEGRA_GPIO_PH3,
102 .power_gpio = TEGRA_GPIO_PI6,
103 .is_8bit = 1,
104};
105
105static void __init tegra_harmony_init(void) 106static void __init tegra_harmony_init(void)
106{ 107{
107 tegra_clk_init_from_table(harmony_clk_init_table); 108 tegra_clk_init_from_table(harmony_clk_init_table);
108 109
109 harmony_pinmux_init(); 110 harmony_pinmux_init();
110 111
112 tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
113 tegra_sdhci_device2.dev.platform_data = &sdhci_pdata2;
114 tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
115
111 platform_add_devices(harmony_devices, ARRAY_SIZE(harmony_devices)); 116 platform_add_devices(harmony_devices, ARRAY_SIZE(harmony_devices));
112} 117}
113 118
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
new file mode 100644
index 000000000000..2d6ad83ed4b2
--- /dev/null
+++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c
@@ -0,0 +1,179 @@
1/*
2 * Copyright (C) 2010 NVIDIA Corporation
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/gpio.h>
18
19#include <mach/pinmux.h>
20#include <mach/pinmux-t2.h>
21
22#include "gpio-names.h"
23#include "board-seaboard.h"
24
25#define DEFAULT_DRIVE(_name) \
26 { \
27 .pingroup = TEGRA_DRIVE_PINGROUP_##_name, \
28 .hsm = TEGRA_HSM_DISABLE, \
29 .schmitt = TEGRA_SCHMITT_ENABLE, \
30 .drive = TEGRA_DRIVE_DIV_1, \
31 .pull_down = TEGRA_PULL_31, \
32 .pull_up = TEGRA_PULL_31, \
33 .slew_rising = TEGRA_SLEW_SLOWEST, \
34 .slew_falling = TEGRA_SLEW_SLOWEST, \
35 }
36
37static __initdata struct tegra_drive_pingroup_config seaboard_drive_pinmux[] = {
38 DEFAULT_DRIVE(SDIO1),
39};
40
41static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
42 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
43 {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
44 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
45 {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
46 {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
47 {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
48 {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
49 {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
50 {TEGRA_PINGROUP_CSUS, TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
51 {TEGRA_PINGROUP_DAP1, TEGRA_MUX_DAP1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
52 {TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
53 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
54 {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
55 {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
56 {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
57 {TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
58 {TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
59 {TEGRA_PINGROUP_DTD, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
60 {TEGRA_PINGROUP_DTE, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
61 {TEGRA_PINGROUP_DTF, TEGRA_MUX_I2C3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
62 {TEGRA_PINGROUP_GMA, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
63 {TEGRA_PINGROUP_GMB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
64 {TEGRA_PINGROUP_GMC, TEGRA_MUX_UARTD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
65 {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
66 {TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
67 {TEGRA_PINGROUP_GPU, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
68 {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
69 {TEGRA_PINGROUP_GPV, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
70 {TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
71 {TEGRA_PINGROUP_I2CP, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
72 {TEGRA_PINGROUP_IRRX, TEGRA_MUX_UARTB, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
73 {TEGRA_PINGROUP_IRTX, TEGRA_MUX_UARTB, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
74 {TEGRA_PINGROUP_KBCA, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
75 {TEGRA_PINGROUP_KBCB, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
76 {TEGRA_PINGROUP_KBCC, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
77 {TEGRA_PINGROUP_KBCD, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
78 {TEGRA_PINGROUP_KBCE, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
79 {TEGRA_PINGROUP_KBCF, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
80 {TEGRA_PINGROUP_LCSN, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
81 {TEGRA_PINGROUP_LD0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
82 {TEGRA_PINGROUP_LD1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
83 {TEGRA_PINGROUP_LD10, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
84 {TEGRA_PINGROUP_LD11, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
85 {TEGRA_PINGROUP_LD12, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
86 {TEGRA_PINGROUP_LD13, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
87 {TEGRA_PINGROUP_LD14, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
88 {TEGRA_PINGROUP_LD15, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
89 {TEGRA_PINGROUP_LD16, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
90 {TEGRA_PINGROUP_LD17, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
91 {TEGRA_PINGROUP_LD2, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
92 {TEGRA_PINGROUP_LD3, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
93 {TEGRA_PINGROUP_LD4, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
94 {TEGRA_PINGROUP_LD5, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
95 {TEGRA_PINGROUP_LD6, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
96 {TEGRA_PINGROUP_LD7, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
97 {TEGRA_PINGROUP_LD8, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
98 {TEGRA_PINGROUP_LD9, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
99 {TEGRA_PINGROUP_LDC, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
100 {TEGRA_PINGROUP_LDI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
101 {TEGRA_PINGROUP_LHP0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
102 {TEGRA_PINGROUP_LHP1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
103 {TEGRA_PINGROUP_LHP2, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
104 {TEGRA_PINGROUP_LHS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
105 {TEGRA_PINGROUP_LM0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
106 {TEGRA_PINGROUP_LM1, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
107 {TEGRA_PINGROUP_LPP, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
108 {TEGRA_PINGROUP_LPW0, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
109 {TEGRA_PINGROUP_LPW1, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
110 {TEGRA_PINGROUP_LPW2, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
111 {TEGRA_PINGROUP_LSC0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
112 {TEGRA_PINGROUP_LSC1, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
113 {TEGRA_PINGROUP_LSCK, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
114 {TEGRA_PINGROUP_LSDA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
115 {TEGRA_PINGROUP_LSDI, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
116 {TEGRA_PINGROUP_LSPI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
117 {TEGRA_PINGROUP_LVP0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
118 {TEGRA_PINGROUP_LVP1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
119 {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
120 {TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
121 {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
122 {TEGRA_PINGROUP_PTA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
123 {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
124 {TEGRA_PINGROUP_SDB, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
125 {TEGRA_PINGROUP_SDC, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
126 {TEGRA_PINGROUP_SDD, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
127 {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
128 {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
129 {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
130 {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
131 {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
132 {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
133 {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
134 {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
135 {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
136 {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
137 {TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
138 {TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
139 {TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
140 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
141 {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
142 {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
143 {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
144 {TEGRA_PINGROUP_UAC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
145 {TEGRA_PINGROUP_UAD, TEGRA_MUX_IRDA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
146 {TEGRA_PINGROUP_UCA, TEGRA_MUX_UARTC, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
147 {TEGRA_PINGROUP_UCB, TEGRA_MUX_UARTC, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
148 {TEGRA_PINGROUP_UDA, TEGRA_MUX_ULPI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
149 {TEGRA_PINGROUP_CK32, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
150 {TEGRA_PINGROUP_DDRC, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
151 {TEGRA_PINGROUP_PMCA, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
152 {TEGRA_PINGROUP_PMCB, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
153 {TEGRA_PINGROUP_PMCC, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
154 {TEGRA_PINGROUP_PMCD, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
155 {TEGRA_PINGROUP_PMCE, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
156 {TEGRA_PINGROUP_XM2C, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
157 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
158};
159
160
161
162
163static struct tegra_gpio_table gpio_table[] = {
164 { .gpio = TEGRA_GPIO_PI5, .enable = true }, /* mmc2 cd */
165 { .gpio = TEGRA_GPIO_PH1, .enable = true }, /* mmc2 wp */
166 { .gpio = TEGRA_GPIO_PI6, .enable = true }, /* mmc2 pwr */
167 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true }, /* lid switch */
168 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true }, /* power key */
169};
170
171void __init seaboard_pinmux_init(void)
172{
173 tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux));
174
175 tegra_drive_pinmux_config_table(seaboard_drive_pinmux,
176 ARRAY_SIZE(seaboard_drive_pinmux));
177
178 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
179}
diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c
new file mode 100644
index 000000000000..6ca9e61f6cd0
--- /dev/null
+++ b/arch/arm/mach-tegra/board-seaboard.c
@@ -0,0 +1,196 @@
1/*
2 * Copyright (c) 2010, 2011 NVIDIA Corporation.
3 * Copyright (C) 2010, 2011 Google, Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 */
16
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/platform_device.h>
20#include <linux/serial_8250.h>
21#include <linux/delay.h>
22#include <linux/input.h>
23#include <linux/io.h>
24#include <linux/gpio_keys.h>
25
26#include <mach/iomap.h>
27#include <mach/irqs.h>
28#include <mach/sdhci.h>
29
30#include <asm/mach-types.h>
31#include <asm/mach/arch.h>
32
33#include "board.h"
34#include "board-seaboard.h"
35#include "clock.h"
36#include "devices.h"
37#include "gpio-names.h"
38
39static struct plat_serial8250_port debug_uart_platform_data[] = {
40 {
41 /* Memory and IRQ filled in before registration */
42 .flags = UPF_BOOT_AUTOCONF,
43 .iotype = UPIO_MEM,
44 .regshift = 2,
45 .uartclk = 216000000,
46 }, {
47 .flags = 0,
48 }
49};
50
51static struct platform_device debug_uart = {
52 .name = "serial8250",
53 .id = PLAT8250_DEV_PLATFORM,
54 .dev = {
55 .platform_data = debug_uart_platform_data,
56 },
57};
58
59static __initdata struct tegra_clk_init_table seaboard_clk_init_table[] = {
60 /* name parent rate enabled */
61 { "uartb", "pll_p", 216000000, true},
62 { "uartd", "pll_p", 216000000, true},
63 { NULL, NULL, 0, 0},
64};
65
66static struct gpio_keys_button seaboard_gpio_keys_buttons[] = {
67 {
68 .code = SW_LID,
69 .gpio = TEGRA_GPIO_LIDSWITCH,
70 .active_low = 0,
71 .desc = "Lid",
72 .type = EV_SW,
73 .wakeup = 1,
74 .debounce_interval = 1,
75 },
76 {
77 .code = KEY_POWER,
78 .gpio = TEGRA_GPIO_POWERKEY,
79 .active_low = 1,
80 .desc = "Power",
81 .type = EV_KEY,
82 .wakeup = 1,
83 },
84};
85
86static struct gpio_keys_platform_data seaboard_gpio_keys = {
87 .buttons = seaboard_gpio_keys_buttons,
88 .nbuttons = ARRAY_SIZE(seaboard_gpio_keys_buttons),
89};
90
91static struct platform_device seaboard_gpio_keys_device = {
92 .name = "gpio-keys",
93 .id = -1,
94 .dev = {
95 .platform_data = &seaboard_gpio_keys,
96 }
97};
98
99static struct tegra_sdhci_platform_data sdhci_pdata1 = {
100 .cd_gpio = -1,
101 .wp_gpio = -1,
102 .power_gpio = -1,
103};
104
105static struct tegra_sdhci_platform_data sdhci_pdata3 = {
106 .cd_gpio = TEGRA_GPIO_PI5,
107 .wp_gpio = TEGRA_GPIO_PH1,
108 .power_gpio = TEGRA_GPIO_PI6,
109};
110
111static struct tegra_sdhci_platform_data sdhci_pdata4 = {
112 .cd_gpio = -1,
113 .wp_gpio = -1,
114 .power_gpio = -1,
115 .is_8bit = 1,
116};
117
118static struct platform_device *seaboard_devices[] __initdata = {
119 &debug_uart,
120 &tegra_pmu_device,
121 &tegra_sdhci_device1,
122 &tegra_sdhci_device3,
123 &tegra_sdhci_device4,
124 &seaboard_gpio_keys_device,
125};
126
127static void __init __tegra_seaboard_init(void)
128{
129 seaboard_pinmux_init();
130
131 tegra_clk_init_from_table(seaboard_clk_init_table);
132
133 tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
134 tegra_sdhci_device3.dev.platform_data = &sdhci_pdata3;
135 tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
136
137 platform_add_devices(seaboard_devices, ARRAY_SIZE(seaboard_devices));
138}
139
140static void __init tegra_seaboard_init(void)
141{
142 /* Seaboard uses UARTD for the debug port. */
143 debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTD_BASE);
144 debug_uart_platform_data[0].mapbase = TEGRA_UARTD_BASE;
145 debug_uart_platform_data[0].irq = INT_UARTD;
146
147 __tegra_seaboard_init();
148}
149
150static void __init tegra_kaen_init(void)
151{
152 /* Kaen uses UARTB for the debug port. */
153 debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTB_BASE);
154 debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
155 debug_uart_platform_data[0].irq = INT_UARTB;
156
157 __tegra_seaboard_init();
158}
159
160static void __init tegra_wario_init(void)
161{
162 /* Wario uses UARTB for the debug port. */
163 debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTB_BASE);
164 debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
165 debug_uart_platform_data[0].irq = INT_UARTB;
166
167 __tegra_seaboard_init();
168}
169
170
171MACHINE_START(SEABOARD, "seaboard")
172 .boot_params = 0x00000100,
173 .map_io = tegra_map_common_io,
174 .init_early = tegra_init_early,
175 .init_irq = tegra_init_irq,
176 .timer = &tegra_timer,
177 .init_machine = tegra_seaboard_init,
178MACHINE_END
179
180MACHINE_START(KAEN, "kaen")
181 .boot_params = 0x00000100,
182 .map_io = tegra_map_common_io,
183 .init_early = tegra_init_early,
184 .init_irq = tegra_init_irq,
185 .timer = &tegra_timer,
186 .init_machine = tegra_kaen_init,
187MACHINE_END
188
189MACHINE_START(WARIO, "wario")
190 .boot_params = 0x00000100,
191 .map_io = tegra_map_common_io,
192 .init_early = tegra_init_early,
193 .init_irq = tegra_init_irq,
194 .timer = &tegra_timer,
195 .init_machine = tegra_wario_init,
196MACHINE_END
diff --git a/arch/arm/mach-tegra/board-seaboard.h b/arch/arm/mach-tegra/board-seaboard.h
new file mode 100644
index 000000000000..a098e3599731
--- /dev/null
+++ b/arch/arm/mach-tegra/board-seaboard.h
@@ -0,0 +1,38 @@
1/*
2 * arch/arm/mach-tegra/board-seaboard.h
3 *
4 * Copyright (C) 2010 Google, Inc.
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#ifndef _MACH_TEGRA_BOARD_SEABOARD_H
18#define _MACH_TEGRA_BOARD_SEABOARD_H
19
20#define TEGRA_GPIO_LIDSWITCH TEGRA_GPIO_PC7
21#define TEGRA_GPIO_USB1 TEGRA_GPIO_PD0
22#define TEGRA_GPIO_POWERKEY TEGRA_GPIO_PV2
23#define TEGRA_GPIO_BACKLIGHT TEGRA_GPIO_PD4
24#define TEGRA_GPIO_LVDS_SHUTDOWN TEGRA_GPIO_PB2
25#define TEGRA_GPIO_BACKLIGHT_PWM TEGRA_GPIO_PU5
26#define TEGRA_GPIO_BACKLIGHT_VDD TEGRA_GPIO_PW0
27#define TEGRA_GPIO_EN_VDD_PNL TEGRA_GPIO_PC6
28#define TEGRA_GPIO_MAGNETOMETER TEGRA_GPIO_PN5
29#define TEGRA_GPIO_ISL29018_IRQ TEGRA_GPIO_PZ2
30#define TEGRA_GPIO_AC_ONLINE TEGRA_GPIO_PV3
31
32#define TPS_GPIO_BASE TEGRA_NR_GPIOS
33
34#define TPS_GPIO_WWAN_PWR (TPS_GPIO_BASE + 2)
35
36void seaboard_pinmux_init(void);
37
38#endif
diff --git a/arch/arm/mach-tegra/devices.c b/arch/arm/mach-tegra/devices.c
new file mode 100644
index 000000000000..682e6d33108c
--- /dev/null
+++ b/arch/arm/mach-tegra/devices.c
@@ -0,0 +1,505 @@
1/*
2 * Copyright (C) 2010,2011 Google, Inc.
3 *
4 * Author:
5 * Colin Cross <ccross@android.com>
6 * Erik Gilling <ccross@android.com>
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19
20#include <linux/resource.h>
21#include <linux/platform_device.h>
22#include <linux/dma-mapping.h>
23#include <linux/fsl_devices.h>
24#include <linux/serial_8250.h>
25#include <asm/pmu.h>
26#include <mach/irqs.h>
27#include <mach/iomap.h>
28#include <mach/dma.h>
29
30static struct resource i2c_resource1[] = {
31 [0] = {
32 .start = INT_I2C,
33 .end = INT_I2C,
34 .flags = IORESOURCE_IRQ,
35 },
36 [1] = {
37 .start = TEGRA_I2C_BASE,
38 .end = TEGRA_I2C_BASE + TEGRA_I2C_SIZE-1,
39 .flags = IORESOURCE_MEM,
40 },
41};
42
43static struct resource i2c_resource2[] = {
44 [0] = {
45 .start = INT_I2C2,
46 .end = INT_I2C2,
47 .flags = IORESOURCE_IRQ,
48 },
49 [1] = {
50 .start = TEGRA_I2C2_BASE,
51 .end = TEGRA_I2C2_BASE + TEGRA_I2C2_SIZE-1,
52 .flags = IORESOURCE_MEM,
53 },
54};
55
56static struct resource i2c_resource3[] = {
57 [0] = {
58 .start = INT_I2C3,
59 .end = INT_I2C3,
60 .flags = IORESOURCE_IRQ,
61 },
62 [1] = {
63 .start = TEGRA_I2C3_BASE,
64 .end = TEGRA_I2C3_BASE + TEGRA_I2C3_SIZE-1,
65 .flags = IORESOURCE_MEM,
66 },
67};
68
69static struct resource i2c_resource4[] = {
70 [0] = {
71 .start = INT_DVC,
72 .end = INT_DVC,
73 .flags = IORESOURCE_IRQ,
74 },
75 [1] = {
76 .start = TEGRA_DVC_BASE,
77 .end = TEGRA_DVC_BASE + TEGRA_DVC_SIZE-1,
78 .flags = IORESOURCE_MEM,
79 },
80};
81
82struct platform_device tegra_i2c_device1 = {
83 .name = "tegra-i2c",
84 .id = 0,
85 .resource = i2c_resource1,
86 .num_resources = ARRAY_SIZE(i2c_resource1),
87 .dev = {
88 .platform_data = 0,
89 },
90};
91
92struct platform_device tegra_i2c_device2 = {
93 .name = "tegra-i2c",
94 .id = 1,
95 .resource = i2c_resource2,
96 .num_resources = ARRAY_SIZE(i2c_resource2),
97 .dev = {
98 .platform_data = 0,
99 },
100};
101
102struct platform_device tegra_i2c_device3 = {
103 .name = "tegra-i2c",
104 .id = 2,
105 .resource = i2c_resource3,
106 .num_resources = ARRAY_SIZE(i2c_resource3),
107 .dev = {
108 .platform_data = 0,
109 },
110};
111
112struct platform_device tegra_i2c_device4 = {
113 .name = "tegra-i2c",
114 .id = 3,
115 .resource = i2c_resource4,
116 .num_resources = ARRAY_SIZE(i2c_resource4),
117 .dev = {
118 .platform_data = 0,
119 },
120};
121
122static struct resource spi_resource1[] = {
123 [0] = {
124 .start = INT_S_LINK1,
125 .end = INT_S_LINK1,
126 .flags = IORESOURCE_IRQ,
127 },
128 [1] = {
129 .start = TEGRA_SPI1_BASE,
130 .end = TEGRA_SPI1_BASE + TEGRA_SPI1_SIZE-1,
131 .flags = IORESOURCE_MEM,
132 },
133};
134
135static struct resource spi_resource2[] = {
136 [0] = {
137 .start = INT_SPI_2,
138 .end = INT_SPI_2,
139 .flags = IORESOURCE_IRQ,
140 },
141 [1] = {
142 .start = TEGRA_SPI2_BASE,
143 .end = TEGRA_SPI2_BASE + TEGRA_SPI2_SIZE-1,
144 .flags = IORESOURCE_MEM,
145 },
146};
147
148static struct resource spi_resource3[] = {
149 [0] = {
150 .start = INT_SPI_3,
151 .end = INT_SPI_3,
152 .flags = IORESOURCE_IRQ,
153 },
154 [1] = {
155 .start = TEGRA_SPI3_BASE,
156 .end = TEGRA_SPI3_BASE + TEGRA_SPI3_SIZE-1,
157 .flags = IORESOURCE_MEM,
158 },
159};
160
161static struct resource spi_resource4[] = {
162 [0] = {
163 .start = INT_SPI_4,
164 .end = INT_SPI_4,
165 .flags = IORESOURCE_IRQ,
166 },
167 [1] = {
168 .start = TEGRA_SPI4_BASE,
169 .end = TEGRA_SPI4_BASE + TEGRA_SPI4_SIZE-1,
170 .flags = IORESOURCE_MEM,
171 },
172};
173
174struct platform_device tegra_spi_device1 = {
175 .name = "spi_tegra",
176 .id = 0,
177 .resource = spi_resource1,
178 .num_resources = ARRAY_SIZE(spi_resource1),
179 .dev = {
180 .coherent_dma_mask = 0xffffffff,
181 },
182};
183
184struct platform_device tegra_spi_device2 = {
185 .name = "spi_tegra",
186 .id = 1,
187 .resource = spi_resource2,
188 .num_resources = ARRAY_SIZE(spi_resource2),
189 .dev = {
190 .coherent_dma_mask = 0xffffffff,
191 },
192};
193
194struct platform_device tegra_spi_device3 = {
195 .name = "spi_tegra",
196 .id = 2,
197 .resource = spi_resource3,
198 .num_resources = ARRAY_SIZE(spi_resource3),
199 .dev = {
200 .coherent_dma_mask = 0xffffffff,
201 },
202};
203
204struct platform_device tegra_spi_device4 = {
205 .name = "spi_tegra",
206 .id = 3,
207 .resource = spi_resource4,
208 .num_resources = ARRAY_SIZE(spi_resource4),
209 .dev = {
210 .coherent_dma_mask = 0xffffffff,
211 },
212};
213
214
215static struct resource sdhci_resource1[] = {
216 [0] = {
217 .start = INT_SDMMC1,
218 .end = INT_SDMMC1,
219 .flags = IORESOURCE_IRQ,
220 },
221 [1] = {
222 .start = TEGRA_SDMMC1_BASE,
223 .end = TEGRA_SDMMC1_BASE + TEGRA_SDMMC1_SIZE-1,
224 .flags = IORESOURCE_MEM,
225 },
226};
227
228static struct resource sdhci_resource2[] = {
229 [0] = {
230 .start = INT_SDMMC2,
231 .end = INT_SDMMC2,
232 .flags = IORESOURCE_IRQ,
233 },
234 [1] = {
235 .start = TEGRA_SDMMC2_BASE,
236 .end = TEGRA_SDMMC2_BASE + TEGRA_SDMMC2_SIZE-1,
237 .flags = IORESOURCE_MEM,
238 },
239};
240
241static struct resource sdhci_resource3[] = {
242 [0] = {
243 .start = INT_SDMMC3,
244 .end = INT_SDMMC3,
245 .flags = IORESOURCE_IRQ,
246 },
247 [1] = {
248 .start = TEGRA_SDMMC3_BASE,
249 .end = TEGRA_SDMMC3_BASE + TEGRA_SDMMC3_SIZE-1,
250 .flags = IORESOURCE_MEM,
251 },
252};
253
254static struct resource sdhci_resource4[] = {
255 [0] = {
256 .start = INT_SDMMC4,
257 .end = INT_SDMMC4,
258 .flags = IORESOURCE_IRQ,
259 },
260 [1] = {
261 .start = TEGRA_SDMMC4_BASE,
262 .end = TEGRA_SDMMC4_BASE + TEGRA_SDMMC4_SIZE-1,
263 .flags = IORESOURCE_MEM,
264 },
265};
266
267/* board files should fill in platform_data register the devices themselvs.
268 * See board-harmony.c for an example
269 */
270struct platform_device tegra_sdhci_device1 = {
271 .name = "sdhci-tegra",
272 .id = 0,
273 .resource = sdhci_resource1,
274 .num_resources = ARRAY_SIZE(sdhci_resource1),
275};
276
277struct platform_device tegra_sdhci_device2 = {
278 .name = "sdhci-tegra",
279 .id = 1,
280 .resource = sdhci_resource2,
281 .num_resources = ARRAY_SIZE(sdhci_resource2),
282};
283
284struct platform_device tegra_sdhci_device3 = {
285 .name = "sdhci-tegra",
286 .id = 2,
287 .resource = sdhci_resource3,
288 .num_resources = ARRAY_SIZE(sdhci_resource3),
289};
290
291struct platform_device tegra_sdhci_device4 = {
292 .name = "sdhci-tegra",
293 .id = 3,
294 .resource = sdhci_resource4,
295 .num_resources = ARRAY_SIZE(sdhci_resource4),
296};
297
298static struct resource tegra_usb1_resources[] = {
299 [0] = {
300 .start = TEGRA_USB_BASE,
301 .end = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
302 .flags = IORESOURCE_MEM,
303 },
304 [1] = {
305 .start = INT_USB,
306 .end = INT_USB,
307 .flags = IORESOURCE_IRQ,
308 },
309};
310
311static struct resource tegra_usb2_resources[] = {
312 [0] = {
313 .start = TEGRA_USB2_BASE,
314 .end = TEGRA_USB2_BASE + TEGRA_USB2_SIZE - 1,
315 .flags = IORESOURCE_MEM,
316 },
317 [1] = {
318 .start = INT_USB2,
319 .end = INT_USB2,
320 .flags = IORESOURCE_IRQ,
321 },
322};
323
324static struct resource tegra_usb3_resources[] = {
325 [0] = {
326 .start = TEGRA_USB3_BASE,
327 .end = TEGRA_USB3_BASE + TEGRA_USB3_SIZE - 1,
328 .flags = IORESOURCE_MEM,
329 },
330 [1] = {
331 .start = INT_USB3,
332 .end = INT_USB3,
333 .flags = IORESOURCE_IRQ,
334 },
335};
336
337static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
338
339struct platform_device tegra_ehci1_device = {
340 .name = "tegra-ehci",
341 .id = 0,
342 .dev = {
343 .dma_mask = &tegra_ehci_dmamask,
344 .coherent_dma_mask = DMA_BIT_MASK(32),
345 },
346 .resource = tegra_usb1_resources,
347 .num_resources = ARRAY_SIZE(tegra_usb1_resources),
348};
349
350struct platform_device tegra_ehci2_device = {
351 .name = "tegra-ehci",
352 .id = 1,
353 .dev = {
354 .dma_mask = &tegra_ehci_dmamask,
355 .coherent_dma_mask = DMA_BIT_MASK(32),
356 },
357 .resource = tegra_usb2_resources,
358 .num_resources = ARRAY_SIZE(tegra_usb2_resources),
359};
360
361struct platform_device tegra_ehci3_device = {
362 .name = "tegra-ehci",
363 .id = 2,
364 .dev = {
365 .dma_mask = &tegra_ehci_dmamask,
366 .coherent_dma_mask = DMA_BIT_MASK(32),
367 },
368 .resource = tegra_usb3_resources,
369 .num_resources = ARRAY_SIZE(tegra_usb3_resources),
370};
371
372static struct resource tegra_pmu_resources[] = {
373 [0] = {
374 .start = INT_CPU0_PMU_INTR,
375 .end = INT_CPU0_PMU_INTR,
376 .flags = IORESOURCE_IRQ,
377 },
378 [1] = {
379 .start = INT_CPU1_PMU_INTR,
380 .end = INT_CPU1_PMU_INTR,
381 .flags = IORESOURCE_IRQ,
382 },
383};
384
385struct platform_device tegra_pmu_device = {
386 .name = "arm-pmu",
387 .id = ARM_PMU_DEVICE_CPU,
388 .num_resources = ARRAY_SIZE(tegra_pmu_resources),
389 .resource = tegra_pmu_resources,
390};
391
392static struct resource tegra_uarta_resources[] = {
393 [0] = {
394 .start = TEGRA_UARTA_BASE,
395 .end = TEGRA_UARTA_BASE + TEGRA_UARTA_SIZE - 1,
396 .flags = IORESOURCE_MEM,
397 },
398 [1] = {
399 .start = INT_UARTA,
400 .end = INT_UARTA,
401 .flags = IORESOURCE_IRQ,
402 },
403};
404
405static struct resource tegra_uartb_resources[] = {
406 [0] = {
407 .start = TEGRA_UARTB_BASE,
408 .end = TEGRA_UARTB_BASE + TEGRA_UARTB_SIZE - 1,
409 .flags = IORESOURCE_MEM,
410 },
411 [1] = {
412 .start = INT_UARTB,
413 .end = INT_UARTB,
414 .flags = IORESOURCE_IRQ,
415 },
416};
417
418static struct resource tegra_uartc_resources[] = {
419 [0] = {
420 .start = TEGRA_UARTC_BASE,
421 .end = TEGRA_UARTC_BASE + TEGRA_UARTC_SIZE - 1,
422 .flags = IORESOURCE_MEM,
423 },
424 [1] = {
425 .start = INT_UARTC,
426 .end = INT_UARTC,
427 .flags = IORESOURCE_IRQ,
428 },
429};
430
431static struct resource tegra_uartd_resources[] = {
432 [0] = {
433 .start = TEGRA_UARTD_BASE,
434 .end = TEGRA_UARTD_BASE + TEGRA_UARTD_SIZE - 1,
435 .flags = IORESOURCE_MEM,
436 },
437 [1] = {
438 .start = INT_UARTD,
439 .end = INT_UARTD,
440 .flags = IORESOURCE_IRQ,
441 },
442};
443
444static struct resource tegra_uarte_resources[] = {
445 [0] = {
446 .start = TEGRA_UARTE_BASE,
447 .end = TEGRA_UARTE_BASE + TEGRA_UARTE_SIZE - 1,
448 .flags = IORESOURCE_MEM,
449 },
450 [1] = {
451 .start = INT_UARTE,
452 .end = INT_UARTE,
453 .flags = IORESOURCE_IRQ,
454 },
455};
456
457struct platform_device tegra_uarta_device = {
458 .name = "tegra_uart",
459 .id = 0,
460 .num_resources = ARRAY_SIZE(tegra_uarta_resources),
461 .resource = tegra_uarta_resources,
462 .dev = {
463 .coherent_dma_mask = DMA_BIT_MASK(32),
464 },
465};
466
467struct platform_device tegra_uartb_device = {
468 .name = "tegra_uart",
469 .id = 1,
470 .num_resources = ARRAY_SIZE(tegra_uartb_resources),
471 .resource = tegra_uartb_resources,
472 .dev = {
473 .coherent_dma_mask = DMA_BIT_MASK(32),
474 },
475};
476
477struct platform_device tegra_uartc_device = {
478 .name = "tegra_uart",
479 .id = 2,
480 .num_resources = ARRAY_SIZE(tegra_uartc_resources),
481 .resource = tegra_uartc_resources,
482 .dev = {
483 .coherent_dma_mask = DMA_BIT_MASK(32),
484 },
485};
486
487struct platform_device tegra_uartd_device = {
488 .name = "tegra_uart",
489 .id = 3,
490 .num_resources = ARRAY_SIZE(tegra_uartd_resources),
491 .resource = tegra_uartd_resources,
492 .dev = {
493 .coherent_dma_mask = DMA_BIT_MASK(32),
494 },
495};
496
497struct platform_device tegra_uarte_device = {
498 .name = "tegra_uart",
499 .id = 4,
500 .num_resources = ARRAY_SIZE(tegra_uarte_resources),
501 .resource = tegra_uarte_resources,
502 .dev = {
503 .coherent_dma_mask = DMA_BIT_MASK(32),
504 },
505};
diff --git a/arch/arm/mach-tegra/devices.h b/arch/arm/mach-tegra/devices.h
new file mode 100644
index 000000000000..888810c37ee9
--- /dev/null
+++ b/arch/arm/mach-tegra/devices.h
@@ -0,0 +1,46 @@
1/*
2 * Copyright (C) 2010,2011 Google, Inc.
3 *
4 * Author:
5 * Colin Cross <ccross@android.com>
6 * Erik Gilling <ccross@android.com>
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#ifndef __MACH_TEGRA_DEVICES_H
20#define __MACH_TEGRA_DEVICES_H
21
22#include <linux/platform_device.h>
23
24extern struct platform_device tegra_sdhci_device1;
25extern struct platform_device tegra_sdhci_device2;
26extern struct platform_device tegra_sdhci_device3;
27extern struct platform_device tegra_sdhci_device4;
28extern struct platform_device tegra_i2c_device1;
29extern struct platform_device tegra_i2c_device2;
30extern struct platform_device tegra_i2c_device3;
31extern struct platform_device tegra_i2c_device4;
32extern struct platform_device tegra_spi_device1;
33extern struct platform_device tegra_spi_device2;
34extern struct platform_device tegra_spi_device3;
35extern struct platform_device tegra_spi_device4;
36extern struct platform_device tegra_ehci1_device;
37extern struct platform_device tegra_ehci2_device;
38extern struct platform_device tegra_ehci3_device;
39extern struct platform_device tegra_uarta_device;
40extern struct platform_device tegra_uartb_device;
41extern struct platform_device tegra_uartc_device;
42extern struct platform_device tegra_uartd_device;
43extern struct platform_device tegra_uarte_device;
44extern struct platform_device tegra_pmu_device;
45
46#endif
diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c
index 132dcd6833a2..12090a2cf3e0 100644
--- a/arch/arm/mach-tegra/gpio.c
+++ b/arch/arm/mach-tegra/gpio.c
@@ -381,6 +381,20 @@ static int __init tegra_gpio_init(void)
381 381
382postcore_initcall(tegra_gpio_init); 382postcore_initcall(tegra_gpio_init);
383 383
384void __init tegra_gpio_config(struct tegra_gpio_table *table, int num)
385{
386 int i;
387
388 for (i = 0; i < num; i++) {
389 int gpio = table[i].gpio;
390
391 if (table[i].enable)
392 tegra_gpio_enable(gpio);
393 else
394 tegra_gpio_disable(gpio);
395 }
396}
397
384#ifdef CONFIG_DEBUG_FS 398#ifdef CONFIG_DEBUG_FS
385 399
386#include <linux/debugfs.h> 400#include <linux/debugfs.h>
diff --git a/arch/arm/mach-tegra/include/mach/gpio.h b/arch/arm/mach-tegra/include/mach/gpio.h
index 12a7cf6874cd..196f114dc241 100644
--- a/arch/arm/mach-tegra/include/mach/gpio.h
+++ b/arch/arm/mach-tegra/include/mach/gpio.h
@@ -20,6 +20,7 @@
20#ifndef __MACH_TEGRA_GPIO_H 20#ifndef __MACH_TEGRA_GPIO_H
21#define __MACH_TEGRA_GPIO_H 21#define __MACH_TEGRA_GPIO_H
22 22
23#include <linux/init.h>
23#include <mach/irqs.h> 24#include <mach/irqs.h>
24 25
25#define TEGRA_NR_GPIOS INT_GPIO_NR 26#define TEGRA_NR_GPIOS INT_GPIO_NR
@@ -47,6 +48,12 @@ static inline int irq_to_gpio(unsigned int irq)
47 return -EINVAL; 48 return -EINVAL;
48} 49}
49 50
51struct tegra_gpio_table {
52 int gpio; /* GPIO number */
53 bool enable; /* Enable for GPIO at init? */
54};
55
56void tegra_gpio_config(struct tegra_gpio_table *table, int num);
50void tegra_gpio_enable(int gpio); 57void tegra_gpio_enable(int gpio);
51void tegra_gpio_disable(int gpio); 58void tegra_gpio_disable(int gpio);
52 59
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-05 11:26:44 -0500