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authorCyril Chemparathy <cyril@ti.com>2010-03-25 17:43:46 -0400
committerKevin Hilman <khilman@deeprootsystems.com>2010-05-06 18:02:04 -0400
commit449ef7f6a9c732657938b222f8804d3e34a3603e (patch)
treee51b0deae656c28dc77215c1ccd4466202ed98ab /arch/arm
parent8ca2e597fc8f3337cef1f8febab482fe8c52b004 (diff)
Davinci: cpintc host map configuration
Host map configuration instructs the interrupt controller to route interrupt channels to FIQ or IRQ lines. Currently, DA8xx family of devices leave these registers at their reset-default values. TNETV107X however does not have sane reset defaults, and therefore this architecture needs to reconfigure the host-map such that channels 0 and 1 go to FIQ, and the remaining channels raise IRQs. This patch adds an optional host map argument to cp_intc_init() for this. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-davinci/board-da830-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c2
-rw-r--r--arch/arm/mach-davinci/cp_intc.c6
-rw-r--r--arch/arm/mach-davinci/include/mach/cp_intc.h2
4 files changed, 8 insertions, 4 deletions
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index ea293b8a596a..db5ac0f3788e 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -569,7 +569,7 @@ static __init void da830_evm_irq_init(void)
569 struct davinci_soc_info *soc_info = &davinci_soc_info; 569 struct davinci_soc_info *soc_info = &davinci_soc_info;
570 570
571 cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA830_N_CP_INTC_IRQ, 571 cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA830_N_CP_INTC_IRQ,
572 soc_info->intc_irq_prios); 572 soc_info->intc_irq_prios, NULL);
573} 573}
574 574
575static void __init da830_evm_map_io(void) 575static void __init da830_evm_map_io(void)
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 411284d0b0fa..ef691ae5e67a 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -741,7 +741,7 @@ static __init void da850_evm_irq_init(void)
741 struct davinci_soc_info *soc_info = &davinci_soc_info; 741 struct davinci_soc_info *soc_info = &davinci_soc_info;
742 742
743 cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ, 743 cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ,
744 soc_info->intc_irq_prios); 744 soc_info->intc_irq_prios, NULL);
745} 745}
746 746
747static void __init da850_evm_map_io(void) 747static void __init da850_evm_map_io(void)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 37311d1830eb..2a8d26ee4bbf 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -101,7 +101,7 @@ static struct irq_chip cp_intc_irq_chip = {
101}; 101};
102 102
103void __init cp_intc_init(void __iomem *base, unsigned short num_irq, 103void __init cp_intc_init(void __iomem *base, unsigned short num_irq,
104 u8 *irq_prio) 104 u8 *irq_prio, u32 *host_map)
105{ 105{
106 unsigned num_reg = BITS_TO_LONGS(num_irq); 106 unsigned num_reg = BITS_TO_LONGS(num_irq);
107 int i; 107 int i;
@@ -157,6 +157,10 @@ void __init cp_intc_init(void __iomem *base, unsigned short num_irq,
157 cp_intc_write(0x0f0f0f0f, CP_INTC_CHAN_MAP(i)); 157 cp_intc_write(0x0f0f0f0f, CP_INTC_CHAN_MAP(i));
158 } 158 }
159 159
160 if (host_map)
161 for (i = 0; host_map[i] != -1; i++)
162 cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
163
160 /* Set up genirq dispatching for cp_intc */ 164 /* Set up genirq dispatching for cp_intc */
161 for (i = 0; i < num_irq; i++) { 165 for (i = 0; i < num_irq; i++) {
162 set_irq_chip(i, &cp_intc_irq_chip); 166 set_irq_chip(i, &cp_intc_irq_chip);
diff --git a/arch/arm/mach-davinci/include/mach/cp_intc.h b/arch/arm/mach-davinci/include/mach/cp_intc.h
index c4d27eec8064..121b114df755 100644
--- a/arch/arm/mach-davinci/include/mach/cp_intc.h
+++ b/arch/arm/mach-davinci/include/mach/cp_intc.h
@@ -52,6 +52,6 @@
52#define CP_INTC_VECTOR_ADDR(n) (0x2000 + (n << 2)) 52#define CP_INTC_VECTOR_ADDR(n) (0x2000 + (n << 2))
53 53
54void __init cp_intc_init(void __iomem *base, unsigned short num_irq, 54void __init cp_intc_init(void __iomem *base, unsigned short num_irq,
55 u8 *irq_prio); 55 u8 *irq_prio, u32 *host_map);
56 56
57#endif /* __ASM_HARDWARE_CP_INTC_H */ 57#endif /* __ASM_HARDWARE_CP_INTC_H */