Merge branch 'linus' into irq/numa

Conflicts:
	arch/mips/sibyte/bcm1480/irq.c
	arch/mips/sibyte/sb1250/irq.c

Merge reason: we gathered a few conflicts plus update to latest upstream fixes.

Signed-off-by: Ingo Molnar <mingo@elte.hu>

60 files changed, 636 insertions, 202 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e60ec54df334..9d02cdb15b23 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -273,6 +273,7 @@ config ARCH_EP93XX
         select HAVE_CLK
         select COMMON_CLKDEV
         select ARCH_REQUIRE_GPIOLIB
+        select ARCH_HAS_HOLES_MEMORYMODEL
         help
           This enables support for the Cirrus EP93xx series of CPUs.
 
@@ -976,10 +977,9 @@ config OABI_COMPAT
           UNPREDICTABLE (in fact it can be predicted that it won't work
           at all). If in doubt say Y.
 
-config ARCH_FLATMEM_HAS_HOLES
+config ARCH_HAS_HOLES_MEMORYMODEL
         bool
-        default y
-        depends on FLATMEM
+        default n
 
 # Discontigmem is deprecated
 config ARCH_DISCONTIGMEM_ENABLE
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 90f6b7f52d48..664c7b8b1ba8 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -255,9 +255,9 @@ void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base)
 }
 
 #ifdef CONFIG_SMP
-void gic_raise_softirq(cpumask_t cpumask, unsigned int irq)
+void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
 {
-        unsigned long map = *cpus_addr(cpumask);
+        unsigned long map = *cpus_addr(*mask);
 
         /* this always happens on GIC0 */
         writel(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT);
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 6116e4893c0a..15f8a092b700 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -114,3 +114,16 @@
         .align  3;                              \
         .long   9999b,9001f;                    \
         .previous
+
+/*
+ * SMP data memory barrier
+ */
+        .macro  smp_dmb
+#ifdef CONFIG_SMP
+#if __LINUX_ARM_ARCH__ >= 7
+        dmb
+#elif __LINUX_ARM_ARCH__ == 6
+        mcr     p15, 0, r0, c7, c10, 5  @ dmb
+#endif
+#endif
+        .endm
diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h
index ee99723b3a6c..16b52f397983 100644
--- a/arch/arm/include/asm/atomic.h
+++ b/arch/arm/include/asm/atomic.h
@@ -44,11 +44,29 @@ static inline void atomic_set(atomic_t *v, int i)
         : "cc");
 }
 
+static inline void atomic_add(int i, atomic_t *v)
+{
+        unsigned long tmp;
+        int result;
+
+        __asm__ __volatile__("@ atomic_add\n"
+"1:     ldrex   %0, [%2]\n"
+"       add     %0, %0, %3\n"
+"       strex   %1, %0, [%2]\n"
+"       teq     %1, #0\n"
+"       bne     1b"
+        : "=&r" (result), "=&r" (tmp)
+        : "r" (&v->counter), "Ir" (i)
+        : "cc");
+}
+
 static inline int atomic_add_return(int i, atomic_t *v)
 {
         unsigned long tmp;
         int result;
 
+        smp_mb();
+
         __asm__ __volatile__("@ atomic_add_return\n"
 "1:     ldrex   %0, [%2]\n"
 "       add     %0, %0, %3\n"
@@ -59,14 +77,34 @@ static inline int atomic_add_return(int i, atomic_t *v)
         : "r" (&v->counter), "Ir" (i)
         : "cc");
 
+        smp_mb();
+
         return result;
 }
 
+static inline void atomic_sub(int i, atomic_t *v)
+{
+        unsigned long tmp;
+        int result;
+
+        __asm__ __volatile__("@ atomic_sub\n"
+"1:     ldrex   %0, [%2]\n"
+"       sub     %0, %0, %3\n"
+"       strex   %1, %0, [%2]\n"
+"       teq     %1, #0\n"
+"       bne     1b"
+        : "=&r" (result), "=&r" (tmp)
+        : "r" (&v->counter), "Ir" (i)
+        : "cc");
+}
+
 static inline int atomic_sub_return(int i, atomic_t *v)
 {
         unsigned long tmp;
         int result;
 
+        smp_mb();
+
         __asm__ __volatile__("@ atomic_sub_return\n"
 "1:     ldrex   %0, [%2]\n"
 "       sub     %0, %0, %3\n"
@@ -77,6 +115,8 @@ static inline int atomic_sub_return(int i, atomic_t *v)
         : "r" (&v->counter), "Ir" (i)
         : "cc");
 
+        smp_mb();
+
         return result;
 }
 
@@ -84,6 +124,8 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
 {
         unsigned long oldval, res;
 
+        smp_mb();
+
         do {
                 __asm__ __volatile__("@ atomic_cmpxchg\n"
                 "ldrex  %1, [%2]\n"
@@ -95,6 +137,8 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
                     : "cc");
         } while (res);
 
+        smp_mb();
+
         return oldval;
 }
 
@@ -135,6 +179,7 @@ static inline int atomic_add_return(int i, atomic_t *v)
 
         return val;
 }
+#define atomic_add(i, v)        (void) atomic_add_return(i, v)
 
 static inline int atomic_sub_return(int i, atomic_t *v)
 {
@@ -148,6 +193,7 @@ static inline int atomic_sub_return(int i, atomic_t *v)
 
         return val;
 }
+#define atomic_sub(i, v)        (void) atomic_sub_return(i, v)
 
 static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
 {
@@ -187,10 +233,8 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
 }
 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
 
-#define atomic_add(i, v)        (void) atomic_add_return(i, v)
-#define atomic_inc(v)           (void) atomic_add_return(1, v)
-#define atomic_sub(i, v)        (void) atomic_sub_return(i, v)
-#define atomic_dec(v)           (void) atomic_sub_return(1, v)
+#define atomic_inc(v)           atomic_add(1, v)
+#define atomic_dec(v)           atomic_sub(1, v)
 
 #define atomic_inc_and_test(v)  (atomic_add_return(1, v) == 0)
 #define atomic_dec_and_test(v)  (atomic_sub_return(1, v) == 0)
@@ -200,11 +244,10 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
 
 #define atomic_add_negative(i,v) (atomic_add_return(i, v) < 0)
 
-/* Atomic operations are already serializing on ARM */
-#define smp_mb__before_atomic_dec()     barrier()
-#define smp_mb__after_atomic_dec()      barrier()
-#define smp_mb__before_atomic_inc()     barrier()
-#define smp_mb__after_atomic_inc()      barrier()
+#define smp_mb__before_atomic_dec()     smp_mb()
+#define smp_mb__after_atomic_dec()      smp_mb()
+#define smp_mb__before_atomic_inc()     smp_mb()
+#define smp_mb__after_atomic_inc()      smp_mb()
 
 #include <asm-generic/atomic.h>
 #endif
diff --git a/arch/arm/include/asm/flat.h b/arch/arm/include/asm/flat.h
index 1d77e51907f6..59426a4595c9 100644
--- a/arch/arm/include/asm/flat.h
+++ b/arch/arm/include/asm/flat.h
@@ -5,9 +5,6 @@
 #ifndef __ARM_FLAT_H__
 #define __ARM_FLAT_H__
 
-/* An odd number of words will be pushed after this alignment, so
-   deliberately misalign the value.  */
-#define flat_stack_align(sp)    sp = (void *)(((unsigned long)(sp) - 4) | 4)
 #define flat_argvp_envp_on_stack()              1
 #define flat_old_ram_flag(flags)                (flags)
 #define flat_reloc_valid(reloc, size)           ((reloc) <= (size))
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 4924914af188..7f34333bb545 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -36,7 +36,7 @@
 void gic_dist_init(unsigned int gic_nr, void __iomem *base, unsigned int irq_start);
 void gic_cpu_init(unsigned int gic_nr, void __iomem *base);
 void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
-void gic_raise_softirq(cpumask_t cpumask, unsigned int irq);
+void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
 #endif
 
 #endif
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h
index fad70da5911d..5995935338e1 100644
--- a/arch/arm/include/asm/smp.h
+++ b/arch/arm/include/asm/smp.h
@@ -53,17 +53,12 @@ extern void smp_store_cpu_info(unsigned int cpuid);
 /*
  * Raise an IPI cross call on CPUs in callmap.
  */
-extern void smp_cross_call(cpumask_t callmap);
-
-/*
- * Broadcast a timer interrupt to the other CPUs.
- */
-extern void smp_send_timer(void);
+extern void smp_cross_call(const struct cpumask *mask);
 
 /*
  * Broadcast a clock event to other CPUs.
  */
-extern void smp_timer_broadcast(cpumask_t mask);
+extern void smp_timer_broadcast(const struct cpumask *mask);
 
 /*
  * Boot a secondary CPU, and assign it the specified idle task.
@@ -102,7 +97,8 @@ extern int platform_cpu_kill(unsigned int cpu);
 extern void platform_cpu_enable(unsigned int cpu);
 
 extern void arch_send_call_function_single_ipi(int cpu);
-extern void arch_send_call_function_ipi(cpumask_t mask);
+extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
+#define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask
 
 /*
  * Local timer interrupt handling function (can be IPI'ed).
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index bd4dc8ed53d5..d65b2f5bf41f 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -248,6 +248,8 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
         unsigned int tmp;
 #endif
 
+        smp_mb();
+
         switch (size) {
 #if __LINUX_ARM_ARCH__ >= 6
         case 1:
@@ -307,6 +309,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
                 __bad_xchg(ptr, size), ret = 0;
                 break;
         }
+        smp_mb();
 
         return ret;
 }
@@ -316,6 +319,12 @@ extern void enable_hlt(void);
 
 #include <asm-generic/cmpxchg-local.h>
 
+#if __LINUX_ARM_ARCH__ < 6
+
+#ifdef CONFIG_SMP
+#error "SMP is not supported on this platform"
+#endif
+
 /*
  * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
  * them available.
@@ -329,6 +338,173 @@ extern void enable_hlt(void);
 #include <asm-generic/cmpxchg.h>
 #endif
 
+#else   /* __LINUX_ARM_ARCH__ >= 6 */
+
+extern void __bad_cmpxchg(volatile void *ptr, int size);
+
+/*
+ * cmpxchg only support 32-bits operands on ARMv6.
+ */
+
+static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
+                                      unsigned long new, int size)
+{
+        unsigned long oldval, res;
+
+        switch (size) {
+#ifdef CONFIG_CPU_32v6K
+        case 1:
+                do {
+                        asm volatile("@ __cmpxchg1\n"
+                        "       ldrexb  %1, [%2]\n"
+                        "       mov     %0, #0\n"
+                        "       teq     %1, %3\n"
+                        "       strexbeq %0, %4, [%2]\n"
+                                : "=&r" (res), "=&r" (oldval)
+                                : "r" (ptr), "Ir" (old), "r" (new)
+                                : "memory", "cc");
+                } while (res);
+                break;
+        case 2:
+                do {
+                        asm volatile("@ __cmpxchg1\n"
+                        "       ldrexh  %1, [%2]\n"
+                        "       mov     %0, #0\n"
+                        "       teq     %1, %3\n"
+                        "       strexheq %0, %4, [%2]\n"
+                                : "=&r" (res), "=&r" (oldval)
+                                : "r" (ptr), "Ir" (old), "r" (new)
+                                : "memory", "cc");
+                } while (res);
+                break;
+#endif /* CONFIG_CPU_32v6K */
+        case 4:
+                do {
+                        asm volatile("@ __cmpxchg4\n"
+                        "       ldrex   %1, [%2]\n"
+                        "       mov     %0, #0\n"
+                        "       teq     %1, %3\n"
+                        "       strexeq %0, %4, [%2]\n"
+                                : "=&r" (res), "=&r" (oldval)
+                                : "r" (ptr), "Ir" (old), "r" (new)
+                                : "memory", "cc");
+                } while (res);
+                break;
+        default:
+                __bad_cmpxchg(ptr, size);
+                oldval = 0;
+        }
+
+        return oldval;
+}
+
+static inline unsigned long __cmpxchg_mb(volatile void *ptr, unsigned long old,
+                                         unsigned long new, int size)
+{
+        unsigned long ret;
+
+        smp_mb();
+        ret = __cmpxchg(ptr, old, new, size);
+        smp_mb();
+
+        return ret;
+}
+
+#define cmpxchg(ptr,o,n)                                                \
+        ((__typeof__(*(ptr)))__cmpxchg_mb((ptr),                        \
+                                          (unsigned long)(o),           \
+                                          (unsigned long)(n),           \
+                                          sizeof(*(ptr))))
+
+static inline unsigned long __cmpxchg_local(volatile void *ptr,
+                                            unsigned long old,
+                                            unsigned long new, int size)
+{
+        unsigned long ret;
+
+        switch (size) {
+#ifndef CONFIG_CPU_32v6K
+        case 1:
+        case 2:
+                ret = __cmpxchg_local_generic(ptr, old, new, size);
+                break;
+#endif  /* !CONFIG_CPU_32v6K */
+        default:
+                ret = __cmpxchg(ptr, old, new, size);
+        }
+
+        return ret;
+}
+
+#define cmpxchg_local(ptr,o,n)                                          \
+        ((__typeof__(*(ptr)))__cmpxchg_local((ptr),                     \
+                                       (unsigned long)(o),              \
+                                       (unsigned long)(n),              \
+                                       sizeof(*(ptr))))
+
+#ifdef CONFIG_CPU_32v6K
+
+/*
+ * Note : ARMv7-M (currently unsupported by Linux) does not support
+ * ldrexd/strexd. If ARMv7-M is ever supported by the Linux kernel, it should
+ * not be allowed to use __cmpxchg64.
+ */
+static inline unsigned long long __cmpxchg64(volatile void *ptr,
+                                             unsigned long long old,
+                                             unsigned long long new)
+{
+        register unsigned long long oldval asm("r0");
+        register unsigned long long __old asm("r2") = old;
+        register unsigned long long __new asm("r4") = new;
+        unsigned long res;
+
+        do {
+                asm volatile(
+                "       @ __cmpxchg8\n"
+                "       ldrexd  %1, %H1, [%2]\n"
+                "       mov     %0, #0\n"
+                "       teq     %1, %3\n"
+                "       teqeq   %H1, %H3\n"
+                "       strexdeq %0, %4, %H4, [%2]\n"
+                        : "=&r" (res), "=&r" (oldval)
+                        : "r" (ptr), "Ir" (__old), "r" (__new)
+                        : "memory", "cc");
+        } while (res);
+
+        return oldval;
+}
+
+static inline unsigned long long __cmpxchg64_mb(volatile void *ptr,
+                                                unsigned long long old,
+                                                unsigned long long new)
+{
+        unsigned long long ret;
+
+        smp_mb();
+        ret = __cmpxchg64(ptr, old, new);
+        smp_mb();
+
+        return ret;
+}
+
+#define cmpxchg64(ptr,o,n)                                              \
+        ((__typeof__(*(ptr)))__cmpxchg64_mb((ptr),                      \
+                                            (unsigned long long)(o),    \
+                                            (unsigned long long)(n)))
+
+#define cmpxchg64_local(ptr,o,n)                                        \
+        ((__typeof__(*(ptr)))__cmpxchg64((ptr),                         \
+                                         (unsigned long long)(o),       \
+                                         (unsigned long long)(n)))
+
+#else   /* !CONFIG_CPU_32v6K */
+
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+
+#endif  /* CONFIG_CPU_32v6K */
+
+#endif  /* __LINUX_ARM_ARCH__ >= 6 */
+
 #endif /* __ASSEMBLY__ */
 
 #define arch_align_stack(x) (x)
diff --git a/arch/arm/kernel/elf.c b/arch/arm/kernel/elf.c
index d4a0da1e48f4..950391f194c4 100644
--- a/arch/arm/kernel/elf.c
+++ b/arch/arm/kernel/elf.c
@@ -78,6 +78,15 @@ int arm_elf_read_implies_exec(const struct elf32_hdr *x, int executable_stack)
                 return 1;
         if (cpu_architecture() < CPU_ARCH_ARMv6)
                 return 1;
+#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT)
+        /*
+         * If we have support for OABI programs, we can never allow NX
+         * support - our signal syscall restart mechanism relies upon
+         * being able to execute code placed on the user stack.
+         */
+        return 1;
+#else
         return 0;
+#endif
 }
 EXPORT_SYMBOL(arm_elf_read_implies_exec);
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index d662a2f1fd85..83b1da6b7baa 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -815,10 +815,7 @@ __kuser_helper_start:
  */
 
 __kuser_memory_barrier:                         @ 0xffff0fa0
-
-#if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_SMP)
-        mcr     p15, 0, r0, c7, c10, 5  @ dmb
-#endif
+        smp_dmb
         usr_ret lr
 
         .align  5
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 7801aac3c043..6014dfd22af4 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -326,14 +326,14 @@ void __init smp_prepare_boot_cpu(void)
         per_cpu(cpu_data, cpu).idle = current;
 }
 
-static void send_ipi_message(cpumask_t callmap, enum ipi_msg_type msg)
+static void send_ipi_message(const struct cpumask *mask, enum ipi_msg_type msg)
 {
         unsigned long flags;
         unsigned int cpu;
 
         local_irq_save(flags);
 
-        for_each_cpu_mask(cpu, callmap) {
+        for_each_cpu(cpu, mask) {
                 struct ipi_data *ipi = &per_cpu(ipi_data, cpu);
 
                 spin_lock(&ipi->lock);
@@ -344,19 +344,19 @@ static void send_ipi_message(cpumask_t callmap, enum ipi_msg_type msg)
         /*
          * Call the platform specific cross-CPU call function.
          */
-        smp_cross_call(callmap);
+        smp_cross_call(mask);
 
         local_irq_restore(flags);
 }
 
-void arch_send_call_function_ipi(cpumask_t mask)
+void arch_send_call_function_ipi_mask(const struct cpumask *mask)
 {
         send_ipi_message(mask, IPI_CALL_FUNC);
 }
 
 void arch_send_call_function_single_ipi(int cpu)
 {
-        send_ipi_message(cpumask_of_cpu(cpu), IPI_CALL_FUNC_SINGLE);
+        send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
 }
 
 void show_ipi_list(struct seq_file *p)
@@ -498,17 +498,10 @@ asmlinkage void __exception do_IPI(struct pt_regs *regs)
 
 void smp_send_reschedule(int cpu)
 {
-        send_ipi_message(cpumask_of_cpu(cpu), IPI_RESCHEDULE);
+        send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
 }
 
-void smp_send_timer(void)
-{
-        cpumask_t mask = cpu_online_map;
-        cpu_clear(smp_processor_id(), mask);
-        send_ipi_message(mask, IPI_TIMER);
-}
-
-void smp_timer_broadcast(cpumask_t mask)
+void smp_timer_broadcast(const struct cpumask *mask)
 {
         send_ipi_message(mask, IPI_TIMER);
 }
@@ -517,7 +510,7 @@ void smp_send_stop(void)
 {
         cpumask_t mask = cpu_online_map;
         cpu_clear(smp_processor_id(), mask);
-        send_ipi_message(mask, IPI_CPU_STOP);
+        send_ipi_message(&mask, IPI_CPU_STOP);
 }
 
 /*
@@ -528,20 +521,17 @@ int setup_profiling_timer(unsigned int multiplier)
         return -EINVAL;
 }
 
-static int
-on_each_cpu_mask(void (*func)(void *), void *info, int wait, cpumask_t mask)
+static void
+on_each_cpu_mask(void (*func)(void *), void *info, int wait,
+                const struct cpumask *mask)
 {
-        int ret = 0;
-
         preempt_disable();
 
-        ret = smp_call_function_mask(mask, func, info, wait);
-        if (cpu_isset(smp_processor_id(), mask))
+        smp_call_function_many(mask, func, info, wait);
+        if (cpumask_test_cpu(smp_processor_id(), mask))
                 func(info);
 
         preempt_enable();
-
-        return ret;
 }
 
 /**********************************************************************/
@@ -602,20 +592,17 @@ void flush_tlb_all(void)
 
 void flush_tlb_mm(struct mm_struct *mm)
 {
-        cpumask_t mask = mm->cpu_vm_mask;
-
-        on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, mask);
+        on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, &mm->cpu_vm_mask);
 }
 
 void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
 {
-        cpumask_t mask = vma->vm_mm->cpu_vm_mask;
         struct tlb_args ta;
 
         ta.ta_vma = vma;
         ta.ta_start = uaddr;
 
-        on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, mask);
+        on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, &vma->vm_mm->cpu_vm_mask);
 }
 
 void flush_tlb_kernel_page(unsigned long kaddr)
@@ -630,14 +617,13 @@ void flush_tlb_kernel_page(unsigned long kaddr)
 void flush_tlb_range(struct vm_area_struct *vma,
                      unsigned long start, unsigned long end)
 {
-        cpumask_t mask = vma->vm_mm->cpu_vm_mask;
         struct tlb_args ta;
 
         ta.ta_vma = vma;
         ta.ta_start = start;
         ta.ta_end = end;
 
-        on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, mask);
+        on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, &vma->vm_mm->cpu_vm_mask);
 }
 
 void flush_tlb_kernel_range(unsigned long start, unsigned long end)
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h
index 2e787d40d599..c7f2627385e7 100644
--- a/arch/arm/lib/bitops.h
+++ b/arch/arm/lib/bitops.h
@@ -18,12 +18,14 @@
         mov     r2, #1
         add     r1, r1, r0, lsr #3      @ Get byte offset
         mov     r3, r2, lsl r3          @ create mask
+        smp_dmb
 1:      ldrexb  r2, [r1]
         ands    r0, r2, r3              @ save old value of bit
         \instr  r2, r2, r3                      @ toggle bit
         strexb  ip, r2, [r1]
         cmp     ip, #0
         bne     1b
+        smp_dmb
         cmp     r0, #0
         movne   r0, #1
 2:      mov     pc, lr
diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h
new file mode 100644
index 000000000000..e0abc437d796
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/asp.h
@@ -0,0 +1,25 @@
+/*
+ * <mach/asp.h> - DaVinci Audio Serial Port support
+ */
+#ifndef __ASM_ARCH_DAVINCI_ASP_H
+#define __ASM_ARCH_DAVINCI_ASP_H
+
+#include <mach/irqs.h>
+
+/* Bases of register banks */
+#define DAVINCI_ASP0_BASE       0x01E02000
+#define DAVINCI_ASP1_BASE       0x01E04000
+
+/* EDMA channels */
+#define DAVINCI_DMA_ASP0_TX     2
+#define DAVINCI_DMA_ASP0_RX     3
+#define DAVINCI_DMA_ASP1_TX     8
+#define DAVINCI_DMA_ASP1_RX     9
+
+/* Interrupts */
+#define DAVINCI_ASP0_RX_INT     IRQ_MBRINT
+#define DAVINCI_ASP0_TX_INT     IRQ_MBXINT
+#define DAVINCI_ASP1_RX_INT     IRQ_MBRINT
+#define DAVINCI_ASP1_TX_INT     IRQ_MBXINT
+
+#endif /* __ASM_ARCH_DAVINCI_ASP_H */
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index e8ebeaea6c48..b2eede5531c8 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -21,15 +21,50 @@
 #include <asm/div64.h>
 #include <mach/hardware.h>
 
+
+/*
+ * The EP93xx has two external crystal oscillators.  To generate the
+ * required high-frequency clocks, the processor uses two phase-locked-
+ * loops (PLLs) to multiply the incoming external clock signal to much
+ * higher frequencies that are then divided down by programmable dividers
+ * to produce the needed clocks.  The PLLs operate independently of one
+ * another.
+ */
+#define EP93XX_EXT_CLK_RATE     14745600
+#define EP93XX_EXT_RTC_RATE     32768
+
+
 struct clk {
         unsigned long   rate;
         int             users;
+        int             sw_locked;
         u32             enable_reg;
         u32             enable_mask;
+
+        unsigned long   (*get_rate)(struct clk *clk);
 };
 
-static struct clk clk_uart = {
-        .rate           = 14745600,
+
+static unsigned long get_uart_rate(struct clk *clk);
+
+
+static struct clk clk_uart1 = {
+        .sw_locked      = 1,
+        .enable_reg     = EP93XX_SYSCON_DEVICE_CONFIG,
+        .enable_mask    = EP93XX_SYSCON_DEVICE_CONFIG_U1EN,
+        .get_rate       = get_uart_rate,
+};
+static struct clk clk_uart2 = {
+        .sw_locked      = 1,
+        .enable_reg     = EP93XX_SYSCON_DEVICE_CONFIG,
+        .enable_mask    = EP93XX_SYSCON_DEVICE_CONFIG_U2EN,
+        .get_rate       = get_uart_rate,
+};
+static struct clk clk_uart3 = {
+        .sw_locked      = 1,
+        .enable_reg     = EP93XX_SYSCON_DEVICE_CONFIG,
+        .enable_mask    = EP93XX_SYSCON_DEVICE_CONFIG_U3EN,
+        .get_rate       = get_uart_rate,
 };
 static struct clk clk_pll1;
 static struct clk clk_f;
@@ -95,9 +130,9 @@ static struct clk clk_m2m1 = {
         { .dev_id = dev, .con_id = con, .clk = ck }
 
 static struct clk_lookup clocks[] = {
-        INIT_CK("apb:uart1", NULL, &clk_uart),
-        INIT_CK("apb:uart2", NULL, &clk_uart),
-        INIT_CK("apb:uart3", NULL, &clk_uart),
+        INIT_CK("apb:uart1", NULL, &clk_uart1),
+        INIT_CK("apb:uart2", NULL, &clk_uart2),
+        INIT_CK("apb:uart3", NULL, &clk_uart3),
         INIT_CK(NULL, "pll1", &clk_pll1),
         INIT_CK(NULL, "fclk", &clk_f),
         INIT_CK(NULL, "hclk", &clk_h),
@@ -125,6 +160,8 @@ int clk_enable(struct clk *clk)
                 u32 value;
 
                 value = __raw_readl(clk->enable_reg);
+                if (clk->sw_locked)
+                        __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
                 __raw_writel(value | clk->enable_mask, clk->enable_reg);
         }
 
@@ -138,13 +175,29 @@ void clk_disable(struct clk *clk)
                 u32 value;
 
                 value = __raw_readl(clk->enable_reg);
+                if (clk->sw_locked)
+                        __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
                 __raw_writel(value & ~clk->enable_mask, clk->enable_reg);
         }
 }
 EXPORT_SYMBOL(clk_disable);
 
+static unsigned long get_uart_rate(struct clk *clk)
+{
+        u32 value;
+
+        value = __raw_readl(EP93XX_SYSCON_CLOCK_CONTROL);
+        if (value & EP93XX_SYSCON_CLOCK_UARTBAUD)
+                return EP93XX_EXT_CLK_RATE;
+        else
+                return EP93XX_EXT_CLK_RATE / 2;
+}
+
 unsigned long clk_get_rate(struct clk *clk)
 {
+        if (clk->get_rate)
+                return clk->get_rate(clk);
+
         return clk->rate;
 }
 EXPORT_SYMBOL(clk_get_rate);
@@ -162,7 +215,7 @@ static unsigned long calc_pll_rate(u32 config_word)
         unsigned long long rate;
         int i;
 
-        rate = 14745600;
+        rate = EP93XX_EXT_CLK_RATE;
         rate *= ((config_word >> 11) & 0x1f) + 1;               /* X1FBD */
         rate *= ((config_word >> 5) & 0x3f) + 1;                /* X2FBD */
         do_div(rate, (config_word & 0x1f) + 1);                 /* X2IPD */
@@ -195,7 +248,7 @@ static int __init ep93xx_clock_init(void)
 
         value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1);
         if (!(value & 0x00800000)) {                    /* PLL1 bypassed?  */
-                clk_pll1.rate = 14745600;
+                clk_pll1.rate = EP93XX_EXT_CLK_RATE;
         } else {
                 clk_pll1.rate = calc_pll_rate(value);
         }
@@ -206,7 +259,7 @@ static int __init ep93xx_clock_init(void)
 
         value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2);
         if (!(value & 0x00080000)) {                    /* PLL2 bypassed?  */
-                clk_pll2.rate = 14745600;
+                clk_pll2.rate = EP93XX_EXT_CLK_RATE;
         } else if (value & 0x00040000) {                /* PLL2 enabled?  */
                 clk_pll2.rate = calc_pll_rate(value);
         } else {
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
index f66be12b856e..1732de7629a5 100644
--- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
@@ -159,7 +159,10 @@
 #define EP93XX_SYSCON_CLOCK_SET1        EP93XX_SYSCON_REG(0x20)
 #define EP93XX_SYSCON_CLOCK_SET2        EP93XX_SYSCON_REG(0x24)
 #define EP93XX_SYSCON_DEVICE_CONFIG     EP93XX_SYSCON_REG(0x80)
-#define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE       0x00800000
+#define EP93XX_SYSCON_DEVICE_CONFIG_U3EN                (1<<24)
+#define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE       (1<<23)
+#define EP93XX_SYSCON_DEVICE_CONFIG_U2EN                (1<<20)
+#define EP93XX_SYSCON_DEVICE_CONFIG_U1EN                (1<<18)
 #define EP93XX_SYSCON_SWLOCK            EP93XX_SYSCON_REG(0xc0)
 
 #define EP93XX_WATCHDOG_BASE            (EP93XX_APB_VIRT_BASE + 0x00140000)
diff --git a/arch/arm/mach-gemini/include/mach/hardware.h b/arch/arm/mach-gemini/include/mach/hardware.h
index de6752674c05..213a4fcfeb1c 100644
--- a/arch/arm/mach-gemini/include/mach/hardware.h
+++ b/arch/arm/mach-gemini/include/mach/hardware.h
@@ -15,10 +15,9 @@
 /*
  * Memory Map definitions
  */
-/* FIXME: Does it really swap SRAM like this? */
 #ifdef CONFIG_GEMINI_MEM_SWAP
 # define GEMINI_DRAM_BASE       0x00000000
-# define GEMINI_SRAM_BASE       0x20000000
+# define GEMINI_SRAM_BASE       0x70000000
 #else
 # define GEMINI_SRAM_BASE       0x00000000
 # define GEMINI_DRAM_BASE       0x10000000
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 6f8872913073..a0f60e55da6a 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -121,7 +121,7 @@ static struct clk uartclk = {
         .rate   = 14745600,
 };
 
-static struct clk_lookup lookups[] __initdata = {
+static struct clk_lookup lookups[] = {
         {       /* UART0 */
                 .dev_id         = "mb:16",
                 .clk            = &uartclk,
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_npe.c b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
index 252310234903..7bb8e778e4b6 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_npe.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
@@ -714,7 +714,7 @@ static int __init npe_init_module(void)
         }
 
         if (!found)
-                return -ENOSYS;
+                return -ENODEV;
         return 0;
 }
 
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index eeb00240d784..be1ca28fed3f 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -144,6 +144,9 @@ static struct platform_device kirkwood_ge00 = {
         .id             = 0,
         .num_resources  = 1,
         .resource       = kirkwood_ge00_resources,
+        .dev            = {
+                .coherent_dma_mask      = 0xffffffff,
+        },
 };
 
 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
@@ -202,6 +205,9 @@ static struct platform_device kirkwood_ge01 = {
         .id             = 1,
         .num_resources  = 1,
         .resource       = kirkwood_ge01_resources,
+        .dev            = {
+                .coherent_dma_mask      = 0xffffffff,
+        },
 };
 
 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
@@ -386,12 +392,10 @@ static struct mv64xxx_i2c_pdata kirkwood_i2c_pdata = {
 
 static struct resource kirkwood_i2c_resources[] = {
         {
-                .name   = "i2c",
                 .start  = I2C_PHYS_BASE,
                 .end    = I2C_PHYS_BASE + 0x1f,
                 .flags  = IORESOURCE_MEM,
         }, {
-                .name   = "i2c",
                 .start  = IRQ_KIRKWOOD_TWSI,
                 .end    = IRQ_KIRKWOOD_TWSI,
                 .flags  = IORESOURCE_IRQ,
diff --git a/arch/arm/mach-kirkwood/ts219-setup.c b/arch/arm/mach-kirkwood/ts219-setup.c
index dda5743cf3e0..01aa213c0a6f 100644
--- a/arch/arm/mach-kirkwood/ts219-setup.c
+++ b/arch/arm/mach-kirkwood/ts219-setup.c
@@ -142,6 +142,8 @@ static unsigned int qnap_ts219_mpp_config[] __initdata = {
         MPP1_SPI_MOSI,
         MPP2_SPI_SCK,
         MPP3_SPI_MISO,
+        MPP4_SATA1_ACTn,
+        MPP5_SATA0_ACTn,
         MPP8_TW_SDA,
         MPP9_TW_SCK,
         MPP10_UART0_TXD,
@@ -150,10 +152,6 @@ static unsigned int qnap_ts219_mpp_config[] __initdata = {
         MPP14_UART1_RXD,        /* PIC controller */
         MPP15_GPIO,             /* USB Copy button */
         MPP16_GPIO,             /* Reset button */
-        MPP20_SATA1_ACTn,
-        MPP21_SATA0_ACTn,
-        MPP22_SATA1_PRESENTn,
-        MPP23_SATA0_PRESENTn,
         0
 };
 
diff --git a/arch/arm/mach-l7200/include/mach/sys-clock.h b/arch/arm/mach-l7200/include/mach/sys-clock.h
index 2d7722be60ea..e9729a35751d 100644
--- a/arch/arm/mach-l7200/include/mach/sys-clock.h
+++ b/arch/arm/mach-l7200/include/mach/sys-clock.h
@@ -18,7 +18,7 @@
 
 /* IO_START and IO_BASE are defined in hardware.h */
 
-#define SYS_CLOCK_START (IO_START + SYS_CLCOK_OFF)  /* Physical address */
+#define SYS_CLOCK_START (IO_START + SYS_CLOCK_OFF)  /* Physical address */
 #define SYS_CLOCK_BASE  (IO_BASE  + SYS_CLOCK_OFF)  /* Virtual address  */
 
 /* Define the interface to the SYS_CLOCK */
diff --git a/arch/arm/mach-loki/common.c b/arch/arm/mach-loki/common.c
index c0d2d9d12e74..818f19d7ab1f 100644
--- a/arch/arm/mach-loki/common.c
+++ b/arch/arm/mach-loki/common.c
@@ -82,6 +82,9 @@ static struct platform_device loki_ge0 = {
         .id             = 0,
         .num_resources  = 1,
         .resource       = loki_ge0_resources,
+        .dev            = {
+                .coherent_dma_mask      = 0xffffffff,
+        },
 };
 
 void __init loki_ge0_init(struct mv643xx_eth_platform_data *eth_data)
@@ -136,6 +139,9 @@ static struct platform_device loki_ge1 = {
         .id             = 1,
         .num_resources  = 1,
         .resource       = loki_ge1_resources,
+        .dev            = {
+                .coherent_dma_mask      = 0xffffffff,
+        },
 };
 
 void __init loki_ge1_init(struct mv643xx_eth_platform_data *eth_data)
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
index d0bdb6e3682b..2e914649b9e4 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
@@ -3,6 +3,11 @@
 
 #include <mach/mfp.h>
 
+#define MFP_DRIVE_VERY_SLOW     (0x0 << 13)
+#define MFP_DRIVE_SLOW          (0x1 << 13)
+#define MFP_DRIVE_MEDIUM        (0x2 << 13)
+#define MFP_DRIVE_FAST          (0x3 << 13)
+
 /* GPIO */
 #define GPIO0_GPIO              MFP_CFG(GPIO0, AF5)
 #define GPIO1_GPIO              MFP_CFG(GPIO1, AF5)
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa910.h b/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
index 48a1cbc7c56b..d97de36c50ad 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
@@ -3,6 +3,11 @@
 
 #include <mach/mfp.h>
 
+#define MFP_DRIVE_VERY_SLOW     (0x0 << 13)
+#define MFP_DRIVE_SLOW          (0x2 << 13)
+#define MFP_DRIVE_MEDIUM        (0x4 << 13)
+#define MFP_DRIVE_FAST          (0x8 << 13)
+
 /* UART2 */
 #define GPIO47_UART2_RXD        MFP_CFG(GPIO47, AF6)
 #define GPIO48_UART2_TXD        MFP_CFG(GPIO48, AF6)
diff --git a/arch/arm/mach-mmp/include/mach/mfp.h b/arch/arm/mach-mmp/include/mach/mfp.h
index 277ea4cd0f9f..62e510e80a58 100644
--- a/arch/arm/mach-mmp/include/mach/mfp.h
+++ b/arch/arm/mach-mmp/include/mach/mfp.h
@@ -12,16 +12,13 @@
  * possible, we make the following compromise:
  *
  * 1. SLEEP_OE_N will always be programmed to '1' (by MFP_LPM_FLOAT)
- * 2. DRIVE strength definitions redefined to include the reserved bit10
+ * 2. DRIVE strength definitions redefined to include the reserved bit
+ *    - the reserved bit differs between pxa168 and pxa910, and the
+ *      MFP_DRIVE_* macros are individually defined in mfp-pxa{168,910}.h
  * 3. Override MFP_CFG() and MFP_CFG_DRV()
  * 4. Drop the use of MFP_CFG_LPM() and MFP_CFG_X()
  */
 
-#define MFP_DRIVE_VERY_SLOW     (0x0 << 13)
-#define MFP_DRIVE_SLOW          (0x2 << 13)
-#define MFP_DRIVE_MEDIUM        (0x4 << 13)
-#define MFP_DRIVE_FAST          (0x8 << 13)
-
 #undef MFP_CFG
 #undef MFP_CFG_DRV
 #undef MFP_CFG_LPM
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index b03a6eda7419..a8400bb891e7 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -136,7 +136,7 @@ static struct clock_event_device ckevt = {
         .set_mode       = timer_set_mode,
 };
 
-static cycle_t clksrc_read(void)
+static cycle_t clksrc_read(struct clocksource *cs)
 {
         return timer_read();
 }
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 9ba595083dab..1b22e4af8791 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -321,6 +321,9 @@ static struct platform_device mv78xx0_ge00 = {
         .id             = 0,
         .num_resources  = 1,
         .resource       = mv78xx0_ge00_resources,
+        .dev            = {
+                .coherent_dma_mask      = 0xffffffff,
+        },
 };
 
 void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
@@ -375,6 +378,9 @@ static struct platform_device mv78xx0_ge01 = {
         .id             = 1,
         .num_resources  = 1,
         .resource       = mv78xx0_ge01_resources,
+        .dev            = {
+                .coherent_dma_mask      = 0xffffffff,
+        },
 };
 
 void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data)
@@ -429,6 +435,9 @@ static struct platform_device mv78xx0_ge10 = {
         .id             = 2,
         .num_resources  = 1,
         .resource       = mv78xx0_ge10_resources,
+        .dev            = {
+                .coherent_dma_mask      = 0xffffffff,
+        },
 };
 
 void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data)
@@ -496,6 +505,9 @@ static struct platform_device mv78xx0_ge11 = {
         .id             = 3,
         .num_resources  = 1,
         .resource       = mv78xx0_ge11_resources,
+        .dev            = {
+                .coherent_dma_mask      = 0xffffffff,
+        },
 };
 
 void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data)
@@ -532,12 +544,10 @@ static struct mv64xxx_i2c_pdata mv78xx0_i2c_0_pdata = {
 
 static struct resource mv78xx0_i2c_0_resources[] = {
         {
-                .name   = "i2c 0 base",
                 .start  = I2C_0_PHYS_BASE,
                 .end    = I2C_0_PHYS_BASE + 0x1f,
                 .flags  = IORESOURCE_MEM,
         }, {
-                .name   = "i2c 0 irq",
                 .start  = IRQ_MV78XX0_I2C_0,
                 .end    = IRQ_MV78XX0_I2C_0,
                 .flags  = IORESOURCE_IRQ,
@@ -567,12 +577,10 @@ static struct mv64xxx_i2c_pdata mv78xx0_i2c_1_pdata = {
 
 static struct resource mv78xx0_i2c_1_resources[] = {
         {
-                .name   = "i2c 1 base",
                 .start  = I2C_1_PHYS_BASE,
                 .end    = I2C_1_PHYS_BASE + 0x1f,
                 .flags  = IORESOURCE_MEM,
         }, {
-                .name   = "i2c 1 irq",
                 .start  = IRQ_MV78XX0_I2C_1,
                 .end    = IRQ_MV78XX0_I2C_1,
                 .flags  = IORESOURCE_IRQ,
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index efc59c49341b..e4cef333e291 100644
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -103,10 +103,10 @@ static struct omap_clk omap24xx_clks[] = {
         CLK(NULL,       "mdm_ick",      &mdm_ick,       CK_243X),
         CLK(NULL,       "mdm_osc_ck",   &mdm_osc_ck,    CK_243X),
         /* DSS domain clocks */
-        CLK(NULL,       "dss_ick",      &dss_ick,       CK_243X | CK_242X),
-        CLK(NULL,       "dss1_fck",     &dss1_fck,      CK_243X | CK_242X),
-        CLK(NULL,       "dss2_fck",     &dss2_fck,      CK_243X | CK_242X),
-        CLK(NULL,       "dss_54m_fck",  &dss_54m_fck,   CK_243X | CK_242X),
+        CLK("omapfb",   "ick",          &dss_ick,       CK_243X | CK_242X),
+        CLK("omapfb",   "dss1_fck",     &dss1_fck,      CK_243X | CK_242X),
+        CLK("omapfb",   "dss2_fck",     &dss2_fck,      CK_243X | CK_242X),
+        CLK("omapfb",   "tv_fck",       &dss_54m_fck,   CK_243X | CK_242X),
         /* L3 domain clocks */
         CLK(NULL,       "core_l3_ck",   &core_l3_ck,    CK_243X | CK_242X),
         CLK(NULL,       "ssi_fck",      &ssi_ssr_sst_fck, CK_243X | CK_242X),
@@ -206,7 +206,7 @@ static struct omap_clk omap24xx_clks[] = {
         CLK(NULL,       "aes_ick",      &aes_ick,       CK_243X | CK_242X),
         CLK(NULL,       "pka_ick",      &pka_ick,       CK_243X | CK_242X),
         CLK(NULL,       "usb_fck",      &usb_fck,       CK_243X | CK_242X),
-        CLK(NULL,       "usbhs_ick",    &usbhs_ick,     CK_243X),
+        CLK("musb_hdrc",        "ick",  &usbhs_ick,     CK_243X),
         CLK("mmci-omap-hs.0", "ick",    &mmchs1_ick,    CK_243X),
         CLK("mmci-omap-hs.0", "fck",    &mmchs1_fck,    CK_243X),
         CLK("mmci-omap-hs.1", "ick",    &mmchs2_ick,    CK_243X),
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 0a14dca31e30..ba05aa42bd8e 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -157,7 +157,7 @@ static struct omap_clk omap34xx_clks[] = {
         CLK(NULL,       "ssi_ssr_fck",  &ssi_ssr_fck,   CK_343X),
         CLK(NULL,       "ssi_sst_fck",  &ssi_sst_fck,   CK_343X),
         CLK(NULL,       "core_l3_ick",  &core_l3_ick,   CK_343X),
-        CLK(NULL,       "hsotgusb_ick", &hsotgusb_ick,  CK_343X),
+        CLK("musb_hdrc",        "ick",  &hsotgusb_ick,  CK_343X),
         CLK(NULL,       "sdrc_ick",     &sdrc_ick,      CK_343X),
         CLK(NULL,       "gpmc_fck",     &gpmc_fck,      CK_343X),
         CLK(NULL,       "security_l3_ick", &security_l3_ick, CK_343X),
@@ -197,11 +197,11 @@ static struct omap_clk omap34xx_clks[] = {
         CLK("omap_rng", "ick",          &rng_ick,       CK_343X),
         CLK(NULL,       "sha11_ick",    &sha11_ick,     CK_343X),
         CLK(NULL,       "des1_ick",     &des1_ick,      CK_343X),
-        CLK(NULL,       "dss1_alwon_fck", &dss1_alwon_fck, CK_343X),
-        CLK(NULL,       "dss_tv_fck",   &dss_tv_fck,    CK_343X),
-        CLK(NULL,       "dss_96m_fck",  &dss_96m_fck,   CK_343X),
-        CLK(NULL,       "dss2_alwon_fck", &dss2_alwon_fck, CK_343X),
-        CLK(NULL,       "dss_ick",      &dss_ick,       CK_343X),
+        CLK("omapfb",   "dss1_fck",     &dss1_alwon_fck, CK_343X),
+        CLK("omapfb",   "tv_fck",       &dss_tv_fck,    CK_343X),
+        CLK("omapfb",   "video_fck",    &dss_96m_fck,   CK_343X),
+        CLK("omapfb",   "dss2_fck",     &dss2_alwon_fck, CK_343X),
+        CLK("omapfb",   "ick",          &dss_ick,       CK_343X),
         CLK(NULL,       "cam_mclk",     &cam_mclk,      CK_343X),
         CLK(NULL,       "cam_ick",      &cam_ick,       CK_343X),
         CLK(NULL,       "csi2_96m_fck", &csi2_96m_fck,  CK_343X),
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 6763b8f73028..017a30e9aa1d 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -2182,7 +2182,7 @@ static struct clk wkup_32k_fck = {
 
 static struct clk gpio1_dbck = {
         .name           = "gpio1_dbck",
-        .ops            = &clkops_omap2_dflt_wait,
+        .ops            = &clkops_omap2_dflt,
         .parent         = &wkup_32k_fck,
         .enable_reg     = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_GPIO1_SHIFT,
@@ -2427,7 +2427,7 @@ static struct clk per_32k_alwon_fck = {
 
 static struct clk gpio6_dbck = {
         .name           = "gpio6_dbck",
-        .ops            = &clkops_omap2_dflt_wait,
+        .ops            = &clkops_omap2_dflt,
         .parent         = &per_32k_alwon_fck,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_GPIO6_SHIFT,
@@ -2437,7 +2437,7 @@ static struct clk gpio6_dbck = {
 
 static struct clk gpio5_dbck = {
         .name           = "gpio5_dbck",
-        .ops            = &clkops_omap2_dflt_wait,
+        .ops            = &clkops_omap2_dflt,
         .parent         = &per_32k_alwon_fck,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_GPIO5_SHIFT,
@@ -2447,7 +2447,7 @@ static struct clk gpio5_dbck = {
 
 static struct clk gpio4_dbck = {
         .name           = "gpio4_dbck",
-        .ops            = &clkops_omap2_dflt_wait,
+        .ops            = &clkops_omap2_dflt,
         .parent         = &per_32k_alwon_fck,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_GPIO4_SHIFT,
@@ -2457,7 +2457,7 @@ static struct clk gpio4_dbck = {
 
 static struct clk gpio3_dbck = {
         .name           = "gpio3_dbck",
-        .ops            = &clkops_omap2_dflt_wait,
+        .ops            = &clkops_omap2_dflt,
         .parent         = &per_32k_alwon_fck,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_GPIO3_SHIFT,
@@ -2467,7 +2467,7 @@ static struct clk gpio3_dbck = {
 
 static struct clk gpio2_dbck = {
         .name           = "gpio2_dbck",
-        .ops            = &clkops_omap2_dflt_wait,
+        .ops            = &clkops_omap2_dflt,
         .parent         = &per_32k_alwon_fck,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_GPIO2_SHIFT,
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 496983ade97e..894cc355818a 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -354,10 +354,12 @@ static void omap_init_mcspi(void)
         platform_device_register(&omap2_mcspi1);
         platform_device_register(&omap2_mcspi2);
 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
-        platform_device_register(&omap2_mcspi3);
+        if (cpu_is_omap2430() || cpu_is_omap343x())
+                platform_device_register(&omap2_mcspi3);
 #endif
 #ifdef CONFIG_ARCH_OMAP3
-        platform_device_register(&omap2_mcspi4);
+        if (cpu_is_omap343x())
+                platform_device_register(&omap2_mcspi4);
 #endif
 }
 
diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
index c6a7940f4287..9fd03a2ec95c 100644
--- a/arch/arm/mach-omap2/prm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
@@ -409,7 +409,7 @@
 /* PM_PREPWSTST_CAM specific bits */
 
 /* PM_PWSTCTRL_USBHOST specific bits */
-#define OMAP3430ES2_SAVEANDRESTORE_SHIFT                (1 << 4)
+#define OMAP3430ES2_SAVEANDRESTORE_SHIFT                4
 
 /* RM_RSTST_PER specific bits */
 
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c
index 8df55f40f4c0..8622c24cd270 100644
--- a/arch/arm/mach-omap2/usb-tusb6010.c
+++ b/arch/arm/mach-omap2/usb-tusb6010.c
@@ -187,7 +187,7 @@ int tusb6010_platform_retime(unsigned is_refclk)
         unsigned        sysclk_ps;
         int             status;
 
-        if (!refclk_psec || sysclk_ps == 0)
+        if (!refclk_psec || fclk_ps == 0)
                 return -ENODEV;
 
         sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60;
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 6af99ddabdfb..b1c7778d9f96 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -188,6 +188,9 @@ static struct platform_device orion5x_eth = {
         .id             = 0,
         .num_resources  = 1,
         .resource       = orion5x_eth_resources,
+        .dev            = {
+                .coherent_dma_mask      = 0xffffffff,
+        },
 };
 
 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
@@ -248,12 +251,10 @@ static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
 
 static struct resource orion5x_i2c_resources[] = {
         {
-                .name   = "i2c base",
                 .start  = I2C_PHYS_BASE,
                 .end    = I2C_PHYS_BASE + 0x1f,
                 .flags  = IORESOURCE_MEM,
         }, {
-                .name   = "i2c irq",
                 .start  = IRQ_ORION5X_I2C,
                 .end    = IRQ_ORION5X_I2C,
                 .flags  = IORESOURCE_IRQ,
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
index 92ba16e1b6fc..7db966dc29ce 100644
--- a/arch/arm/mach-pxa/ezx.c
+++ b/arch/arm/mach-pxa/ezx.c
@@ -111,9 +111,9 @@ static unsigned long ezx_pin_config[] __initdata = {
         GPIO25_SSP1_TXD,
         GPIO26_SSP1_RXD,
         GPIO24_GPIO,                            /* pcap chip select */
-        GPIO1_GPIO,                             /* pcap interrupt */
-        GPIO4_GPIO,                             /* WDI_AP */
-        GPIO55_GPIO,                            /* SYS_RESTART */
+        GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,       /* pcap interrupt */
+        GPIO4_GPIO | MFP_LPM_DRIVE_HIGH,        /* WDI_AP */
+        GPIO55_GPIO | MFP_LPM_DRIVE_HIGH,       /* SYS_RESTART */
 
         /* MMC */
         GPIO32_MMC_CLK,
@@ -144,20 +144,20 @@ static unsigned long ezx_pin_config[] __initdata = {
 #if defined(CONFIG_MACH_EZX_A780) || defined(CONFIG_MACH_EZX_E680)
 static unsigned long gen1_pin_config[] __initdata = {
         /* flip / lockswitch */
-        GPIO12_GPIO,
+        GPIO12_GPIO | WAKEUP_ON_EDGE_BOTH,
 
         /* bluetooth (bcm2035) */
-        GPIO14_GPIO | WAKEUP_ON_LEVEL_HIGH,     /* HOSTWAKE */
+        GPIO14_GPIO | WAKEUP_ON_EDGE_RISE,      /* HOSTWAKE */
         GPIO48_GPIO,                            /* RESET */
         GPIO28_GPIO,                            /* WAKEUP */
 
         /* Neptune handshake */
-        GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH,      /* BP_RDY */
-        GPIO57_GPIO,                            /* AP_RDY */
-        GPIO13_GPIO | WAKEUP_ON_LEVEL_HIGH,     /* WDI */
-        GPIO3_GPIO | WAKEUP_ON_LEVEL_HIGH,      /* WDI2 */
-        GPIO82_GPIO,                            /* RESET */
-        GPIO99_GPIO,                            /* TC_MM_EN */
+        GPIO0_GPIO | WAKEUP_ON_EDGE_FALL,       /* BP_RDY */
+        GPIO57_GPIO | MFP_LPM_DRIVE_HIGH,       /* AP_RDY */
+        GPIO13_GPIO | WAKEUP_ON_EDGE_BOTH,      /* WDI */
+        GPIO3_GPIO | WAKEUP_ON_EDGE_BOTH,       /* WDI2 */
+        GPIO82_GPIO | MFP_LPM_DRIVE_HIGH,       /* RESET */
+        GPIO99_GPIO | MFP_LPM_DRIVE_HIGH,       /* TC_MM_EN */
 
         /* sound */
         GPIO52_SSP3_SCLK,
@@ -199,21 +199,21 @@ static unsigned long gen1_pin_config[] __initdata = {
         defined(CONFIG_MACH_EZX_E2) || defined(CONFIG_MACH_EZX_E6)
 static unsigned long gen2_pin_config[] __initdata = {
         /* flip / lockswitch */
-        GPIO15_GPIO,
+        GPIO15_GPIO | WAKEUP_ON_EDGE_BOTH,
 
         /* EOC */
-        GPIO10_GPIO,
+        GPIO10_GPIO | WAKEUP_ON_EDGE_RISE,
 
         /* bluetooth (bcm2045) */
-        GPIO13_GPIO | WAKEUP_ON_LEVEL_HIGH,     /* HOSTWAKE */
+        GPIO13_GPIO | WAKEUP_ON_EDGE_RISE,      /* HOSTWAKE */
         GPIO37_GPIO,                            /* RESET */
         GPIO57_GPIO,                            /* WAKEUP */
 
         /* Neptune handshake */
-        GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH,      /* BP_RDY */
-        GPIO96_GPIO,                            /* AP_RDY */
-        GPIO3_GPIO | WAKEUP_ON_LEVEL_HIGH,      /* WDI */
-        GPIO116_GPIO,                           /* RESET */
+        GPIO0_GPIO | WAKEUP_ON_EDGE_FALL,       /* BP_RDY */
+        GPIO96_GPIO | MFP_LPM_DRIVE_HIGH,       /* AP_RDY */
+        GPIO3_GPIO | WAKEUP_ON_EDGE_FALL,       /* WDI */
+        GPIO116_GPIO | MFP_LPM_DRIVE_HIGH,      /* RESET */
         GPIO41_GPIO,                            /* BP_FLASH */
 
         /* sound */
diff --git a/arch/arm/mach-pxa/include/mach/reset.h b/arch/arm/mach-pxa/include/mach/reset.h
index 31e6a7b6ad80..b6c10556fbc7 100644
--- a/arch/arm/mach-pxa/include/mach/reset.h
+++ b/arch/arm/mach-pxa/include/mach/reset.h
@@ -13,8 +13,9 @@ extern void clear_reset_status(unsigned int mask);
 /**
  * init_gpio_reset() - register GPIO as reset generator
  * @gpio: gpio nr
- * @output: set gpio as out/low instead of input during normal work
+ * @output: set gpio as output instead of input during normal work
+ * @level: output level
  */
-extern int init_gpio_reset(int gpio, int output);
+extern int init_gpio_reset(int gpio, int output, int level);
 
 #endif /* __ASM_ARCH_RESET_H */
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 7ffb91d64c39..cf6b720c055f 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -322,6 +322,7 @@ static inline void pxa27x_mfp_init(void) {}
 #ifdef CONFIG_PM
 static unsigned long saved_gafr[2][4];
 static unsigned long saved_gpdr[4];
+static unsigned long saved_pgsr[4];
 
 static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
 {
@@ -332,6 +333,7 @@ static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
                 saved_gafr[0][i] = GAFR_L(i);
                 saved_gafr[1][i] = GAFR_U(i);
                 saved_gpdr[i] = GPDR(i * 32);
+                saved_pgsr[i] = PGSR(i);
 
                 GPDR(i * 32) = gpdr_lpm[i];
         }
@@ -346,6 +348,7 @@ static int pxa2xx_mfp_resume(struct sys_device *d)
                 GAFR_L(i) = saved_gafr[0][i];
                 GAFR_U(i) = saved_gafr[1][i];
                 GPDR(i * 32) = saved_gpdr[i];
+                PGSR(i) = saved_pgsr[i];
         }
         PSSR = PSSR_RDH | PSSR_PH;
         return 0;
@@ -374,6 +377,9 @@ static int __init pxa2xx_mfp_init(void)
         if (cpu_is_pxa27x())
                 pxa27x_mfp_init();
 
+        /* clear RDH bit to enable GPIO receivers after reset/sleep exit */
+        PSSR = PSSR_RDH;
+
         /* initialize gafr_run[], pgsr_lpm[] from existing values */
         for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
                 gpdr_lpm[i] = GPDR(i * 32);
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index 1cec1806f002..471a853e548b 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -62,6 +62,8 @@ static unsigned long palmld_pin_config[] __initdata = {
         GPIO29_AC97_SDATA_IN_0,
         GPIO30_AC97_SDATA_OUT,
         GPIO31_AC97_SYNC,
+        GPIO89_AC97_SYSCLK,
+        GPIO95_AC97_nRESET,
 
         /* IrDA */
         GPIO108_GPIO,   /* ir disable */
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 30662363907b..05bf979b78a6 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -64,6 +64,7 @@ static unsigned long palmt5_pin_config[] __initdata = {
         GPIO29_AC97_SDATA_IN_0,
         GPIO30_AC97_SDATA_OUT,
         GPIO31_AC97_SYNC,
+        GPIO89_AC97_SYSCLK,
         GPIO95_AC97_nRESET,
 
         /* IrDA */
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index e2d44b1a8a9b..e99a893c58a7 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -65,6 +65,7 @@ static unsigned long palmtx_pin_config[] __initdata = {
         GPIO29_AC97_SDATA_IN_0,
         GPIO30_AC97_SDATA_OUT,
         GPIO31_AC97_SYNC,
+        GPIO89_AC97_SYSCLK,
         GPIO95_AC97_nRESET,
 
         /* IrDA */
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index df29d45fb4e7..01e9d643394a 100644
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -20,7 +20,7 @@ static void do_hw_reset(void);
 
 static int reset_gpio = -1;
 
-int init_gpio_reset(int gpio, int output)
+int init_gpio_reset(int gpio, int output, int level)
 {
         int rc;
 
@@ -31,7 +31,7 @@ int init_gpio_reset(int gpio, int output)
         }
 
         if (output)
-                rc = gpio_direction_output(gpio, 0);
+                rc = gpio_direction_output(gpio, level);
         else
                 rc = gpio_direction_input(gpio);
         if (rc) {
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index c18e34acafcb..5a45fe340a10 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -531,9 +531,15 @@ static int spitz_ohci_init(struct device *dev)
         return gpio_direction_output(SPITZ_GPIO_USB_HOST, 1);
 }
 
+static void spitz_ohci_exit(struct device *dev)
+{
+        gpio_free(SPITZ_GPIO_USB_HOST);
+}
+
 static struct pxaohci_platform_data spitz_ohci_platform_data = {
         .port_mode      = PMM_NPS_MODE,
         .init           = spitz_ohci_init,
+        .exit           = spitz_ohci_exit,
         .flags          = ENABLE_PORT_ALL | NO_OC_PROTECTION,
         .power_budget   = 150,
 };
@@ -731,7 +737,7 @@ static void spitz_restart(char mode, const char *cmd)
 
 static void __init common_init(void)
 {
-        init_gpio_reset(SPITZ_GPIO_ON_RESET, 1);
+        init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0);
         pm_power_off = spitz_poweroff;
         arm_pm_restart = spitz_restart;
 
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index afac5b6d3d78..a0bd46ef5d30 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -897,7 +897,7 @@ static void __init tosa_init(void)
         gpio_set_wake(MFP_PIN_GPIO1, 1);
         /* We can't pass to gpio-keys since it will drop the Reset altfunc */
 
-        init_gpio_reset(TOSA_GPIO_ON_RESET, 0);
+        init_gpio_reset(TOSA_GPIO_ON_RESET, 0, 0);
 
         pm_power_off = tosa_poweroff;
         arm_pm_restart = tosa_restart;
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 0e65344e9f53..dd031cc41847 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -46,6 +46,7 @@
 #include <mach/audio.h>
 #include <mach/pxafb.h>
 #include <mach/i2c.h>
+#include <mach/regs-uart.h>
 #include <mach/viper.h>
 
 #include <asm/setup.h>
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 942e1a7eb9b2..076acbc50706 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -750,14 +750,6 @@ void __init realview_timer_init(unsigned int timer_irq)
 {
         u32 val;
 
-#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
-        /*
-         * The dummy clock device has to be registered before the main device
-         * so that the latter will broadcast the clock events
-         */
-        local_timer_setup();
-#endif
-
         /* 
          * set clock frequency: 
          *      REALVIEW_REFCLK is 32KHz
diff --git a/arch/arm/mach-realview/include/mach/smp.h b/arch/arm/mach-realview/include/mach/smp.h
index 515819efd046..dd53892d44a7 100644
--- a/arch/arm/mach-realview/include/mach/smp.h
+++ b/arch/arm/mach-realview/include/mach/smp.h
@@ -15,16 +15,9 @@
 /*
  * We use IRQ1 as the IPI
  */
-static inline void smp_cross_call(cpumask_t callmap)
-{
-        gic_raise_softirq(callmap, 1);
-}
-
-/*
- * Do nothing on MPcore.
- */
-static inline void smp_cross_call_done(cpumask_t callmap)
+static inline void smp_cross_call(const struct cpumask *mask)
 {
+        gic_raise_softirq(mask, 1);
 }
 
 #endif
diff --git a/arch/arm/mach-realview/localtimer.c b/arch/arm/mach-realview/localtimer.c
index d0d39adf6407..1c01d13460f0 100644
--- a/arch/arm/mach-realview/localtimer.c
+++ b/arch/arm/mach-realview/localtimer.c
@@ -189,8 +189,10 @@ void __cpuinit local_timer_setup(void)
         struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
 
         clk->name               = "dummy_timer";
-        clk->features           = CLOCK_EVT_FEAT_DUMMY;
-        clk->rating             = 200;
+        clk->features           = CLOCK_EVT_FEAT_ONESHOT |
+                                  CLOCK_EVT_FEAT_PERIODIC |
+                                  CLOCK_EVT_FEAT_DUMMY;
+        clk->rating             = 400;
         clk->mult               = 1;
         clk->set_mode           = dummy_timer_set_mode;
         clk->broadcast          = smp_timer_broadcast;
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index ea3c75595fa9..30a9c68591f6 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -78,13 +78,6 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
         trace_hardirqs_off();
 
         /*
-         * the primary core may have used a "cross call" soft interrupt
-         * to get this processor out of WFI in the BootMonitor - make
-         * sure that we are no longer being sent this soft interrupt
-         */
-        smp_cross_call_done(cpumask_of_cpu(cpu));
-
-        /*
          * if any interrupts are already enabled for the primary
          * core (e.g. timer irq), then they will not have been enabled
          * for us: do so
@@ -136,7 +129,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
          * Use smp_cross_call() for this, since there's little
          * point duplicating the code here
          */
-        smp_cross_call(cpumask_of_cpu(cpu));
+        smp_cross_call(cpumask_of(cpu));
 
         timeout = jiffies + (1 * HZ);
         while (time_before(jiffies, timeout)) {
@@ -224,11 +217,9 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
         if (max_cpus > ncores)
                 max_cpus = ncores;
 
-#ifdef CONFIG_LOCAL_TIMERS
+#if defined(CONFIG_LOCAL_TIMERS) || defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
         /*
-         * Enable the local timer for primary CPU. If the device is
-         * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
-         * realview_timer_init
+         * Enable the local timer or broadcast device for the boot CPU.
          */
         local_timer_setup();
 #endif
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 4389c160f7d0..8637dea5e150 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -588,8 +588,6 @@ static void __init bast_map_io(void)
 
         s3c_device_nand.dev.platform_data = &bast_nand_info;
 
-        s3c_i2c0_set_platdata(&bast_i2c_info);
-
         s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc));
         s3c24xx_init_clocks(0);
         s3c24xx_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs));
@@ -602,6 +600,7 @@ static void __init bast_init(void)
         sysdev_class_register(&bast_pm_sysclass);
         sysdev_register(&bast_pm_sysdev);
 
+        s3c_i2c0_set_platdata(&bast_i2c_info);
         s3c24xx_fb_set_platdata(&bast_fb_info);
         platform_add_devices(bast_devices, ARRAY_SIZE(bast_devices));
 
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 1f929c391af7..b3bebcc5623b 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -413,7 +413,7 @@ static struct clk ref24_clk = {
         .rate   = 24000000,
 };
 
-static struct clk_lookup lookups[] __initdata = {
+static struct clk_lookup lookups[] = {
         {       /* UART0 */
                 .dev_id         = "dev:f1",
                 .clk            = &ref24_clk,
diff --git a/arch/arm/nwfpe/fpa11.h b/arch/arm/nwfpe/fpa11.h
index 386cbd13eaf4..d3a6f9298e9e 100644
--- a/arch/arm/nwfpe/fpa11.h
+++ b/arch/arm/nwfpe/fpa11.h
@@ -114,4 +114,8 @@ extern unsigned int SingleCPDO(struct roundingData *roundData,
 extern unsigned int DoubleCPDO(struct roundingData *roundData,
                                const unsigned int opcode, FPREG * rFd);
 
+/* extneded_cpdo.c */
+extern unsigned int ExtendedCPDO(struct roundingData *roundData,
+                                 const unsigned int opcode, FPREG * rFd);
+
 #endif
diff --git a/arch/arm/nwfpe/fpa11_cprt.c b/arch/arm/nwfpe/fpa11_cprt.c
index 9843dc533047..31c4eeec18b0 100644
--- a/arch/arm/nwfpe/fpa11_cprt.c
+++ b/arch/arm/nwfpe/fpa11_cprt.c
@@ -27,10 +27,6 @@
 #include "fpmodule.inl"
 #include "softfloat.h"
 
-#ifdef CONFIG_FPE_NWFPE_XP
-extern flag floatx80_is_nan(floatx80);
-#endif
-
 unsigned int PerformFLT(const unsigned int opcode);
 unsigned int PerformFIX(const unsigned int opcode);
 
diff --git a/arch/arm/nwfpe/softfloat.h b/arch/arm/nwfpe/softfloat.h
index 260fe29d73f5..13e479c5da57 100644
--- a/arch/arm/nwfpe/softfloat.h
+++ b/arch/arm/nwfpe/softfloat.h
@@ -226,6 +226,8 @@ char floatx80_le_quiet( floatx80, floatx80 );
 char floatx80_lt_quiet( floatx80, floatx80 );
 char floatx80_is_signaling_nan( floatx80 );
 
+extern flag floatx80_is_nan(floatx80);
+
 #endif
 
 static inline flag extractFloat32Sign(float32 a)
diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c
index ce6b4baeedec..3746222bed10 100644
--- a/arch/arm/plat-omap/fb.c
+++ b/arch/arm/plat-omap/fb.c
@@ -206,9 +206,10 @@ void __init omapfb_reserve_sdram(void)
                         config_invalid = 1;
                         return;
                 }
-                if (rg.paddr)
+                if (rg.paddr) {
                         reserve_bootmem(rg.paddr, rg.size, BOOTMEM_DEFAULT);
-                reserved += rg.size;
+                        reserved += rg.size;
+                }
                 omapfb_config.mem_desc.region[i] = rg;
                 configured_regions++;
         }
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 17d7afe42b83..ee0b21f5b094 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -307,7 +307,7 @@ static inline int gpio_valid(int gpio)
                 return 0;
         if (cpu_is_omap24xx() && gpio < 128)
                 return 0;
-        if (cpu_is_omap34xx() && gpio < 160)
+        if (cpu_is_omap34xx() && gpio < 192)
                 return 0;
         return -1;
 }
diff --git a/arch/arm/plat-s3c/clock.c b/arch/arm/plat-s3c/clock.c
index b6be76e2fe51..4d01ef1a25dd 100644
--- a/arch/arm/plat-s3c/clock.c
+++ b/arch/arm/plat-s3c/clock.c
@@ -306,8 +306,6 @@ struct clk s3c24xx_uclk = {
 
 int s3c24xx_register_clock(struct clk *clk)
 {
-        clk->owner = THIS_MODULE;
-
         if (clk->enable == NULL)
                 clk->enable = clk_null_enable;
 
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index aee2aeb46c60..07326f632361 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -1235,7 +1235,7 @@ int s3c2410_dma_getposition(unsigned int channel, dma_addr_t *src, dma_addr_t *d
 
 EXPORT_SYMBOL(s3c2410_dma_getposition);
 
-static struct s3c2410_dma_chan *to_dma_chan(struct sys_device *dev)
+static inline struct s3c2410_dma_chan *to_dma_chan(struct sys_device *dev)
 {
         return container_of(dev, struct s3c2410_dma_chan, dev);
 }
diff --git a/arch/arm/plat-s3c64xx/gpiolib.c b/arch/arm/plat-s3c64xx/gpiolib.c
index ee9188add8fb..78ee52cffc9e 100644
--- a/arch/arm/plat-s3c64xx/gpiolib.c
+++ b/arch/arm/plat-s3c64xx/gpiolib.c
@@ -57,7 +57,7 @@
 #if 1
 #define gpio_dbg(x...) do { } while(0)
 #else
-#define gpio_dbg(x...) printk(KERN_DEBUG ## x)
+#define gpio_dbg(x...) printk(KERN_DEBUG x)
 #endif
 
 /* The s3c64xx_gpiolib_4bit routines are to control the gpio banks where
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
index 81549516572f..2ba1767512d7 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
@@ -61,14 +61,14 @@
 #define S3C64XX_GPH7_ADDR_CF1           (0x06 << 28)
 #define S3C64XX_GPH7_EINT_G6_7          (0x07 << 28)
 
-#define S3C64XX_GPH8_MMC1_DATA6         (0x02 << 32)
-#define S3C64XX_GPH8_MMC2_DATA2         (0x03 << 32)
-#define S3C64XX_GPH8_I2S_V40_LRCLK      (0x05 << 32)
-#define S3C64XX_GPH8_ADDR_CF2           (0x06 << 32)
-#define S3C64XX_GPH8_EINT_G6_8          (0x07 << 32)
-
-#define S3C64XX_GPH9_MMC1_DATA7         (0x02 << 36)
-#define S3C64XX_GPH9_MMC2_DATA3         (0x03 << 36)
-#define S3C64XX_GPH9_I2S_V40_DI         (0x05 << 36)
-#define S3C64XX_GPH9_EINT_G6_9          (0x07 << 36)
+#define S3C64XX_GPH8_MMC1_DATA6         (0x02 <<  0)
+#define S3C64XX_GPH8_MMC2_DATA2         (0x03 <<  0)
+#define S3C64XX_GPH8_I2S_V40_LRCLK      (0x05 <<  0)
+#define S3C64XX_GPH8_ADDR_CF2           (0x06 <<  0)
+#define S3C64XX_GPH8_EINT_G6_8          (0x07 <<  0)
 
+#define S3C64XX_GPH9_OUTPUT             (0x01 <<  4)
+#define S3C64XX_GPH9_MMC1_DATA7         (0x02 <<  4)
+#define S3C64XX_GPH9_MMC2_DATA3         (0x03 <<  4)
+#define S3C64XX_GPH9_I2S_V40_DI         (0x05 <<  4)
+#define S3C64XX_GPH9_EINT_G6_9          (0x07 <<  4)
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 945e0d237a1d..fec64678a63a 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
 #
 #   http://www.arm.linux.org.uk/developer/machines/?action=new
 #
-# Last update: Mon Mar 23 20:09:01 2009
+# Last update: Fri May 29 10:14:20 2009
 #
 # machine_is_xxx        CONFIG_xxxx             MACH_TYPE_xxx           number
 #
@@ -916,7 +916,7 @@ nxdb500			MACH_NXDB500		NXDB500			905
 apf9328                 MACH_APF9328            APF9328                 906
 omap_wipoq              MACH_OMAP_WIPOQ         OMAP_WIPOQ              907
 omap_twip               MACH_OMAP_TWIP          OMAP_TWIP               908
-palmt650                MACH_PALMT650           PALMT650                909
+treo650                 MACH_TREO650            TREO650                 909
 acumen                  MACH_ACUMEN             ACUMEN                  910
 xp100                   MACH_XP100              XP100                   911
 fs2410                  MACH_FS2410             FS2410                  912
@@ -1232,7 +1232,7 @@ ql202b			MACH_QL202B		QL202B			1226
 vpac270                 MACH_VPAC270            VPAC270                 1227
 rd129                   MACH_RD129              RD129                   1228
 htcwizard               MACH_HTCWIZARD          HTCWIZARD               1229
-xscale_treo680          MACH_XSCALE_TREO680     XSCALE_TREO680          1230
+treo680                 MACH_TREO680            TREO680                 1230
 tecon_tmezon            MACH_TECON_TMEZON       TECON_TMEZON            1231
 zylonite                MACH_ZYLONITE           ZYLONITE                1233
 gene1270                MACH_GENE1270           GENE1270                1234
@@ -1418,10 +1418,10 @@ looxc550		MACH_LOOXC550		LOOXC550		1417
 cnty_titan              MACH_CNTY_TITAN         CNTY_TITAN              1418
 app3xx                  MACH_APP3XX             APP3XX                  1419
 sideoatsgrama           MACH_SIDEOATSGRAMA      SIDEOATSGRAMA           1420
-palmtreo700p            MACH_PALMTREO700P       PALMTREO700P            1421
-palmtreo700w            MACH_PALMTREO700W       PALMTREO700W            1422
-palmtreo750             MACH_PALMTREO750        PALMTREO750             1423
-palmtreo755p            MACH_PALMTREO755P       PALMTREO755P            1424
+treo700p                MACH_TREO700P           TREO700P                1421
+treo700w                MACH_TREO700W           TREO700W                1422
+treo750                 MACH_TREO750            TREO750                 1423
+treo755p                MACH_TREO755P           TREO755P                1424
 ezreganut9200           MACH_EZREGANUT9200      EZREGANUT9200           1425
 sarge                   MACH_SARGE              SARGE                   1426
 a696                    MACH_A696               A696                    1427
@@ -1721,7 +1721,7 @@ sapphire		MACH_SAPPHIRE		SAPPHIRE		1729
 csb637xo                MACH_CSB637XO           CSB637XO                1730
 evisiong                MACH_EVISIONG           EVISIONG                1731
 stmp37xx                MACH_STMP37XX           STMP37XX                1732
-stmp378x                MACH_STMP38XX           STMP38XX                1733
+stmp378x                MACH_STMP378X           STMP378X                1733
 tnt                     MACH_TNT                TNT                     1734
 tbxt                    MACH_TBXT               TBXT                    1735
 playmate                MACH_PLAYMATE           PLAYMATE                1736
@@ -1817,7 +1817,7 @@ smdkc100		MACH_SMDKC100		SMDKC100		1826
 tavorevb                MACH_TAVOREVB           TAVOREVB                1827
 saar                    MACH_SAAR               SAAR                    1828
 deister_eyecam          MACH_DEISTER_EYECAM     DEISTER_EYECAM          1829
-at91sam9m10ek           MACH_AT91SAM9M10EK      AT91SAM9M10EK           1830
+at91sam9m10g45ek        MACH_AT91SAM9M10G45EK   AT91SAM9M10G45EK        1830
 linkstation_produo      MACH_LINKSTATION_PRODUO LINKSTATION_PRODUO      1831
 hit_b0                  MACH_HIT_B0             HIT_B0                  1832
 adx_rmu                 MACH_ADX_RMU            ADX_RMU                 1833
@@ -2132,3 +2132,116 @@ apollo			MACH_APOLLO		APOLLO			2141
 at91cap9stk             MACH_AT91CAP9STK        AT91CAP9STK             2142
 spc300                  MACH_SPC300             SPC300                  2143
 eko                     MACH_EKO                EKO                     2144
+ccw9m2443               MACH_CCW9M2443          CCW9M2443               2145
+ccw9m2443js             MACH_CCW9M2443JS        CCW9M2443JS             2146
+m2m_router_device       MACH_M2M_ROUTER_DEVICE  M2M_ROUTER_DEVICE       2147
+str9104nas              MACH_STAR9104NAS        STAR9104NAS             2148
+pca100                  MACH_PCA100             PCA100                  2149
+z3_dm365_mod_01         MACH_Z3_DM365_MOD_01    Z3_DM365_MOD_01         2150
+hipox                   MACH_HIPOX              HIPOX                   2151
+omap3_piteds            MACH_OMAP3_PITEDS       OMAP3_PITEDS            2152
+bm150r                  MACH_BM150R             BM150R                  2153
+tbone                   MACH_TBONE              TBONE                   2154
+merlin                  MACH_MERLIN             MERLIN                  2155
+falcon                  MACH_FALCON             FALCON                  2156
+davinci_da850_evm       MACH_DAVINCI_DA850_EVM  DAVINCI_DA850_EVM       2157
+s5p6440                 MACH_S5P6440            S5P6440                 2158
+at91sam9g10ek           MACH_AT91SAM9G10EK      AT91SAM9G10EK           2159
+omap_4430sdp            MACH_OMAP_4430SDP       OMAP_4430SDP            2160
+lpc313x                 MACH_LPC313X            LPC313X                 2161
+magx_zn5                MACH_MAGX_ZN5           MAGX_ZN5                2162
+magx_em30               MACH_MAGX_EM30          MAGX_EM30               2163
+magx_ve66               MACH_MAGX_VE66          MAGX_VE66               2164
+meesc                   MACH_MEESC              MEESC                   2165
+otc570                  MACH_OTC570             OTC570                  2166
+bcu2412                 MACH_BCU2412            BCU2412                 2167
+beacon                  MACH_BEACON             BEACON                  2168
+actia_tgw               MACH_ACTIA_TGW          ACTIA_TGW               2169
+e4430                   MACH_E4430              E4430                   2170
+ql300                   MACH_QL300              QL300                   2171
+btmavb101               MACH_BTMAVB101          BTMAVB101               2172
+btmawb101               MACH_BTMAWB101          BTMAWB101               2173
+sq201                   MACH_SQ201              SQ201                   2174
+quatro45xx              MACH_QUATRO45XX         QUATRO45XX              2175
+openpad                 MACH_OPENPAD            OPENPAD                 2176
+tx25                    MACH_TX25               TX25                    2177
+omap3_torpedo           MACH_OMAP3_TORPEDO      OMAP3_TORPEDO           2178
+htcraphael_k            MACH_HTCRAPHAEL_K       HTCRAPHAEL_K            2179
+lal43                   MACH_LAL43              LAL43                   2181
+htcraphael_cdma500      MACH_HTCRAPHAEL_CDMA500 HTCRAPHAEL_CDMA500      2182
+anw6410                 MACH_ANW6410            ANW6410                 2183
+htcprophet              MACH_HTCPROPHET         HTCPROPHET              2185
+cfa_10022               MACH_CFA_10022          CFA_10022               2186
+imx27_visstrim_m10      MACH_IMX27_VISSTRIM_M10 IMX27_VISSTRIM_M10      2187
+px2imx27                MACH_PX2IMX27           PX2IMX27                2188
+stm3210e_eval           MACH_STM3210E_EVAL      STM3210E_EVAL           2189
+dvs10                   MACH_DVS10              DVS10                   2190
+portuxg20               MACH_PORTUXG20          PORTUXG20               2191
+arm_spv                 MACH_ARM_SPV            ARM_SPV                 2192
+smdkc110                MACH_SMDKC110           SMDKC110                2193
+cabespresso             MACH_CABESPRESSO        CABESPRESSO             2194
+hmc800                  MACH_HMC800             HMC800                  2195
+sholes                  MACH_SHOLES             SHOLES                  2196
+btmxc31                 MACH_BTMXC31            BTMXC31                 2197
+dt501                   MACH_DT501              DT501                   2198
+ktx                     MACH_KTX                KTX                     2199
+omap3517evm             MACH_OMAP3517EVM        OMAP3517EVM             2200
+netspace_v2             MACH_NETSPACE_V2        NETSPACE_V2             2201
+netspace_max_v2         MACH_NETSPACE_MAX_V2    NETSPACE_MAX_V2         2202
+d2net_v2                MACH_D2NET_V2           D2NET_V2                2203
+net2big_v2              MACH_NET2BIG_V2         NET2BIG_V2              2204
+net4big_v2              MACH_NET4BIG_V2         NET4BIG_V2              2205
+net5big_v2              MACH_NET5BIG_V2         NET5BIG_V2              2206
+endb2443                MACH_ENDB2443           ENDB2443                2207
+inetspace_v2            MACH_INETSPACE_V2       INETSPACE_V2            2208
+tros                    MACH_TROS               TROS                    2209
+pelco_homer             MACH_PELCO_HOMER        PELCO_HOMER             2210
+ofsp8                   MACH_OFSP8              OFSP8                   2211
+at91sam9g45ekes         MACH_AT91SAM9G45EKES    AT91SAM9G45EKES         2212
+guf_cupid               MACH_GUF_CUPID          GUF_CUPID               2213
+eab1r                   MACH_EAB1R              EAB1R                   2214
+desirec                 MACH_DESIREC            DESIREC                 2215
+cordoba                 MACH_CORDOBA            CORDOBA                 2216
+irvine                  MACH_IRVINE             IRVINE                  2217
+sff772                  MACH_SFF772             SFF772                  2218
+pelco_milano            MACH_PELCO_MILANO       PELCO_MILANO            2219
+pc7302                  MACH_PC7302             PC7302                  2220
+bip6000                 MACH_BIP6000            BIP6000                 2221
+silvermoon              MACH_SILVERMOON         SILVERMOON              2222
+vc0830                  MACH_VC0830             VC0830                  2223
+dt430                   MACH_DT430              DT430                   2224
+ji42pf                  MACH_JI42PF             JI42PF                  2225
+gnet_ksm                MACH_GNET_KSM           GNET_KSM                2226
+gnet_sgm                MACH_GNET_SGM           GNET_SGM                2227
+gnet_sgr                MACH_GNET_SGR           GNET_SGR                2228
+omap3_icetekevm         MACH_OMAP3_ICETEKEVM    OMAP3_ICETEKEVM         2229
+pnp                     MACH_PNP                PNP                     2230
+ctera_2bay_k            MACH_CTERA_2BAY_K       CTERA_2BAY_K            2231
+ctera_2bay_u            MACH_CTERA_2BAY_U       CTERA_2BAY_U            2232
+sas_c                   MACH_SAS_C              SAS_C                   2233
+vma2315                 MACH_VMA2315            VMA2315                 2234
+vcs                     MACH_VCS                VCS                     2235
+spear600                MACH_SPEAR600           SPEAR600                2236
+spear300                MACH_SPEAR300           SPEAR300                2237
+spear1300               MACH_SPEAR1300          SPEAR1300               2238
+lilly1131               MACH_LILLY1131          LILLY1131               2239
+arvoo_ax301             MACH_ARVOO_AX301        ARVOO_AX301             2240
+mapphone                MACH_MAPPHONE           MAPPHONE                2241
+legend                  MACH_LEGEND             LEGEND                  2242
+salsa                   MACH_SALSA              SALSA                   2243
+lounge                  MACH_LOUNGE             LOUNGE                  2244
+vision                  MACH_VISION             VISION                  2245
+vmb20                   MACH_VMB20              VMB20                   2246
+hy2410                  MACH_HY2410             HY2410                  2247
+hy9315                  MACH_HY9315             HY9315                  2248
+bullwinkle              MACH_BULLWINKLE         BULLWINKLE              2249
+arm_ultimator2          MACH_ARM_ULTIMATOR2     ARM_ULTIMATOR2          2250
+vs_v210                 MACH_VS_V210            VS_V210                 2252
+vs_v212                 MACH_VS_V212            VS_V212                 2253
+hmt                     MACH_HMT                HMT                     2254
+suen3                   MACH_SUEN3              SUEN3                   2255
+vesper                  MACH_VESPER             VESPER                  2256
+str9                    MACH_STR9               STR9                    2257
+omap3_wl_ff             MACH_OMAP3_WL_FF        OMAP3_WL_FF             2258
+simcom                  MACH_SIMCOM             SIMCOM                  2259
+mcwebio                 MACH_MCWEBIO            MCWEBIO                 2260