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authorSachin Kamat <sachin.kamat@linaro.org>2014-07-07 19:03:49 -0400
committerKukjin Kim <kgene.kim@samsung.com>2014-07-07 19:03:49 -0400
commit35e75645f16c86918f26df1bfc2c24ad8ebb5a17 (patch)
tree1604da8d6647033ecfb8d626d4f801cad15d44b7 /arch/arm
parent8bf13a4346996b5a53d5f0c64b0914693c818fc2 (diff)
ARM: EXYNOS: Update secondary boot addr for secure mode
Almost all Exynos-series of SoCs that run in secure mode don't need additional offset for every CPU, with Exynos4412 being the only exception. Tested on Origen-Quad (Exynos4412) and Arndale-Octa (Exynos5420). While at it, fix the coding style (space around *). Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Tested-by: Andreas Faerber <afaerber@suse.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-exynos/firmware.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index eb91d2350f8c..e8797bb78871 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -57,8 +57,13 @@ static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
57 57
58 boot_reg = sysram_ns_base_addr + 0x1c; 58 boot_reg = sysram_ns_base_addr + 0x1c;
59 59
60 if (!soc_is_exynos4212() && !soc_is_exynos3250()) 60 /*
61 boot_reg += 4*cpu; 61 * Almost all Exynos-series of SoCs that run in secure mode don't need
62 * additional offset for every CPU, with Exynos4412 being the only
63 * exception.
64 */
65 if (soc_is_exynos4412())
66 boot_reg += 4 * cpu;
62 67
63 __raw_writel(boot_addr, boot_reg); 68 __raw_writel(boot_addr, boot_reg);
64 return 0; 69 return 0;