diff options
author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-05-17 12:14:21 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-05-17 12:14:21 -0400 |
commit | 32535bd5637d3152f944f124bcc82d498892ba1b (patch) | |
tree | 99d33b58cfec44f4cf95fad5efa75aea0dd7d60b /arch/arm | |
parent | 0b623f871d7c993fac8ad7aaaa8f5f3cdb8ed480 (diff) | |
parent | 3a36dd068f4308461661d28e8e14e11e426eba6b (diff) |
Merge branch 'v3.5-for-usb' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into usb-next
Diffstat (limited to 'arch/arm')
27 files changed, 216 insertions, 110 deletions
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c index 80abafb9bf33..9650c143afc1 100644 --- a/arch/arm/kernel/ptrace.c +++ b/arch/arm/kernel/ptrace.c | |||
@@ -906,27 +906,14 @@ long arch_ptrace(struct task_struct *child, long request, | |||
906 | return ret; | 906 | return ret; |
907 | } | 907 | } |
908 | 908 | ||
909 | #ifdef __ARMEB__ | ||
910 | #define AUDIT_ARCH_NR AUDIT_ARCH_ARMEB | ||
911 | #else | ||
912 | #define AUDIT_ARCH_NR AUDIT_ARCH_ARM | ||
913 | #endif | ||
914 | |||
915 | asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) | 909 | asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) |
916 | { | 910 | { |
917 | unsigned long ip; | 911 | unsigned long ip; |
918 | 912 | ||
919 | /* | 913 | if (why) |
920 | * Save IP. IP is used to denote syscall entry/exit: | ||
921 | * IP = 0 -> entry, = 1 -> exit | ||
922 | */ | ||
923 | ip = regs->ARM_ip; | ||
924 | regs->ARM_ip = why; | ||
925 | |||
926 | if (!ip) | ||
927 | audit_syscall_exit(regs); | 914 | audit_syscall_exit(regs); |
928 | else | 915 | else |
929 | audit_syscall_entry(AUDIT_ARCH_NR, scno, regs->ARM_r0, | 916 | audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0, |
930 | regs->ARM_r1, regs->ARM_r2, regs->ARM_r3); | 917 | regs->ARM_r1, regs->ARM_r2, regs->ARM_r3); |
931 | 918 | ||
932 | if (!test_thread_flag(TIF_SYSCALL_TRACE)) | 919 | if (!test_thread_flag(TIF_SYSCALL_TRACE)) |
@@ -936,6 +923,13 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) | |||
936 | 923 | ||
937 | current_thread_info()->syscall = scno; | 924 | current_thread_info()->syscall = scno; |
938 | 925 | ||
926 | /* | ||
927 | * IP is used to denote syscall entry/exit: | ||
928 | * IP = 0 -> entry, =1 -> exit | ||
929 | */ | ||
930 | ip = regs->ARM_ip; | ||
931 | regs->ARM_ip = why; | ||
932 | |||
939 | /* the 0x80 provides a way for the tracing parent to distinguish | 933 | /* the 0x80 provides a way for the tracing parent to distinguish |
940 | between a syscall stop and SIGTRAP delivery */ | 934 | between a syscall stop and SIGTRAP delivery */ |
941 | ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) | 935 | ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) |
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index f6a4d32b0421..8f4644659777 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c | |||
@@ -251,8 +251,6 @@ asmlinkage void __cpuinit secondary_start_kernel(void) | |||
251 | struct mm_struct *mm = &init_mm; | 251 | struct mm_struct *mm = &init_mm; |
252 | unsigned int cpu = smp_processor_id(); | 252 | unsigned int cpu = smp_processor_id(); |
253 | 253 | ||
254 | printk("CPU%u: Booted secondary processor\n", cpu); | ||
255 | |||
256 | /* | 254 | /* |
257 | * All kernel threads share the same mm context; grab a | 255 | * All kernel threads share the same mm context; grab a |
258 | * reference and switch to it. | 256 | * reference and switch to it. |
@@ -264,6 +262,8 @@ asmlinkage void __cpuinit secondary_start_kernel(void) | |||
264 | enter_lazy_tlb(mm, current); | 262 | enter_lazy_tlb(mm, current); |
265 | local_flush_tlb_all(); | 263 | local_flush_tlb_all(); |
266 | 264 | ||
265 | printk("CPU%u: Booted secondary processor\n", cpu); | ||
266 | |||
267 | cpu_init(); | 267 | cpu_init(); |
268 | preempt_disable(); | 268 | preempt_disable(); |
269 | trace_hardirqs_off(); | 269 | trace_hardirqs_off(); |
diff --git a/arch/arm/kernel/sys_arm.c b/arch/arm/kernel/sys_arm.c index d2b177905cdb..76cbb055dd05 100644 --- a/arch/arm/kernel/sys_arm.c +++ b/arch/arm/kernel/sys_arm.c | |||
@@ -115,7 +115,7 @@ int kernel_execve(const char *filename, | |||
115 | "Ir" (THREAD_START_SP - sizeof(regs)), | 115 | "Ir" (THREAD_START_SP - sizeof(regs)), |
116 | "r" (®s), | 116 | "r" (®s), |
117 | "Ir" (sizeof(regs)) | 117 | "Ir" (sizeof(regs)) |
118 | : "r0", "r1", "r2", "r3", "ip", "lr", "memory"); | 118 | : "r0", "r1", "r2", "r3", "r8", "r9", "ip", "lr", "memory"); |
119 | 119 | ||
120 | out: | 120 | out: |
121 | return ret; | 121 | return ret; |
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index e81c35f936b5..a6a6a9417a01 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig | |||
@@ -232,6 +232,9 @@ config MACH_ARMLEX4210 | |||
232 | config MACH_UNIVERSAL_C210 | 232 | config MACH_UNIVERSAL_C210 |
233 | bool "Mobile UNIVERSAL_C210 Board" | 233 | bool "Mobile UNIVERSAL_C210 Board" |
234 | select CPU_EXYNOS4210 | 234 | select CPU_EXYNOS4210 |
235 | select S5P_HRT | ||
236 | select CLKSRC_MMIO | ||
237 | select HAVE_SCHED_CLOCK | ||
235 | select S5P_GPIO_INT | 238 | select S5P_GPIO_INT |
236 | select S5P_DEV_FIMC0 | 239 | select S5P_DEV_FIMC0 |
237 | select S5P_DEV_FIMC1 | 240 | select S5P_DEV_FIMC1 |
@@ -247,6 +250,7 @@ config MACH_UNIVERSAL_C210 | |||
247 | select S3C_DEV_I2C1 | 250 | select S3C_DEV_I2C1 |
248 | select S3C_DEV_I2C3 | 251 | select S3C_DEV_I2C3 |
249 | select S3C_DEV_I2C5 | 252 | select S3C_DEV_I2C5 |
253 | select S3C_DEV_USB_HSOTG | ||
250 | select S5P_DEV_I2C_HDMIPHY | 254 | select S5P_DEV_I2C_HDMIPHY |
251 | select S5P_DEV_MFC | 255 | select S5P_DEV_MFC |
252 | select S5P_DEV_ONENAND | 256 | select S5P_DEV_ONENAND |
@@ -259,6 +263,7 @@ config MACH_UNIVERSAL_C210 | |||
259 | select EXYNOS4_SETUP_SDHCI | 263 | select EXYNOS4_SETUP_SDHCI |
260 | select EXYNOS4_SETUP_FIMC | 264 | select EXYNOS4_SETUP_FIMC |
261 | select S5P_SETUP_MIPIPHY | 265 | select S5P_SETUP_MIPIPHY |
266 | select EXYNOS4_SETUP_USB_PHY | ||
262 | help | 267 | help |
263 | Machine support for Samsung Mobile Universal S5PC210 Reference | 268 | Machine support for Samsung Mobile Universal S5PC210 Reference |
264 | Board. | 269 | Board. |
@@ -277,6 +282,7 @@ config MACH_NURI | |||
277 | select S3C_DEV_I2C3 | 282 | select S3C_DEV_I2C3 |
278 | select S3C_DEV_I2C5 | 283 | select S3C_DEV_I2C5 |
279 | select S3C_DEV_I2C6 | 284 | select S3C_DEV_I2C6 |
285 | select S3C_DEV_USB_HSOTG | ||
280 | select S5P_DEV_CSIS0 | 286 | select S5P_DEV_CSIS0 |
281 | select S5P_DEV_JPEG | 287 | select S5P_DEV_JPEG |
282 | select S5P_DEV_FIMC0 | 288 | select S5P_DEV_FIMC0 |
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c index 5cd7a8b8868c..7ac6ff4c46bd 100644 --- a/arch/arm/mach-exynos/clock-exynos5.c +++ b/arch/arm/mach-exynos/clock-exynos5.c | |||
@@ -678,7 +678,7 @@ static struct clk exynos5_clk_pdma1 = { | |||
678 | .name = "dma", | 678 | .name = "dma", |
679 | .devname = "dma-pl330.1", | 679 | .devname = "dma-pl330.1", |
680 | .enable = exynos5_clk_ip_fsys_ctrl, | 680 | .enable = exynos5_clk_ip_fsys_ctrl, |
681 | .ctrlbit = (1 << 1), | 681 | .ctrlbit = (1 << 2), |
682 | }; | 682 | }; |
683 | 683 | ||
684 | static struct clk exynos5_clk_mdma1 = { | 684 | static struct clk exynos5_clk_mdma1 = { |
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h index 591e78521a9f..c02dae7bf4a3 100644 --- a/arch/arm/mach-exynos/include/mach/irqs.h +++ b/arch/arm/mach-exynos/include/mach/irqs.h | |||
@@ -189,6 +189,7 @@ | |||
189 | #define IRQ_IIC7 EXYNOS4_IRQ_IIC7 | 189 | #define IRQ_IIC7 EXYNOS4_IRQ_IIC7 |
190 | 190 | ||
191 | #define IRQ_USB_HOST EXYNOS4_IRQ_USB_HOST | 191 | #define IRQ_USB_HOST EXYNOS4_IRQ_USB_HOST |
192 | #define IRQ_OTG EXYNOS4_IRQ_USB_HSOTG | ||
192 | 193 | ||
193 | #define IRQ_HSMMC0 EXYNOS4_IRQ_HSMMC0 | 194 | #define IRQ_HSMMC0 EXYNOS4_IRQ_HSMMC0 |
194 | #define IRQ_HSMMC1 EXYNOS4_IRQ_HSMMC1 | 195 | #define IRQ_HSMMC1 EXYNOS4_IRQ_HSMMC1 |
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index 6e6d11ff352a..e009a66477f4 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h | |||
@@ -130,6 +130,9 @@ | |||
130 | #define EXYNOS4_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000)) | 130 | #define EXYNOS4_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000)) |
131 | #define EXYNOS4_PA_DWMCI 0x12550000 | 131 | #define EXYNOS4_PA_DWMCI 0x12550000 |
132 | 132 | ||
133 | #define EXYNOS4_PA_HSOTG 0x12480000 | ||
134 | #define EXYNOS4_PA_USB_HSPHY 0x125B0000 | ||
135 | |||
133 | #define EXYNOS4_PA_SATA 0x12560000 | 136 | #define EXYNOS4_PA_SATA 0x12560000 |
134 | #define EXYNOS4_PA_SATAPHY 0x125D0000 | 137 | #define EXYNOS4_PA_SATAPHY 0x125D0000 |
135 | #define EXYNOS4_PA_SATAPHY_CTRL 0x126B0000 | 138 | #define EXYNOS4_PA_SATAPHY_CTRL 0x126B0000 |
@@ -186,6 +189,7 @@ | |||
186 | #define S3C_PA_SPI0 EXYNOS4_PA_SPI0 | 189 | #define S3C_PA_SPI0 EXYNOS4_PA_SPI0 |
187 | #define S3C_PA_SPI1 EXYNOS4_PA_SPI1 | 190 | #define S3C_PA_SPI1 EXYNOS4_PA_SPI1 |
188 | #define S3C_PA_SPI2 EXYNOS4_PA_SPI2 | 191 | #define S3C_PA_SPI2 EXYNOS4_PA_SPI2 |
192 | #define S3C_PA_USB_HSOTG EXYNOS4_PA_HSOTG | ||
189 | 193 | ||
190 | #define S5P_PA_EHCI EXYNOS4_PA_EHCI | 194 | #define S5P_PA_EHCI EXYNOS4_PA_EHCI |
191 | #define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0 | 195 | #define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0 |
diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h index 4c53f38b5a9e..d457d052a420 100644 --- a/arch/arm/mach-exynos/include/mach/regs-pmu.h +++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h | |||
@@ -163,6 +163,9 @@ | |||
163 | #define S5P_CHECK_SLEEP 0x00000BAD | 163 | #define S5P_CHECK_SLEEP 0x00000BAD |
164 | 164 | ||
165 | /* Only for EXYNOS4210 */ | 165 | /* Only for EXYNOS4210 */ |
166 | #define S5P_USBDEVICE_PHY_CONTROL S5P_PMUREG(0x0704) | ||
167 | #define S5P_USBDEVICE_PHY_ENABLE (1 << 0) | ||
168 | |||
166 | #define S5P_USBHOST_PHY_CONTROL S5P_PMUREG(0x0708) | 169 | #define S5P_USBHOST_PHY_CONTROL S5P_PMUREG(0x0708) |
167 | #define S5P_USBHOST_PHY_ENABLE (1 << 0) | 170 | #define S5P_USBHOST_PHY_ENABLE (1 << 0) |
168 | 171 | ||
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c index 2c6d701116bf..a60269d0a119 100644 --- a/arch/arm/mach-exynos/mach-nuri.c +++ b/arch/arm/mach-exynos/mach-nuri.c | |||
@@ -352,6 +352,7 @@ static struct regulator_consumer_supply __initdata max8997_ldo1_[] = { | |||
352 | REGULATOR_SUPPLY("vdd", "s5p-adc"), /* Used by CPU's ADC drv */ | 352 | REGULATOR_SUPPLY("vdd", "s5p-adc"), /* Used by CPU's ADC drv */ |
353 | }; | 353 | }; |
354 | static struct regulator_consumer_supply __initdata max8997_ldo3_[] = { | 354 | static struct regulator_consumer_supply __initdata max8997_ldo3_[] = { |
355 | REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), /* USB */ | ||
355 | REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */ | 356 | REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */ |
356 | }; | 357 | }; |
357 | static struct regulator_consumer_supply __initdata max8997_ldo4_[] = { | 358 | static struct regulator_consumer_supply __initdata max8997_ldo4_[] = { |
@@ -367,7 +368,7 @@ static struct regulator_consumer_supply __initdata max8997_ldo7_[] = { | |||
367 | REGULATOR_SUPPLY("dig_18", "0-001f"), /* HCD803 */ | 368 | REGULATOR_SUPPLY("dig_18", "0-001f"), /* HCD803 */ |
368 | }; | 369 | }; |
369 | static struct regulator_consumer_supply __initdata max8997_ldo8_[] = { | 370 | static struct regulator_consumer_supply __initdata max8997_ldo8_[] = { |
370 | REGULATOR_SUPPLY("vusb_d", NULL), /* Used by CPU */ | 371 | REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"), /* USB */ |
371 | REGULATOR_SUPPLY("vdac", NULL), /* Used by CPU */ | 372 | REGULATOR_SUPPLY("vdac", NULL), /* Used by CPU */ |
372 | }; | 373 | }; |
373 | static struct regulator_consumer_supply __initdata max8997_ldo11_[] = { | 374 | static struct regulator_consumer_supply __initdata max8997_ldo11_[] = { |
@@ -823,6 +824,7 @@ static struct regulator_init_data __initdata max8997_esafeout1_data = { | |||
823 | .constraints = { | 824 | .constraints = { |
824 | .name = "SAFEOUT1", | 825 | .name = "SAFEOUT1", |
825 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | 826 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, |
827 | .always_on = 1, | ||
826 | .state_mem = { | 828 | .state_mem = { |
827 | .disabled = 1, | 829 | .disabled = 1, |
828 | }, | 830 | }, |
@@ -1080,6 +1082,9 @@ static void __init nuri_ehci_init(void) | |||
1080 | s5p_ehci_set_platdata(pdata); | 1082 | s5p_ehci_set_platdata(pdata); |
1081 | } | 1083 | } |
1082 | 1084 | ||
1085 | /* USB OTG */ | ||
1086 | static struct s3c_hsotg_plat nuri_hsotg_pdata; | ||
1087 | |||
1083 | /* CAMERA */ | 1088 | /* CAMERA */ |
1084 | static struct regulator_consumer_supply cam_vt_cam15_supply = | 1089 | static struct regulator_consumer_supply cam_vt_cam15_supply = |
1085 | REGULATOR_SUPPLY("vdd_core", "6-003c"); | 1090 | REGULATOR_SUPPLY("vdd_core", "6-003c"); |
@@ -1292,6 +1297,7 @@ static struct platform_device *nuri_devices[] __initdata = { | |||
1292 | &s5p_device_mfc_l, | 1297 | &s5p_device_mfc_l, |
1293 | &s5p_device_mfc_r, | 1298 | &s5p_device_mfc_r, |
1294 | &s5p_device_fimc_md, | 1299 | &s5p_device_fimc_md, |
1300 | &s3c_device_usb_hsotg, | ||
1295 | 1301 | ||
1296 | /* NURI Devices */ | 1302 | /* NURI Devices */ |
1297 | &nuri_gpio_keys, | 1303 | &nuri_gpio_keys, |
@@ -1340,6 +1346,7 @@ static void __init nuri_machine_init(void) | |||
1340 | nuri_camera_init(); | 1346 | nuri_camera_init(); |
1341 | 1347 | ||
1342 | nuri_ehci_init(); | 1348 | nuri_ehci_init(); |
1349 | s3c_hsotg_set_platdata(&nuri_hsotg_pdata); | ||
1343 | 1350 | ||
1344 | /* Last */ | 1351 | /* Last */ |
1345 | platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices)); | 1352 | platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices)); |
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c index bc8bf3b4fe43..9be8a07d7d01 100644 --- a/arch/arm/mach-exynos/mach-universal_c210.c +++ b/arch/arm/mach-exynos/mach-universal_c210.c | |||
@@ -41,6 +41,7 @@ | |||
41 | #include <plat/pd.h> | 41 | #include <plat/pd.h> |
42 | #include <plat/regs-fb-v4.h> | 42 | #include <plat/regs-fb-v4.h> |
43 | #include <plat/fimc-core.h> | 43 | #include <plat/fimc-core.h> |
44 | #include <plat/s5p-time.h> | ||
44 | #include <plat/camport.h> | 45 | #include <plat/camport.h> |
45 | #include <plat/mipi_csis.h> | 46 | #include <plat/mipi_csis.h> |
46 | 47 | ||
@@ -205,6 +206,7 @@ static struct regulator_init_data lp3974_ldo2_data = { | |||
205 | }; | 206 | }; |
206 | 207 | ||
207 | static struct regulator_consumer_supply lp3974_ldo3_consumer[] = { | 208 | static struct regulator_consumer_supply lp3974_ldo3_consumer[] = { |
209 | REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"), | ||
208 | REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), | 210 | REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), |
209 | REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), | 211 | REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), |
210 | REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), | 212 | REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), |
@@ -290,6 +292,7 @@ static struct regulator_init_data lp3974_ldo7_data = { | |||
290 | }; | 292 | }; |
291 | 293 | ||
292 | static struct regulator_consumer_supply lp3974_ldo8_consumer[] = { | 294 | static struct regulator_consumer_supply lp3974_ldo8_consumer[] = { |
295 | REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), | ||
293 | REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"), | 296 | REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"), |
294 | }; | 297 | }; |
295 | 298 | ||
@@ -486,7 +489,10 @@ static struct regulator_init_data lp3974_vichg_data = { | |||
486 | static struct regulator_init_data lp3974_esafeout1_data = { | 489 | static struct regulator_init_data lp3974_esafeout1_data = { |
487 | .constraints = { | 490 | .constraints = { |
488 | .name = "SAFEOUT1", | 491 | .name = "SAFEOUT1", |
492 | .min_uV = 4800000, | ||
493 | .max_uV = 4800000, | ||
489 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | 494 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, |
495 | .always_on = 1, | ||
490 | .state_mem = { | 496 | .state_mem = { |
491 | .enabled = 1, | 497 | .enabled = 1, |
492 | }, | 498 | }, |
@@ -994,6 +1000,9 @@ static struct gpio universal_camera_gpios[] = { | |||
994 | { GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" }, | 1000 | { GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" }, |
995 | }; | 1001 | }; |
996 | 1002 | ||
1003 | /* USB OTG */ | ||
1004 | static struct s3c_hsotg_plat universal_hsotg_pdata; | ||
1005 | |||
997 | static void __init universal_camera_init(void) | 1006 | static void __init universal_camera_init(void) |
998 | { | 1007 | { |
999 | s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata), | 1008 | s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata), |
@@ -1049,6 +1058,7 @@ static struct platform_device *universal_devices[] __initdata = { | |||
1049 | &s5p_device_onenand, | 1058 | &s5p_device_onenand, |
1050 | &s5p_device_fimd0, | 1059 | &s5p_device_fimd0, |
1051 | &s5p_device_jpeg, | 1060 | &s5p_device_jpeg, |
1061 | &s3c_device_usb_hsotg, | ||
1052 | &s5p_device_mfc, | 1062 | &s5p_device_mfc, |
1053 | &s5p_device_mfc_l, | 1063 | &s5p_device_mfc_l, |
1054 | &s5p_device_mfc_r, | 1064 | &s5p_device_mfc_r, |
@@ -1064,6 +1074,7 @@ static void __init universal_map_io(void) | |||
1064 | exynos_init_io(NULL, 0); | 1074 | exynos_init_io(NULL, 0); |
1065 | s3c24xx_init_clocks(24000000); | 1075 | s3c24xx_init_clocks(24000000); |
1066 | s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); | 1076 | s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); |
1077 | s5p_set_timer_source(S5P_PWM2, S5P_PWM4); | ||
1067 | } | 1078 | } |
1068 | 1079 | ||
1069 | static void s5p_tv_setup(void) | 1080 | static void s5p_tv_setup(void) |
@@ -1101,6 +1112,7 @@ static void __init universal_machine_init(void) | |||
1101 | i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs, | 1112 | i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs, |
1102 | ARRAY_SIZE(i2c_gpio12_devs)); | 1113 | ARRAY_SIZE(i2c_gpio12_devs)); |
1103 | 1114 | ||
1115 | s3c_hsotg_set_platdata(&universal_hsotg_pdata); | ||
1104 | universal_camera_init(); | 1116 | universal_camera_init(); |
1105 | 1117 | ||
1106 | /* Last */ | 1118 | /* Last */ |
@@ -1114,7 +1126,7 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210") | |||
1114 | .map_io = universal_map_io, | 1126 | .map_io = universal_map_io, |
1115 | .handle_irq = gic_handle_irq, | 1127 | .handle_irq = gic_handle_irq, |
1116 | .init_machine = universal_machine_init, | 1128 | .init_machine = universal_machine_init, |
1117 | .timer = &exynos4_timer, | 1129 | .timer = &s5p_timer, |
1118 | .reserve = &universal_reserve, | 1130 | .reserve = &universal_reserve, |
1119 | .restart = exynos4_restart, | 1131 | .restart = exynos4_restart, |
1120 | MACHINE_END | 1132 | MACHINE_END |
diff --git a/arch/arm/mach-exynos/setup-usb-phy.c b/arch/arm/mach-exynos/setup-usb-phy.c index 41743d21e8c6..1af0a7f44e00 100644 --- a/arch/arm/mach-exynos/setup-usb-phy.c +++ b/arch/arm/mach-exynos/setup-usb-phy.c | |||
@@ -26,11 +26,71 @@ static int exynos4_usb_host_phy_is_on(void) | |||
26 | return (readl(EXYNOS4_PHYPWR) & PHY1_STD_ANALOG_POWERDOWN) ? 0 : 1; | 26 | return (readl(EXYNOS4_PHYPWR) & PHY1_STD_ANALOG_POWERDOWN) ? 0 : 1; |
27 | } | 27 | } |
28 | 28 | ||
29 | static int exynos4_usb_phy1_init(struct platform_device *pdev) | 29 | static void exynos4210_usb_phy_clkset(struct platform_device *pdev) |
30 | { | 30 | { |
31 | struct clk *otg_clk; | ||
32 | struct clk *xusbxti_clk; | 31 | struct clk *xusbxti_clk; |
33 | u32 phyclk; | 32 | u32 phyclk; |
33 | |||
34 | /* set clock frequency for PLL */ | ||
35 | phyclk = readl(EXYNOS4_PHYCLK) & ~CLKSEL_MASK; | ||
36 | |||
37 | xusbxti_clk = clk_get(&pdev->dev, "xusbxti"); | ||
38 | if (xusbxti_clk && !IS_ERR(xusbxti_clk)) { | ||
39 | switch (clk_get_rate(xusbxti_clk)) { | ||
40 | case 12 * MHZ: | ||
41 | phyclk |= CLKSEL_12M; | ||
42 | break; | ||
43 | case 24 * MHZ: | ||
44 | phyclk |= CLKSEL_24M; | ||
45 | break; | ||
46 | default: | ||
47 | case 48 * MHZ: | ||
48 | /* default reference clock */ | ||
49 | break; | ||
50 | } | ||
51 | clk_put(xusbxti_clk); | ||
52 | } | ||
53 | |||
54 | writel(phyclk, EXYNOS4_PHYCLK); | ||
55 | } | ||
56 | |||
57 | static int exynos4210_usb_phy0_init(struct platform_device *pdev) | ||
58 | { | ||
59 | u32 rstcon; | ||
60 | |||
61 | writel(readl(S5P_USBDEVICE_PHY_CONTROL) | S5P_USBDEVICE_PHY_ENABLE, | ||
62 | S5P_USBDEVICE_PHY_CONTROL); | ||
63 | |||
64 | exynos4210_usb_phy_clkset(pdev); | ||
65 | |||
66 | /* set to normal PHY0 */ | ||
67 | writel((readl(EXYNOS4_PHYPWR) & ~PHY0_NORMAL_MASK), EXYNOS4_PHYPWR); | ||
68 | |||
69 | /* reset PHY0 and Link */ | ||
70 | rstcon = readl(EXYNOS4_RSTCON) | PHY0_SWRST_MASK; | ||
71 | writel(rstcon, EXYNOS4_RSTCON); | ||
72 | udelay(10); | ||
73 | |||
74 | rstcon &= ~PHY0_SWRST_MASK; | ||
75 | writel(rstcon, EXYNOS4_RSTCON); | ||
76 | |||
77 | return 0; | ||
78 | } | ||
79 | |||
80 | static int exynos4210_usb_phy0_exit(struct platform_device *pdev) | ||
81 | { | ||
82 | writel((readl(EXYNOS4_PHYPWR) | PHY0_ANALOG_POWERDOWN | | ||
83 | PHY0_OTG_DISABLE), EXYNOS4_PHYPWR); | ||
84 | |||
85 | writel(readl(S5P_USBDEVICE_PHY_CONTROL) & ~S5P_USBDEVICE_PHY_ENABLE, | ||
86 | S5P_USBDEVICE_PHY_CONTROL); | ||
87 | |||
88 | return 0; | ||
89 | } | ||
90 | |||
91 | static int exynos4210_usb_phy1_init(struct platform_device *pdev) | ||
92 | { | ||
93 | struct clk *otg_clk; | ||
34 | u32 rstcon; | 94 | u32 rstcon; |
35 | int err; | 95 | int err; |
36 | 96 | ||
@@ -54,27 +114,7 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev) | |||
54 | writel(readl(S5P_USBHOST_PHY_CONTROL) | S5P_USBHOST_PHY_ENABLE, | 114 | writel(readl(S5P_USBHOST_PHY_CONTROL) | S5P_USBHOST_PHY_ENABLE, |
55 | S5P_USBHOST_PHY_CONTROL); | 115 | S5P_USBHOST_PHY_CONTROL); |
56 | 116 | ||
57 | /* set clock frequency for PLL */ | 117 | exynos4210_usb_phy_clkset(pdev); |
58 | phyclk = readl(EXYNOS4_PHYCLK) & ~CLKSEL_MASK; | ||
59 | |||
60 | xusbxti_clk = clk_get(&pdev->dev, "xusbxti"); | ||
61 | if (xusbxti_clk && !IS_ERR(xusbxti_clk)) { | ||
62 | switch (clk_get_rate(xusbxti_clk)) { | ||
63 | case 12 * MHZ: | ||
64 | phyclk |= CLKSEL_12M; | ||
65 | break; | ||
66 | case 24 * MHZ: | ||
67 | phyclk |= CLKSEL_24M; | ||
68 | break; | ||
69 | default: | ||
70 | case 48 * MHZ: | ||
71 | /* default reference clock */ | ||
72 | break; | ||
73 | } | ||
74 | clk_put(xusbxti_clk); | ||
75 | } | ||
76 | |||
77 | writel(phyclk, EXYNOS4_PHYCLK); | ||
78 | 118 | ||
79 | /* floating prevention logic: disable */ | 119 | /* floating prevention logic: disable */ |
80 | writel((readl(EXYNOS4_PHY1CON) | FPENABLEN), EXYNOS4_PHY1CON); | 120 | writel((readl(EXYNOS4_PHY1CON) | FPENABLEN), EXYNOS4_PHY1CON); |
@@ -102,7 +142,7 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev) | |||
102 | return 0; | 142 | return 0; |
103 | } | 143 | } |
104 | 144 | ||
105 | static int exynos4_usb_phy1_exit(struct platform_device *pdev) | 145 | static int exynos4210_usb_phy1_exit(struct platform_device *pdev) |
106 | { | 146 | { |
107 | struct clk *otg_clk; | 147 | struct clk *otg_clk; |
108 | int err; | 148 | int err; |
@@ -136,16 +176,20 @@ static int exynos4_usb_phy1_exit(struct platform_device *pdev) | |||
136 | 176 | ||
137 | int s5p_usb_phy_init(struct platform_device *pdev, int type) | 177 | int s5p_usb_phy_init(struct platform_device *pdev, int type) |
138 | { | 178 | { |
139 | if (type == S5P_USB_PHY_HOST) | 179 | if (type == S5P_USB_PHY_DEVICE) |
140 | return exynos4_usb_phy1_init(pdev); | 180 | return exynos4210_usb_phy0_init(pdev); |
181 | else if (type == S5P_USB_PHY_HOST) | ||
182 | return exynos4210_usb_phy1_init(pdev); | ||
141 | 183 | ||
142 | return -EINVAL; | 184 | return -EINVAL; |
143 | } | 185 | } |
144 | 186 | ||
145 | int s5p_usb_phy_exit(struct platform_device *pdev, int type) | 187 | int s5p_usb_phy_exit(struct platform_device *pdev, int type) |
146 | { | 188 | { |
147 | if (type == S5P_USB_PHY_HOST) | 189 | if (type == S5P_USB_PHY_DEVICE) |
148 | return exynos4_usb_phy1_exit(pdev); | 190 | return exynos4210_usb_phy0_exit(pdev); |
191 | else if (type == S5P_USB_PHY_HOST) | ||
192 | return exynos4210_usb_phy1_exit(pdev); | ||
149 | 193 | ||
150 | return -EINVAL; | 194 | return -EINVAL; |
151 | } | 195 | } |
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c index 1c672d9e6656..f7fe1b9f3170 100644 --- a/arch/arm/mach-kirkwood/board-dt.c +++ b/arch/arm/mach-kirkwood/board-dt.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/of.h> | 15 | #include <linux/of.h> |
16 | #include <linux/of_platform.h> | 16 | #include <linux/of_platform.h> |
17 | #include <linux/kexec.h> | ||
17 | #include <asm/mach/arch.h> | 18 | #include <asm/mach/arch.h> |
18 | #include <asm/mach/map.h> | 19 | #include <asm/mach/map.h> |
19 | #include <mach/bridge-regs.h> | 20 | #include <mach/bridge-regs.h> |
diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c index fcce7ff37630..cfd98b186fcc 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq.c +++ b/arch/arm/mach-omap1/ams-delta-fiq.c | |||
@@ -48,7 +48,7 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id) | |||
48 | struct irq_chip *irq_chip = NULL; | 48 | struct irq_chip *irq_chip = NULL; |
49 | int gpio, irq_num, fiq_count; | 49 | int gpio, irq_num, fiq_count; |
50 | 50 | ||
51 | irq_desc = irq_to_desc(IH_GPIO_BASE); | 51 | irq_desc = irq_to_desc(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK)); |
52 | if (irq_desc) | 52 | if (irq_desc) |
53 | irq_chip = irq_desc->irq_data.chip; | 53 | irq_chip = irq_desc->irq_data.chip; |
54 | 54 | ||
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index 930c0d380435..740cee9369ba 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c | |||
@@ -641,7 +641,7 @@ static struct regulator_consumer_supply dummy_supplies[] = { | |||
641 | 641 | ||
642 | static void __init igep_init(void) | 642 | static void __init igep_init(void) |
643 | { | 643 | { |
644 | regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); | 644 | regulator_register_fixed(1, dummy_supplies, ARRAY_SIZE(dummy_supplies)); |
645 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); | 645 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
646 | 646 | ||
647 | /* Get IGEP2 hardware revision */ | 647 | /* Get IGEP2 hardware revision */ |
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h index 1e2d3322f33e..c88420de1151 100644 --- a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h +++ b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h | |||
@@ -941,10 +941,10 @@ | |||
941 | #define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29) | 941 | #define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29) |
942 | #define OMAP4_DSI1_LANEENABLE_SHIFT 24 | 942 | #define OMAP4_DSI1_LANEENABLE_SHIFT 24 |
943 | #define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24) | 943 | #define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24) |
944 | #define OMAP4_DSI2_PIPD_SHIFT 19 | 944 | #define OMAP4_DSI1_PIPD_SHIFT 19 |
945 | #define OMAP4_DSI2_PIPD_MASK (0x1f << 19) | 945 | #define OMAP4_DSI1_PIPD_MASK (0x1f << 19) |
946 | #define OMAP4_DSI1_PIPD_SHIFT 14 | 946 | #define OMAP4_DSI2_PIPD_SHIFT 14 |
947 | #define OMAP4_DSI1_PIPD_MASK (0x1f << 14) | 947 | #define OMAP4_DSI2_PIPD_MASK (0x1f << 14) |
948 | 948 | ||
949 | /* CONTROL_MCBSPLP */ | 949 | /* CONTROL_MCBSPLP */ |
950 | #define OMAP4_ALBCTRLRX_FSX_SHIFT 31 | 950 | #define OMAP4_ALBCTRLRX_FSX_SHIFT 31 |
diff --git a/arch/arm/mach-orion5x/mpp.h b/arch/arm/mach-orion5x/mpp.h index eac68978a2c2..db70e79a1198 100644 --- a/arch/arm/mach-orion5x/mpp.h +++ b/arch/arm/mach-orion5x/mpp.h | |||
@@ -65,8 +65,8 @@ | |||
65 | #define MPP8_GIGE MPP(8, 0x1, 0, 0, 1, 1, 1) | 65 | #define MPP8_GIGE MPP(8, 0x1, 0, 0, 1, 1, 1) |
66 | 66 | ||
67 | #define MPP9_UNUSED MPP(9, 0x0, 0, 0, 1, 1, 1) | 67 | #define MPP9_UNUSED MPP(9, 0x0, 0, 0, 1, 1, 1) |
68 | #define MPP9_GPIO MPP(9, 0x0, 0, 0, 1, 1, 1) | 68 | #define MPP9_GPIO MPP(9, 0x0, 1, 1, 1, 1, 1) |
69 | #define MPP9_GIGE MPP(9, 0x1, 1, 1, 1, 1, 1) | 69 | #define MPP9_GIGE MPP(9, 0x1, 0, 0, 1, 1, 1) |
70 | 70 | ||
71 | #define MPP10_UNUSED MPP(10, 0x0, 0, 0, 1, 1, 1) | 71 | #define MPP10_UNUSED MPP(10, 0x0, 0, 0, 1, 1, 1) |
72 | #define MPP10_GPIO MPP(10, 0x0, 1, 1, 1, 1, 1) | 72 | #define MPP10_GPIO MPP(10, 0x0, 1, 1, 1, 1, 1) |
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig index 29594fc4fdf4..88e983b0c82e 100644 --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig | |||
@@ -85,6 +85,7 @@ config MACH_AQUILA | |||
85 | select S5P_DEV_ONENAND | 85 | select S5P_DEV_ONENAND |
86 | select S5PV210_SETUP_FB_24BPP | 86 | select S5PV210_SETUP_FB_24BPP |
87 | select S5PV210_SETUP_SDHCI | 87 | select S5PV210_SETUP_SDHCI |
88 | select S5PV210_SETUP_USB_PHY | ||
88 | help | 89 | help |
89 | Machine support for the Samsung Aquila target based on S5PC110 SoC | 90 | Machine support for the Samsung Aquila target based on S5PC110 SoC |
90 | 91 | ||
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c index 93ab278dadd7..f20a97c8e411 100644 --- a/arch/arm/mach-s5pv210/mach-goni.c +++ b/arch/arm/mach-s5pv210/mach-goni.c | |||
@@ -279,6 +279,9 @@ static void __init goni_tsp_init(void) | |||
279 | i2c2_devs[0].irq = gpio_to_irq(gpio); | 279 | i2c2_devs[0].irq = gpio_to_irq(gpio); |
280 | } | 280 | } |
281 | 281 | ||
282 | /* USB OTG */ | ||
283 | static struct s3c_hsotg_plat goni_hsotg_pdata; | ||
284 | |||
282 | static void goni_camera_init(void) | 285 | static void goni_camera_init(void) |
283 | { | 286 | { |
284 | s5pv210_fimc_setup_gpio(S5P_CAMPORT_A); | 287 | s5pv210_fimc_setup_gpio(S5P_CAMPORT_A); |
@@ -942,6 +945,8 @@ static void __init goni_machine_init(void) | |||
942 | s3c_set_platdata(&goni_fimc_md_platdata, sizeof(goni_fimc_md_platdata), | 945 | s3c_set_platdata(&goni_fimc_md_platdata, sizeof(goni_fimc_md_platdata), |
943 | &s5p_device_fimc_md); | 946 | &s5p_device_fimc_md); |
944 | 947 | ||
948 | s3c_hsotg_set_platdata(&goni_hsotg_pdata); | ||
949 | |||
945 | goni_camera_init(); | 950 | goni_camera_init(); |
946 | 951 | ||
947 | /* SPI */ | 952 | /* SPI */ |
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c index cb224a344af0..0891ec6e27f5 100644 --- a/arch/arm/mach-shmobile/board-ag5evm.c +++ b/arch/arm/mach-shmobile/board-ag5evm.c | |||
@@ -365,23 +365,13 @@ static struct platform_device mipidsi0_device = { | |||
365 | }; | 365 | }; |
366 | 366 | ||
367 | /* SDHI0 */ | 367 | /* SDHI0 */ |
368 | static irqreturn_t ag5evm_sdhi0_gpio_cd(int irq, void *arg) | ||
369 | { | ||
370 | struct device *dev = arg; | ||
371 | struct sh_mobile_sdhi_info *info = dev->platform_data; | ||
372 | struct tmio_mmc_data *pdata = info->pdata; | ||
373 | |||
374 | tmio_mmc_cd_wakeup(pdata); | ||
375 | |||
376 | return IRQ_HANDLED; | ||
377 | } | ||
378 | |||
379 | static struct sh_mobile_sdhi_info sdhi0_info = { | 368 | static struct sh_mobile_sdhi_info sdhi0_info = { |
380 | .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, | 369 | .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, |
381 | .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, | 370 | .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, |
382 | .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, | 371 | .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD, |
383 | .tmio_caps = MMC_CAP_SD_HIGHSPEED, | 372 | .tmio_caps = MMC_CAP_SD_HIGHSPEED, |
384 | .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, | 373 | .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, |
374 | .cd_gpio = GPIO_PORT251, | ||
385 | }; | 375 | }; |
386 | 376 | ||
387 | static struct resource sdhi0_resources[] = { | 377 | static struct resource sdhi0_resources[] = { |
@@ -557,7 +547,6 @@ static void __init ag5evm_init(void) | |||
557 | lcd_backlight_reset(); | 547 | lcd_backlight_reset(); |
558 | 548 | ||
559 | /* enable SDHI0 on CN15 [SD I/F] */ | 549 | /* enable SDHI0 on CN15 [SD I/F] */ |
560 | gpio_request(GPIO_FN_SDHICD0, NULL); | ||
561 | gpio_request(GPIO_FN_SDHIWP0, NULL); | 550 | gpio_request(GPIO_FN_SDHIWP0, NULL); |
562 | gpio_request(GPIO_FN_SDHICMD0, NULL); | 551 | gpio_request(GPIO_FN_SDHICMD0, NULL); |
563 | gpio_request(GPIO_FN_SDHICLK0, NULL); | 552 | gpio_request(GPIO_FN_SDHICLK0, NULL); |
@@ -566,13 +555,6 @@ static void __init ag5evm_init(void) | |||
566 | gpio_request(GPIO_FN_SDHID0_1, NULL); | 555 | gpio_request(GPIO_FN_SDHID0_1, NULL); |
567 | gpio_request(GPIO_FN_SDHID0_0, NULL); | 556 | gpio_request(GPIO_FN_SDHID0_0, NULL); |
568 | 557 | ||
569 | if (!request_irq(intcs_evt2irq(0x3c0), ag5evm_sdhi0_gpio_cd, | ||
570 | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, | ||
571 | "sdhi0 cd", &sdhi0_device.dev)) | ||
572 | sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD; | ||
573 | else | ||
574 | pr_warn("Unable to setup SDHI0 GPIO IRQ\n"); | ||
575 | |||
576 | /* enable SDHI1 on CN4 [WLAN I/F] */ | 558 | /* enable SDHI1 on CN4 [WLAN I/F] */ |
577 | gpio_request(GPIO_FN_SDHICLK1, NULL); | 559 | gpio_request(GPIO_FN_SDHICLK1, NULL); |
578 | gpio_request(GPIO_FN_SDHICMD1_PU, NULL); | 560 | gpio_request(GPIO_FN_SDHICMD1_PU, NULL); |
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index f49e28abe0ab..8c6202bb6aeb 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c | |||
@@ -1011,21 +1011,12 @@ static int slot_cn7_get_cd(struct platform_device *pdev) | |||
1011 | } | 1011 | } |
1012 | 1012 | ||
1013 | /* SDHI0 */ | 1013 | /* SDHI0 */ |
1014 | static irqreturn_t mackerel_sdhi0_gpio_cd(int irq, void *arg) | ||
1015 | { | ||
1016 | struct device *dev = arg; | ||
1017 | struct sh_mobile_sdhi_info *info = dev->platform_data; | ||
1018 | struct tmio_mmc_data *pdata = info->pdata; | ||
1019 | |||
1020 | tmio_mmc_cd_wakeup(pdata); | ||
1021 | |||
1022 | return IRQ_HANDLED; | ||
1023 | } | ||
1024 | |||
1025 | static struct sh_mobile_sdhi_info sdhi0_info = { | 1014 | static struct sh_mobile_sdhi_info sdhi0_info = { |
1026 | .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, | 1015 | .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, |
1027 | .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, | 1016 | .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, |
1017 | .tmio_flags = TMIO_MMC_USE_GPIO_CD, | ||
1028 | .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, | 1018 | .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, |
1019 | .cd_gpio = GPIO_PORT172, | ||
1029 | }; | 1020 | }; |
1030 | 1021 | ||
1031 | static struct resource sdhi0_resources[] = { | 1022 | static struct resource sdhi0_resources[] = { |
@@ -1384,7 +1375,6 @@ static void __init mackerel_init(void) | |||
1384 | { | 1375 | { |
1385 | u32 srcr4; | 1376 | u32 srcr4; |
1386 | struct clk *clk; | 1377 | struct clk *clk; |
1387 | int ret; | ||
1388 | 1378 | ||
1389 | /* External clock source */ | 1379 | /* External clock source */ |
1390 | clk_set_rate(&sh7372_dv_clki_clk, 27000000); | 1380 | clk_set_rate(&sh7372_dv_clki_clk, 27000000); |
@@ -1481,7 +1471,6 @@ static void __init mackerel_init(void) | |||
1481 | irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH); | 1471 | irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH); |
1482 | 1472 | ||
1483 | /* enable SDHI0 */ | 1473 | /* enable SDHI0 */ |
1484 | gpio_request(GPIO_FN_SDHICD0, NULL); | ||
1485 | gpio_request(GPIO_FN_SDHIWP0, NULL); | 1474 | gpio_request(GPIO_FN_SDHIWP0, NULL); |
1486 | gpio_request(GPIO_FN_SDHICMD0, NULL); | 1475 | gpio_request(GPIO_FN_SDHICMD0, NULL); |
1487 | gpio_request(GPIO_FN_SDHICLK0, NULL); | 1476 | gpio_request(GPIO_FN_SDHICLK0, NULL); |
@@ -1490,13 +1479,6 @@ static void __init mackerel_init(void) | |||
1490 | gpio_request(GPIO_FN_SDHID0_1, NULL); | 1479 | gpio_request(GPIO_FN_SDHID0_1, NULL); |
1491 | gpio_request(GPIO_FN_SDHID0_0, NULL); | 1480 | gpio_request(GPIO_FN_SDHID0_0, NULL); |
1492 | 1481 | ||
1493 | ret = request_irq(evt2irq(0x3340), mackerel_sdhi0_gpio_cd, | ||
1494 | IRQF_TRIGGER_FALLING, "sdhi0 cd", &sdhi0_device.dev); | ||
1495 | if (!ret) | ||
1496 | sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD; | ||
1497 | else | ||
1498 | pr_err("Cannot get IRQ #%d: %d\n", evt2irq(0x3340), ret); | ||
1499 | |||
1500 | #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) | 1482 | #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) |
1501 | /* enable SDHI1 */ | 1483 | /* enable SDHI1 */ |
1502 | gpio_request(GPIO_FN_SDHICMD1, NULL); | 1484 | gpio_request(GPIO_FN_SDHICMD1, NULL); |
diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S index 6ac015c89206..b202c1272526 100644 --- a/arch/arm/mach-shmobile/headsmp.S +++ b/arch/arm/mach-shmobile/headsmp.S | |||
@@ -16,6 +16,59 @@ | |||
16 | 16 | ||
17 | __CPUINIT | 17 | __CPUINIT |
18 | 18 | ||
19 | /* Cache invalidation nicked from arch/arm/mach-imx/head-v7.S, thanks! | ||
20 | * | ||
21 | * The secondary kernel init calls v7_flush_dcache_all before it enables | ||
22 | * the L1; however, the L1 comes out of reset in an undefined state, so | ||
23 | * the clean + invalidate performed by v7_flush_dcache_all causes a bunch | ||
24 | * of cache lines with uninitialized data and uninitialized tags to get | ||
25 | * written out to memory, which does really unpleasant things to the main | ||
26 | * processor. We fix this by performing an invalidate, rather than a | ||
27 | * clean + invalidate, before jumping into the kernel. | ||
28 | * | ||
29 | * This funciton is cloned from arch/arm/mach-tegra/headsmp.S, and needs | ||
30 | * to be called for both secondary cores startup and primary core resume | ||
31 | * procedures. Ideally, it should be moved into arch/arm/mm/cache-v7.S. | ||
32 | */ | ||
33 | ENTRY(v7_invalidate_l1) | ||
34 | mov r0, #0 | ||
35 | mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache | ||
36 | mcr p15, 2, r0, c0, c0, 0 | ||
37 | mrc p15, 1, r0, c0, c0, 0 | ||
38 | |||
39 | ldr r1, =0x7fff | ||
40 | and r2, r1, r0, lsr #13 | ||
41 | |||
42 | ldr r1, =0x3ff | ||
43 | |||
44 | and r3, r1, r0, lsr #3 @ NumWays - 1 | ||
45 | add r2, r2, #1 @ NumSets | ||
46 | |||
47 | and r0, r0, #0x7 | ||
48 | add r0, r0, #4 @ SetShift | ||
49 | |||
50 | clz r1, r3 @ WayShift | ||
51 | add r4, r3, #1 @ NumWays | ||
52 | 1: sub r2, r2, #1 @ NumSets-- | ||
53 | mov r3, r4 @ Temp = NumWays | ||
54 | 2: subs r3, r3, #1 @ Temp-- | ||
55 | mov r5, r3, lsl r1 | ||
56 | mov r6, r2, lsl r0 | ||
57 | orr r5, r5, r6 @ Reg = (Temp<<WayShift)|(NumSets<<SetShift) | ||
58 | mcr p15, 0, r5, c7, c6, 2 | ||
59 | bgt 2b | ||
60 | cmp r2, #0 | ||
61 | bgt 1b | ||
62 | dsb | ||
63 | isb | ||
64 | mov pc, lr | ||
65 | ENDPROC(v7_invalidate_l1) | ||
66 | |||
67 | ENTRY(shmobile_invalidate_start) | ||
68 | bl v7_invalidate_l1 | ||
69 | b secondary_startup | ||
70 | ENDPROC(shmobile_invalidate_start) | ||
71 | |||
19 | /* | 72 | /* |
20 | * Reset vector for secondary CPUs. | 73 | * Reset vector for secondary CPUs. |
21 | * This will be mapped at address 0 by SBAR register. | 74 | * This will be mapped at address 0 by SBAR register. |
@@ -24,4 +77,5 @@ | |||
24 | .align 12 | 77 | .align 12 |
25 | ENTRY(shmobile_secondary_vector) | 78 | ENTRY(shmobile_secondary_vector) |
26 | ldr pc, 1f | 79 | ldr pc, 1f |
27 | 1: .long secondary_startup - PAGE_OFFSET + PLAT_PHYS_OFFSET | 80 | 1: .long shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET |
81 | ENDPROC(shmobile_secondary_vector) | ||
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index 83ad3fe0a75f..c85e6ecda606 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h | |||
@@ -4,7 +4,6 @@ | |||
4 | extern void shmobile_earlytimer_init(void); | 4 | extern void shmobile_earlytimer_init(void); |
5 | extern struct sys_timer shmobile_timer; | 5 | extern struct sys_timer shmobile_timer; |
6 | struct twd_local_timer; | 6 | struct twd_local_timer; |
7 | void shmobile_twd_init(struct twd_local_timer *twd_local_timer); | ||
8 | extern void shmobile_setup_console(void); | 7 | extern void shmobile_setup_console(void); |
9 | extern void shmobile_secondary_vector(void); | 8 | extern void shmobile_secondary_vector(void); |
10 | extern int shmobile_platform_cpu_kill(unsigned int cpu); | 9 | extern int shmobile_platform_cpu_kill(unsigned int cpu); |
@@ -82,5 +81,6 @@ extern int r8a7779_platform_cpu_kill(unsigned int cpu); | |||
82 | extern void r8a7779_secondary_init(unsigned int cpu); | 81 | extern void r8a7779_secondary_init(unsigned int cpu); |
83 | extern int r8a7779_boot_secondary(unsigned int cpu); | 82 | extern int r8a7779_boot_secondary(unsigned int cpu); |
84 | extern void r8a7779_smp_prepare_cpus(void); | 83 | extern void r8a7779_smp_prepare_cpus(void); |
84 | extern void r8a7779_register_twd(void); | ||
85 | 85 | ||
86 | #endif /* __ARCH_MACH_COMMON_H */ | 86 | #endif /* __ARCH_MACH_COMMON_H */ |
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 12c6f529ab89..e98e46f6cf55 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c | |||
@@ -262,10 +262,14 @@ void __init r8a7779_add_standard_devices(void) | |||
262 | ARRAY_SIZE(r8a7779_late_devices)); | 262 | ARRAY_SIZE(r8a7779_late_devices)); |
263 | } | 263 | } |
264 | 264 | ||
265 | /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ | ||
266 | void __init __weak r8a7779_register_twd(void) { } | ||
267 | |||
265 | static void __init r8a7779_earlytimer_init(void) | 268 | static void __init r8a7779_earlytimer_init(void) |
266 | { | 269 | { |
267 | r8a7779_clock_init(); | 270 | r8a7779_clock_init(); |
268 | shmobile_earlytimer_init(); | 271 | shmobile_earlytimer_init(); |
272 | r8a7779_register_twd(); | ||
269 | } | 273 | } |
270 | 274 | ||
271 | void __init r8a7779_add_early_devices(void) | 275 | void __init r8a7779_add_early_devices(void) |
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c index 5bebffc10455..04a0dfe75493 100644 --- a/arch/arm/mach-shmobile/setup-sh73a0.c +++ b/arch/arm/mach-shmobile/setup-sh73a0.c | |||
@@ -688,10 +688,14 @@ void __init sh73a0_add_standard_devices(void) | |||
688 | ARRAY_SIZE(sh73a0_late_devices)); | 688 | ARRAY_SIZE(sh73a0_late_devices)); |
689 | } | 689 | } |
690 | 690 | ||
691 | /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ | ||
692 | void __init __weak sh73a0_register_twd(void) { } | ||
693 | |||
691 | static void __init sh73a0_earlytimer_init(void) | 694 | static void __init sh73a0_earlytimer_init(void) |
692 | { | 695 | { |
693 | sh73a0_clock_init(); | 696 | sh73a0_clock_init(); |
694 | shmobile_earlytimer_init(); | 697 | shmobile_earlytimer_init(); |
698 | sh73a0_register_twd(); | ||
695 | } | 699 | } |
696 | 700 | ||
697 | void __init sh73a0_add_early_devices(void) | 701 | void __init sh73a0_add_early_devices(void) |
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index b62e19d4c9af..6d1d0238cbf7 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c | |||
@@ -64,8 +64,15 @@ static void __iomem *scu_base_addr(void) | |||
64 | static DEFINE_SPINLOCK(scu_lock); | 64 | static DEFINE_SPINLOCK(scu_lock); |
65 | static unsigned long tmp; | 65 | static unsigned long tmp; |
66 | 66 | ||
67 | #ifdef CONFIG_HAVE_ARM_TWD | ||
67 | static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); | 68 | static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); |
68 | 69 | ||
70 | void __init r8a7779_register_twd(void) | ||
71 | { | ||
72 | twd_local_timer_register(&twd_local_timer); | ||
73 | } | ||
74 | #endif | ||
75 | |||
69 | static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) | 76 | static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) |
70 | { | 77 | { |
71 | void __iomem *scu_base = scu_base_addr(); | 78 | void __iomem *scu_base = scu_base_addr(); |
@@ -84,7 +91,6 @@ unsigned int __init r8a7779_get_core_count(void) | |||
84 | { | 91 | { |
85 | void __iomem *scu_base = scu_base_addr(); | 92 | void __iomem *scu_base = scu_base_addr(); |
86 | 93 | ||
87 | shmobile_twd_init(&twd_local_timer); | ||
88 | return scu_get_core_count(scu_base); | 94 | return scu_get_core_count(scu_base); |
89 | } | 95 | } |
90 | 96 | ||
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c index 14ad8b052f1a..e36c41c4ab40 100644 --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c | |||
@@ -42,7 +42,13 @@ static void __iomem *scu_base_addr(void) | |||
42 | static DEFINE_SPINLOCK(scu_lock); | 42 | static DEFINE_SPINLOCK(scu_lock); |
43 | static unsigned long tmp; | 43 | static unsigned long tmp; |
44 | 44 | ||
45 | #ifdef CONFIG_HAVE_ARM_TWD | ||
45 | static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); | 46 | static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); |
47 | void __init sh73a0_register_twd(void) | ||
48 | { | ||
49 | twd_local_timer_register(&twd_local_timer); | ||
50 | } | ||
51 | #endif | ||
46 | 52 | ||
47 | static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) | 53 | static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) |
48 | { | 54 | { |
@@ -62,7 +68,6 @@ unsigned int __init sh73a0_get_core_count(void) | |||
62 | { | 68 | { |
63 | void __iomem *scu_base = scu_base_addr(); | 69 | void __iomem *scu_base = scu_base_addr(); |
64 | 70 | ||
65 | shmobile_twd_init(&twd_local_timer); | ||
66 | return scu_get_core_count(scu_base); | 71 | return scu_get_core_count(scu_base); |
67 | } | 72 | } |
68 | 73 | ||
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c index 2fba5f3d1c8a..8b79e7917a23 100644 --- a/arch/arm/mach-shmobile/timer.c +++ b/arch/arm/mach-shmobile/timer.c | |||
@@ -46,15 +46,6 @@ static void __init shmobile_timer_init(void) | |||
46 | { | 46 | { |
47 | } | 47 | } |
48 | 48 | ||
49 | void __init shmobile_twd_init(struct twd_local_timer *twd_local_timer) | ||
50 | { | ||
51 | #ifdef CONFIG_HAVE_ARM_TWD | ||
52 | int err = twd_local_timer_register(twd_local_timer); | ||
53 | if (err) | ||
54 | pr_err("twd_local_timer_register failed %d\n", err); | ||
55 | #endif | ||
56 | } | ||
57 | |||
58 | struct sys_timer shmobile_timer = { | 49 | struct sys_timer shmobile_timer = { |
59 | .init = shmobile_timer_init, | 50 | .init = shmobile_timer_init, |
60 | }; | 51 | }; |