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authorAndrew Victor <andrew@sanpeople.com>2007-05-31 04:29:33 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-06-02 16:31:43 -0400
commit1f4b49a4293ea7b0adeaeae37207b9c9fd2dd7c2 (patch)
tree9ba483dc4501bc08a121797954329121efb1f616 /arch/arm
parentc7341d436a7a89dc26706386de0a301fc9dbe49a (diff)
[ARM] 4418/1: AT91: Number of programmable clocks differs
The number of programmable clocks available on the AT91 processors can differ, therefore do not always display the contents of the PMC_PCKR(0) .. PMC_PCKR(3) registers (ie, assume there are 4 clocks). If CONFIG_AT91_PROGRAMMABLE_CLOCKS is enabled, the programmable clocks will be registered like the other system/peripheral clocks, and the state of the programmable clocks will be displayed like with the other clocks. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-at91/clock.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 06c9a0507d0d..848efb2a4ebf 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -364,19 +364,14 @@ static int at91_clk_show(struct seq_file *s, void *unused)
364{ 364{
365 u32 scsr, pcsr, sr; 365 u32 scsr, pcsr, sr;
366 struct clk *clk; 366 struct clk *clk;
367 unsigned i;
368 367
369 seq_printf(s, "SCSR = %8x\n", scsr = at91_sys_read(AT91_PMC_SCSR)); 368 seq_printf(s, "SCSR = %8x\n", scsr = at91_sys_read(AT91_PMC_SCSR));
370 seq_printf(s, "PCSR = %8x\n", pcsr = at91_sys_read(AT91_PMC_PCSR)); 369 seq_printf(s, "PCSR = %8x\n", pcsr = at91_sys_read(AT91_PMC_PCSR));
371
372 seq_printf(s, "MOR = %8x\n", at91_sys_read(AT91_CKGR_MOR)); 370 seq_printf(s, "MOR = %8x\n", at91_sys_read(AT91_CKGR_MOR));
373 seq_printf(s, "MCFR = %8x\n", at91_sys_read(AT91_CKGR_MCFR)); 371 seq_printf(s, "MCFR = %8x\n", at91_sys_read(AT91_CKGR_MCFR));
374 seq_printf(s, "PLLA = %8x\n", at91_sys_read(AT91_CKGR_PLLAR)); 372 seq_printf(s, "PLLA = %8x\n", at91_sys_read(AT91_CKGR_PLLAR));
375 seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR)); 373 seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR));
376
377 seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR)); 374 seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR));
378 for (i = 0; i < 4; i++)
379 seq_printf(s, "PCK%d = %8x\n", i, at91_sys_read(AT91_PMC_PCKR(i)));
380 seq_printf(s, "SR = %8x\n", sr = at91_sys_read(AT91_PMC_SR)); 375 seq_printf(s, "SR = %8x\n", sr = at91_sys_read(AT91_PMC_SR));
381 376
382 seq_printf(s, "\n"); 377 seq_printf(s, "\n");