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authorIngo Molnar <mingo@kernel.org>2014-01-12 11:28:52 -0500
committerIngo Molnar <mingo@kernel.org>2014-01-14 08:33:29 -0500
commit1b3f82876006bd4172ca7696aa367baf96ec7c15 (patch)
treeb9c6058bc773cab95db1daf457bbf56ad6a47bbe /arch/arm
parentd05d24a984f8e14086771a158083dbe6facb769e (diff)
parent98aefbe72ec6015f90fe045ed16c5cf755da283d (diff)
Merge branch 'clockevents/3.14' of git://git.linaro.org/people/daniel.lezcano/linux into timers/core
Pull clocksource/clockevent updates from Daniel Lezcano: * Axel Lin removed an unused structure defining the ids for the bcm kona driver. * Ezequiel Garcia enabled the timer divider only when the 25MHz timer is not used for the armada 370 XP. * Jingoo Han removed a pointless platform data initialization for the sh_mtu and sh_mtu2. * Laurent Pinchart added the clk_prepare/clk_unprepare for sh_cmt. * Linus Walleij added a useful warning in clk_of when no clocks are found while the old behavior was to silently hang at boot time. * Maxime Ripard added the high speed timer drivers for the Allwinner SoCs (A10, A13, A20). He increased the rating, shared the irq across all available cpus and fixed the clockevent's irq initialization for the sun4i. * Michael Opdenacker removed the usage of the IRQF_DISABLED for the all the timers driver located in drivers/clocksource. * Stephen Boyd switched to sched_clock_register for the arm_global_timer, cadence_ttc, sun4i and orion timers. Conflicts: drivers/clocksource/clksrc-of.c Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/sun5i-a10s.dtsi7
-rw-r--r--arch/arm/boot/dts/sun5i-a13.dtsi7
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi10
-rw-r--r--arch/arm/mach-sunxi/Kconfig1
4 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 52476742a104..e674c94c7206 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -332,5 +332,12 @@
332 clock-frequency = <100000>; 332 clock-frequency = <100000>;
333 status = "disabled"; 333 status = "disabled";
334 }; 334 };
335
336 timer@01c60000 {
337 compatible = "allwinner,sun5i-a13-hstimer";
338 reg = <0x01c60000 0x1000>;
339 interrupts = <82>, <83>;
340 clocks = <&ahb_gates 28>;
341 };
335 }; 342 };
336}; 343};
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index ce8ef2a45be0..1ccd75d37f49 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -273,5 +273,12 @@
273 clock-frequency = <100000>; 273 clock-frequency = <100000>;
274 status = "disabled"; 274 status = "disabled";
275 }; 275 };
276
277 timer@01c60000 {
278 compatible = "allwinner,sun5i-a13-hstimer";
279 reg = <0x01c60000 0x1000>;
280 interrupts = <82>, <83>;
281 clocks = <&ahb_gates 28>;
282 };
276 }; 283 };
277}; 284};
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 367611a0730b..0135039eff96 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -395,6 +395,16 @@
395 status = "disabled"; 395 status = "disabled";
396 }; 396 };
397 397
398 hstimer@01c60000 {
399 compatible = "allwinner,sun7i-a20-hstimer";
400 reg = <0x01c60000 0x1000>;
401 interrupts = <0 81 1>,
402 <0 82 1>,
403 <0 83 1>,
404 <0 84 1>;
405 clocks = <&ahb_gates 28>;
406 };
407
398 gic: interrupt-controller@01c81000 { 408 gic: interrupt-controller@01c81000 {
399 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; 409 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
400 reg = <0x01c81000 0x1000>, 410 reg = <0x01c81000 0x1000>,
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index c9e72c89066a..bce0d4277f71 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -12,3 +12,4 @@ config ARCH_SUNXI
12 select PINCTRL_SUNXI 12 select PINCTRL_SUNXI
13 select SPARSE_IRQ 13 select SPARSE_IRQ
14 select SUN4I_TIMER 14 select SUN4I_TIMER
15 select SUN5I_HSTIMER