diff options
author | Fabio Estevam <fabio.estevam@freescale.com> | 2015-03-12 18:07:12 -0400 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2015-03-30 04:43:50 -0400 |
commit | 159097f86d6fa90bbd5dc954c1beeb7b800af92f (patch) | |
tree | 0c54e40e7e4f8d96af818db8713464f2af236cf3 /arch/arm | |
parent | e9b16e9cae90e9e588f2a35df54b50439dd8fed8 (diff) |
ARM: dts: imx6sl-warp: Add BCM4330 support
Warp has a Murata chip based on a BCM4330 that provides Wifi and Bluetooth
functionality.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/boot/dts/imx6sl-warp.dts | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sl-warp.dts b/arch/arm/boot/dts/imx6sl-warp.dts index 8adc843a76ef..64f7decf1fdc 100644 --- a/arch/arm/boot/dts/imx6sl-warp.dts +++ b/arch/arm/boot/dts/imx6sl-warp.dts | |||
@@ -47,6 +47,7 @@ | |||
47 | 47 | ||
48 | /dts-v1/; | 48 | /dts-v1/; |
49 | 49 | ||
50 | #include <dt-bindings/gpio/gpio.h> | ||
50 | #include "imx6sl.dtsi" | 51 | #include "imx6sl.dtsi" |
51 | 52 | ||
52 | / { | 53 | / { |
@@ -90,6 +91,14 @@ | |||
90 | regulator-max-microvolt = <1800000>; | 91 | regulator-max-microvolt = <1800000>; |
91 | }; | 92 | }; |
92 | }; | 93 | }; |
94 | |||
95 | usdhc3_pwrseq: usdhc3_pwrseq { | ||
96 | compatible = "mmc-pwrseq-simple"; | ||
97 | reset-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>, /* WL_REG_ON */ | ||
98 | <&gpio3 25 GPIO_ACTIVE_LOW>, /* BT_REG_ON */ | ||
99 | <&gpio4 4 GPIO_ACTIVE_LOW>, /* BT_WAKE */ | ||
100 | <&gpio4 6 GPIO_ACTIVE_LOW>; /* BT_RST_N */ | ||
101 | }; | ||
93 | }; | 102 | }; |
94 | 103 | ||
95 | &uart1 { | 104 | &uart1 { |
@@ -98,6 +107,13 @@ | |||
98 | status = "okay"; | 107 | status = "okay"; |
99 | }; | 108 | }; |
100 | 109 | ||
110 | &uart2 { | ||
111 | pinctrl-names = "default"; | ||
112 | pinctrl-0 = <&pinctrl_uart2>; | ||
113 | fsl,uart-has-rtscts; | ||
114 | status = "okay"; | ||
115 | }; | ||
116 | |||
101 | &uart3 { | 117 | &uart3 { |
102 | pinctrl-names = "default"; | 118 | pinctrl-names = "default"; |
103 | pinctrl-0 = <&pinctrl_uart3>; | 119 | pinctrl-0 = <&pinctrl_uart3>; |
@@ -127,6 +143,19 @@ | |||
127 | status = "okay"; | 143 | status = "okay"; |
128 | }; | 144 | }; |
129 | 145 | ||
146 | &usdhc3 { | ||
147 | pinctrl-names = "default", "state_100mhz", "state_200mhz"; | ||
148 | pinctrl-0 = <&pinctrl_usdhc3>; | ||
149 | pinctrl-1 = <&pinctrl_usdhc3_100mhz>; | ||
150 | pinctrl-2 = <&pinctrl_usdhc3_200mhz>; | ||
151 | bus-width = <4>; | ||
152 | non-removable; | ||
153 | keep-power-in-suspend; | ||
154 | enable-sdio-wakeup; | ||
155 | mmc-pwrseq = <&usdhc3_pwrseq>; | ||
156 | status = "okay"; | ||
157 | }; | ||
158 | |||
130 | &iomuxc { | 159 | &iomuxc { |
131 | imx6sl-warp { | 160 | imx6sl-warp { |
132 | pinctrl_uart1: uart1grp { | 161 | pinctrl_uart1: uart1grp { |
@@ -136,6 +165,15 @@ | |||
136 | >; | 165 | >; |
137 | }; | 166 | }; |
138 | 167 | ||
168 | pinctrl_uart2: uart2grp { | ||
169 | fsl,pins = < | ||
170 | MX6SL_PAD_EPDC_D12__UART2_RX_DATA 0x41b0b1 | ||
171 | MX6SL_PAD_EPDC_D13__UART2_TX_DATA 0x41b0b1 | ||
172 | MX6SL_PAD_EPDC_D14__UART2_RTS_B 0x4130B1 | ||
173 | MX6SL_PAD_EPDC_D15__UART2_CTS_B 0x4130B1 | ||
174 | >; | ||
175 | }; | ||
176 | |||
139 | pinctrl_uart3: uart3grp { | 177 | pinctrl_uart3: uart3grp { |
140 | fsl,pins = < | 178 | fsl,pins = < |
141 | MX6SL_PAD_AUD_RXC__UART3_RX_DATA 0x41b0b1 | 179 | MX6SL_PAD_AUD_RXC__UART3_RX_DATA 0x41b0b1 |
@@ -187,5 +225,38 @@ | |||
187 | MX6SL_PAD_SD2_DAT7__SD2_DATA7 0x4170f9 | 225 | MX6SL_PAD_SD2_DAT7__SD2_DATA7 0x4170f9 |
188 | >; | 226 | >; |
189 | }; | 227 | }; |
228 | |||
229 | pinctrl_usdhc3: usdhc3grp { | ||
230 | fsl,pins = < | ||
231 | MX6SL_PAD_SD3_CMD__SD3_CMD 0x417059 | ||
232 | MX6SL_PAD_SD3_CLK__SD3_CLK 0x410059 | ||
233 | MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x417059 | ||
234 | MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x417059 | ||
235 | MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x417059 | ||
236 | MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x417059 | ||
237 | >; | ||
238 | }; | ||
239 | |||
240 | pinctrl_usdhc3_100mhz: usdhc3grp100mhz { | ||
241 | fsl,pins = < | ||
242 | MX6SL_PAD_SD3_CMD__SD3_CMD 0x4170b9 | ||
243 | MX6SL_PAD_SD3_CLK__SD3_CLK 0x4100b9 | ||
244 | MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x4170b9 | ||
245 | MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x4170b9 | ||
246 | MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x4170b9 | ||
247 | MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x4170b9 | ||
248 | >; | ||
249 | }; | ||
250 | |||
251 | pinctrl_usdhc3_200mhz: usdhc3grp200mhz { | ||
252 | fsl,pins = < | ||
253 | MX6SL_PAD_SD3_CMD__SD3_CMD 0x4170f9 | ||
254 | MX6SL_PAD_SD3_CLK__SD3_CLK 0x4100f9 | ||
255 | MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x4170f9 | ||
256 | MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x4170f9 | ||
257 | MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x4170f9 | ||
258 | MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x4170f9 | ||
259 | >; | ||
260 | }; | ||
190 | }; | 261 | }; |
191 | }; | 262 | }; |