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authorCatalin Marinas <catalin.marinas@arm.com>2006-04-10 16:32:46 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-04-10 16:32:46 -0400
commit1356c1948da967bc1d4c663762bfe21dfcec4b2f (patch)
tree7d7ddbaa5b9b69b53b9079bd7562eb3daf7682c4 /arch/arm
parentbb54a335ae6d282a4f177c7b35cd149aa9b0b9be (diff)
[ARM] 3473/1: Use numbers 0-15 for the VFP double registers
Patch from Catalin Marinas This patch changes the double registers numbering to 0-15 from even 0-30, in preparation for future VFP extensions. It also fixes the VFP_REG_ZERO bug (value 16 actually represents the 8th double register with the original numbering). The original mcrr/mrrc on CP10 were generating FMRRS/FMSRR instead of FMRRD/FMDRR. The patch changes to CP11 for the correct instructions. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/vfp/vfpdouble.c20
-rw-r--r--arch/arm/vfp/vfphw.S6
-rw-r--r--arch/arm/vfp/vfpsingle.c2
3 files changed, 11 insertions, 17 deletions
diff --git a/arch/arm/vfp/vfpdouble.c b/arch/arm/vfp/vfpdouble.c
index 2418d12e7fb5..febd115dba28 100644
--- a/arch/arm/vfp/vfpdouble.c
+++ b/arch/arm/vfp/vfpdouble.c
@@ -1127,9 +1127,9 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr)
1127{ 1127{
1128 u32 op = inst & FOP_MASK; 1128 u32 op = inst & FOP_MASK;
1129 u32 exceptions = 0; 1129 u32 exceptions = 0;
1130 unsigned int dd = vfp_get_sd(inst); 1130 unsigned int dd = vfp_get_dd(inst);
1131 unsigned int dn = vfp_get_sn(inst); 1131 unsigned int dn = vfp_get_dn(inst);
1132 unsigned int dm = vfp_get_sm(inst); 1132 unsigned int dm = vfp_get_dm(inst);
1133 unsigned int vecitr, veclen, vecstride; 1133 unsigned int vecitr, veclen, vecstride;
1134 u32 (*fop)(int, int, s32, u32); 1134 u32 (*fop)(int, int, s32, u32);
1135 1135
@@ -1146,7 +1146,7 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr)
1146 pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride, 1146 pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride,
1147 (veclen >> FPSCR_LENGTH_BIT) + 1); 1147 (veclen >> FPSCR_LENGTH_BIT) + 1);
1148 1148
1149 fop = (op == FOP_EXT) ? fop_extfns[dn] : fop_fns[FOP_TO_IDX(op)]; 1149 fop = (op == FOP_EXT) ? fop_extfns[FEXT_TO_IDX(inst)] : fop_fns[FOP_TO_IDX(op)];
1150 if (!fop) 1150 if (!fop)
1151 goto invalid; 1151 goto invalid;
1152 1152
@@ -1154,17 +1154,13 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr)
1154 u32 except; 1154 u32 except;
1155 1155
1156 if (op == FOP_EXT) 1156 if (op == FOP_EXT)
1157 pr_debug("VFP: itr%d (d%u.%u) = op[%u] (d%u.%u)\n", 1157 pr_debug("VFP: itr%d (d%u) = op[%u] (d%u)\n",
1158 vecitr >> FPSCR_LENGTH_BIT, 1158 vecitr >> FPSCR_LENGTH_BIT,
1159 dd >> 1, dd & 1, dn, 1159 dd, dn, dm);
1160 dm >> 1, dm & 1);
1161 else 1160 else
1162 pr_debug("VFP: itr%d (d%u.%u) = (d%u.%u) op[%u] (d%u.%u)\n", 1161 pr_debug("VFP: itr%d (d%u) = (d%u) op[%u] (d%u)\n",
1163 vecitr >> FPSCR_LENGTH_BIT, 1162 vecitr >> FPSCR_LENGTH_BIT,
1164 dd >> 1, dd & 1, 1163 dd, dn, FOP_TO_IDX(op), dm);
1165 dn >> 1, dn & 1,
1166 FOP_TO_IDX(op),
1167 dm >> 1, dm & 1);
1168 1164
1169 except = fop(dd, dn, dm, fpscr); 1165 except = fop(dd, dn, dm, fpscr);
1170 pr_debug("VFP: itr%d: exceptions=%08x\n", 1166 pr_debug("VFP: itr%d: exceptions=%08x\n",
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S
index b7ed57e00cd4..a3f65b47aea9 100644
--- a/arch/arm/vfp/vfphw.S
+++ b/arch/arm/vfp/vfphw.S
@@ -189,11 +189,10 @@ vfp_put_float:
189 189
190 .globl vfp_get_double 190 .globl vfp_get_double
191vfp_get_double: 191vfp_get_double:
192 mov r0, r0, lsr #1
193 add pc, pc, r0, lsl #3 192 add pc, pc, r0, lsl #3
194 mov r0, r0 193 mov r0, r0
195 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 194 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
196 mrrc p10, 1, r0, r1, c\dr @ fmrrd r0, r1, d\dr 195 mrrc p11, 1, r0, r1, c\dr @ fmrrd r0, r1, d\dr
197 mov pc, lr 196 mov pc, lr
198 .endr 197 .endr
199 198
@@ -204,10 +203,9 @@ vfp_get_double:
204 203
205 .globl vfp_put_double 204 .globl vfp_put_double
206vfp_put_double: 205vfp_put_double:
207 mov r0, r0, lsr #1
208 add pc, pc, r0, lsl #3 206 add pc, pc, r0, lsl #3
209 mov r0, r0 207 mov r0, r0
210 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 208 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
211 mcrr p10, 1, r1, r2, c\dr @ fmrrd r1, r2, d\dr 209 mcrr p11, 1, r1, r2, c\dr @ fmdrr r1, r2, d\dr
212 mov pc, lr 210 mov pc, lr
213 .endr 211 .endr
diff --git a/arch/arm/vfp/vfpsingle.c b/arch/arm/vfp/vfpsingle.c
index df6e5e23bccb..4ac27f193934 100644
--- a/arch/arm/vfp/vfpsingle.c
+++ b/arch/arm/vfp/vfpsingle.c
@@ -1193,7 +1193,7 @@ u32 vfp_single_cpdo(u32 inst, u32 fpscr)
1193 pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride, 1193 pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride,
1194 (veclen >> FPSCR_LENGTH_BIT) + 1); 1194 (veclen >> FPSCR_LENGTH_BIT) + 1);
1195 1195
1196 fop = (op == FOP_EXT) ? fop_extfns[sn] : fop_fns[FOP_TO_IDX(op)]; 1196 fop = (op == FOP_EXT) ? fop_extfns[FEXT_TO_IDX(inst)] : fop_fns[FOP_TO_IDX(op)];
1197 if (!fop) 1197 if (!fop)
1198 goto invalid; 1198 goto invalid;
1199 1199