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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-09-04 11:14:20 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-10-04 15:20:45 -0400
commit067173526c3bbc2eaeefcf6b7b2a9d998b9e8042 (patch)
tree4da794388079afaf0f43a5aadb750e097846e538 /arch/arm
parent971acb9b420ea1662dd3c48184c4315f87643be5 (diff)
ARM: Provide common header for hard_smp_processor_id()
Provide a common header to read the SMP CPU number from the MPIDR. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/include/asm/smp_mpidr.h12
-rw-r--r--arch/arm/mach-realview/include/mach/smp.h10
-rw-r--r--arch/arm/mach-s5pv310/include/mach/smp.h9
-rw-r--r--arch/arm/mach-tegra/include/mach/smp.h10
-rw-r--r--arch/arm/mach-ux500/include/mach/smp.h9
-rw-r--r--arch/arm/mach-vexpress/include/mach/smp.h9
-rw-r--r--arch/arm/plat-omap/include/plat/smp.h12
7 files changed, 18 insertions, 53 deletions
diff --git a/arch/arm/include/asm/smp_mpidr.h b/arch/arm/include/asm/smp_mpidr.h
new file mode 100644
index 000000000000..7da7105e83e5
--- /dev/null
+++ b/arch/arm/include/asm/smp_mpidr.h
@@ -0,0 +1,12 @@
1#ifndef ASMARM_SMP_MIDR_H
2#define ASMARM_SMP_MIDR_H
3
4#define hard_smp_processor_id() \
5 ({ \
6 unsigned int cpunum; \
7 __asm__("mrc p15, 0, %0, c0, c0, 5\n" \
8 : "=r" (cpunum)); \
9 cpunum &= 0x0F; \
10 })
11
12#endif
diff --git a/arch/arm/mach-realview/include/mach/smp.h b/arch/arm/mach-realview/include/mach/smp.h
index dd53892d44a7..d3cd265cb058 100644
--- a/arch/arm/mach-realview/include/mach/smp.h
+++ b/arch/arm/mach-realview/include/mach/smp.h
@@ -1,16 +1,8 @@
1#ifndef ASMARM_ARCH_SMP_H 1#ifndef ASMARM_ARCH_SMP_H
2#define ASMARM_ARCH_SMP_H 2#define ASMARM_ARCH_SMP_H
3 3
4
5#include <asm/hardware/gic.h> 4#include <asm/hardware/gic.h>
6 5#include <asm/smp_mpidr.h>
7#define hard_smp_processor_id() \
8 ({ \
9 unsigned int cpunum; \
10 __asm__("mrc p15, 0, %0, c0, c0, 5" \
11 : "=r" (cpunum)); \
12 cpunum &= 0x0F; \
13 })
14 6
15/* 7/*
16 * We use IRQ1 as the IPI 8 * We use IRQ1 as the IPI
diff --git a/arch/arm/mach-s5pv310/include/mach/smp.h b/arch/arm/mach-s5pv310/include/mach/smp.h
index 990f3ba88a1f..b7ec252384f4 100644
--- a/arch/arm/mach-s5pv310/include/mach/smp.h
+++ b/arch/arm/mach-s5pv310/include/mach/smp.h
@@ -7,17 +7,10 @@
7#define ASM_ARCH_SMP_H __FILE__ 7#define ASM_ARCH_SMP_H __FILE__
8 8
9#include <asm/hardware/gic.h> 9#include <asm/hardware/gic.h>
10#include <asm/smp_mpidr.h>
10 11
11extern void __iomem *gic_cpu_base_addr; 12extern void __iomem *gic_cpu_base_addr;
12 13
13#define hard_smp_processor_id() \
14 ({ \
15 unsigned int cpunum; \
16 __asm__("mrc p15, 0, %0, c0, c0, 5" \
17 : "=r" (cpunum)); \
18 cpunum &= 0x03; \
19 })
20
21/* 14/*
22 * We use IRQ1 as the IPI 15 * We use IRQ1 as the IPI
23 */ 16 */
diff --git a/arch/arm/mach-tegra/include/mach/smp.h b/arch/arm/mach-tegra/include/mach/smp.h
index 8b42dab79a70..e4a34a35a544 100644
--- a/arch/arm/mach-tegra/include/mach/smp.h
+++ b/arch/arm/mach-tegra/include/mach/smp.h
@@ -1,16 +1,8 @@
1#ifndef ASMARM_ARCH_SMP_H 1#ifndef ASMARM_ARCH_SMP_H
2#define ASMARM_ARCH_SMP_H 2#define ASMARM_ARCH_SMP_H
3 3
4
5#include <asm/hardware/gic.h> 4#include <asm/hardware/gic.h>
6 5#include <asm/smp_mpidr.h>
7#define hard_smp_processor_id() \
8 ({ \
9 unsigned int cpunum; \
10 __asm__("mrc p15, 0, %0, c0, c0, 5" \
11 : "=r" (cpunum)); \
12 cpunum &= 0x0F; \
13 })
14 6
15/* 7/*
16 * We use IRQ1 as the IPI 8 * We use IRQ1 as the IPI
diff --git a/arch/arm/mach-ux500/include/mach/smp.h b/arch/arm/mach-ux500/include/mach/smp.h
index b59f7bc9725d..197e8417375e 100644
--- a/arch/arm/mach-ux500/include/mach/smp.h
+++ b/arch/arm/mach-ux500/include/mach/smp.h
@@ -10,18 +10,11 @@
10#define ASMARM_ARCH_SMP_H 10#define ASMARM_ARCH_SMP_H
11 11
12#include <asm/hardware/gic.h> 12#include <asm/hardware/gic.h>
13#include <asm/smp_mpidr.h>
13 14
14/* This is required to wakeup the secondary core */ 15/* This is required to wakeup the secondary core */
15extern void u8500_secondary_startup(void); 16extern void u8500_secondary_startup(void);
16 17
17#define hard_smp_processor_id() \
18 ({ \
19 unsigned int cpunum; \
20 __asm__("mrc p15, 0, %0, c0, c0, 5" \
21 : "=r" (cpunum)); \
22 cpunum &= 0x0F; \
23 })
24
25/* 18/*
26 * We use IRQ1 as the IPI 19 * We use IRQ1 as the IPI
27 */ 20 */
diff --git a/arch/arm/mach-vexpress/include/mach/smp.h b/arch/arm/mach-vexpress/include/mach/smp.h
index 72a9621ed087..5a6da4fd247e 100644
--- a/arch/arm/mach-vexpress/include/mach/smp.h
+++ b/arch/arm/mach-vexpress/include/mach/smp.h
@@ -2,14 +2,7 @@
2#define __MACH_SMP_H 2#define __MACH_SMP_H
3 3
4#include <asm/hardware/gic.h> 4#include <asm/hardware/gic.h>
5 5#include <asm/smp_mpidr.h>
6#define hard_smp_processor_id() \
7 ({ \
8 unsigned int cpunum; \
9 __asm__("mrc p15, 0, %0, c0, c0, 5" \
10 : "=r" (cpunum)); \
11 cpunum &= 0x0F; \
12 })
13 6
14/* 7/*
15 * We use IRQ1 as the IPI 8 * We use IRQ1 as the IPI
diff --git a/arch/arm/plat-omap/include/plat/smp.h b/arch/arm/plat-omap/include/plat/smp.h
index 5177a9c5a25a..ecd6a488c497 100644
--- a/arch/arm/plat-omap/include/plat/smp.h
+++ b/arch/arm/plat-omap/include/plat/smp.h
@@ -18,6 +18,7 @@
18#define OMAP_ARCH_SMP_H 18#define OMAP_ARCH_SMP_H
19 19
20#include <asm/hardware/gic.h> 20#include <asm/hardware/gic.h>
21#include <asm/smp_mpidr.h>
21 22
22/* Needed for secondary core boot */ 23/* Needed for secondary core boot */
23extern void omap_secondary_startup(void); 24extern void omap_secondary_startup(void);
@@ -33,15 +34,4 @@ static inline void smp_cross_call(const struct cpumask *mask)
33 gic_raise_softirq(mask, 1); 34 gic_raise_softirq(mask, 1);
34} 35}
35 36
36/*
37 * Read MPIDR: Multiprocessor affinity register
38 */
39#define hard_smp_processor_id() \
40 ({ \
41 unsigned int cpunum; \
42 __asm__("mrc p15, 0, %0, c0, c0, 5" \
43 : "=r" (cpunum)); \
44 cpunum &= 0x0F; \
45 })
46
47#endif 37#endif