diff options
author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2015-03-04 05:51:48 -0500 |
---|---|---|
committer | Will Deacon <will.deacon@arm.com> | 2015-03-19 15:46:01 -0400 |
commit | a871d354f795c4960543fb44c9b59af63367d6cf (patch) | |
tree | d7094cd1c9938206e7e95c720056d22200d8ca9f /arch/arm64 | |
parent | a44ef51799109dccba751240e84ca2da937a88ed (diff) |
arm64: remove __switch_data object from head.S
This removes the confusing __switch_data object from head.S,
and replaces it with standard PC-relative references to the
various symbols it encapsulates.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64')
-rw-r--r-- | arch/arm64/kernel/head.S | 29 |
1 files changed, 8 insertions, 21 deletions
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 88f14a77eac0..42ff10967dcc 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S | |||
@@ -253,7 +253,7 @@ ENTRY(stext) | |||
253 | * On return, the CPU will be ready for the MMU to be turned on and | 253 | * On return, the CPU will be ready for the MMU to be turned on and |
254 | * the TCR will have been set. | 254 | * the TCR will have been set. |
255 | */ | 255 | */ |
256 | ldr x27, __switch_data // address to jump to after | 256 | ldr x27, =__mmap_switched // address to jump to after |
257 | // MMU has been enabled | 257 | // MMU has been enabled |
258 | adrp lr, __enable_mmu // return (PIC) address | 258 | adrp lr, __enable_mmu // return (PIC) address |
259 | add lr, lr, #:lo12:__enable_mmu | 259 | add lr, lr, #:lo12:__enable_mmu |
@@ -420,35 +420,22 @@ __create_page_tables: | |||
420 | ENDPROC(__create_page_tables) | 420 | ENDPROC(__create_page_tables) |
421 | .ltorg | 421 | .ltorg |
422 | 422 | ||
423 | .align 3 | ||
424 | .type __switch_data, %object | ||
425 | __switch_data: | ||
426 | .quad __mmap_switched | ||
427 | .quad __bss_start // x6 | ||
428 | .quad __bss_stop // x7 | ||
429 | .quad __fdt_pointer // x5 | ||
430 | .quad memstart_addr // x6 | ||
431 | .quad init_thread_union + THREAD_START_SP // sp | ||
432 | |||
433 | /* | 423 | /* |
434 | * The following fragment of code is executed with the MMU on in MMU mode, and | 424 | * The following fragment of code is executed with the MMU enabled. |
435 | * uses absolute addresses; this is not position independent. | ||
436 | */ | 425 | */ |
426 | .set initial_sp, init_thread_union + THREAD_START_SP | ||
437 | __mmap_switched: | 427 | __mmap_switched: |
438 | adr x3, __switch_data + 8 | 428 | adr_l x6, __bss_start |
429 | adr_l x7, __bss_stop | ||
439 | 430 | ||
440 | ldp x6, x7, [x3], #16 | ||
441 | 1: cmp x6, x7 | 431 | 1: cmp x6, x7 |
442 | b.hs 2f | 432 | b.hs 2f |
443 | str xzr, [x6], #8 // Clear BSS | 433 | str xzr, [x6], #8 // Clear BSS |
444 | b 1b | 434 | b 1b |
445 | 2: | 435 | 2: |
446 | ldr x5, [x3], #8 | 436 | adr_l sp, initial_sp, x4 |
447 | ldr x6, [x3], #8 | 437 | str_l x21, __fdt_pointer, x5 // Save FDT pointer |
448 | ldr x16, [x3] | 438 | str_l x24, memstart_addr, x6 // Save PHYS_OFFSET |
449 | mov sp, x16 | ||
450 | str x21, [x5] // Save FDT pointer | ||
451 | str x24, [x6] // Save PHYS_OFFSET | ||
452 | mov x29, #0 | 439 | mov x29, #0 |
453 | b start_kernel | 440 | b start_kernel |
454 | ENDPROC(__mmap_switched) | 441 | ENDPROC(__mmap_switched) |