Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull KVM updates from Paolo Bonzini:
 "First round of KVM updates for 3.14; PPC parts will come next week.

  Nothing major here, just bugfixes all over the place.  The most
  interesting part is the ARM guys' virtualized interrupt controller
  overhaul, which lets userspace get/set the state and thus enables
  migration of ARM VMs"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (67 commits)
  kvm: make KVM_MMU_AUDIT help text more readable
  KVM: s390: Fix memory access error detection
  KVM: nVMX: Update guest activity state field on L2 exits
  KVM: nVMX: Fix nested_run_pending on activity state HLT
  KVM: nVMX: Clean up handling of VMX-related MSRs
  KVM: nVMX: Add tracepoints for nested_vmexit and nested_vmexit_inject
  KVM: nVMX: Pass vmexit parameters to nested_vmx_vmexit
  KVM: nVMX: Leave VMX mode on clearing of feature control MSR
  KVM: VMX: Fix DR6 update on #DB exception
  KVM: SVM: Fix reading of DR6
  KVM: x86: Sync DR7 on KVM_SET_DEBUGREGS
  add support for Hyper-V reference time counter
  KVM: remove useless write to vcpu->hv_clock.tsc_timestamp
  KVM: x86: fix tsc catchup issue with tsc scaling
  KVM: x86: limit PIT timer frequency
  KVM: x86: handle invalid root_hpa everywhere
  kvm: Provide kvm_vcpu_eligible_for_directed_yield() stub
  kvm: vfio: silence GCC warning
  KVM: ARM: Remove duplicate include
  arm/arm64: KVM: relax the requirements of VMA alignment for THP
  ...

7 files changed, 60 insertions, 18 deletions

diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index 5d85a02d1231..0a1d69751562 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -26,7 +26,12 @@
 #include <asm/kvm_asm.h>
 #include <asm/kvm_mmio.h>
 
-#define KVM_MAX_VCPUS 4
+#if defined(CONFIG_KVM_ARM_MAX_VCPUS)
+#define KVM_MAX_VCPUS CONFIG_KVM_ARM_MAX_VCPUS
+#else
+#define KVM_MAX_VCPUS 0
+#endif
+
 #define KVM_USER_MEM_SLOTS 32
 #define KVM_PRIVATE_MEM_SLOTS 4
 #define KVM_COALESCED_MMIO_PAGE_OFFSET 1
diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h
index 680f74e67497..7f1f9408ff66 100644
--- a/arch/arm64/include/asm/kvm_mmu.h
+++ b/arch/arm64/include/asm/kvm_mmu.h
@@ -136,6 +136,7 @@ static inline void coherent_icache_guest_page(struct kvm *kvm, hva_t hva,
 }
 
 #define kvm_flush_dcache_to_poc(a,l)    __flush_dcache_area((a), (l))
+#define kvm_virt_to_phys(x)             __virt_to_phys((unsigned long)(x))
 
 #endif /* __ASSEMBLY__ */
 #endif /* __ARM64_KVM_MMU_H__ */
diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h
index 5031f4263937..495ab6f84a61 100644
--- a/arch/arm64/include/uapi/asm/kvm.h
+++ b/arch/arm64/include/uapi/asm/kvm.h
@@ -55,8 +55,9 @@ struct kvm_regs {
 #define KVM_ARM_TARGET_AEM_V8           0
 #define KVM_ARM_TARGET_FOUNDATION_V8    1
 #define KVM_ARM_TARGET_CORTEX_A57       2
+#define KVM_ARM_TARGET_XGENE_POTENZA    3
 
-#define KVM_ARM_NUM_TARGETS             3
+#define KVM_ARM_NUM_TARGETS             4
 
 /* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */
 #define KVM_ARM_DEVICE_TYPE_SHIFT       0
@@ -129,6 +130,24 @@ struct kvm_arch_memory_slot {
 #define KVM_REG_ARM64_SYSREG_OP2_MASK   0x0000000000000007
 #define KVM_REG_ARM64_SYSREG_OP2_SHIFT  0
 
+#define ARM64_SYS_REG_SHIFT_MASK(x,n) \
+        (((x) << KVM_REG_ARM64_SYSREG_ ## n ## _SHIFT) & \
+        KVM_REG_ARM64_SYSREG_ ## n ## _MASK)
+
+#define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \
+        (KVM_REG_ARM64 | KVM_REG_ARM64_SYSREG | \
+        ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | \
+        ARM64_SYS_REG_SHIFT_MASK(op1, OP1) | \
+        ARM64_SYS_REG_SHIFT_MASK(crn, CRN) | \
+        ARM64_SYS_REG_SHIFT_MASK(crm, CRM) | \
+        ARM64_SYS_REG_SHIFT_MASK(op2, OP2))
+
+#define ARM64_SYS_REG(...) (__ARM64_SYS_REG(__VA_ARGS__) | KVM_REG_SIZE_U64)
+
+#define KVM_REG_ARM_TIMER_CTL           ARM64_SYS_REG(3, 3, 14, 3, 1)
+#define KVM_REG_ARM_TIMER_CNT           ARM64_SYS_REG(3, 3, 14, 3, 2)
+#define KVM_REG_ARM_TIMER_CVAL          ARM64_SYS_REG(3, 3, 14, 0, 2)
+
 /* KVM_IRQ_LINE irq field index values */
 #define KVM_ARM_IRQ_TYPE_SHIFT          24
 #define KVM_ARM_IRQ_TYPE_MASK           0xff
diff --git a/arch/arm64/kvm/Kconfig b/arch/arm64/kvm/Kconfig
index 4480ab339a00..8ba85e9ea388 100644
--- a/arch/arm64/kvm/Kconfig
+++ b/arch/arm64/kvm/Kconfig
@@ -36,6 +36,17 @@ config KVM_ARM_HOST
         ---help---
           Provides host support for ARM processors.
 
+config KVM_ARM_MAX_VCPUS
+        int "Number maximum supported virtual CPUs per VM"
+        depends on KVM_ARM_HOST
+        default 4
+        help
+          Static number of max supported virtual CPUs per VM.
+
+          If you choose a high number, the vcpu structures will be quite
+          large, so only choose a reasonable number that you expect to
+          actually use.
+
 config KVM_ARM_VGIC
         bool
         depends on KVM_ARM_HOST && OF
diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c
index 3f0731e53274..08745578d54d 100644
--- a/arch/arm64/kvm/guest.c
+++ b/arch/arm64/kvm/guest.c
@@ -207,20 +207,26 @@ int __attribute_const__ kvm_target_cpu(void)
         unsigned long implementor = read_cpuid_implementor();
         unsigned long part_number = read_cpuid_part_number();
 
-        if (implementor != ARM_CPU_IMP_ARM)
-                return -EINVAL;
+        switch (implementor) {
+        case ARM_CPU_IMP_ARM:
+                switch (part_number) {
+                case ARM_CPU_PART_AEM_V8:
+                        return KVM_ARM_TARGET_AEM_V8;
+                case ARM_CPU_PART_FOUNDATION:
+                        return KVM_ARM_TARGET_FOUNDATION_V8;
+                case ARM_CPU_PART_CORTEX_A57:
+                        return KVM_ARM_TARGET_CORTEX_A57;
+                };
+                break;
+        case ARM_CPU_IMP_APM:
+                switch (part_number) {
+                case APM_CPU_PART_POTENZA:
+                        return KVM_ARM_TARGET_XGENE_POTENZA;
+                };
+                break;
+        };
 
-        switch (part_number) {
-        case ARM_CPU_PART_AEM_V8:
-                return KVM_ARM_TARGET_AEM_V8;
-        case ARM_CPU_PART_FOUNDATION:
-                return KVM_ARM_TARGET_FOUNDATION_V8;
-        case ARM_CPU_PART_CORTEX_A57:
-                /* Currently handled by the generic backend */
-                return KVM_ARM_TARGET_CORTEX_A57;
-        default:
-                return -EINVAL;
-        }
+        return -EINVAL;
 }
 
 int kvm_vcpu_set_target(struct kvm_vcpu *vcpu,
diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c
index 42a0f1bddfe7..7bc41eab4c64 100644
--- a/arch/arm64/kvm/handle_exit.c
+++ b/arch/arm64/kvm/handle_exit.c
@@ -39,9 +39,6 @@ static int handle_hvc(struct kvm_vcpu *vcpu, struct kvm_run *run)
 
 static int handle_smc(struct kvm_vcpu *vcpu, struct kvm_run *run)
 {
-        if (kvm_psci_call(vcpu))
-                return 1;
-
         kvm_inject_undefined(vcpu);
         return 1;
 }
diff --git a/arch/arm64/kvm/sys_regs_generic_v8.c b/arch/arm64/kvm/sys_regs_generic_v8.c
index 4268ab9356b1..8fe6f76b0edc 100644
--- a/arch/arm64/kvm/sys_regs_generic_v8.c
+++ b/arch/arm64/kvm/sys_regs_generic_v8.c
@@ -90,6 +90,9 @@ static int __init sys_reg_genericv8_init(void)
                                           &genericv8_target_table);
         kvm_register_target_sys_reg_table(KVM_ARM_TARGET_CORTEX_A57,
                                           &genericv8_target_table);
+        kvm_register_target_sys_reg_table(KVM_ARM_TARGET_XGENE_POTENZA,
+                                          &genericv8_target_table);
+
         return 0;
 }
 late_initcall(sys_reg_genericv8_init);