diff options
author | Catalin Marinas <catalin.marinas@arm.com> | 2013-12-19 12:57:51 -0500 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2013-12-19 12:57:51 -0500 |
commit | 0a5be743e8c3c3230600fbc0cf923fb5dbefd579 (patch) | |
tree | 239236cda1f31532831af7b3214b1db6c398221c /arch/arm64/mm | |
parent | 6ac2104debc235b745265b64d610237a6833fd53 (diff) | |
parent | 1307220d7bb79fc526d006f854ebfd2bf44e6e87 (diff) |
Merge tag 'arm64-suspend' of git://linux-arm.org/linux-2.6-lp into upstream
* tag 'arm64-suspend' of git://linux-arm.org/linux-2.6-lp:
arm64: add CPU power management menu/entries
arm64: kernel: add PM build infrastructure
arm64: kernel: add CPU idle call
arm64: enable generic clockevent broadcast
arm64: kernel: implement HW breakpoints CPU PM notifier
arm64: kernel: refactor code to install/uninstall breakpoints
arm: kvm: implement CPU PM notifier
arm64: kernel: implement fpsimd CPU PM notifier
arm64: kernel: cpu_{suspend/resume} implementation
arm64: kernel: suspend/resume registers save/restore
arm64: kernel: build MPIDR_EL1 hash function data structure
arm64: kernel: add MPIDR_EL1 accessors macros
Conflicts:
arch/arm64/Kconfig
Diffstat (limited to 'arch/arm64/mm')
-rw-r--r-- | arch/arm64/mm/proc.S | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S index 0f7fec52c7f8..bed1f1de1caf 100644 --- a/arch/arm64/mm/proc.S +++ b/arch/arm64/mm/proc.S | |||
@@ -80,6 +80,75 @@ ENTRY(cpu_do_idle) | |||
80 | ret | 80 | ret |
81 | ENDPROC(cpu_do_idle) | 81 | ENDPROC(cpu_do_idle) |
82 | 82 | ||
83 | #ifdef CONFIG_ARM64_CPU_SUSPEND | ||
84 | /** | ||
85 | * cpu_do_suspend - save CPU registers context | ||
86 | * | ||
87 | * x0: virtual address of context pointer | ||
88 | */ | ||
89 | ENTRY(cpu_do_suspend) | ||
90 | mrs x2, tpidr_el0 | ||
91 | mrs x3, tpidrro_el0 | ||
92 | mrs x4, contextidr_el1 | ||
93 | mrs x5, mair_el1 | ||
94 | mrs x6, cpacr_el1 | ||
95 | mrs x7, ttbr1_el1 | ||
96 | mrs x8, tcr_el1 | ||
97 | mrs x9, vbar_el1 | ||
98 | mrs x10, mdscr_el1 | ||
99 | mrs x11, oslsr_el1 | ||
100 | mrs x12, sctlr_el1 | ||
101 | stp x2, x3, [x0] | ||
102 | stp x4, x5, [x0, #16] | ||
103 | stp x6, x7, [x0, #32] | ||
104 | stp x8, x9, [x0, #48] | ||
105 | stp x10, x11, [x0, #64] | ||
106 | str x12, [x0, #80] | ||
107 | ret | ||
108 | ENDPROC(cpu_do_suspend) | ||
109 | |||
110 | /** | ||
111 | * cpu_do_resume - restore CPU register context | ||
112 | * | ||
113 | * x0: Physical address of context pointer | ||
114 | * x1: ttbr0_el1 to be restored | ||
115 | * | ||
116 | * Returns: | ||
117 | * sctlr_el1 value in x0 | ||
118 | */ | ||
119 | ENTRY(cpu_do_resume) | ||
120 | /* | ||
121 | * Invalidate local tlb entries before turning on MMU | ||
122 | */ | ||
123 | tlbi vmalle1 | ||
124 | ldp x2, x3, [x0] | ||
125 | ldp x4, x5, [x0, #16] | ||
126 | ldp x6, x7, [x0, #32] | ||
127 | ldp x8, x9, [x0, #48] | ||
128 | ldp x10, x11, [x0, #64] | ||
129 | ldr x12, [x0, #80] | ||
130 | msr tpidr_el0, x2 | ||
131 | msr tpidrro_el0, x3 | ||
132 | msr contextidr_el1, x4 | ||
133 | msr mair_el1, x5 | ||
134 | msr cpacr_el1, x6 | ||
135 | msr ttbr0_el1, x1 | ||
136 | msr ttbr1_el1, x7 | ||
137 | msr tcr_el1, x8 | ||
138 | msr vbar_el1, x9 | ||
139 | msr mdscr_el1, x10 | ||
140 | /* | ||
141 | * Restore oslsr_el1 by writing oslar_el1 | ||
142 | */ | ||
143 | ubfx x11, x11, #1, #1 | ||
144 | msr oslar_el1, x11 | ||
145 | mov x0, x12 | ||
146 | dsb nsh // Make sure local tlb invalidation completed | ||
147 | isb | ||
148 | ret | ||
149 | ENDPROC(cpu_do_resume) | ||
150 | #endif | ||
151 | |||
83 | /* | 152 | /* |
84 | * cpu_switch_mm(pgd_phys, tsk) | 153 | * cpu_switch_mm(pgd_phys, tsk) |
85 | * | 154 | * |