diff options
author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2015-03-04 05:49:32 -0500 |
---|---|---|
committer | Will Deacon <will.deacon@arm.com> | 2015-03-19 15:46:01 -0400 |
commit | a44ef51799109dccba751240e84ca2da937a88ed (patch) | |
tree | b8a50205aa97bcaee641b2eff56d678b23b44cba /arch/arm64/kernel | |
parent | b784a5d97d0af4835dd0125a3e0e5d0fd48128d6 (diff) |
arm64: remove processor_id
The global processor_id is assigned the MIDR_EL1 value of the boot
CPU in the early init code, but is never referenced afterwards.
As the relevance of the MIDR_EL1 value of the boot CPU is debatable
anyway, especially under big.LITTLE, let's remove it before anyone
starts using it.
Tested-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/kernel')
-rw-r--r-- | arch/arm64/kernel/head.S | 7 | ||||
-rw-r--r-- | arch/arm64/kernel/setup.c | 3 |
2 files changed, 1 insertions, 9 deletions
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index ebb9e630230a..88f14a77eac0 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S | |||
@@ -244,7 +244,6 @@ ENTRY(stext) | |||
244 | bl el2_setup // Drop to EL1, w20=cpu_boot_mode | 244 | bl el2_setup // Drop to EL1, w20=cpu_boot_mode |
245 | bl __calc_phys_offset // x24=PHYS_OFFSET, x28=PHYS_OFFSET-PAGE_OFFSET | 245 | bl __calc_phys_offset // x24=PHYS_OFFSET, x28=PHYS_OFFSET-PAGE_OFFSET |
246 | bl set_cpu_boot_mode_flag | 246 | bl set_cpu_boot_mode_flag |
247 | mrs x22, midr_el1 // x22=cpuid | ||
248 | 247 | ||
249 | bl __vet_fdt | 248 | bl __vet_fdt |
250 | bl __create_page_tables // x25=TTBR0, x26=TTBR1 | 249 | bl __create_page_tables // x25=TTBR0, x26=TTBR1 |
@@ -427,7 +426,6 @@ __switch_data: | |||
427 | .quad __mmap_switched | 426 | .quad __mmap_switched |
428 | .quad __bss_start // x6 | 427 | .quad __bss_start // x6 |
429 | .quad __bss_stop // x7 | 428 | .quad __bss_stop // x7 |
430 | .quad processor_id // x4 | ||
431 | .quad __fdt_pointer // x5 | 429 | .quad __fdt_pointer // x5 |
432 | .quad memstart_addr // x6 | 430 | .quad memstart_addr // x6 |
433 | .quad init_thread_union + THREAD_START_SP // sp | 431 | .quad init_thread_union + THREAD_START_SP // sp |
@@ -445,11 +443,10 @@ __mmap_switched: | |||
445 | str xzr, [x6], #8 // Clear BSS | 443 | str xzr, [x6], #8 // Clear BSS |
446 | b 1b | 444 | b 1b |
447 | 2: | 445 | 2: |
448 | ldp x4, x5, [x3], #16 | 446 | ldr x5, [x3], #8 |
449 | ldr x6, [x3], #8 | 447 | ldr x6, [x3], #8 |
450 | ldr x16, [x3] | 448 | ldr x16, [x3] |
451 | mov sp, x16 | 449 | mov sp, x16 |
452 | str x22, [x4] // Save processor ID | ||
453 | str x21, [x5] // Save FDT pointer | 450 | str x21, [x5] // Save FDT pointer |
454 | str x24, [x6] // Save PHYS_OFFSET | 451 | str x24, [x6] // Save PHYS_OFFSET |
455 | mov x29, #0 | 452 | mov x29, #0 |
@@ -621,8 +618,6 @@ ENTRY(secondary_startup) | |||
621 | /* | 618 | /* |
622 | * Common entry point for secondary CPUs. | 619 | * Common entry point for secondary CPUs. |
623 | */ | 620 | */ |
624 | mrs x22, midr_el1 // x22=cpuid | ||
625 | |||
626 | pgtbl x25, x26, x28 // x25=TTBR0, x26=TTBR1 | 621 | pgtbl x25, x26, x28 // x25=TTBR0, x26=TTBR1 |
627 | bl __cpu_setup // initialise processor | 622 | bl __cpu_setup // initialise processor |
628 | 623 | ||
diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index 3852405d70b5..1783b38cf4c0 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c | |||
@@ -63,9 +63,6 @@ | |||
63 | #include <asm/efi.h> | 63 | #include <asm/efi.h> |
64 | #include <asm/virt.h> | 64 | #include <asm/virt.h> |
65 | 65 | ||
66 | unsigned int processor_id; | ||
67 | EXPORT_SYMBOL(processor_id); | ||
68 | |||
69 | unsigned long elf_hwcap __read_mostly; | 66 | unsigned long elf_hwcap __read_mostly; |
70 | EXPORT_SYMBOL_GPL(elf_hwcap); | 67 | EXPORT_SYMBOL_GPL(elf_hwcap); |
71 | 68 | ||